JP2007171105A - Current detection circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a simple and inexpensive current detection circuit capable of detecting imbalance of an output current from an inverter. <P>SOLUTION: Each output current of U-phase, V-phase and W-phase from the inverter 10 is detected by current transformers 21, 22, 23 respectively, and rectified and smoothed by rectifying circuits 24, 25, 26 respectively. Each output from the rectifying circuits 24, 25, 26 is input into a maximum value preferential circuit 31 and a minimum value preferential circuit 32, and a signal acquired by dividing an output from the maximum value preferential circuit 31 is compared with an output signal from the minimum value preferential circuit by a comparator 35. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a current detection circuit, and more particularly to a current detection circuit that detects an abnormality in an output current of an inverter with a simple circuit configuration.

Conventionally, the current of the electric circuit detected via the current transformer is full-wave rectified by a full-wave rectifier, and this is divided by a resistor and then A / D converted and detected by a microcomputer. Replace the positive side diode with a photocoupler diode, connect a resistor to the light receiving element side to detect the polarity of the current flowing through each phase, find the total current value of each phase from the full wave rectified signal × each phase current polarity signal, There is disclosed an open phase detection circuit that averages each combined current value of each phase, obtains the maximum and minimum values therein, and determines the open phase when the ratio is equal to or higher than a preset level (for example, a patent) Reference 1).
FIG. 5 is a block diagram of a conventional phase loss detection device.
As shown in the figure, it is composed of a current transformer CT that detects the current in the electric circuit, a full-wave rectifier circuit 51 that full-wave rectifies the output of the current transformer CT, and an arithmetic processing means 52 such as a microcomputer. Yes.
A series circuit of resistors R1 and R2 and a series circuit of switching elements SW and smoothing capacitors C1 and C2 are connected in parallel with the full-wave rectifier circuit 52. The terminal voltages of the smoothing capacitors C1 and C2 are supplied to the arithmetic processing means 52. Used as a power source.
Further, the voltage divided by the resistors R1 and R2 is A / D converted and supplied to the arithmetic processing means 52 for current detection during a period in which the switching element SW is off. Photocouplers PHr, PHs, and PHt are connected to the positive polarity side of the full-wave rectifier circuit 51, and resistors Rr, Rs, and Rt are connected to the phototransistor side as a light receiving element. Polarity is detected.
FIG. 6 is a block diagram showing an open phase discriminating section of the arithmetic processing means. Reference numeral 61 is A / D conversion means, 62 is full-wave rectified data, 63r to 63t are phase phase signals, 64r to 64t are multiplication means, and 65r. Reference numerals ˜65t denote combined currents of the respective phases, 66r to 66t denote averaging processing means, 67 denotes a maximum value / minimum value calculation means, and 68 denotes an open phase determination means. Each phase combined current (each phase combined current: full wave rectification) is obtained by multiplying the output voltage of the full wave rectifier circuit 51 by resistance dividing and A / D conversion and the polarity signal of the current flowing through the resistors Rr to Rt in FIG. Data × polarity signal) is averaged by the averaging processing means 66r to 66t to obtain the average value, and the computing means 67 obtains the maximum and minimum values, and the ratio is set in advance. If the value is greater than the specified value, it is determined that the phase is missing.
JP 2003-302435 A

As described above, the conventional open-phase detection circuit performs full-wave rectification on the output of the current transformer CT that detects the current of each phase, obtains full-wave rectification data using a common burden resistance as the burden resistance, The phase commutation data is multiplied by the polarity signal to determine the combined current of each phase, the average value of the combined current of each phase is calculated, and the missing phase is determined by calculating the ratio between the maximum and minimum values. Therefore, there is a problem that an arithmetic processing means such as a photocoupler or a microcomputer for generating a polarity signal is required, and the circuit configuration is complicated.
The present invention has been made in view of such problems, and an object thereof is to provide a low-cost current detection circuit with a simple circuit configuration.

In order to solve the above problems, the present invention is configured as follows.
The invention according to claim 1 includes a plurality of current transformers that respectively detect output currents of respective phases of the inverter, a plurality of rectifier circuits that rectify the outputs of the current transformers, and the most of the rectifier circuits. The maximum value priority circuit for detecting a large output signal, the minimum value priority circuit for detecting the smallest output signal in the rectifier circuit, and the output of the maximum value priority circuit and the output of the minimum value priority circuit are compared. A comparator, and detecting an imbalance in the output current of each phase from the difference between the output of the maximum value priority circuit and the output of the minimum value priority circuit.
According to a second aspect of the present invention, the rectifier circuit includes a load resistor connected to the output of the current transformer, a diode for rectifying the output of the current transformer, and a smoothed signal. And a discharge resistor for discharging the capacitor with a predetermined time constant.
According to a third aspect of the present invention, there is provided a comparator that detects that the output of the maximum value priority circuit exceeds a predetermined level, and a level setting circuit that sets the level. It is characterized by detecting current.

According to the first aspect of the invention, the signals from the current transformers that detect the respective output currents of the respective phases are rectified, and the largest output signal between the phases is compared with the smallest output signal between the phases. Since the current imbalance of each phase is detected from the magnitude of the difference, it is possible to detect the output current imbalance with a simple circuit configuration without requiring an arithmetic processing means such as a microcomputer.
According to the invention described in claim 2, the rectifier circuit includes a diode for rectifying the output of each current transformer, a capacitor for smoothing the rectified signal, and a discharge resistor for discharging the charge of the capacitor with a predetermined time constant. Since the discharge time constant can be set in accordance with the output frequency range of the inverter, an accurate phase loss detection circuit for the inverter can be realized.
According to the invention of claim 3, if the current detection circuit includes a comparator that detects that the output of the maximum value priority circuit exceeds a predetermined level, and a level setting circuit that sets the level. , Phase loss and overcurrent can be detected with a simple circuit configuration.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a circuit diagram of a current detection circuit showing a first embodiment of the present invention.
In the figure, 21, 22 and 23 are current transformers for detecting the output currents of the U phase, V phase and W phase of the inverter 10, 24, 25 and 26 are rectifier circuits, 31 is a maximum value priority circuit, 32, respectively. Is a minimum value priority circuit, 33 and 34 are resistors, and 35 is a comparator.
Reference numeral 40 denotes a three-phase AC motor driven by the inverter 10.
The maximum value priority circuit 31 is composed of three diodes, the anode side is connected to the outputs of the rectifier circuits 24, 25, and 26, and the cathode sides are connected to each other, corresponding to the current of the phase having the maximum current value. Output a signal.
Similarly, the minimum value priority circuit 32 is composed of three diodes, the cathode side is connected to the outputs of the rectifier circuits 24, 25, and 26, the anode sides are connected to each other, and the current value is minimized. Outputs a signal corresponding to the current.

Next, a detailed configuration of the rectifier circuit will be described.
FIG. 2 is a circuit diagram of the rectifier circuit 24.
Since the rectifier circuit 25 and the rectifier circuit 26 have the same circuit configuration as the rectifier circuit 24, only the rectifier circuit 24 will be described.
In FIG. 2, 241 is a burden resistance connected to the output of the current transformer 21, 242 is a diode for half-wave rectification, 243 is a capacitor for smoothing the half-wave rectified signal, and 244 is the charge of the capacitor. A discharge resistor 245 for discharging at a predetermined time constant is an operational amplifier that forms a voltage follower circuit. In this embodiment, half-wave rectification is performed, but full-wave rectification may be performed.

Next, the operation of this embodiment will be described.
FIG. 3 is a schematic diagram of signal waveforms showing the operation of each part of the current detection circuit of the present invention.
The output current of the inverter generally includes a harmonic component, but a sine wave current waveform having only a fundamental component is used for easy understanding. FIG. 3A shows signal waveforms at various parts during normal operation, and FIG. 3B shows signal waveforms at various parts during phase loss.

First, the normal operation will be described.
3A, reference numerals 311, 312, and 313 denote current detection waveforms of a U-phase current, a V-phase current, and a W-phase current, respectively, and the voltages at both ends of the burden resistor 241 (U-phase) of the rectifier circuit shown in FIG. It is a waveform.
Reference numeral 314 is an output signal of the maximum value priority circuit 31, 315 is a divided signal obtained by dividing the output signal 314 of the maximum value priority circuit 31 by the resistors 33 and 34, and this divided signal is applied to the negative terminal of the comparator 35. Have been entered. Reference numeral 316 denotes an output signal of the minimum value priority circuit 32, which is input to the plus terminal of the comparator 35.
As can be seen from the figure, since the output 316 of the minimum value priority circuit 32 is relatively close to the output 314 of the maximum value priority circuit 31 under normal conditions, the value is larger than the divided voltage signal 315, and the comparator output (Output terminal A) becomes H level.

Next, the operation in the case where an imbalance occurs in the output current due to phase loss will be described.
In FIG. 3B, 311, 312, and 313 are current detection waveforms of the U-phase current, V-phase current, and W-phase current, respectively. As shown in the figure, the operation when the W phase is lost and no current flows through the W phase will be described.
The output signal 314 of the maximum value priority circuit 31 has a signal waveform close to normal when the time constant of discharge by the capacitor 243 and the resistor 244 is sufficiently long with respect to the period of the output current, so the divided signal 315 is also close to normal. It becomes a signal waveform. On the other hand, the output signal of the minimum value priority circuit 32 is zero because the output signal of the W-phase rectifier circuit is zero. Therefore, at the time of phase loss, the output signal 316 of the minimum value priority circuit is smaller than the divided signal 315 of the maximum value priority circuit, and the comparator output becomes L level.

    Thus, according to the present embodiment, it is possible to detect an unbalanced current with a simple circuit configuration without requiring an arithmetic processing means such as a microcomputer.

FIG. 4 is a circuit diagram of a current detection circuit showing a second embodiment of the present invention.
In the figure, 36 is a level setting circuit, and 37 is a comparator.
When an overcurrent flows in the output of the inverter and the output of the maximum value detection circuit 31 exceeds the value set by the level setting circuit 36, the output (output terminal B) of the comparator 37 becomes L level.
Thus, in this embodiment, since the comparator and the level setting circuit are added to the current detection circuit shown in the first embodiment, the unbalanced current and the overcurrent can be detected with a simple circuit configuration.

    It can also be used to detect unbalanced current between phases in a general multiphase AC power source.

1 is a circuit diagram of a current detection circuit according to a first embodiment of the present invention. Circuit diagram of the rectifier circuit of the present invention Schematic diagram of signal waveforms showing the operation of each part of the current detection circuit of the present invention Circuit diagram of a current detection circuit showing a second embodiment of the present invention Configuration diagram of conventional phase loss detector The block diagram which shows the phase loss discrimination | determination part of the arithmetic processing means of the conventional phase loss detection apparatus

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Inverter 20 Current detection circuit 21-23 Current transformer 24-26 Rectification circuit 241 Burden resistance 242 Diode 243 Capacitor 244 Discharge resistance 245 Operational amplifier 31 Maximum value priority circuit 32 Minimum value priority circuit 33, 34 Resistance 35, 37 Comparator 36 Level Setting circuit 40 Three-phase AC motor

Claims (3)

  A plurality of current transformers for detecting the output current of each phase of the inverter, a plurality of rectifier circuits for rectifying the output of each of the current transformers, and a maximum value priority for detecting the largest output signal in the rectifier circuit Circuit, a minimum value priority circuit for detecting the smallest output signal in the rectifier circuit, and a comparator for comparing the output of the maximum value priority circuit and the output of the minimum value priority circuit, A current detection circuit for detecting an imbalance in output current of each phase from a difference between an output of a priority circuit and an output of the minimum value priority circuit.   The rectifier circuit includes a burden resistor connected to the output of the current transformer, a diode for rectifying the output of the current transformer, a capacitor for smoothing the rectified signal, and a charge of the capacitor for a predetermined amount. The current detection circuit according to claim 1, further comprising: a discharge resistor that discharges with a time constant. A comparator that detects that the output of the maximum value priority circuit exceeds a predetermined level; and a level setting circuit that sets the level;
The current detection circuit according to claim 1, wherein an overcurrent of the output current is detected.

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