JP5978927B2 - 5 level power converter - Google Patents

Description

  The present invention relates to a five-level power converter that converts an alternating voltage into a five-level voltage.

  A five-level power converter, such as a PWM AC / DC converter, is a device that suppresses harmonic currents of an AC input current while converting an AC voltage into a DC voltage by turning on and off a switching element such as an IGBT. FIG. 10 shows a typical example of a 12-switch 5-level type circuit configuration in a conventional PWM AC / DC converter.

  In FIG. 10, voltage conversion units 110 </ b> R, 110 </ b> S, and 110 </ b> T are provided for each phase of the three-phase AC power supply 100. The voltage converting unit 110R includes switching elements SR1, SR2, SR3, SR4 (for example, made of IGBT) connected in series, a diode DR1 having an anode connected to the switching element SR1, and a diode having a cathode connected to the switching element SR4. DR1 ′, a flying capacitor C1 connected between a common connection point of switching elements SR1 and SR2 and a common connection point of switching elements SR3 and SR4, a common connection point of diode DR1 and switching element SR1, and diode DR1 ′ and A flying capacitor C3 connected between a common connection point of the switching element SR4 and a diode series circuit connected in parallel to the flying capacitor C3 and formed by connecting diodes DR2 and DR2 ′ in series. To have. The voltage converters 110S and 110T are configured in the same manner as the voltage converter 110R.

  The cathodes of the diodes DR1, DS1, and DT1 of the voltage converters 110R, 110S, and 110T are connected to the clamp capacitor C2 side end of the clamp capacitor series circuit formed by connecting the clamp capacitors C2 and C2 ′ in series, and the diodes DR1 ′, Each anode of DS1 'and DT1' is connected to the end of the clamp capacitor C2 '. A load 120 is connected between both ends of the clamp capacitor series circuit.

  The common connection point of switching elements SR2 and SR3 of voltage conversion unit 110R is connected to the R phase of AC power supply 100 via reactor LR, and the common connection point of switching elements SS2 and SS3 of voltage conversion unit 110S is connected to reactor LS. The common connection point of the switching elements ST2 and ST3 of the voltage converter 110T is connected to the T phase of the AC power supply 100 via the reactor LT.

  The common connection point of the diodes DR2 and DR2 ′ of the voltage conversion unit 110R, the common connection point of the diodes DS2 and DS2 ′ of the voltage conversion unit 110S, and the common connection point of the diodes DT2 and DT2 ′ of the voltage conversion unit 110T are clamp capacitors. Commonly connected to a terminal M (neutral point) which is a common connection point of C2 and C2 ′.

  In FIG. 10, the common connection point of the switching elements SR2 and SR3 of the voltage conversion unit 110R is a terminal A.

  In the circuit of FIG. 10, the three-phase AC input phase voltages (VinR, VinS, VinT) are converted into the DC voltage Vdc by turning on and off the switching elements SR1 to SR4, SS1 to SS4, and ST1 to ST4.

  The clamp capacitors (C2, C2 ′) are provided to evenly divide the DC voltage Vdc at the neutral point M. The applied voltage (Vc2, Vc2 ′) of each capacitor is controlled to be kept at Vc2 = Vc2 ′ = Vdc / 2. This control is disclosed, for example, in Patent Document 1 as a conventional technique.

  The voltage (Vc1, Vc1′Vc1 ″) of the flying capacitors (C1, C1 ′, C1 ″) is controlled to be kept at Vc1 = Vc1 ′ = Vc1 ″ = Vdc / 4. This control is performed by detecting the flying capacitor voltage. , And the switching element is turned on and off to charge and discharge the flying capacitor.

  Table 1 shows the switching pattern (NO. 1 to NO. 8), the charging / discharging state of the flying capacitor C1, and the voltage between the terminals A and M in the circuit of FIG. 10 (in the case of the R phase).

In Table 1,
<Input phase voltage (VinR): positive period>
Switching pattern NO. 1, SR1 and SR2 are turned on, SR3 and SR4 are turned off, and a voltage + Vdc / 2 is output between terminals A and M.

  Switching pattern NO. 2, SR1 and SR3 are turned on, SR2 and SR4 are turned off, and a voltage + Vdc / 4 is output between the terminals A and M.

  Switching pattern NO. 3, SR2 and SR4 are turned on, and SR1 and SR3 are turned off, and the voltage + Vdc / 4 is output between the terminals A and M.

  Switching pattern NO. 4, SR3 and SR4 are turned on and SR1 and SR2 are turned off, and a voltage 0 is output between the terminals A and M.

<Input phase voltage (VinR): negative period>
Switching pattern NO. 5, SR1 and SR2 are turned on, SR3 and SR4 are turned off, and a voltage 0 is output between the terminals A and M.

  Switching pattern NO. 6, SR1 and SR3 are turned on and SR2 and SR4 are turned off, and a voltage −Vdc / 4 is output between the terminals A and M.

  Switching pattern NO. 7, SR2 and SR4 are turned on and SR1 and SR3 are turned off, and a voltage −Vdc / 4 is output between the terminals A and M.

  Switching pattern NO. 8, SR3 and SR4 are turned on, SR1 and SR2 are turned off, and a voltage −Vdc / 2 is output between the terminals A and M.

  No. above. 1-NO. By selecting the switching pattern of 8, a 5-level voltage as shown in FIG. 11 is obtained between the terminals A and M. As the waveform in FIG. 11 approximates a sine wave having a lower harmonic component, the harmonic current of the AC input current can be suppressed. The above operation is the same for the S-phase and T-phase.

Japanese Patent Application Laid-Open No. 07-75345

  The circuit of FIG. 10 includes four diodes, four switching elements, and two capacitors per phase. In the case of a single-phase configuration, if two clamp capacitors (C2, C2 ′) connected to the DC output are included, eight diodes, eight switching elements, and six capacitors are required.

  In the case of a three-phase configuration, if two clamp capacitors (C2, C2 ′) connected to the DC output are included, twelve diodes, twelve switching elements, and eight capacitors are required. For this reason, the required number of capacitors increases and the apparatus becomes larger.

  The present invention solves the above-described problems, and an object of the present invention is to provide a five-level power converter that reduces the number of components of the capacitor and reduces the size of the device.

  The 5-level power converter according to claim 1 for solving the above-mentioned problem is a 5-level power converter that receives an AC voltage and outputs a 5-level voltage, wherein the first to fourth diodes are sequentially arranged. A series-connected diode series circuit; a flying capacitor connected between a common connection point of the first and second diodes and a common connection point of the third and fourth diodes; and both ends of the flying capacitor The first and second switching elements connected in series between each other, and switching means having one end connected to the common connection point of the second and third diodes and capable of controlling in the reverse withstand voltage directions. A plurality of 5-level voltage converters are provided, and the first and second switches of at least one 5-level voltage converter among the plurality of 5-level voltage converters Having a reactor connected between the common connection point of the switching elements and the AC power supply, and first and second clamp capacitors connected in series, and the first clamp capacitor side end is the plurality of five-level voltage conversions Are connected to one end of each diode series circuit, and the second clamp capacitor side end is connected to the other end of each diode series circuit, and is a common connection point of the first and second clamp capacitors. The point is that the first and second switching elements and the switching means are turned on by a clamp capacitor series circuit connected to the other end of each switching means of the plurality of five-level voltage converters, and a plurality of switching patterns, By controlling off, a voltage of 5 levels is output between the common connection point of the first and second switching elements and the neutral point. It is characterized by and a control means for.

  According to a second aspect of the present invention, there is provided a five-level power converter according to the first aspect, wherein the five-level voltage converter is provided in each phase of a three-phase alternating current, and the first and second of the respective five-level voltage converters. The common connection points of the switching elements are respectively connected to the U-phase, V-phase, and W-phase of the three-phase AC power supply through the reactors.

  According to the above configuration, the number of component parts of the device, in particular, the number of capacitor components can be reduced, and the device configuration can be simplified.

  ADVANTAGE OF THE INVENTION According to this invention, the 5-level power converter which reduced the number of parts and aimed at size reduction of an apparatus structure can be provided.

The circuit diagram of the example of one embodiment of the present invention. The principal part circuit diagram which shows the electric current path when the electric current in FIG. 1 is positive. The principal part circuit diagram which shows the electric current path | route in case the electric current is negative in FIG. The control block diagram of one example of embodiment of this invention. Explanatory drawing showing the comparison with the voltage command value and triangular wave carrier signal in one Example of this invention. FIG. 2 is a voltage waveform diagram between O and NP in the circuit of FIG. 1. The circuit diagram of the other embodiment of this invention. The control block diagram of the other embodiment of this invention. Explanatory drawing showing the comparison with the voltage command value and triangular wave carrier signal in the other Example of this invention. The circuit diagram which shows an example of the conventional 5 level power converter. FIG. 11 is a voltage waveform diagram between A and M in the circuit of FIG. 10.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings, but the present invention is not limited to the following embodiments.

  FIG. 1 shows a five-level power converter according to a first embodiment of the present invention. In FIG. 1, D1 to D4 are first to fourth diodes sequentially connected in series, and constitute a diode series circuit of the present invention. A flying capacitor C1 is connected between a common connection point of the diodes D1 and D2 and a common connection point of the diodes D3 and D4. The first and second switching elements S1, S2 are connected in series between both ends of the flying capacitor C1. Switching elements S3 and S4 as switching means of the present invention are connected in series in the reverse voltage directions opposite to each other at the common connection point of the second and third diodes D2 and D3 (bidirectional switch by S3 and S4). Is configured).

  The switching elements S1 to S4, the diodes D1 to D4, and the flying capacitor C1 constitute a five-level voltage conversion unit 200.

  D1 ′ to D4 ′ are first to fourth diodes sequentially connected in series, and constitute a diode series circuit of the present invention. A flying capacitor C1 ′ is connected between a common connection point of the diodes D1 ′ and D2 ′ and a common connection point of the diodes D3 ′ and D4 ′. First and second switching elements S1 ′ and S2 ′ are connected in series between both ends of the flying capacitor C1 ′. Switching elements S3 ′ and S4 ′ as switching means of the present invention are connected in series in opposite breakdown voltage directions to the common connection point of the second and third diodes D2 ′ and D3 ′ (S3 ′, S4 'constitutes a bidirectional switch).

  The switching elements S1 ′ to S4 ′, the diodes D1 ′ to D4 ′, and the flying capacitor C1 ′ constitute a five-level voltage converter 200 ′.

  Reference numeral 120 denotes a load, and clamp capacitors C <b> 2 and C <b> 3 are connected in series between both ends of the load 120. The cathodes of the diodes D1 and D1 ′ are connected to the common connection point P of the clamp capacitor C2 and the load 120, respectively, and the anodes of the diodes D4 and D4 ′ are connected to the common connection point N of the clamp capacitor C3 and the load 120, respectively. Yes.

  The ends of the switching elements S4 and S4 'are connected to a common connection point (neutral point) NP of the clamp capacitors C2 and C3, respectively. The common connection point O of the switching elements S1 and S2 is connected to the input terminal A via the reactor L, and the common connection point of the switching elements S1 ′ and S2 ′ is connected to the input terminal B. A voltage Vin of a single-phase AC power supply is applied between the input terminals A and B.

  The reactor L may be connected between the common connection point of the switching elements S1 ′ and S2 ′ and the input terminal B instead of the input terminal A side, and both the input terminal A side and the B side are connected. You may connect to.

  The circuit shown in FIG. 1 is a circuit that generates a DC voltage at terminals P and N by turning on and off switching elements S1 to S4 and S1 ′ to S4 ′ by a control circuit (control means) (not shown). Yes.

In the circuit of FIG. 1, since a diode is used in the main current path, the output voltage level changes depending on the polarity of the input voltage. Table 2 shows the switching pattern (NO.1 to NO.8), the charging / discharging state of the flying capacitor C1 and the voltage V _O-NP between the terminals O-NP in the circuit on the 5-level voltage converter 200 side in FIG. An example is shown.

  As shown in Table 2, the circuit of FIG. 1 outputs 5 levels of voltage including one type of zero level for each polarity of the input voltage.

  Here, as in the conventional circuit described in Table 1, the voltages VC2 and VC3 applied to the clamp capacitors C2 and C3 are controlled to Vdc / 2. As with the conventional circuit, the switching pattern NO. 2, 3 and NO. Flying capacitor voltages VC1 and VC1 ′ are controlled to Vdc / 4 by charge / discharge control using 6 and 7 separately.

Next, the operation in one phase will be described. First, the voltage (output voltage V _O-NP ) output to the terminal O when the neutral point NP in FIG. 1 is used as a reference will be described. 2 shows a current path when the polarity of the input voltage shown in Table 2 is positive, and FIG. 3 shows a current path when the input voltage shown in Table 2 is negative. In this embodiment, since the power factor 1 control is performed, the input voltage Vin and the input current Iin are considered to be in phase.

  The output voltage and current path are as follows.

<Input voltage (Vin): positive period>
Switching pattern NO. 1, only the switching element S1 is turned on. A current flows through a path from the terminal O → S1 → D1 → terminal P, and the output voltage V _O-NP outputs + Vdc / 2.

Switching pattern NO. 2, the switching elements S1 and S3 are turned on. A current flows through a path from the terminal O → S1 → C1 → D3 → S3 → S4 → terminal NP, and the output voltage V _O-NP outputs + Vdc / 4.

Switching pattern NO. 3, only the switching element S2 is turned on. A current flows through a path from the terminal O → S 2 → C 1 → D 1 → terminal P, and the output voltage V _O-NP outputs + Vdc / 4.

Switching pattern NO. 4, the switching elements S2, S3 and S4 are turned on. A current flows through a route of terminal O → S2 → D3 → S3 → S4 → terminal NP, and the output voltage V _O-NP outputs 0.

<Input phase voltage (Vin): negative period>
Switching pattern NO. 5, the switching elements S1, S3, and S4 are turned on. A current flows through a route of terminal NP → S4 → S3 → D2 → S1 → terminal O, and output voltage V _O-NP outputs 0.

Switching pattern NO. 6, only the switching element S1 is turned on. A current flows through a route of terminal N → D4 → C1 → S1 → terminal O, and the output voltage V _O-NP outputs −Vdc / 4.

Switching pattern NO. 7, the switching elements S2 and S4 are turned on. A current flows through a route of terminal NP → S4 → S3 → D2 → C1 → S2 → terminal O, and output voltage V _O-NP outputs −Vdc / 4.

Switching pattern NO. At 8, only the switching element S2 is turned on. A current flows through a route of terminal N → D4 → S2 → terminal O, and the output voltage V _O-NP outputs −Vdc / 2.

  In this way, the circuit of FIG. 1 has a 5-level voltage including two types of zero levels (one type of zero level for each polarity) at the terminal O when the neutral point NP is used as a reference. Can be output.

  Next, charging of the flying capacitor will be described. The flying capacitor (C1, C1 ′) controls the flying capacitor voltage (VC1, VC1 ′) to a constant value by selecting and switching one of the charge mode and the discharge mode.

  The path for charging and discharging the flying capacitor C1 is as follows.

<Input voltage (Vin): positive period>
Switching pattern NO. 2 (C1 charging mode), by turning S1 on, S2 off, S3 on, and S4 off, current flows through the path from terminal O → S1 → C1 → D3 → S3 → S4 → terminal NP, charging C1 To do.

  Switching pattern NO. In 3 (C1 discharge mode), S1 is turned off, S2 is turned on, S3 is turned off, and S4 is turned off, so that a current flows through a route from terminal O → S2 → C1 → D1 → terminal P, and C1 is discharged.

<Input phase voltage (Vin): negative period>
Switching pattern NO. In 6 (C1 discharge mode), S1 is turned on, S2 is turned off, S3 is turned off, and S4 is turned off, whereby a current flows through a route from terminal N → D4 → C1 → S1 → terminal O, and C1 is discharged.

  Switching pattern NO. 7 (C1 charging mode), by turning S1 off, S2 on, S3 off, and S4 on, current flows through the path from terminal NP → S4 → S3 → D2 → C1 → S2 → terminal O, charging C1 To do.

  Thus, since the charge / discharge mode of the flying capacitor C1 can be switched while maintaining the same voltage level, the charge / discharge control of C1 becomes possible by properly using the switching pattern, and the voltage VC1 of C1 is set to Vdc / 4. Can be controlled constant.

  The above operations (output voltage, current path, and charging / discharging of the flying capacitor) are the same for the five-level voltage converter 200 '.

  Next, a control circuit of the 5-level power converter according to the first embodiment will be described. FIG. 4 is a block diagram of the control circuit of this embodiment, and the same parts as those in FIG.

  In FIG. 4, a power source (Vsource) is a single-phase AC power source connected between terminals A and B in FIG. 1, and a 5-level PWM circuit includes 5-level voltage converters 200 and 200 ′.

  The DC voltage detection value Vdc_det of the clamp capacitors C2 and C3 is introduced into the adder 211 of the DC voltage control unit 210, and a deviation from the DC voltage command value Vdc_set is taken.

  The PI controller 212 performs PI (AVR) control on the deviation output of the adder 211 to obtain a q-axis current command value Iq_set.

  The power transformer phase angle θ of the single-phase AC power supply Vsource is obtained by the instrument transformer PT, the zero cross detector 221 and the phase calculator 222.

  Further, the effective value Vin_det of the input voltage Vin is obtained by the instrument transformer PT and the effective value detector 223.

  The rotational coordinate conversion unit 231 of the input current control unit 230 uses the power source phase angle θ obtained by the phase calculator 222 to convert the input current Iin detected via the current transformer CT into the d-axis current detection values Id_det and q The rotational coordinate is converted to the shaft current detection value Iq_det.

  The adder 232 takes a deviation of the q-axis current detection value Iq_det from the q-axis current command value Iq_set, and the PI controller 233 applies PI (ACR) control to the deviation. The effective value detection value Vin_det of the input voltage Vin is added to obtain a q-axis voltage command value Vq *.

  On the other hand, in this embodiment, the input power factor 1 control is performed by setting the d-axis current command value Id_set = 0. The d-axis current detection value Id_det is deviated from Id_set = 0 in the adder 235, and the PI controller 236 applies PI (ACR) control to the deviation output of the adder 235 to provide the d-axis voltage command value Vd. Get *.

  The rotation coordinate reverse conversion unit 237 performs the reverse rotation conversion of the voltage command values Vd * and Vq * using the power supply phase angle θ, and the voltage command value VR * between the O terminal and the NP terminal of the circuit of FIG. Then, a voltage command value VS * between the B terminal and the NP terminal is obtained (VS * = − VR *).

  Reference numeral 240 denotes a switching pattern selection unit, which includes the voltage command values VR * and VS *, a triangular wave carrier signal output from the carrier signal generator 241, a detection signal of the zero cross detector 221, and a detection voltage of the flying capacitors C1 and C1 ′. VC1 and VC1 ′ are respectively input.

  The switching pattern selection unit 240 compares the voltage command value with the triangular wave carrier signal and compares the amplitudes of the VR *, VS * and the triangular wave carrier signals (Carrier 1 to 4) shown in FIG. A switching pattern that obtains a value and outputs a voltage at the same level as the pulse voltage command value is selected.

Next, the pulse voltage command value and switching pattern of the R phase (phase on the 5-level voltage converter 200 side) will be described with reference to FIG.
(1) When “VR *> Carrier1”, the pulse voltage command value = + Vdc / 2, and the switching pattern (NO.1) is selected.
(2) When “VR * <Carrier1 and VR *> Carrier2”, the pulse voltage command value = + Vdc / 4, and the switching pattern (NO. 2 or NO. 3) is selected. When the flying capacitor C1 is in the charging mode, NO. 2. NO. 3 is selected. In the charge mode and the discharge mode, the flying capacitor voltage (VC1) is compared with the command value (Vdc / 4), and the discharge mode is selected if VC1 is larger than the command value, and the charge mode is selected if smaller.
(3) When “VR * <Carrier2 and VR *> Carrier3”, the pulse voltage command value = 0, and the switching pattern (NO.4 or NO.5) is selected. When the polarity of the input voltage Vin is positive, NO. 4. When negative, NO. 5 is selected.
(4) When “VR * <Carrier3 and VR *> Carrier4”, the pulse voltage command value = −Vdc / 4, and the switching pattern (NO.6 or NO.7) is selected. When the flying capacitor C1 is in the charging mode, NO. 7. NO. 6 is selected. In the charge mode and the discharge mode, the flying capacitor voltage (VC1) is compared with the command value (Vdc / 4), and the discharge mode is selected if VC1 is larger than the command value, and the charge mode is selected if smaller.
(5) When “VR * <Carrier4”, the pulse voltage command value = −Vdc / 2, and the switching pattern (NO. 8) is selected.

With the above control operation, the voltage V _O-NP between the O terminal and the NP terminal becomes a five-level AC voltage waveform as shown in FIG. Similar to the voltage waveform in the conventional circuit shown in FIG. 11, it is possible to obtain a voltage of five levels.

  Similarly, for the S phase (phase on the 5-level voltage converter 200 ′ side), the switching pattern is selected by comparing the amplitudes of VS * and the triangular wave carrier signals (Carriers 1 to 4).

  Note that control blocks other than those shown in FIG. 4 may be applied as long as the five-level AC voltage shown in FIG. 6 can be obtained.

  As described above, according to the first embodiment, the single-phase five-level AC / DC PWM converter that performs unidirectional power flow includes eight diodes, eight switching elements, and four capacitors. In this case, the number of components of the capacitor can be reduced and the size can be reduced as compared with the conventional circuit that requires six capacitors.

  Whereas the first embodiment is a single-phase circuit, in the second embodiment, as shown in FIG. 7, the five-level voltage converter 200 of FIG. , 200T) and configured to output a DC voltage. In FIG. 7, the same parts as those of FIG.

  The input terminals R, S, and T of the five-level voltage converters 200R, 200S, and 200T are connected to the R phase, the S phase, and the T phase of the three-phase AC power supply 100 through the reactors LR, LS, and LT, respectively.

  The cathodes of the first diodes D1, D1 ′, D1 ″ of the five-level voltage converters 200R, 200S, 200T are respectively connected to the common connection point P of the load 120 and the clamp capacitor C2, and the fourth diodes D4, D4 ′, The anode of D4 ″ is connected to a common connection point N of the load 120 and the clamp capacitor C3.

  Each end of the switching elements S4, S4 ′, S4 ″ of the five-level voltage converters 200R, 200S, 200T is connected to a common connection point NP (neutral point) of the clamp capacitors C2 and C3.

  The operations of the five level voltage converters 200R, 200S, and 200T in FIG. 7 are the same as those of the five level voltage converter 200 in FIG.

  Next, a control circuit for the five-level power converter according to the second embodiment will be described. FIG. 8 is a block diagram of the control circuit of this embodiment, and the same parts as those in FIG.

  In FIG. 8, the power source (Vsource) is the three-phase AC power source 100 of FIG. 7, and the 5-level PWM circuit includes 5-level voltage converters 200R, 200S, and 200T.

  The DC voltage detection value Vdc_det of the clamp capacitors C2 and C3 is introduced into the adder 311 of the DC voltage control unit 310, and a deviation from the DC voltage command value Vdc_set is taken.

  The PI controller 312 performs PI (AVR) control on the deviation output of the adder 311 to obtain a q-axis current command value Iq_set.

  The power transformer phase angle θ of the three-phase AC power source Vsource is obtained by the instrument transformer PT, the zero cross detector 321 and the phase calculator 322.

  Further, the average effective value detected value Vin_det of the input voltages VinR, VinS, and VinT is obtained by the instrument transformer PT and the effective value detector 323.

  The rotational coordinate conversion unit 331 of the input current control unit 330 uses the power source phase angle θ obtained by the phase calculator 322 to detect the input currents IinR, IinS, and IinT detected through the current transformer CT as d-axis current detection. The rotational coordinates are converted into a value Id_det and a q-axis current detection value Iq_det.

  The adder 332 takes a deviation of the q-axis current detection value Iq_det from the q-axis current command value Iq_set. The PI controller 333 applies PI (ACR) control to the deviation, and the adder 334 further adds the deviation to the q-axis current command value Iq_det. The average effective value detection value Vin_det of the input voltages VinR, VinS, and VinT is added to obtain a q-axis voltage command value Vq *.

  On the other hand, in this embodiment, the input power factor 1 control is performed by setting the d-axis current command value Id_set = 0. The d-axis current detection value Id_det is deviated from Id_set = 0 in the adder 335, and the PI controller 336 applies PI (ACR) control to the deviation output of the adder 335 to provide the d-axis voltage command value Vd. Get *.

  The rotation coordinate reverse conversion unit 337 performs reverse rotation conversion of the voltage command values Vd * and Vq * using the power supply phase angle θ, and the voltage command value VR * between the R terminal and the NP terminal of the circuit of FIG. And a voltage command value VS * between the S terminal and the NP terminal and a voltage command value VT * between the T terminal and the NP terminal.

  Reference numeral 340 denotes a switching pattern selection unit, which includes the voltage command values VR *, VS *, VT *, a triangular wave carrier signal output from the carrier signal generator 341, a detection signal from the zero cross detector 321 and the flying capacitors C1, C1 ′. , C1 ″ detection voltages VC1, VC1′VC1 ″, respectively.

  The switching pattern selector 340 compares the amplitudes of VR *, VS *, VT * and the triangular wave carrier signals (Carriers 1 to 4) shown in FIG. A pulse voltage command value is obtained, and a switching pattern that outputs a voltage at the same level as the pulse voltage command value is selected.

Next, the R-phase pulse voltage command value and the switching pattern will be described with reference to FIG.
(1) When “VR *> Carrier1”, the pulse voltage command value = + Vdc / 2, and the switching pattern (NO.1) is selected.
(2) When “VR * <Carrier1 and VR *> Carrier2”, the pulse voltage command value = + Vdc / 4, and the switching pattern (NO. 2 or NO. 3) is selected. When the flying capacitor C1 is in the charging mode, NO. 2. NO. 3 is selected. In the charge mode and the discharge mode, the flying capacitor voltage (VC1) is compared with the command value (Vdc / 4), and the discharge mode is selected if VC1 is larger than the command value, and the charge mode is selected if smaller.
(3) When “VR * <Carrier2 and VR *> Carrier3”, the pulse voltage command value = 0, and the switching pattern (NO.4 or NO.5) is selected. When the polarity of the input voltage Vin is positive, NO. 4. When negative, NO. 5 is selected.
(4) When “VR * <Carrier3 and VR *> Carrier4”, the pulse voltage command value = −Vdc / 4, and the switching pattern (NO.6 or NO.7) is selected. When the flying capacitor C1 is in the charging mode, NO. 7. NO. 6 is selected. In the charge mode and the discharge mode, the flying capacitor voltage (VC1) is compared with the command value (Vdc / 4), and the discharge mode is selected if VC1 is larger than the command value, and the charge mode is selected if smaller.
(5) When “VR * <Carrier4”, the pulse voltage command value = −Vdc / 2, and the switching pattern (NO. 8) is selected.

By the above control operation, the voltage V _R-NP between the R terminal and the NP terminal becomes a five-level AC voltage waveform as shown in FIG. Similar to the voltage waveform in the conventional circuit shown in FIG. 11, it is possible to obtain a voltage of five levels.

  Similarly, for the S phase, the switching pattern is selected by comparing the amplitudes of VS * and the triangular wave carrier signals (Carriers 1 to 4).

  Similarly, for the T phase, the switching pattern is selected by comparing the amplitudes of VT * and the triangular wave carrier signals (Carriers 1 to 4).

  Note that control blocks other than those shown in FIG. 8 may be applied as long as the five-level AC voltage shown in FIG. 6 can be obtained.

  As described above, according to the second embodiment, the three-phase five-level AC / DC PWM converter that performs unidirectional power flow is configured by twelve diodes, twelve switching elements, and five capacitors. In this case, compared with a conventional circuit that requires eight capacitors, the number of components of the capacitor can be reduced and the size can be reduced.

DESCRIPTION OF SYMBOLS 100 ... Three-phase alternating current power supply 120 ... Load 200,200'200R, 200S, 200T ... 5 level voltage conversion part 210,310 ... DC voltage control part 230,330 ... Input current control part 240,340 ... Switching pattern selection part S1- S4, S1'-S4 ', S1 "-S4" ... Switching elements C1, C1', C1 "... Flying capacitors C2, C3 ... Clamp capacitors D1-D4, D1'-D4 ', D1" -D4 "... Diode L , LR, LS, LT ... Reactor

Claims (2)

A 5-level power converter that receives an AC voltage and outputs a 5-level voltage,
A diode series circuit formed by sequentially connecting the first to fourth diodes in series, and a common connection point between the first and second diodes and a common connection point between the third and fourth diodes. A flying capacitor, first and second switching elements connected in series between both ends of the flying capacitor, and one end connected to a common connection point of the second and third diodes, and controlled in reverse withstand voltage directions. A plurality of five-level voltage converters configured by switching means capable of
A reactor connected between a common connection point of the first and second switching elements and an AC power supply of at least one 5-level voltage conversion unit among the plurality of 5-level voltage conversion units;
A first clamp capacitor connected in series; a first clamp capacitor side end connected to one end of each diode series circuit of the plurality of five-level voltage converters; and a second clamp capacitor A side end is connected to the other end of each of the diode series circuits, and a neutral point that is a common connection point of the first and second clamp capacitors is the switching means of the plurality of five-level voltage converters. A clamp capacitor series circuit connected to each end;
By turning on and off the first and second switching elements and the switching means by a plurality of switching patterns, there are five levels between the common connection point of the first and second switching elements and the neutral point. A five-level power converter, comprising: The five-level voltage converter is provided in each phase of the three-phase AC, and the common connection point of the first and second switching elements of the five-level voltage converter is a three-phase AC power source through the reactor. The five-level power converter according to claim 1, wherein the five-level power converter is connected to each of the U phase, the V phase, and the W phase.

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