JP2007149804A - Manufacturing method of semiconductor substrate and semiconductor device and semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor substrate with which parasitic MOS is prevented from being formed at a corner of a silicon layer below a gate electrode, and reliability of a gate insulating film can be improved when an SOI structure is formed in a prescribed place of a bulk silicon substrate and a transistor is formed on the SOI structure; and to provide a manufacturing method of a semiconductor device, and the semiconductor device. <P>SOLUTION: A photoresist film 4 for forming support object holes 5 is used and the photoresist film 4 is trimmed and exposed to the surface of the silicon layer 3. The silicon layer 3 is etched by using TMAH solution with the trimmed photoresist film 4 as a mask, and the corners 6 of the silicon layer 3 are taken. A support object is formed, a silicon germanium layer 2 is selectively etched, and a cavity is formed. An embedded insulating film is formed in the cavity, an upper part of the silicon layer 3 is flattened, and the semiconductor substrate of the SOI structure is obtained. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

The present invention relates to a method for manufacturing a semiconductor substrate, a method for manufacturing a semiconductor device, and a semiconductor device, and more particularly to a technique for forming an SOI (Silicon On Insulator) structure on a semiconductor substrate.

A field effect transistor formed on an SOI substrate has a smaller junction capacitance (capacitance between the source / drain region and the substrate) than that formed on a bulk silicon substrate. It has great advantages such as high speed and high speed operation.
In general, an SOI substrate having an SOI structure formed on the entire surface of a bulk silicon substrate is prepared, and transistors are sequentially formed on the SOI structure, and this SOI structure is formed in a portion where the SOI structure is not required. It has been done to remove.
Further, Non-Patent Document 1 discloses a SBSI (Separation by Bonding Si) that can form an SOI transistor at a low cost by partially forming an SOI layer on a bulk silicon substrate.
Islands) law is disclosed. In this method of forming an SOI structure on a bulk silicon substrate, first, a silicon germanium (SiGe) layer and a silicon (Si) layer are formed on the silicon substrate.
The layer is epitaxially grown, and a hole (support hole) for forming a support is formed therein. After an oxide film or the like is formed thereon, the peripheral oxide film, silicon layer, and silicon germanium layer are dry-etched so as to obtain an element region shape. When the silicon germanium layer is selectively etched with hydrofluoric acid, the silicon layer is supported by the support and a cavity is formed under the silicon layer. A BOX (Buried Oxide) layer is formed between the silicon substrate and the silicon layer by embedding an insulating layer such as SiO _{2 in the} cavity. Thereafter, the surface of the substrate is planarized to expose the silicon layer on the surface, thereby forming SO on the bulk silicon substrate.
I structure is obtained.

T. T. et al. Sakai et al. , Second International SiGe Technology and Device Meeting, Meeting Abstract, pp. 230-231, May (2004)

When a gate electrode is formed on an exposed silicon layer using a semiconductor substrate having this SOI structure, a parasitic MOS is formed at the corner of the silicon layer, and the insulation reliability of the gate insulating film deteriorates at the corner. Therefore, it is necessary to round this corner. In general, ST
In I (Shallow Trench Isolation), a trench is formed (in the SBSI method, a support hole is formed), and then heat treatment is performed at a high temperature to round off the corners of the silicon layer. When the heat treatment is performed, germanium (Ge
) Diffuses to adjacent layers.
In addition, it is possible to round the corners of the silicon layer by etching after etching the silicon germanium layer, but since the support covers the part of the part where the support hole is formed, the corner of the silicon layer is covered. Cannot be rounded.

For example, this will be described with reference to FIG. FIG. 13 shows a step in the process of manufacturing a semiconductor substrate having an SOI structure. FIG. 13 (a) is a schematic plan view, and FIG. 13 (b).
FIG. 2 is a schematic cross-sectional view taken along the line CC ′ of FIG.
A silicon germanium layer 102 and a silicon layer 103 are epitaxially grown on the silicon substrate 101, and a hole (support hole) 105 for forming a support is formed therein. At this time, corners 110 of the silicon layer 103 exist at the periphery of the support hole 105. After that, a support 104 that fills the support hole 105 and covers the silicon layer 103 is formed. The region that is covered by the support 104 and is located between the support holes 105 is a portion that becomes an element region. Since the corner portion 110 of the silicon layer 103 is covered by the support 104, the silicon germanium layer 102 is formed. After etching, the corner 110 of the silicon layer 103 cannot be rounded by heat treatment.
In this case, in particular, when the gate electrode 106 as shown by the two-dot chain line in FIG. 13A formed in the subsequent process is arranged in the direction in which the two support holes 105 are cut vertically, the silicon layer 10
There is a problem that parasitic MOS is easily formed at the corner 110 of the third layer and the reliability of the gate insulating film is deteriorated.

The present invention has been made in order to solve the above-described problems, and an object of the present invention is to form an SOI structure at a predetermined position of a bulk silicon substrate and form a transistor on the SOI structure. To provide a semiconductor substrate manufacturing method, a semiconductor device manufacturing method, and a semiconductor device capable of preventing the formation of a parasitic MOS at the corner of a silicon layer and improving the reliability of a gate insulating film. .

In order to solve the above problems, a method of manufacturing a semiconductor substrate according to the present invention includes a step of forming a first semiconductor layer on a semiconductor substrate, and a second semiconductor layer having a lower etching selectivity than the first semiconductor layer. Forming on the first semiconductor layer, and forming a support hole exposing the semiconductor substrate by removing a part of the second semiconductor layer and the first semiconductor layer around the element region. A step of forming a support forming layer on the semiconductor substrate so as to fill the support hole and cover the second semiconductor layer, and a region including the support hole and the element region Leave
Etching other portions to form an opening that exposes the support and a part of the ends of the first and second semiconductor layers located below the support, and through the opening Etching the first semiconductor layer to form a cavity between the second semiconductor layer in the element region and the semiconductor substrate, and forming a buried insulating layer in the cavity. Flattening the upper part of the second semiconductor layer and removing a part of the support located on the second semiconductor layer, and forming the support hole, Etching a corner of the surface of the second semiconductor layer located at the periphery of the hole, and chamfering the corner.

According to this method of manufacturing a semiconductor substrate, the corners of the second semiconductor layer can be rounded by etching the corners of the surface of the second semiconductor layer covered with the support. When the gate electrode is formed in the direction of longitudinally cutting the second semiconductor layer using this semiconductor substrate, the formation of a parasitic MOS can be prevented because the corners of the second semiconductor layer are rounded, and The reliability of the gate insulating film can be improved.

In the method for manufacturing a semiconductor substrate of the present invention, the support hole is formed using a patterned photoresist film as a mask, and then the photoresist film is trimmed to form the second substrate.
It is desirable to expose a part of the surface of the semiconductor layer and to etch the corner portion of the surface of the second semiconductor layer using the trimmed photoresist film as a mask.

According to this method for manufacturing a semiconductor substrate, corners of the second semiconductor layer can be chamfered using a photoresist film for forming a support hole. That is, the photoresist film for forming the support hole may be trimmed to expose the second semiconductor layer, and etching may be performed using the trimmed photoresist film as a mask. If it does in this way, the corner | angular part of the surface of the 2nd semiconductor layer in a support body hole periphery can be easily etched and chamfered.

In the method of manufacturing a semiconductor substrate according to the present invention, it is preferable that the first semiconductor layer is a silicon germanium layer and the second semiconductor layer is a silicon layer.

According to this method for manufacturing a semiconductor substrate, silicon has a lower etching selectivity than silicon germanium, and the silicon germanium layer can be selectively etched and removed, leaving the silicon layer under the silicon layer. The cavity can be easily formed.

In the method for manufacturing a semiconductor substrate according to the present invention, it is desirable to use a TMAH solution for etching the corners of the silicon layer.

According to this method for manufacturing a semiconductor substrate, a TMAH (tetramethylammonium hydroxide) solution can be used for etching the corners of the silicon layer. This TMAH solution is a solution generally used as a developer for a photoresist film, and can be easily used in a semiconductor process.

In the method for manufacturing a semiconductor device according to the present invention, the second method is performed after the method for manufacturing a semiconductor substrate is performed.
The method includes a step of forming a transistor in the semiconductor layer.

According to this method for manufacturing a semiconductor device, the corners of the second semiconductor layer can be rounded by etching the corners of the surface of the second semiconductor layer covered with the support. When the gate electrode is formed so as to cut the second semiconductor layer vertically using this semiconductor substrate, it is possible to prevent the formation of a parasitic MOS because the corners of the second semiconductor layer are rounded, and A method of manufacturing a semiconductor device that improves the reliability of the gate insulating film can be provided.

The semiconductor device of the present invention is a semiconductor device having an SOI structure in which a buried insulating layer is formed on a silicon substrate and a silicon layer is formed on the buried insulating layer, and a corner portion of the surface of the silicon layer is rounded. The chamfered surface is a (111) plane of silicon crystal.

According to this configuration, in a semiconductor device having an SOI structure in which a buried insulating layer is formed on a silicon substrate and a silicon layer is formed thereon, the corners of the silicon layer are chamfered with the etching solution. Since the corners of the silicon layer are etched by the etching solution, the (111) plane of the silicon crystal appears on the surface etched from the etching anisotropy of the silicon crystal. In this way, the corners of the silicon layer are rounded,
It is possible to provide a semiconductor device that can prevent the formation of a parasitic MOS when a gate electrode is formed thereon and can improve the reliability of the gate insulating film.

DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, embodiments of the invention will be described with reference to the drawings.
(First embodiment)

1 to 10 are schematic views showing a method of manufacturing a semiconductor substrate according to the first embodiment of the present invention. Specifically, each figure (a) in FIGS. 1 to 10 is a schematic plan view, and each figure (b) is (
It is a schematic cross section which follows the AA 'broken line in a).
In FIG. 1, a silicon germanium (SiGe) layer 2 as a first semiconductor layer is formed on a silicon substrate 1 which is a bulk silicon wafer, and a silicon (Si) layer 3 as a second semiconductor layer is formed thereon. Each of the silicon germanium layer 2 and the silicon layer 3 is formed by epitaxial growth. Next, the photoresist hole 4 is opened, and the photoresist film 4 covering the rest is patterned. Then, using the patterned photoresist film 4 as a mask, the silicon layer 3 and the silicon germanium layer 2 are sequentially etched to expose the surface of the silicon substrate 1. In this way, the support hole 5 is formed, and this support hole 5
A region between the two becomes an element region.

Next, as shown in FIG. 2, the photoresist film 4 is trimmed using oxygen plasma or the like. Then, the corner | angular part 6 of the surface of the silicon layer 3 in the periphery of the support body hole 5 will be in the exposed state.
Then, as shown in FIG. 3, using the trimmed photoresist film 4 as a mask, TMA
Using a H (tetramethylammonium hydroxide) solution or the like, the corner portion 6 of the silicon layer 3 is etched, and the corner portion 6 is cut off. At this time, at the corner 6 of the etched silicon layer 3, the (111) plane of the silicon crystal appears due to the etching anisotropy of silicon.

Next, the photoresist film 4 is removed, and as shown in FIG. 4, SiO ₂ is embedded so as to fill the support hole 5 in the entire upper portion of the silicon substrate 1 and cover the silicon layer 3 by a method such as CVD.
A support forming film 7 such as is formed.
Subsequently, as shown in FIG. 5, a photoresist film 8 is patterned on the support forming film 7 into a planar shape of the support.

Then, as shown in FIG. 6, the support forming film 7, the silicon layer 3, and the silicon germanium layer 2 are sequentially dry etched using the patterned photoresist film 8 as a mask. The support 9 is formed by this etching, and the silicon layer 3 and the silicon germanium layer 2 are left only on the silicon substrate 1 in the element region. Further, the side surface 15 below the support 9 is an opening surface from which the silicon layer 3 and the silicon germanium layer 2 are exposed.

Next, the photoresist film 8 is removed, and as shown in FIG. 7, an etching solution such as hydrofluoric acid is brought into contact with the silicon layer 3 and the silicon germanium layer 2 from the opening surface of the side surface 15 below the support 9. The silicon germanium layer 2 is selectively etched and removed. As a result, a cavity 10 is formed between the silicon substrate 1 and the silicon layer 3. Silicon has a lower etching selectivity than silicon germanium, and the silicon germanium layer can be selectively etched and removed, leaving the silicon layer. In this way, the support 9 supports the silicon layer 3.
After etching the silicon germanium layer 2, the TMAH solution is used again to etch the corners of the silicon layer 2 from the opening surface of the side surface 15 below the support 9, and the silicon layer 2 on the side surface 15 is chamfered. May be.

Subsequently, as shown in FIG. 8, the silicon substrate 1 is thermally oxidized to form a buried insulating layer (BOX layer) 11 made of SiO ₂ in the cavity 10. Further, not only the thermal oxidation of the silicon substrate 1 but also the buried insulating layer 11 can be formed using CVD.
Next, as shown in FIG. 9, an insulating film 12 such as SiO ₂ for element isolation is formed on the entire upper surface of the silicon substrate 1 by a method such as CVD.
Then, as shown in FIG. 10, the silicon substrate 1 is formed by CMP (chemical mechanical polishing) or the like.
The entire upper surface is flattened, and the insulating film 12 and a part of the support 9 are removed. As a result, a structure (SOI structure) in which the upper surface of the silicon layer 3 is exposed and the silicon layer 3 is element-isolated by the insulating film 12 and the buried insulating layer 11 is formed on the silicon substrate 1 to complete the semiconductor substrate 30.

As described above, according to the method for manufacturing the semiconductor substrate 30, the corners 6 of the silicon layer 3 can be chamfered using the photoresist film 4 for forming the support hole 5. is there. That is, the photoresist film 4 for forming the support hole 5 may be trimmed to expose the silicon layer 3 and etched using the trimmed photoresist film 4 as a mask. In this way, the corners 6 on the surface of the silicon layer 3 can be easily etched and rounded. Further, a TMAH (tetramethylammonium hydroxide) solution can be used for etching the corner portion 6 of the silicon layer 3. This TMAH solution is a solution generally used as a developer for a photoresist film, and can be easily used in a semiconductor process.
When such a semiconductor substrate 30 is used and a gate electrode is formed in a direction that cuts through the silicon layer, the corner portion 6 of the silicon layer 3 covered with the support 9 is rounded, so that the parasitic MO
S can be prevented from being formed, and the reliability of the gate insulating film can be improved.
(Second Embodiment)

Next, a semiconductor device manufacturing method will be described as a second embodiment of the present invention.
In the manufacturing method of the semiconductor device, the transistors as shown in FIGS. 11 and 12 are formed following the manufacturing method of the semiconductor substrate described with reference to FIGS.
FIG. 11 is a schematic view showing a method for manufacturing a semiconductor device according to the second embodiment of the present invention. FIG.
1 (a) is a schematic plan view, and FIG. 11 (b) is a schematic cross-sectional view taken along the line A ₁₁ -A ′ ₁₁ in FIG. FIG. 12 is a schematic cross-sectional view taken along the line B ₁₁ -B ′ ₁₁ in FIG.

First, the surface of the silicon layer 3 is thermally oxidized to form the gate insulating film 20 on the surface of the silicon layer 3. Then, a polycrystalline silicon layer is formed on the silicon layer 3 on which the gate insulating film 20 is formed by a method such as CVD. Thereafter, the polycrystalline silicon layer is patterned using a photolithography technique to form the gate electrode 21 on the gate insulating film 20.
Next, by using the gate electrode 21 as a mask, impurities such as As, P, and B are ion-implanted into the silicon layer 3, thereby forming an LDD layer 23 a composed of low-concentration impurity introduction layers respectively disposed on both sides of the gate electrode 21. , 23 b are formed in the silicon layer 3. Then, an insulating layer is formed on the silicon layer 3 on which the LDD layers 23a and 23b are formed by a method such as CVD.
By etching back the insulating layer using dry etching such as IE, the gate electrode 2
Side walls 24a and 24b are respectively formed on one side wall. Then, by using the gate electrode 21 and the sidewalls 24a and 24b as masks, impurities such as As, P, and B are ion-implanted into the silicon layer 3 to thereby form high-concentration impurities respectively disposed on the sides of the sidewalls 24a and 24b. A transistor in which the source / drain layers 25a and 25b made of the introduction layer are formed in the silicon layer 3 is formed. In this way, the SOI structure semiconductor device 40 is completed.

As described above, according to the method for manufacturing the semiconductor device 40, the corner 6 of the silicon layer 3 is rounded by etching the corner 6 of the surface of the silicon layer 3 covered with the support 9. Can do. Then, when the gate electrode 21 is formed in a direction that cuts through the silicon layer 3, the corner portion 6 of the silicon layer 3 is chamfered, so that a parasitic MOS can be prevented from being formed, and the gate insulating film 20. A method of manufacturing the semiconductor device 40 that improves the reliability of the semiconductor device 40 can be provided.
(Third embodiment)

Next, a semiconductor device will be described as a third embodiment of the present invention.
As shown in FIGS. 11 and 12, in a semiconductor device 40 having an SOI structure in which a buried insulating layer 11 is formed on a silicon substrate 1 and a silicon layer 3 is formed thereon, the corner 6 of the silicon layer 3 is etched. Chamfered with liquid. Since the corner 6 of the silicon layer 3 is etched by the etching solution, the (111) plane of the silicon crystal appears on the surface etched from the etching anisotropy of the silicon crystal. A transistor having a gate insulating film 20 and a gate electrode 21 is formed in the silicon layer 3.

Thus, since the corner | angular part 6 of the silicon layer 3 is chamfered, the gate electrode 21 is formed on it.
A semiconductor device 40 that can prevent formation of a parasitic MOS when the gate insulating film 20 is formed and improves the reliability of the gate insulating film 20 can be provided.

In the embodiment of the present invention, silicon is used as the material for the semiconductor substrate.
Other materials include Ge, SiGe, SiC, SiSn, PbS, GaAs, InP, GaP
GaN, ZnSe, or the like can be used.
Further, in the embodiment of the present invention, the material of the first semiconductor layer is silicon germanium, the second
Although silicon has been described as an example of the material of the semiconductor layer, a second semiconductor layer having a smaller etching selectivity than the first semiconductor layer may be combined. For example, as the material of the first semiconductor layer and the second semiconductor layer, Ge, SiC, SiSn, PbS, GaAs, InP, GaP, GaN
, ZnSe or the like can be used.

FIG. 3 is a schematic process diagram illustrating a method for manufacturing a semiconductor substrate according to the first embodiment. FIG. 3 is a schematic process diagram illustrating a method for manufacturing a semiconductor substrate according to the first embodiment. FIG. 3 is a schematic process diagram illustrating a method for manufacturing a semiconductor substrate according to the first embodiment. FIG. 3 is a schematic process diagram illustrating a method for manufacturing a semiconductor substrate according to the first embodiment. FIG. 3 is a schematic process diagram illustrating a method for manufacturing a semiconductor substrate according to the first embodiment. FIG. 3 is a schematic process diagram illustrating a method for manufacturing a semiconductor substrate according to the first embodiment. FIG. 3 is a schematic process diagram illustrating a method for manufacturing a semiconductor substrate according to the first embodiment. FIG. 3 is a schematic process diagram illustrating a method for manufacturing a semiconductor substrate according to the first embodiment. FIG. 3 is a schematic process diagram illustrating a method for manufacturing a semiconductor substrate according to the first embodiment. FIG. 3 is a schematic process diagram illustrating a method for manufacturing a semiconductor substrate according to the first embodiment. FIG. 6 is a schematic process diagram illustrating a method for manufacturing a semiconductor device according to a second embodiment. FIG. 6 is a schematic process diagram illustrating a method for manufacturing a semiconductor device according to a second embodiment. Explanatory drawing explaining the problem which invention is going to solve.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Silicon substrate as a semiconductor base material, 2 ... Silicon germanium layer as 1st semiconductor layer, 3 ... Silicon layer as 2nd semiconductor layer, 4 ... Photoresist film, 5 ... Support hole, 6
DESCRIPTION OF SYMBOLS: Silicon | silicone corner | angular part, 7 ... Support body formation film, 9 ... Support body, 10 ... Cavity part, 11 ... Embedded insulating layer, 20 ... Gate insulating film, 21 ... Gate electrode, 30 ... Semiconductor substrate, 40 ... Semiconductor device .

Claims (6)

Forming a first semiconductor layer on a semiconductor substrate;
Forming a second semiconductor layer having a lower etching selectivity than the first semiconductor layer on the first semiconductor layer;
Forming a support hole exposing part of the semiconductor substrate by removing a part of the second semiconductor layer and the first semiconductor layer around the element region;
Filling the support hole and forming a support forming layer on the semiconductor substrate so that the second semiconductor layer is covered;
Etching the other part while leaving the region including the support hole and the element region, thereby supporting the support and part of the end portions of the first and second semiconductor layers located below the support Forming an opening surface that exposes,
Forming a cavity between the second semiconductor layer and the semiconductor substrate in the element region by etching the first semiconductor layer through the opening surface;
Forming a buried insulating layer in the cavity;
Planarizing above the second semiconductor layer and removing a portion of the support located on the second semiconductor layer,
The step of forming the support hole comprises a step of etching a corner of the surface of the second semiconductor layer located at the periphery of the support hole, and chamfering the corner. Production method. In the manufacturing method of the semiconductor substrate of Claim 1,
The support hole is formed using a patterned photoresist film as a mask, and then the photoresist film is trimmed to expose a part of the surface of the second semiconductor layer, and the trimmed photoresist film is used as a mask. A method of manufacturing a semiconductor substrate, comprising etching the corner portion of the surface of the second semiconductor layer. In the manufacturing method of the semiconductor substrate of Claim 1 or 2,
The method of manufacturing a semiconductor substrate, wherein the first semiconductor layer is a silicon germanium layer and the second semiconductor layer is a silicon layer. In the manufacturing method of the semiconductor substrate according to claim 3,
A method of manufacturing a semiconductor substrate, wherein a TMAH solution is used for etching a corner portion of the silicon layer. A method for manufacturing a semiconductor device, comprising: forming a transistor in the second semiconductor layer after performing the method for manufacturing a semiconductor substrate according to claim 1. A semiconductor device having an SOI structure in which a buried insulating layer is formed on a silicon substrate, and a silicon layer is formed on the buried insulating layer,
The corners of the surface of the silicon layer are chamfered, and the chamfered surface is (1
11) A semiconductor device having a surface.

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