JP2007132763A - Optical module test method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an optical module test method for performing a test for an optical module which can detect which of a transmitting optical module, an optical transmission line, or a receiving optical module is abnormal with an indicator turned on in real time and easily. <P>SOLUTION: The optical module test method is provided with a transmitting test board provided with a test data generating section and a receiving test board which is connected to the transmitting test board with an optical fiber and is provided with a received data comparing section. A transmitting optical module under test is installed in the transmitting test board, while a receiving optical module under test is installed in the receiving test board. Test data generated by the test data generating section on the transmitting test board is input into the optical module under test, while data received by the received data comparing section on the receiving test board and reference data are compared with each other, then outputting the comparison result. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an optical module test method for testing an optical module.

  Conventionally, optical module testing involves creating test data with a data generator dedicated to testing and inputting it to the optical module on the transmission side to generate an optical signal, and receiving the optical signal with the optical module on the reception side to convert it into data. The data was restored and analyzed by comparing the test data with the test-dedicated analysis device and the data received and restored by the optical module on the receiving side.

Further, as a technique for performing a high temperature test of an optical module, an optical signal emitted from a semiconductor laser housed in a high temperature bath is received by a photodiode through a lens and tested (Patent Document 1).
Japanese Utility Model Publication No. 07-2933

  In the former described above, if an optical module on the transmission side and an optical module on the reception side are to be tested, an expensive data generation device and an analysis device dedicated to the test are required, and only when these devices are connected. There was a problem that could not be tested.

  In the latter case, the optical signal emitted from the semiconductor laser housed in the high-temperature bath is received by a photodiode through a lens and tested, and the test cannot be performed using the same optical fiber as the actual machine. There was a problem that it can be tested only during the test.

  In order to solve these problems, the present invention is provided with a test data generation circuit, an abnormality detection circuit, and a display on a test board on the transmission side, and an optical module to be tested is mounted on this, via an optical cable. A comparison circuit, an anomaly detection circuit, and a display are installed on the test board on the receiving side, and the optical module for test is mounted. The optical module on the transmitting side, the optical transmission line, or the receiving side is installed with the display on Which of the optical modules is abnormal is easily detected in real time.

  In the present invention, a test data generation circuit, an abnormality detection circuit, and a display are provided on a test board on the transmission side, and an optical module to be tested is attached to the test data generation circuit, and compared with the test board on the reception side via an optical cable. By installing a circuit under test, an anomaly detection circuit, and an optical module for testing, either the optical module on the transmitting side, the optical transmission line, or the optical module on the receiving side is abnormal when the display is on. This can be detected in real time and easily.

  In the present invention, a test data generation circuit, an abnormality detection circuit, and a display are provided on a test board on the transmission side, and an optical module to be tested is attached to the test data generation circuit, and compared with the test board on the reception side via an optical cable. A circuit, an anomaly detection circuit, and a display are installed, and an optical module for testing is mounted. Whether the optical module on the transmitting side, the optical transmission line, or the optical module on the receiving side is abnormal when the display is lit. Realized simple and real-time detection.

FIG. 1 shows a system configuration diagram of the present invention.
In FIG. 1, a transmission module board 1 is a board on which a module on the transmission side is mounted. Here, a test data generation unit 2, an optical module 6, an entire circuit Reset circuit 7, a laser monitor signal check unit 8, an LED- The reset circuit 12, the LED light emitting circuit 13, the LED 14, and the like are included. The transmission module board 1 is tested in a high temperature bath (low temperature bath) for a high temperature test (low temperature test) or a long-time running test.

  The test data generation unit 2 generates test data to be input to the optical module 6 to be inspected. Here, the test data generation unit 2 includes a data pattern storage unit 3, a work register 4, a data generation circuit 5, and the like. Is.

  The data pattern storage unit 3 stores in advance a data pattern for generating test data to be input to the optical module 6 to be inspected. Incidentally, it may be automatically generated and stored in accordance with a predetermined algorithm.

  The work register 4 is a register that temporarily holds the test pattern read from the data pattern storage unit 3.

  The data generation circuit 5 generates test data (test data) in accordance with the test pattern stored in the work register 4 and supplies it to the optical module 6 to be inspected.

  The optical module 6 is an optical module on the transmission side to be inspected. Here, when test data of an electrical signal is input from the data generation circuit 5, the test data is converted into serial data, and further, serial data Are converted into optical ON / OFF optical signals and transmitted to the optical module 35 on the receiving side via an optical fiber. Although not shown, the optical module 6 is mounted on a sub board that matches the pin structure of the optical module, and the sub board on which the optical module 6 is mounted is mounted on the transmission module board 1. As a result, even if the pin structure of the optical module 6 and the signal type of the terminal are different, if the sub board is replaced, the optical module 6 having a different pin structure or terminal signal type is mounted on the transmission module board 1 and tested. To be able to do that.

  The all circuit Reset circuit 7 resets all the circuits such as the test data generation unit 2 and the laser monitor signal check unit 8.

  The laser monitor signal check unit 8 checks the signal transmitted from the optical module 6 to determine whether it is normal or abnormal, and notifies the tester and the like by turning on and off the LED 14 based on these determination results (see FIG. 4), and includes a module activation determination unit 9, a laser control determination unit 10, an error status circuit 11, and the like.

  The module activation determination circuit 9 determines whether or not the optical module 6 or the like has been activated.

  The laser control determination circuit 10 determines whether or not the laser is controlled.

  The error status circuit 11 generates an error status representing an error state based on the determination results from the module activation determination circuit 9 and the laser control determination circuit 10 (see FIG. 4 and the like).

  The LED-Reset circuit 12 resets the laser monitor signal check unit 8 and the like.

  The LED light emitting circuit 13 turns on / off the corresponding LED 14 based on a signal corresponding to the error status from the laser monitor signal check unit 8 (see FIG. 4).

The LED 14 is a display that displays an abnormal state of the optical module 6 or the like (see FIG. 4).
The PWR 15 is a switch that supplies or cuts off power.

  The transmission module board 1 on the transmission side has the above configuration, and the optical signal sent from the optical module 6 to the optical fiber is received by the optical module 35 of the reception module board 21 on the reception side, so that the test signal is transmitted on the transmission side. Can be transmitted to the receiving side, and the result of checking in real time by the laser monitor signal check unit 8 can be displayed on the LED 14 (see FIG. 4) to notify the tester. Become.

  The reception module board 21 is a board on which a module on the reception side is mounted. Here, the comparison determination unit 22, the optical module 35, the reception check unit 36, an all-circuit reset circuit 38, an LED-Reset circuit 39, and an error status circuit 40, LED light emitting circuit 41, LED 42, and the like. The receiving module board 1 is tested by placing it in a high temperature bath (low temperature bath) for a high temperature test (low temperature test) or a long-time running test.

  The comparison determination unit 22 compares the optical signal received by the reception-side optical module 35 into electrical signal data and compares the data with the reference data, and checks the data pattern storage unit 23. , Work register M24, test pattern comparison circuit 25, test pattern shift processing circuit 26, shortage test pattern processing circuit 27, work register T28, work register B29, work register 30, registers (R1) 31 to (Rm) 31, leading data It comprises a pattern analysis circuit 32, a test pattern storage register 33, a test pattern amount determination circuit 34, and the like.

  The data pattern storage unit 23 stores a test pattern for checking received data in advance. The same test pattern as that on the transmission side may be automatically generated and stored according to a predetermined algorithm.

  The work register M24 temporarily stores the data pattern read from the data pattern storage unit 23.

  The test pattern comparison circuit 25 compares the data received by the optical module 35 on the receiving side, converted into an electrical signal and extracted, and the data pattern stored in the work register M24, and further matches or does not match. And so on.

The test pattern shift processing circuit 26 is a circuit that shifts the test pattern.
The shortage test pattern processing circuit 27 processes a shortage test pattern.

  The work register T28, the work register B29, and the work register 30 temporarily hold data.

  The registers (R1) 31 to (Rm) 31 hold a plurality of data received by the optical module 35 and converted into electric signals.

  The head data pattern analysis circuit 32 analyzes and finds the head data pattern of the received data.

The test pattern storage register 33 stores a test pattern.
The test pattern amount determination circuit 34 determines the test pattern amount.

  Using the circuits 22 to 34, registers, etc., the data converted from the optical signal to the electrical signal by the optical module 35 is compared with the data pattern for comparison read from the data pattern storage unit 23, and a match or mismatch is detected. Then, the error status circuit 40 is sent out.

  The optical module 35 is an optical module on the receiving side to be inspected. Here, when an optical signal is input from an optical fiber, the optical module 35 converts the optical signal into a serial electric signal of 1 and 0, and further performs parallel processing. The data is stored in the work register 30 or the like. Although not shown, the optical module 35 is mounted on a sub board that matches the pin structure of the optical module, and the sub board on which the optical module 35 is mounted is mounted on the reception module board 21. As a result, even if the pin structure of the optical module 35 and the signal type of the terminal are different, if the sub board is replaced, even the optical module 35 having a different pin structure or terminal signal type is mounted on the receiving module board 21 and tested. To be able to do that.

  The reception check unit 36 checks the reception state of the optical signal or the like in the optical module 35 and transmits the check result to the error status circuit 40, and includes a data reception check circuit 37 and the like. .

  The data reception check circuit 37 checks a reception state such that the optical module 35 receives an optical signal from an optical fiber.

  The all circuit Reset circuit 38 resets all circuits such as the comparison determination unit 22 and the reception check unit 36.

  The LED-Reset circuit 39 resets the error status circuit 40 and the like.

  The error status circuit 40 receives comparison results, reception check results, and the like from the comparison determination unit 22, the reception check unit 36, etc., and generates an error status (error state) (see FIG. 4 and the like).

  The LED light emission circuit 41 turns on, blinks, and turns off the LED 42 based on the error status from the error status circuit 40 (see FIG. 4).

  The LED 42 is a display that displays an abnormal state of the optical module 35 or the like (see FIG. 4).

The PWR 43 is a switch that supplies or cuts off power.
The receiving module board 21 on the receiving side has the above configuration, and the optical module 35 converts the optical signal received via the optical fiber into parallel data of the electrical signal, and the comparison / determination unit 22 compares the data pattern with the data pattern. It is possible to determine a mismatch or check the reception state of the optical module 35 and display the comparison result and the reception state check result on the LED 42 (see FIG. 4) to notify the tester. Details will be sequentially described below.

FIG. 2 shows an operation explanation flowchart (transmission side) of the present invention.
In FIG. 2, S1 is POW ON. This turns on the PWR 15 on the transmission side in FIG. 1, supplies power to the transmission module board 1, and starts operation.

  In S2, all circuits are reset. This is because all circuit Reset circuits 7 on the transmission module board 1 on the transmission side in FIG. 1 are operated in synchronization with the power-on of S1, and all circuits such as the test mode generation unit 2 and the laser monitor signal check unit 8 are operated. Reset and start from the initial state.

  In S3, an error status = 0 is initially set. This initially sets the error status of the error status circuit 11 of FIG. 1 to 0 (normal).

  In S4, the data pattern is read. This reads out a data pattern from the data pattern storage unit 3 constituting the test data generation unit 2 on the transmission module board 1 in FIG. 1 and sets it in the work register 4 to prepare for the generation of test data.

  In S5, data generation is started. Thereby, the data pattern set in the work register 4 in S4 is read, and the data generation circuit 5 starts generating test data.

  In step S6, data is input to the optical module. This inputs the test data generated in S5 to the optical module 6 to be inspected.

  S6 'starts laser oscillation. In S6, when the optical module 6 receives an input of test data, oscillation corresponding to 0 and 1 of the test data (for example, oscillation when 1 and oscillation stop when 0) is started.

  In S7, it is determined whether there is no laser activation signal. This determines whether or not a signal indicating that the laser is started is received from the optical module although the laser oscillation is started in S6 '. In the case of YES, the error status = 1 is set in S8 ', and the process proceeds to S8 ". On the other hand, if NO (when there is a module activation signal), the process proceeds to S8.

  In S8, it is determined whether there is no laser control activation signal. This determines whether there was a laser activation signal but no laser control activation signal. In the case of YES, the error status is set to 1 in S8 ', and the process proceeds to S8 ". On the other hand, in the case of NO (when there is a laser control activation signal), the process proceeds to S8 ''.

  In step S8 ″, it is determined whether the error status = 1. This is YES in S7 or YES in S8, and it is determined whether or not the error status is set to 1 in S8 '. If YES, it is determined that an error has occurred (because it is determined that there is no module activation signal or no laser control activation signal), so that the LED is turned off in S15, and the processing from S16 onward is performed. On the other hand, in the case of NO, since it has been found that no error has occurred, the LED is turned on in S9, and the processing after S10 is performed.

  In step S10, it is determined whether a circuit reset signal is present. In this case, it is determined whether or not a circuit reset signal is input from an external or internal control unit (not shown). If yes, return to S2 and repeat. If NO, the process proceeds to S11.

  In S11, it is determined whether there is an LED Reset signal. In this case, it is determined whether there is an LED Reset signal from an external or internal control unit (not shown). If YES, the error status is reset to 0 in S12, and the process proceeds to S13. If NO, the process proceeds to S13.

  In S13, it is determined whether the test is continued. If yes, return to S7 and repeat. If NO, the PWR is turned off in S14 and the process is terminated.

  In S16, it is determined whether or not there is a circuit Reset signal after the LED is turned off in S15. In this case, it is determined whether or not a circuit reset signal is input from an external or internal control unit (not shown). If yes, return to S2 and repeat. If NO, the process proceeds to S17.

  In S17, it is determined whether there is an LED Reset signal. In this case, it is determined whether there is an LED Reset signal from an external or internal control unit (not shown). If YES, the error status is reset to 0 in S18, and the process proceeds to S18. If NO, the process proceeds to S18.

  In S18, it is determined whether the test is continued. If yes, return to S7 and repeat. If NO, the PWR is turned off in S14 and the process is terminated.

  As described above, when the power of the transmission module board 1 on the transmission side in FIG. 1 is turned on, all circuits are automatically reset, test data is generated according to the data pattern read from the data pattern storage unit 3, and the inspection target The laser signal is input to the optical module 6 and laser oscillation is started to transmit an optical signal to the optical fiber. At this time, the laser monitor signal check unit 8 monitors the presence / absence of the module activation signal, and further monitors the presence / absence of the laser control activation signal. When both signals are present (set to error status = 0 in the initial setting). When the LED is turned on, on the other hand, when either one is absent, the error status can be set to 1 and the LED can be turned off. As a result, the administrator sets the optical module 6 on the transmission module board 1 on the transmission side, and then turns on the power, and the LED 14 is turned on (normal) and turned off (error). It is possible to easily determine whether the operation of the optical module 6 is normal or abnormal.

  FIG. 3 is a flowchart for explaining the operation of the present invention (reception side). The following description of FIG. 3 shows the operation of each circuit on the receiving module board on the receiving side of FIG.

  In FIG. 3, S1 is POW ON. This turns on the PWR 43 on the receiving side in FIG. 1, supplies power to the receiving module board 21 and starts operation.

  In S2, all circuits are reset. This is because all the circuit Reset circuits 38 on the receiving module board 21 on the receiving side in FIG. 1 are operated in synchronism with the power-on of S1, and all the comparison / determination unit 22, reception checking unit 36, error status circuit 40, etc. Reset the circuit and start from the initial state.

  In S3, an error status = 0 is initially set. This initially sets the error status of the error status circuit 40 of FIG. 1 to 0 (normal).

  In S4, the consistency comparison data pattern is stored in the work register M24. This reads out a data pattern for consistency comparison from the data pattern storage unit 23 on the reception module board 1 in FIG. 1, sets it in the work register M24, and prepares to compare it with the received data.

  In S5, it is determined whether data is received. If YES, the process proceeds to S6. In the case of NO, the process proceeds to S25 and subsequent steps.

  In S6, the LED is turned on. In this case, the LED 42 on the receiving module board 21 on the receiving side in FIG. 1 is turned on to display that data is being received.

  In S7, X bytes are stored in the register Rn. This stores X bytes of the received data output from the optical module on the receiving side in YES in S5 in the register Rn31.

  In S8, the data pattern is analyzed in order from the head address of the register Rn. This is done by analyzing the data pattern in order from the head address of the register Rn by the head data pattern analysis circuit 32 on the receiving side in FIG. 1 to find the head pattern.

  In S9, a test pattern is extracted. This extracts the test pattern from the head of the test pattern found by the analysis of S8 and stores it in the test pattern storage register 33.

  In S10, it is determined whether or not the extracted test pattern is less than the normal amount. This determines whether the amount of test pattern in the test pattern storage register 33 extracted and stored in S9 is smaller than the normal amount. If YES, the process proceeds to S21. In the case of NO, since the amount of the extracted test pattern is found to be a normal amount, the process proceeds to S11.

In step S11, a test pattern is extracted.
In step S12, the extracted test pattern is stored in the register B. In S11 and S12, since the amount of the extracted test pattern is found to be a normal amount, the test pattern is extracted and stored in the work register B29.

  In step S13, the register B and the register M are compared. This compares the data in the work register B29 stored in S12 (received test data) with the data in the work register M24 stored in S4 (data pattern for consistency comparison).

  In S14, it is determined whether or not all coincide. This determines whether the result of comparison in S13 (the result of comparing the received data with the data for consistency comparison) is a complete match. In the case of YES, since the received data completely matches the consistency comparison data, it is determined to be normal, and the process proceeds to S15. In the case of NO, since it was found that they do not match completely, it is determined that there is an abnormality, and the process proceeds to S30 and thereafter.

  In S15, since it is determined to be normal by YES in S14, the extracted test pattern is deleted.

  In S16, the data after the erased data is shifted to the head address. This is performed by the test pattern shift processing circuit 26.

  In S17, it is determined whether the register R0 = 0. It is determined whether this is the head of the registers R0 to Rm. In the case of YES, n + 1 = n is performed in S18, the next register added is set, and the process proceeds to S19. In the case of NO, S8 and subsequent steps are repeated.

  S19 determines whether n is the tail end. In the case of YES, since it has been found that all processing of data has been completed at the end of the register Rn31, the process is reset to n = 0 (the head of the register Rn31) in S20, and S5 and subsequent steps are repeated.

  If the operation of the optical module 35 on the receiving side is normal by the above S1 to S20, a predetermined amount is extracted from the head of the received data and compared with the consistency comparison data. By repeating the erasure, it is possible to check the validity of the received test data.

  In S21, since the test pattern extracted in YES in S10 is found to be less than the normal amount, the extracted data is stored in the register T28.

In step S22, the head data pattern of the register Rn + 1 is analyzed.
In S23, data up to immediately before the head data pattern of the register Rn + 1 is added to the end of the stored data in the register T28.

  In S24, the portion after the first data pattern of the register Rn + 1 is shifted to the first address. Then, the process proceeds to S17.

  If the amount of data extracted from the received data is smaller than the normal amount by the above S21 to S24, the amount of data that is insufficient in the register Rn + 1 is extracted and added to the normal amount at the end, and then S17 It is possible to proceed to the subsequent processing.

  In S25, since it is determined that data cannot be received from the optical module 35 in NO in S5, error status = 1 is set.

  In S26, the LED is turned off. As a result, it is possible to display that the optical module 35 on the receiving side cannot receive data and notify the administrator.

  In S27, it is determined whether or not all the circuits Reset are present. In this case, it is determined whether or not a circuit reset signal is input from an external or internal control unit (not shown). If yes, return to S2 and repeat. If NO, the process proceeds to S28.

  In S28, it is determined whether there is an LED Reset signal. In this case, it is determined whether there is an LED Reset signal from an external or internal control unit (not shown). If YES, the error status is reset to 0 in S29, and the process returns to S5 and repeats. If NO, repeat S26.

  If it is determined from S25 to S29 that no data is received by the receiving optical module 35 in S5, the LED can be turned on to notify the administrator.

  In S30, the data received and extracted in NO in S14 is compared with the matching comparison data, and it is found that they do not match completely, so the error status = 2 is set.

  In S31, the LED blinks. This is because it was found in S30 that they do not match completely, and in response to setting the error status = 2, the LED blinks to notify the administrator that the received data and the consistency comparison data do not match completely. Is possible.

  In S32, it is determined whether or not all the circuits are reset. In this case, it is determined whether or not a circuit reset signal is input from an external or internal control unit (not shown). If yes, return to S2 and repeat. If no, the process proceeds to S33.

  In S33, it is determined whether there is an LED Reset signal. In this case, it is determined whether there is an LED Reset signal from an external or internal control unit (not shown). If YES, the error status is reset to 0 in S29, and the process returns to S5 and repeats. If NO, repeat S32.

  If it is determined from S30 to S33, S29 that the data received by the receiving optical module 35 does not completely match the data for consistency comparison in NO in S14, the LED is blinked and managed. It is possible to inform the person.

  FIG. 4 is a diagram for explaining the cause of abnormality occurrence according to the present invention. In the figure, the LED on the transmitting side and the LED on the receiving side are turned off, turned on, and blinked as follows.

・ Sender LED:
・ Lights up (status = 0)
・ Lights off (status = 1)
-LED on the receiving side:
・ Lights up (status = 0)
・ Lights off (status = 1)
・ Flashing (status = 2)
Under the above status, when the cause of abnormality is separated by the combination of turning off, lighting, and blinking of the LEDs in FIG. 2 (transmission side) and FIG. 3 (reception side) described above, the following is illustrated. .

LED status on the transmitting side LED status on the receiving side Judgment State 1: Lit Lit Normal State 2: Lit Unlit No light on the receiving side
・ No laser emission on the transmitting side
・ Optical cable failure
・ Receiving side light receiving unit failure Status 3: Lit Flashing Reception data mismatch
・ Receiver circuit error
・ Transmission side circuit error State 4: Off Off Transmission side error
・ Send side non-flash
・ Transmission-side circuit abnormality As can be understood from the above-described abnormality cause separation chart, the results of the monitoring checks shown in FIG. 2 (transmission side) and FIG. The above-mentioned abnormality occurrence factors can be easily separated by displaying each on, off, and blinking.

Next, lighting and extinguishing of the LED on the transmission side will be described in detail with reference to FIG.
FIG. 5 is an explanatory diagram (transmission side) of the present invention. The operation on the transmission side in FIG. 2 described above will be described.

FIG. 5A shows an example of a timing chart when the transmission side is normal.
In FIG. 5A, “PWR-ON” in (1) indicates that the PWR 15 in FIG. 1 is turned ON to start supplying power to the transmission side module board 1.

  “Transmission test data” in (5) indicates test data input to the data generation circuit 5 from the work register 4 in FIG.

  “Transmission test data” in (6) shows an example in which serial data generated by the data generation circuit 5 in FIG. 1 is schematically represented. Here, a state is shown in which a plurality of sets of data composed of (data start, test data, data end) are transmitted.

  The “module activation signal” in (7) indicates a signal that becomes High when the module activation determination circuit 9 in FIG. 1 receives the activation signal from the optical module 6.

  The “laser control activation signal” in (8) indicates a signal that becomes High when a signal transmitted when the laser activation determination path 10 in FIG. 1 activates the laser from the optical module 6 is received.

  “LED ON” in (9) is a signal sent out when the error status circuit 11 in FIG. 1 detects an error (light extinction (status = 1) is an abnormal signal).

  FIG. 5B shows an example of a timing chart when there is no module activation signal on the transmission side. Here, (1), (5), (6), (8), and (9) are signals representing the same meaning as in FIG. In FIG. 5B, when the module start signal in (7) is not (LOW level) and the laser control start signal in (8) is not (LOW level), the LED is turned off (status = 1, FIG. 2). S8 ') and an abnormality is displayed.

  As described above, only by mounting the optical module 6 to be inspected on the transmission-side transmission module board 1 and turning on the power, the processing shown in the flowchart of FIG. If there is no module activation signal, and there is no laser control activation signal, the LED is turned off (status = 1), and the administrator can be notified of the abnormality of the optical module.

  Next, the lighting, extinguishing, and blinking of the LED on the receiving side will be described in detail with reference to FIGS.

  FIG. 6 is an explanatory diagram of the present invention (receiving side, part 1). FIG. 6A shows an example of a timing chart when the received data is normal.

In FIG. 6A,
“PWR-ON” in (1) indicates that the PWR 43 in FIG. 1 is turned on to start supplying power to the receiving-side module board 21.

  The comparison test data (4) indicates comparison test data that is read from the data pattern storage unit 23 of FIG. 1 and stored in the work register M24.

  “Received data” in (5) represents an example schematically representing serial data received by the reception check unit 36 from the optical module 35 in FIG. Here, a state is shown in which a plurality of sets of data (data start, test data, data end) are transmitted.

  “Received data storage” in (6) indicates that X bytes of the received data in (5) are stored in the registers RnRn + 1.

  The “first data analysis” in (7) is for the X bytes of data in (6), where the top (in this case, “11 (data start)... 11 (data end)” is the top ( "11")) is analyzed and shown as shown.

  “Test data extraction” in (8) indicates a state in which test data existing from the beginning to the end of the data found in (7) is extracted as illustrated.

  “Extracted test data storage” in (10) indicates a state in which the test data extracted in (8) is stored in the work register B29 in FIG.

  (11) “(4) and (10) comparison” is the received data stored in the work register B29 in FIG. 1 in (10) and the comparison test stored in the work register M24 in FIG. 1 in (4). The state which compares with data is shown.

  “LED lit” is lit in the initial state (status = 0 (S3 in FIG. 3)). Here, since the received data matches the test data for comparison, it remains lit.

  FIG. 7 is an explanatory diagram of the present invention (receiving side, part 2). FIG. 7B shows an example of a timing chart when there is no reception data. Here, (1), (4), and (5) are the same as those in FIG.

  “Status” in (15) indicates a status indicating an abnormal status (the initial status is status = 0 (lighted) in S3 of FIG. 3).

  Since the status = 1 in (b-1) is the case where there is no received data, it becomes NO in S5 of FIG. 3 described above, and the status = 1 is set in S25. Since the timing chart of 1 is set to High (= 1) at the position shown in the figure, the LED of (16) is turned off correspondingly.

  As described above, when the receiving side detects that no data is received in S5 of FIG. 3 described above, the administrator sets the data to 1 and turns off the LED so that the administrator It can be recognized that it has not been received.

  FIG. 8 is an explanatory diagram of the present invention (receiving side, part 3). FIG. 8C shows an example of a timing chart when the received data does not match. Here, (1), (4), (5), (6), (7), (8), (10), and (11) are the same as those in FIG.

  The “error detection” in (12) compares the comparison test data (work register M24 in FIG. 1) with the received test data (work register B29), and finds that they do not match completely (S14 in FIG. 3 described above). NO), so that an error has been detected.

  “Status = 2” in (19) indicates a state in which status = 2 (S30 in FIG. 2 described above) is set in response to detection of an error that does not completely match the data in (12).

  “LED blinking” indicates a state in which the LED blinks as shown in the figure in response to the setting of status = 2 (data mismatch) in (19).

  As described above, when the receiving side detects that the received data does not match the comparison data in 14 of FIG. 3 described above, the status is set to 2 and the LED blinks. Thus, the administrator can recognize that the data is received on the receiving side but does not match the comparison data.

(Appendix 1)
In an optical module test method for testing an optical module,
A test board on the transmission side provided with a test data generation unit, and a test board on the reception side provided with a reception data comparison unit connected to the test board on the transmission side via an optical fiber,
The test module on the transmitting side is mounted after the optical module for testing on the transmitting side is mounted on the test board on the transmitting side, and the optical module for testing on the receiving side is mounted on the test board on the receiving side. The test data generated by the data generation unit is input to the optical module to be tested, and the comparison result is output by comparing the data received by the reception data comparison unit on the reception side test board with the reference data. An optical module test method characterized by:

(Appendix 2)
The optical module test method according to claim 1, wherein the comparison result is output by turning on, blinking, and turning off a display provided on the test board on the receiving side.

(Appendix 3)
On the test board on the transmission side, provided with a display for displaying an abnormality detection unit and an abnormality detection result,
The optical module test method according to appendix 1 or appendix 2, wherein the status of the optical module under test on the transmitting side is monitored, and when an abnormality is detected, the indicator is turned on and off to display the abnormal state .

(Appendix 4)
On the test board on the receiving side, provided with a display for displaying an abnormality detection unit and an abnormality detection result,
Any one of appendix 1 to appendix 3, wherein the status of the optical module under test on the receiving side is monitored and when the abnormality is detected, the abnormal state is displayed by turning on, blinking, and extinguishing the display. The optical module test method described.

(Appendix 5)
Either one of the transmitter-side test board and the optical module, and the receiver-side test board and the optical module, or both of them are placed in a high-temperature test tank, and a high-temperature test is performed. Optical module test method.

(Appendix 6)
Attach a socket board to the part where the optical module to be tested is installed on one or both of the transmitting side and the receiving side, and replace the socket board to install any optical module on the test board. 6. The optical module test method according to any one of appendix 1 to appendix 5, wherein the test is possible.

  In the present invention, a test data generation circuit, an abnormality detection circuit, and a display are provided on the transmission side, and an optical module to be tested is attached thereto, and a comparison circuit, an abnormality detection circuit, and a display are provided on the reception side via an optical cable. Light that easily detects in real time whether the optical module on the transmitting side, the optical transmission path, or the optical module on the receiving side is abnormal when the display is turned on. This is a module test method.

It is a system configuration diagram of the present invention. It is operation | movement explanatory flowchart (transmission side) of this invention. It is an operation | movement explanatory flowchart (reception side) of this invention. FIG. 3 is an explanatory diagram for identifying an abnormality occurrence factor according to the present invention. It is explanatory drawing (transmission side) of this invention. It is explanatory drawing (receiving side, the 1) of this invention. It is explanatory drawing (receiving side, the 2) of this invention. It is explanatory drawing (receiving side, the 2) of this invention.

Explanation of symbols

1: Transmission module board 2: Test data generation unit 6: Optical module (transmission side)
8: Laser monitor signal check unit 11: Error status circuit 14: LED (transmission side)
21: Reception module board 22: Comparison determination unit 35: Optical module 36: Reception check unit 40: Error status circuit 42: LED (reception side)

Claims (5)

In an optical module test method for testing an optical module,
A test board on the transmission side provided with a test data generation unit, and a test board on the reception side provided with a reception data comparison unit connected to the test board on the transmission side via an optical fiber,
The test module on the transmitting side is mounted after the optical module for testing on the transmitting side is mounted on the test board on the transmitting side, and the optical module for testing on the receiving side is mounted on the test board on the receiving side. The test data generated by the data generation unit is input to the optical module to be tested, and the comparison result is output by comparing the data received by the reception data comparison unit on the reception side test board with the reference data. An optical module test method characterized by: On the test board on the transmission side, provided with a display for displaying an abnormality detection unit and an abnormality detection result,
2. The optical module test method according to claim 1, wherein when the abnormality is detected by monitoring the state of the optical module under test on the transmitting side, the abnormal state is displayed by turning on and off the display. On the test board on the receiving side, provided with a display for displaying an abnormality detection unit and an abnormality detection result,
The status of the optical module for test on the receiving side is monitored, and when an abnormality is detected, the abnormal state is displayed by turning on, blinking, or turning off the display. Optical module test method.   4. The high-temperature test is performed by putting one or both of the test board and optical module on the transmitting side and the test board and optical module on the receiving side into a high-temperature test chamber. The optical module test method described in 1.   Attach a socket board to the part where the optical module to be tested is installed on one or both of the transmitting side and the receiving side, and replace the socket board to install any optical module on the test board. The optical module test method according to claim 1, wherein the optical module test method is enabled.

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