JP2007129002A - Electronic component package - Google Patents

Electronic component package Download PDF

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JP2007129002A
JP2007129002A JP2005319060A JP2005319060A JP2007129002A JP 2007129002 A JP2007129002 A JP 2007129002A JP 2005319060 A JP2005319060 A JP 2005319060A JP 2005319060 A JP2005319060 A JP 2005319060A JP 2007129002 A JP2007129002 A JP 2007129002A
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component
electronic component
cover
package
substrate
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JP4779579B2 (en
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Atsushi Takano
敦 鷹野
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements

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Abstract

<P>PROBLEM TO BE SOLVED: To provide an electronic component package in which damage due to inflow pressure of resin is reduced during molding even if a plurality of electronic component elements are mounted on a substrate. <P>SOLUTION: The electronic component package comprises a component substrate 1, a plurality of electronic component elements 2 arranged on the component substrate 1 at a predetermined interval, interconnection for connecting the plurality of electronic component elements 2, and a component cover 3 provided on the component substrate 1 to cover the plurality of electronic component elements 2 and the interconnection wherein a wall 4 for partitioning the plurality of electronic component elements 2 is provided on the component cover 3 toward the component substrate 1. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、各種電子機器に使用される電子部品パッケージに関する。   The present invention relates to an electronic component package used in various electronic devices.

各種電子機器の小型化に伴い、電子部品においてワンパッケージ化が要望されている。このワンパッケージ化とは、コイル、コンデンサ、パワーアンプ、ＳＡＷパッケージ等の各種電子部品を基板上に実装した後その状態で樹脂モールドしてワンパッケージモジュールとするものである。   With the miniaturization of various electronic devices, there is a demand for electronic components in one package. In this one-package implementation, various electronic components such as a coil, a capacitor, a power amplifier, and a SAW package are mounted on a substrate and then molded in a resin state to form a one-package module.

図８は、従来のワンパッケージモジュールの斜視図である。基板８０上にコンデンサ８１、コイル８２、パワーアンプ８３、ＳＡＷパッケージ８４が実装されており、この基板８０上をモールド樹脂８５で覆ってワンパッケージモジュールとしている。   FIG. 8 is a perspective view of a conventional one package module. A capacitor 81, a coil 82, a power amplifier 83, and a SAW package 84 are mounted on a substrate 80. The substrate 80 is covered with a mold resin 85 to form a one package module.

このように各種電子部品をワンパッケージにすることにより半導体と同様に扱うことができ、電子部品を使用するメーカーにとって利便性がよいという利点があるものである。   Thus, various electronic components can be handled in the same way as a semiconductor by making them into one package, and there is an advantage that it is convenient for manufacturers using the electronic components.

なお、本出願の発明に関連する先行技術文献情報としては、特許文献１が知られている。
特開２００４−３０４６２２号公報 Patent Document 1 is known as prior art document information related to the invention of the present application.
JP 2004-304622 A

しかしながら、上記ワンパッケージにする際のモールド時、樹脂の流入圧力により電子部品が破損しやすいという課題があった。   However, there is a problem that the electronic component is easily damaged by the inflow pressure of the resin at the time of molding when forming the one package.

すなわち、例えば、上記ＳＡＷパッケージの場合、部品基板に実装されたＳＡＷ素子は、湿気による電極の酸化を防止するため部品カバーにて封止されている。この部品カバーには、ＳＡＷ素子が振動するために必要な空間を確保するため、部品カバーの、ＳＡＷ素子との対面には凹部が形成されており、部品カバーの外周部が前記部品基板と接着されている。この部品カバーの凹部の厚みは、外周部のそれと比べて薄いため、前記モールド時の樹脂の流入圧力により部品カバーが破損してしまうという課題があった。特に、電子部品の小型化が要望される近年、この傾向は顕著なものとなっている。   That is, for example, in the case of the SAW package, the SAW element mounted on the component substrate is sealed with a component cover to prevent oxidation of the electrode due to moisture. In order to secure a space necessary for the SAW element to vibrate in the component cover, a concave portion is formed on the surface of the component cover facing the SAW element, and the outer periphery of the component cover is bonded to the component substrate. Has been. Since the thickness of the concave portion of the component cover is thinner than that of the outer peripheral portion, there is a problem that the component cover is damaged by the inflow pressure of the resin during the molding. In particular, in recent years when electronic components are required to be downsized, this tendency has become remarkable.

そこで本発明は、電子部品パッケージの破損を低減することを目的とする。   Therefore, an object of the present invention is to reduce the breakage of an electronic component package.

この目的を達成するために、本発明の請求項１の発明は、部品基板と、この部品基板上に所定間隔にて配置された複数の電子部品素子と、これら複数の電子部品素子を接続する配線と、前記複数の電子部品素子および配線を覆うように前記部品基板に設けた部品カバーを備え、前記複数の電子部品素子を仕切るように前記部品基板に向けて仕切り壁を前記部品カバーに設けた構成を有するものであり、これにより電子部品パッケージの破損を低減することができるという作用効果を有するものである。   In order to achieve this object, the invention according to claim 1 of the present invention connects a component board, a plurality of electronic component elements arranged on the component board at predetermined intervals, and the plurality of electronic component elements. A component cover provided on the component board so as to cover the wiring and the plurality of electronic component elements and the wiring is provided, and a partition wall is provided on the component cover so as to partition the plurality of electronic component elements. This has the effect of reducing the damage of the electronic component package.

また、請求項２の発明は、仕切り壁により仕切られた空洞間に連通路を設けたものであり、これにより、ある空洞に樹脂の流入圧力が集中した場合でもこの連通路により他の空洞に圧力が分散されるため、空洞内の高圧力化による電子部品の特性低下を低減することができるという作用効果を有するものである。   Further, the invention of claim 2 is provided with a communication path between cavities partitioned by a partition wall, so that even if the inflow pressure of the resin is concentrated in a certain cavity, this communication path allows other communication to be established in another cavity. Since the pressure is dispersed, it is possible to reduce the deterioration of the characteristics of the electronic component due to the increase in pressure in the cavity.

また、請求項３の発明は、連通路は、配線の非形成部に設けたものであり、これにより、配線と部品基板の配線非形成部との段差を連通路として利用することもできるという作用効果を有するものである。   Further, in the invention of claim 3, the communication path is provided in the non-wiring portion of the wiring, whereby the step between the wiring and the wiring non-forming portion of the component board can be used as the communication path. It has a working effect.

また、請求項４の発明は、部品基板と、この部品基板上に所定間隔にて配置された複数の電子部品素子と、これら複数の電子部品素子を接続する配線と、前記複数の電子部品素子および配線を覆うように前記部品基板に設けた部品カバーを備え、前記複数の電子部品素子を仕切るように前記部品基板に向けて複数の支柱を前記部品カバーに設けたものであり、これにより、電子部品パッケージの破損を低減することができるという作用効果を有するものである。   According to a fourth aspect of the present invention, there is provided a component substrate, a plurality of electronic component elements disposed on the component substrate at predetermined intervals, wirings connecting the plurality of electronic component elements, and the plurality of electronic component elements. And a component cover provided on the component substrate so as to cover the wiring, and a plurality of support columns provided on the component cover toward the component substrate so as to partition the plurality of electronic component elements. It has the effect that the breakage of the electronic component package can be reduced.

本発明は、複数の電子部品素子を仕切るように前記部品基板に向けて仕切り壁を前記部品カバーに設けた構成を有するので、電子部品パッケージの破損を低減することができるという作用効果を有するものである。   The present invention has a configuration in which a partition wall is provided on the component cover toward the component substrate so as to partition a plurality of electronic component elements, and thus has an effect of reducing damage to the electronic component package. It is.

本発明の電子部品パッケージについて一実施の形態および図面を用いて説明する。なお、電子部品パッケージとしてＳＡＷパッケージを用いて説明する。   An electronic component package of the present invention will be described with reference to an embodiment and drawings. A description will be given using a SAW package as the electronic component package.

図１は、本発明の一実施の形態におけるＳＡＷパッケージを実装基板に実装しワンパッケージにしたモジュールの断面図である。図１において部品基板１の表面にＳＡＷ素子２が所定の間隔で実装されている。このＳＡＷ素子２は、タンタル酸リチウム、ニオブ酸リチウム、水晶等に代表される圧電材料からなる部品基板１の表面にアルミニウム製の櫛形電極（図示せず）を形成してできている。そして、このＳＡＷ素子２を覆うようにシリコンからなる部品カバー３がＳＡＷ素子２との間にわずかな空洞（図示せず）を設けながら部品基板１の表面に設けられ、これによりＳＡＷパッケージ５を形成している。前記部品基板１と部品カバー３の接合は酸化シリコンを介して行われている。そして、ＳＡＷ素子２を仕切るように前記部品基板１に向けて仕切り壁４を前記部品カバー３に設けている。この部品カバー３から表出させた接続電極６を介してＳＡＷパッケージ５を実装基板７に実装し、ＳＡＷパッケージ５を実装した実装基板７の面にモールド樹脂８にてモールドしＳＡＷパッケージ５を覆っている。このモールドの際、部品カバー３と実装基板７との隙間にモールド樹脂８が入り込むが、このときの樹脂の流入圧力が部品カバー３にかかることになる。従来の電子部品パッケージでは、この流入圧力により部品カバーが破損することがあったが、本発明の電子部品パッケージでは、上記仕切り壁４を設けているためにこの流入圧力に耐えることができ、その結果、破損を低減することができるものである。   FIG. 1 is a cross-sectional view of a module in which a SAW package according to an embodiment of the present invention is mounted on a mounting board to form a single package. In FIG. 1, SAW elements 2 are mounted on the surface of a component substrate 1 at a predetermined interval. The SAW element 2 is formed by forming an aluminum comb-shaped electrode (not shown) on the surface of a component substrate 1 made of a piezoelectric material typified by lithium tantalate, lithium niobate, crystal or the like. A component cover 3 made of silicon is provided on the surface of the component substrate 1 so as to cover the SAW element 2 while a slight cavity (not shown) is provided between the SAW element 2 and the SAW package 5. Forming. The component substrate 1 and the component cover 3 are joined through silicon oxide. A partition wall 4 is provided on the component cover 3 so as to partition the SAW element 2 toward the component substrate 1. The SAW package 5 is mounted on the mounting substrate 7 via the connection electrodes 6 exposed from the component cover 3, and the surface of the mounting substrate 7 on which the SAW package 5 is mounted is molded with the mold resin 8 to cover the SAW package 5. ing. At the time of molding, the mold resin 8 enters the gap between the component cover 3 and the mounting substrate 7, and the inflow pressure of the resin at this time is applied to the component cover 3. In the conventional electronic component package, the component cover may be damaged due to the inflow pressure. However, in the electronic component package of the present invention, since the partition wall 4 is provided, the inflow pressure can withstand, As a result, breakage can be reduced.

上記仕切り壁４により仕切られた空洞間には連通路を設けることができる。これにより、ある空洞に樹脂の流入圧力が集中した場合でもこの連通路により他の空洞に圧力を分散させることができる。例えば、ＳＡＷ素子２の場合、空洞内の高圧力化により振動しにくくなり、その結果、損失が大きくなってしまう恐れがあるが、このように圧力を分散させることによりその損失低下を抑制することができるという作用効果を有する。   A communication path can be provided between the cavities partitioned by the partition wall 4. Thereby, even when the inflow pressure of the resin is concentrated in a certain cavity, the pressure can be dispersed to other cavities by this communication path. For example, in the case of the SAW element 2, it becomes difficult to vibrate due to the high pressure in the cavity, and as a result, the loss may increase. However, by dispersing the pressure in this way, the loss reduction is suppressed. Has the effect of being able to

この連通路は、部品基板１に設けることもできるし、仕切り壁４に設けることもできる。部品基板１に設ける場合には、配線の非形成部を連通路とすることも可能である。すなわち、各ＳＡＷ素子２は配線を介して接続されているが、この配線は、部品基板１上に形成されている。すると、この配線と実装基板７との間には配線分の高さの違いが生じる。すなわち、実装基板７の配線の非形成部は、一段低くなっているため、この部位を連通路として利用することができる。これにより別途連通路を設けるという手間を省くことができる。   This communication path can be provided in the component substrate 1 or in the partition wall 4. When provided on the component substrate 1, the non-wiring portion can be used as a communication path. That is, each SAW element 2 is connected via a wiring, which is formed on the component substrate 1. Then, a difference in height between the wiring and the mounting substrate 7 occurs. That is, since the non-wiring portion of the mounting substrate 7 is lowered by one step, this portion can be used as a communication path. Thereby, the trouble of providing a separate communication path can be saved.

ここで酸化シリコンを介した前記部品基板１と部品カバー３の接合方法について図２を用いて説明する。部品基板１と部品カバー３を接合するにはまず部品基板１の表面に酸化シリコンを形成する。その際、図２に示すマスクを用いることができる。このマスク２１には、ＳＡＷ素子および取出電極の部分に対応する箇所に開口部２２が設けられている。そこで、例えば、感光性樹脂をこの開口部２２に塗布し、光を当てることによりこの感光性樹脂を硬化させた後スパッタ等で酸化シリコンを感光性樹脂の非形成部に形成する。その後、硬化した感光性樹脂を除去することにより部品基板１の所定の部位に酸化シリコンを形成することができる。この酸化シリコンを用いてシリコンからなる部品カバー３と接合する。この接合は、酸素原子を介在したシリコン原子の共有結合によるものであり、酸化シリコンと部品カバーの界面を活性化処理することにより加熱することなく直接接合することができるものである。   Here, a method of joining the component substrate 1 and the component cover 3 through silicon oxide will be described with reference to FIG. In order to join the component substrate 1 and the component cover 3, first, silicon oxide is formed on the surface of the component substrate 1. At that time, the mask shown in FIG. 2 can be used. The mask 21 is provided with an opening 22 at a location corresponding to the SAW element and the extraction electrode. Therefore, for example, a photosensitive resin is applied to the opening 22 and the photosensitive resin is cured by applying light, and then silicon oxide is formed on the non-photosensitive resin forming portion by sputtering or the like. Thereafter, silicon oxide can be formed on a predetermined portion of the component substrate 1 by removing the cured photosensitive resin. The silicon oxide is used to join the component cover 3 made of silicon. This bonding is based on covalent bonding of silicon atoms with oxygen atoms interposed therebetween, and can be directly bonded without heating by activating the interface between silicon oxide and the component cover.

さて、次に図３〜図６を用いてさらに本発明の電子部品パッケージについて説明する。図３は部品カバー３を除いたＳＡＷパッケージの内部上面図、図４は部品カバー３の上面図、図５は実装基板１に接続するための接続電極６を形成した部品カバー３の上面図、図６は同部品カバー３のＢ−Ｂの断面図、図７は、図３の上面図に対応した電気回路図である。   Next, the electronic component package of the present invention will be further described with reference to FIGS. 3 is an internal top view of the SAW package excluding the component cover 3, FIG. 4 is a top view of the component cover 3, and FIG. 5 is a top view of the component cover 3 in which connection electrodes 6 for connection to the mounting substrate 1 are formed. 6 is a cross-sectional view taken along the line BB of the component cover 3, and FIG. 7 is an electric circuit diagram corresponding to the top view of FIG.

図３、図７において、各ＳＡＷ素子２ａ，２ｂ，２ｃ，２ｄ，２ｅ，２ｆ，２ｇ，２ｈ，２ｉは、圧電材料からなる部品基板１の表面に所定の間隔で実装されており、図７に示す回路図のように接続されている。   3 and 7, the SAW elements 2a, 2b, 2c, 2d, 2e, 2f, 2g, 2h, and 2i are mounted on the surface of the component substrate 1 made of a piezoelectric material at predetermined intervals. Are connected as shown in the circuit diagram shown in FIG.

図４において、部品カバー３には凹部が形成されており、この部品カバー３の裏面が図３のＳＡＷパッケージ５の表面を覆うように配置される。このとき前記凹部は、ＳＡＷ素子に対応するように部品カバー３に設けられている。すなわち、ＳＡＷ素子２ａ，２ｂは凹部３１ａｂに、ＳＡＷ素子２ｃ，２ｄは凹部３１ｃｄに、ＳＡＷ素子２ｅは凹部３１ｅに、ＳＡＷ素子２ｆ，２ｇは凹部３１ｆｇに、ＳＡＷ素子２ｈ，２ｉは凹部３１ｈｉにそれぞれ対応しており、凹部が各ＳＡＷ素子に嵌り込むようになっており、ＳＡＷ素子２が振動するために必要な空間（空洞）を形成している。   In FIG. 4, a concave portion is formed in the component cover 3, and the rear surface of the component cover 3 is disposed so as to cover the surface of the SAW package 5 in FIG. At this time, the concave portion is provided in the component cover 3 so as to correspond to the SAW element. That is, the SAW elements 2a and 2b are in the recess 31ab, the SAW elements 2c and 2d are in the recess 31cd, the SAW element 2e is in the recess 31e, the SAW elements 2f and 2g are in the recess 31fg, and the SAW elements 2h and 2i are in the recess 31hi. Correspondingly, the concave portion is fitted into each SAW element, and a space (cavity) necessary for the SAW element 2 to vibrate is formed.

そして、この凹部は連通路にて隣接する凹部に連通されている。ここで連通路は、隣り合う凹部３１間の仕切り壁４に設けることも可能であるし、また、部品基板１の溝を形成してこれを連通路としてもよいし、例えば、図３においてＳＡＷ素子２ａ，２ｂ，２ｃ，２ｄ，２ｅ，２ｆ，２ｇ，２ｈ，２ｉ、配線３３、送信端子３４、受信端子３５が形成されていない実装基板７の面をすべて連通路３２としてもよい。   And this recessed part is connected to the adjacent recessed part in the communicating path. Here, the communication path can be provided in the partition wall 4 between the adjacent recesses 31, or a groove of the component substrate 1 can be formed to serve as the communication path. For example, in FIG. The surfaces of the mounting substrate 7 on which the elements 2 a, 2 b, 2 c, 2 d, 2 e, 2 f, 2 g, 2 h, 2 i, the wiring 33, the transmission terminal 34, and the reception terminal 35 are not formed may be all used as the communication path 32.

さて、図５、図６で示すように、部品カバー４を部品基板１に形成した後実装基板７に実装するために接続電極６を形成する。図２で示したマスク２１の開口部２２に対応する部品基板１は配線３３が表出した状態になっているため、部品カバー３に貫通孔を設けてこの配線３３をめっき、導電ペースト等を用いて部品カバー３の表面に表出させ、接続電極６を形成する。   As shown in FIGS. 5 and 6, after the component cover 4 is formed on the component substrate 1, the connection electrode 6 is formed for mounting on the mounting substrate 7. Since the component substrate 1 corresponding to the opening 22 of the mask 21 shown in FIG. 2 is in a state where the wiring 33 is exposed, a through hole is provided in the component cover 3 and the wiring 33 is plated with a conductive paste or the like. It is used to expose the surface of the component cover 3 to form the connection electrode 6.

この接続電極６には、図５に示すようにそれぞれ電極パッドを設けてもよい。つまり、送信端子３４に対応する電極パッド５４、受信端子３５に対応する電極パッド５５、アンテナ端子３６に対応する電極パッド５６、それ以外はＧＮＤの電極パッド５７としている。以上のようにして構成されたＳＡＷパッケージ５を実装基板７に実装する。   Each connection electrode 6 may be provided with an electrode pad as shown in FIG. That is, the electrode pad 54 corresponding to the transmission terminal 34, the electrode pad 55 corresponding to the reception terminal 35, the electrode pad 56 corresponding to the antenna terminal 36, and the other electrode pads 57 are GND. The SAW package 5 configured as described above is mounted on the mounting substrate 7.

次に図７を用いてこのＳＡＷパッケージ５の動作について説明する。図３、図７において、各ＳＡＷ素子２ａ，２ｂ，２ｃ，２ｄ，２ｅ，２ｆ，２ｇ，２ｈ，２ｉは、図５に示す回路図のように接続されている。ここでアンテナ端子３６はアンテナ（図示せず）に接続され、このアンテナから受信された信号からＳＡＷ素子２ｇ，２ｉを介して特定周波数の信号が取り出されて受信端子３５に出力される。一方、送信信号は、送信端子３４からＳＡＷ素子２ａ，２ｃ，２ｅを経てアンテナ端子３６を介してアンテナから送信される。   Next, the operation of the SAW package 5 will be described with reference to FIG. 3 and 7, the SAW elements 2a, 2b, 2c, 2d, 2e, 2f, 2g, 2h, and 2i are connected as shown in the circuit diagram of FIG. Here, the antenna terminal 36 is connected to an antenna (not shown), and a signal having a specific frequency is extracted from the signal received from the antenna via the SAW elements 2g and 2i and output to the reception terminal 35. On the other hand, the transmission signal is transmitted from the antenna via the antenna terminal 36 via the SAW elements 2a, 2c and 2e from the transmission terminal 34.

以上のように、本発明の電子部品パッケージは、複数の電子部品素子を仕切るように前記部品基板に向けて仕切り壁を前記部品カバーに設けるという構成を有するのでモールド時の樹脂の流入圧力による部品カバーの破損を低減することができるという作用効果を有するものである。   As described above, the electronic component package of the present invention has a configuration in which a partition wall is provided on the component cover toward the component substrate so as to partition a plurality of electronic component elements. Therefore, the component due to the inflow pressure of resin during molding It has the effect of being able to reduce the breakage of the cover.

なお、電子部品パッケージとしてＳＡＷパッケージを例に説明したが、これに限定されるものではない。   Although the SAW package has been described as an example of the electronic component package, the present invention is not limited to this.

また、仕切り壁４の代わりに複数の支柱を設けても同様の効果を得ることができるし、仕切り壁４と支柱を組み合わせて用いることも可能である。ここで支柱を用いる場合、支柱と支柱の間の空間、仕切り壁と支柱の間の空間が上記連通路になるが、別途、配線の非形成部に連通路を設けることも可能である。   Further, even if a plurality of support columns are provided instead of the partition wall 4, the same effect can be obtained, and the partition wall 4 and the support columns can be used in combination. Here, when the support is used, the space between the support and the support and the space between the partition wall and the support serve as the communication path. However, it is also possible to separately provide the communication path in a portion where the wiring is not formed.

本発明は、複数の電子部品素子を仕切るように前記部品基板に向けて仕切り壁を前記部品カバーに設けるという特徴を有し、空洞を内部に有する電子部品パッケージに有用である。   The present invention is characterized in that a partition wall is provided on the component cover toward the component substrate so as to partition a plurality of electronic component elements, and is useful for an electronic component package having a cavity inside.

本発明の一実施の形態におけるＳＡＷパッケージを実装基板に実装しワンパッケージにしたモジュールの断面図Sectional drawing of the module which mounted the SAW package in one embodiment of this invention on the mounting board | substrate, and was made into one package マスクの上面図Mask top view 本発明の一実施の形態におけるＳＡＷパッケージの内部上面図The internal top view of the SAW package in one embodiment of the present invention 部品カバーの上面図Top view of parts cover 接続電極を形成した部品カバーの上面図Top view of component cover with connection electrodes 同断面図Cross section 本発明の一実施の形態におけるＳＡＷパッケージの電気回路図Electrical circuit diagram of SAW package in one embodiment of the present invention 従来のワンパッケージモジュールの斜視図Perspective view of a conventional one package module

符号の説明Explanation of symbols

１ 部品基板
２，２ａ，２ｂ，２ｃ，２ｄ，２ｅ，２ｆ，２ｇ，２ｈ，２ｉ ＳＡＷ素子
３ 部品カバー
４ 仕切り壁
５ ＳＡＷパッケージ
６ 接続電極
７ 実装基板
８ モールド樹脂
２１ マスク
２２ 開口部
３１ａｂ，３１ｃｄ，３１ｅ，３１ｆｇ，３１ｈｉ 凹部
３２ 連通路
３３ 配線
３４ 送信端子
３５ 受信端子
３６ アンテナ端子
５４，５５，５６，５７ 電極パッド 1 Component substrate 2, 2a, 2b, 2c, 2d, 2e, 2f, 2g, 2h, 2i SAW element 3 Component cover 4 Partition wall 5 SAW package 6 Connection electrode 7 Mounting substrate 8 Mold resin 21 Mask 22 Opening 31ab, 31cd , 31e, 31fg, 31hi Recess 32 Communication path 33 Wiring 34 Transmission terminal 35 Reception terminal 36 Antenna terminal 54, 55, 56, 57 Electrode pad

Claims (4)

部品基板と、この部品基板上に所定間隔にて配置された複数の電子部品素子と、これら複数の電子部品素子を接続する配線と、前記複数の電子部品素子および配線を覆うように前記部品基板に設けた部品カバーを備え、前記複数の電子部品素子を仕切るように前記部品基板に向けて仕切り壁を前記部品カバーに設けた電子部品パッケージ。 Component board, a plurality of electronic component elements arranged at predetermined intervals on the component board, wiring connecting the plurality of electronic component elements, and the component board so as to cover the plurality of electronic component elements and the wiring An electronic component package comprising: a component cover provided on the component cover; and a partition wall provided on the component cover toward the component substrate so as to partition the plurality of electronic component elements. 仕切り壁により仕切られた空洞間に連通路を設けた請求項１記載の電子部品パッケージ。 The electronic component package according to claim 1, wherein a communication path is provided between the cavities partitioned by the partition wall. 連通路は、配線の非形成部に設けた請求項２記載の電子部品パッケージ。 The electronic component package according to claim 2, wherein the communication path is provided in a portion where the wiring is not formed. 部品基板と、この部品基板上に所定間隔にて配置された複数の電子部品素子と、これら複数の電子部品素子を接続する配線と、前記複数の電子部品素子および配線を覆うように前記部品基板に設けた部品カバーを備え、前記複数の電子部品素子を仕切るように前記部品基板に向けて複数の支柱を前記部品カバーに設けた電子部品パッケージ。 Component board, a plurality of electronic component elements arranged at predetermined intervals on the component board, wiring connecting the plurality of electronic component elements, and the component board so as to cover the plurality of electronic component elements and the wiring An electronic component package comprising: a component cover provided on the component cover; and a plurality of support columns provided on the component cover so as to partition the plurality of electronic component elements.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20170117188A (en) 2015-03-27 2017-10-20 가부시키가이샤 무라타 세이사쿠쇼 Electronic parts

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6020538A (en) * 1983-07-15 1985-02-01 Hitachi Ltd Semiconductor device
JP2001185976A (en) * 1999-12-24 2001-07-06 Kyocera Corp Surface acoustic wave device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6020538A (en) * 1983-07-15 1985-02-01 Hitachi Ltd Semiconductor device
JP2001185976A (en) * 1999-12-24 2001-07-06 Kyocera Corp Surface acoustic wave device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20170117188A (en) 2015-03-27 2017-10-20 가부시키가이샤 무라타 세이사쿠쇼 Electronic parts
US10812042B2 (en) 2015-03-27 2020-10-20 Murata Manufacturing Co., Ltd. Electronic component

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