JP2007123859A5 - - Google Patents
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- Publication number
- JP2007123859A5 JP2007123859A5 JP2006262010A JP2006262010A JP2007123859A5 JP 2007123859 A5 JP2007123859 A5 JP 2007123859A5 JP 2006262010 A JP2006262010 A JP 2006262010A JP 2006262010 A JP2006262010 A JP 2006262010A JP 2007123859 A5 JP2007123859 A5 JP 2007123859A5
- Authority
- JP
- Japan
- Prior art keywords
- film
- substrate
- element groups
- insulating film
- cover
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 239000000758 substrate Substances 0.000 claims 20
- 238000004519 manufacturing process Methods 0.000 claims 11
- 239000004065 semiconductor Substances 0.000 claims 11
- 239000000463 material Substances 0.000 claims 5
- 238000006243 chemical reaction Methods 0.000 claims 3
- 239000004743 Polypropylene Substances 0.000 claims 2
- 229920000728 polyester Polymers 0.000 claims 2
- -1 polypropylene Polymers 0.000 claims 2
- 229920001155 polypropylene Polymers 0.000 claims 2
- 229920000915 polyvinyl chloride Polymers 0.000 claims 2
- 239000004800 polyvinyl chloride Substances 0.000 claims 2
- 229920002620 polyvinyl fluoride Polymers 0.000 claims 2
- 125000000391 vinyl group Chemical group [H]C([*])=C([H])[H] 0.000 claims 2
- 239000011521 glass Substances 0.000 claims 1
- 238000000034 method Methods 0.000 claims 1
- TWXTWZIUMCFMSG-UHFFFAOYSA-N nitride(3-) Chemical compound [N-3] TWXTWZIUMCFMSG-UHFFFAOYSA-N 0.000 claims 1
- 238000007517 polishing process Methods 0.000 claims 1
- 239000000126 substance Substances 0.000 claims 1
Claims (11)
前記複数の素子群を覆うように絶縁膜を形成し、
前記複数の素子群において隣り合う２つの素子群間の領域に設けられた前記絶縁膜に開口部を選択的に形成して前記基板を露出させ、
前記絶縁膜および前記開口部を覆うように第１のフィルムを設け、
前記基板を除去して前記素子群を露出させ、
前記露出した素子群の表面を覆うように第２のフィルムを設け、
前記絶縁膜が露出しないように前記複数の素子群の間を切断することを特徴とする半導体装置の作製方法。 Forming a plurality of element groups on one surface of the substrate;
Forming an insulating film so as to cover the plurality of element groups;
Selectively opening an opening in the insulating film provided in a region between two adjacent element groups in the plurality of element groups to expose the substrate;
A first film is provided so as to cover the insulating film and the opening,
Removing the substrate to expose the device group;
A second film is provided so as to cover the exposed surface of the element group,
A method for manufacturing a semiconductor device, wherein the plurality of element groups are cut so that the insulating film is not exposed.
前記下地膜上に複数の素子群を形成し、
前記複数の素子群を覆うように絶縁膜を形成し、
前記複数の素子群において隣り合う２つの素子群間の領域に設けられた前記絶縁膜に開口部を選択的に形成して前記基板または前記下地膜を露出させ、
前記絶縁膜および前記開口部を覆うように第１のフィルムを設け、
前記基板を除去して前記下地膜を露出させ、
前記露出した下地膜の表面を覆うように第２のフィルムを設け、
前記絶縁膜が露出しないように前記複数の素子群の間を切断することを特徴とする半導体装置の作製方法。 Form a base film on one side of the substrate,
A plurality of element groups are formed on the base film,
Forming an insulating film so as to cover the plurality of element groups;
Selectively opening an opening in the insulating film provided in a region between two adjacent element groups in the plurality of element groups to expose the substrate or the base film;
A first film is provided so as to cover the insulating film and the opening,
Removing the substrate to expose the underlying film;
A second film is provided so as to cover the surface of the exposed base film,
A method for manufacturing a semiconductor device, wherein the plurality of element groups are cut so that the insulating film is not exposed.
前記複数の素子群を覆うように絶縁膜を形成し、
前記複数の素子群において隣り合う２つの素子群間の領域に設けられた前記絶縁膜に開口部を選択的に形成して前記基板を露出させ、
前記絶縁膜および前記開口部を覆うように第１のフィルムを設け、
前記基板の他方の面から前記基板を薄膜化し、
前記薄膜化した基板を化学反応処理により除去して前記素子群を露出させ、
前記露出した素子群の表面を覆うように第２のフィルムを設け、
前記絶縁膜が露出しないように前記複数の素子群の間を切断することを特徴とする半導体装置の作製方法。 Forming a plurality of element groups on one surface of the substrate;
Forming an insulating film so as to cover the plurality of element groups;
Selectively opening an opening in the insulating film provided in a region between two adjacent element groups in the plurality of element groups to expose the substrate;
A first film is provided so as to cover the insulating film and the opening,
Thinning the substrate from the other side of the substrate,
The thinned substrate is removed by a chemical reaction process to expose the element group,
A second film is provided so as to cover the exposed surface of the element group,
A method for manufacturing a semiconductor device, wherein the plurality of element groups are cut so that the insulating film is not exposed.
前記下地膜上に複数の素子群を形成し、
前記複数の素子群を覆うように絶縁膜を形成し、
前記複数の素子群において隣り合う２つの素子群間の領域に設けられた前記絶縁膜に開口部を選択的に形成して前記基板または前記下地膜を露出させ、
前記絶縁膜および前記開口部を覆うように第１のフィルムを設け、
前記基板の他方の面から前記基板を薄膜化し、
前記薄膜化した基板を化学反応処理により除去して前記下地膜を露出させ、
前記露出した下地膜の表面を覆うように第２のフィルムを設け、
前記絶縁膜が露出しないように前記複数の素子群の間を切断することを特徴とする半導体装置の作製方法。 Form a base film on one side of the substrate,
A plurality of element groups are formed on the base film,
Forming an insulating film so as to cover the plurality of element groups;
Selectively opening an opening in the insulating film provided in a region between two adjacent element groups in the plurality of element groups to expose the substrate or the base film;
A first film is provided so as to cover the insulating film and the opening,
Thinning the substrate from the other side of the substrate,
Removing the thinned substrate by a chemical reaction treatment to expose the base film,
A second film is provided so as to cover the surface of the exposed base film,
A method for manufacturing a semiconductor device, wherein the plurality of element groups are cut so that the insulating film is not exposed.
前記基板の薄膜化は、研削処理、研磨処理の一方または両方により行うことを特徴とする半導体装置の作製方法。 In claim 3 or claim 4,
The method for manufacturing a semiconductor device is characterized in that the substrate is thinned by one or both of a grinding process and a polishing process.
前記化学反応処理は、前記薄膜化した基板を薬液に浸すことにより行うことを特徴とする半導体装置の作製方法。 In any one of Claim 3 thru | or 5,
The method for manufacturing a semiconductor device, wherein the chemical reaction treatment is performed by immersing the thinned substrate in a chemical solution.
前記下地膜を、窒化物で形成することを特徴とする半導体装置の作製方法。 In claim 2 or claim 4,
A method for manufacturing a semiconductor device, wherein the base film is formed of nitride.
前記開口部は、レーザ光を照射することにより形成することを特徴とする半導体装置の作製方法。 In any one of Claims 1 thru | or 7,
The method for manufacturing a semiconductor device is characterized in that the opening is formed by irradiation with laser light.
前記基板として、ガラス基板を用いることを特徴とする半導体装置の作製方法。 In any one of Claims 1 thru | or 8,
A method for manufacturing a semiconductor device, wherein a glass substrate is used as the substrate.
前記第１のフィルムの材料として、前記絶縁膜の材料より弾性率が低い材料を用いることを特徴とする半導体装置の作製方法。 In any one of Claims 1 thru | or 9,
A method for manufacturing a semiconductor device, wherein a material having a lower elastic modulus than a material of the insulating film is used as a material of the first film.
前記第１のフィルムの材料として、ポリプロピレン、ポリエステル、ビニル、ポリフッ化ビニル、又はポリ塩化ビニルを用い、
前記第２のフィルムの材料として、ポリプロピレン、ポリエステル、ビニル、ポリフッ化ビニル、又はポリ塩化ビニルを用いることを特徴とする半導体装置の作製方法。 In any one of Claims 1 to 10,
As the material of the first film, polypropylene, polyester, vinyl, polyvinyl fluoride, or polyvinyl chloride is used,
A method for manufacturing a semiconductor device, wherein polypropylene, polyester, vinyl, polyvinyl fluoride, or polyvinyl chloride is used as a material for the second film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006262010A JP5063066B2 (en) | 2005-09-30 | 2006-09-27 | Method for manufacturing semiconductor device |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005288141 | 2005-09-30 | ||
| JP2005288141 | 2005-09-30 | ||
| JP2006262010A JP5063066B2 (en) | 2005-09-30 | 2006-09-27 | Method for manufacturing semiconductor device |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2007123859A JP2007123859A (en) | 2007-05-17 |
| JP2007123859A5 true JP2007123859A5 (en) | 2009-10-22 |
| JP5063066B2 JP5063066B2 (en) | 2012-10-31 |
Family
ID=38147303
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006262010A Expired - Fee Related JP5063066B2 (en) | 2005-09-30 | 2006-09-27 | Method for manufacturing semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP5063066B2 (en) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009260313A (en) | 2008-03-26 | 2009-11-05 | Semiconductor Energy Lab Co Ltd | Method for manufacturing soi substrate, and method for manufacturing semiconductor device |
| KR101596698B1 (en) | 2008-04-25 | 2016-02-24 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Semiconductor device and method for manufacturing the same |
| WO2009139282A1 (en) * | 2008-05-12 | 2009-11-19 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing semiconductor device |
| WO2009142310A1 (en) | 2008-05-23 | 2009-11-26 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing the same |
| WO2009148001A1 (en) * | 2008-06-06 | 2009-12-10 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
| US8053253B2 (en) * | 2008-06-06 | 2011-11-08 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
| WO2010032602A1 (en) | 2008-09-18 | 2010-03-25 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| WO2010032611A1 (en) | 2008-09-19 | 2010-03-25 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing the same |
| WO2010035627A1 (en) | 2008-09-25 | 2010-04-01 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| WO2010035625A1 (en) * | 2008-09-25 | 2010-04-01 | Semiconductor Energy Laboratory Co., Ltd. | Semi conductor device |
| US9000442B2 (en) * | 2010-01-20 | 2015-04-07 | Semiconductor Energy Laboratory Co., Ltd. | Light-emitting device, flexible light-emitting device, electronic device, and method for manufacturing light-emitting device and flexible-light emitting device |
| US9023254B2 (en) * | 2011-10-20 | 2015-05-05 | E I Du Pont De Nemours And Company | Thick film silver paste and its use in the manufacture of semiconductor devices |
| CN102751586B (en) * | 2012-07-10 | 2015-03-11 | 大连理工大学 | Tunable left-handed metamaterial based on phase-change material |
| US20140061610A1 (en) | 2012-08-31 | 2014-03-06 | Hyo-Young MUN | Organic light emitting device and manufacturing method thereof |
| KR102097153B1 (en) * | 2012-08-31 | 2020-04-06 | 삼성디스플레이 주식회사 | Organic light emitting device and manufacturing method thereof |
| KR102308784B1 (en) * | 2020-02-28 | 2021-10-01 | 한양대학교 산학협력단 | Tellurium oxide and thin film transistor including the same as channel layer |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4748859B2 (en) * | 2000-01-17 | 2011-08-17 | 株式会社半導体エネルギー研究所 | Method for manufacturing light emitting device |
| JP3974749B2 (en) * | 2000-12-15 | 2007-09-12 | シャープ株式会社 | Functional element transfer method |
| TW574753B (en) * | 2001-04-13 | 2004-02-01 | Sony Corp | Manufacturing method of thin film apparatus and semiconductor device |
| JP2002353235A (en) * | 2001-05-23 | 2002-12-06 | Matsushita Electric Ind Co Ltd | Active matrix substrate, display using the same, and its manufacturing method |
| JP4748943B2 (en) * | 2003-02-28 | 2011-08-17 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
| JP3836096B2 (en) * | 2003-08-25 | 2006-10-18 | オムロン株式会社 | IC tag and manufacturing method of IC tag |
| JP4836465B2 (en) * | 2004-02-06 | 2011-12-14 | 株式会社半導体エネルギー研究所 | Method for manufacturing thin film integrated circuit and element substrate for thin film integrated circuit |
-
2006
- 2006-09-27 JP JP2006262010A patent/JP5063066B2/en not_active Expired - Fee Related
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