JP2007123665A - Electrical circuit for semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a pad which is valid even in the case of a narrow interval for reducing any damage to an organic semiconductor, and for achieving its satisfactory connection to an external control circuit. <P>SOLUTION: This electric circuit for a semiconductor device is provided with a first metallic wiring group, and a second metallic wiring group arranged through an insulating film having an opening with the first metallic wiring group; electrically connected at the opening position to each first metallic wiring; and electrically connected to an external electric circuit. The connection region to be electrically connected to the external electric circuit of the second metallic wiring is made narrower in width than its connection region with the first metallic wiring. <P>COPYRIGHT: (C)2007,JPO&amp;INPIT

Description

  The present invention relates to an electric circuit in a semiconductor device (electric circuit element) driven by an external electric circuit, such as an active matrix thin film transistor, and more particularly to a configuration of a connection portion with the external circuit.

  Electronic paper is expected to be put to practical use as a display medium that replaces paper. In an electronic book, an amorphous silicon semiconductor formed on a glass substrate as an active matrix thin film transistor for driving a liquid crystal or an electrophoretic element is used as a semiconductor material. However, in an electronic paper, it is necessary to use a film substrate as a substrate. Therefore, the high temperature process cannot be used. From this point of view, an organic thin film transistor using an organic semiconductor capable of forming a thin film transistor on a film substrate by a low temperature process has attracted attention.

  The organic thin film transistor includes a gate electrode and a gate insulating film provided for controlling the transistor current, an organic semiconductor layer for controlling the channel of the transistor, a drain electrode for supplying a current flowing in the channel portion, and a current flowing in the channel portion. Source electrode, a pixel electrode for applying a voltage or current to the display element, and an interlayer insulating film for electrically insulating the pixel electrode and the drain electrode material. An example of the configuration is shown in FIG.

  FIG. 6 is a cross-sectional view showing a general configuration of an organic thin film transistor used as the active matrix transistor described above. The configuration of the organic thin film transistor will be described with reference to FIG.

  In the organic thin film transistor, a gate electrode 2 is provided on an insulating substrate 1 for the purpose of controlling a transistor current, and a gate insulating film 3 is provided so as to cover the gate electrode 2. On the gate insulating film 3, a drain electrode 4 for supplying a current flowing in the channel portion and a source electrode 5 for extracting a current flowing in the channel portion are provided. An organic semiconductor layer 6 for controlling the channel of the transistor is provided between and on the drain electrode 4 and the source electrode 5.

  A connection electrode (not shown) for applying a voltage or current to the display element is connected to the drain electrode 4. A pixel electrode 8 for applying a voltage or current to the pixel electrode of the display element is connected to the source electrode 5.

  An interlayer insulating film 7 is provided to electrically insulate the pixel electrode 8 connected to the pixel electrode from the connection electrode, the drain electrode 4, the source electrode 5, and the organic semiconductor layer 6.

  In an active matrix transistor, the current applied between the source electrode and the drain electrode is controlled by the voltage applied to the gate electrode, but one gate electrode controls a plurality of thin film transistors arranged in a row, and The gate electrode is called a select line because it has a role of controlling an image signal applied to the drain electrodes of a plurality of thin film transistors arranged side by side.

  Similarly, one drain electrode supplies current to a plurality of thin film transistors arranged in a row, and has the role of controlling the image signals of the plurality of thin film transistors arranged in a row, so the drain electrode is called a signal line. ing.

  The select line and the signal line are provided with a pad portion for inputting a control signal from an external circuit. As such a pad portion, as shown in Patent Documents 1 and 2 in the prior art, a shape in which an opening of an insulating film formed by an etching technique exists on the electrode of the pad portion is widely used. Yes.

  For example, in Patent Document 1, in order to improve the adhesion between a bonding pad and an external connection terminal, an etching stopper layer is formed in a pad formation region on a semiconductor substrate, and a first interlayer insulation having an opening in the pad formation region. A film is formed, a lower layer pad having a recess due to the opening is formed, and a second interlayer insulating film having an opening in the pad formation region is formed.

  In the case of Patent Document 2, the second opening (36a) is formed in the resist film (36) by using a photolithography technique and an etching technique. Subsequently, the base film (35) exposed at the bottom of the second opening (36a) is etched, and a part of the base film (35) on which the resist film (36) is formed is dug from the side. Etching is performed to form a third opening (36b) having a diameter larger than that of the second opening (36a).

  Next, a pad portion of a select line is shown in the drawing as a configuration example of this type of conventional pad portion. FIG. 7 is a cross-sectional view showing a conventional configuration of the pad portion of the select line, and FIG. 8 is a cross-sectional view showing a conventional forming process of the pad portion of the select line.

  With reference to FIG. 7 to FIG. 8, the pad portion of the select line (the signal line is substantially the same) will be described. As shown in FIG. 7, the pad portion of the select line is formed by providing an opening 10 in the interlayer insulating film 7 on the gate electrode material 2 a connected to the gate electrode 2.

  As shown in FIG. 8, the opening (pad part) 10 of the select line of the prior art is formed on the substrate 1 after the electrode material 2a including the gate electrode 2 is formed (see FIG. 8A), and then the gate insulating film 3 Then, the interlayer insulating film 7 is sequentially formed on the entire surface of the substrate 1 (see FIGS. 8A and 8B). After that, a part of the gate insulating film 3 and the interlayer insulating film 1 is opened by etching through a photolithography process to form an opening (pad part) 10 (see FIG. 8D). As can be seen from the drawing, the organic semiconductor layer is formed before the step of forming the interlayer insulating film.

  However, a thin film transistor using an organic semiconductor material has a drawback in that, when a photolithography process, an etching process, and the like are performed after the organic semiconductor material is formed, the influence of heat and the influence of etching damage are large, leading to deterioration of transistor characteristics.

  In addition, when a heat seal connector is directly connected to the pad portion 10 of the opening, and the circuit for supplying an image signal is connected by the heat seal connector, the surface of the gate electrode material 2a of the pad portion is more than the surface of the interlayer insulating film material However, since it is located below, there is a disadvantage that a good connection cannot be made.

JP 2002-246411 A JP-A-2005-64171

  As a measure for solving the problems of the prior art described above, the applicant of the present invention has already proposed that the pad portion of the organic thin film transistor using the organic semiconductor has little damage to the organic semiconductor and can be satisfactorily connected to the external control circuit. The structure and the manufacturing method have been proposed (Japanese Patent Application No. 2005-269667, hereinafter referred to as the previous proposal).

  As will be described in detail later, in this proposed technique, as described in the specification, a part of the insulating film in the pad portion is formed simultaneously with the formation of the insulating film by using a screen printing method or the like. Open. FIG. 1 (plan view) and FIG. 2 (cross-sectional view) show the configuration (in the case of a select line) of the seed pad portion in the organic thin film transistor. In the figure, 2a is a gate electrode material, 80a is a connection electrode (pad part), and 7 is an insulating film. As shown in the figure, the pad portion of the proposed technique forms an insulating film (gate insulating film and interlayer insulating film) on the entire surface of the substrate after forming a select line or a signal line as the first metal wiring, and then A part of the insulating film of the pad portion is opened by etching through a photolithography process, and then a second metal wiring (island-like metal portion) is formed as a pad region for connection with an external electric circuit. Although not shown, as can be seen from FIGS. 6 and 8, the organic semiconductor layer is formed before the step of forming the interlayer insulating film.

  According to this method, it is possible to open a part of the insulating film in the pad portion without going through a photolithography process, an etching process, or the like. However, the configuration of the planar arrangement shown in FIG. 1 has the following problems when the number of select lines or signal lines connected to an external circuit is large and the interval between the select lines or signal lines is narrow.

  When the select line or the signal line (first metal wiring in FIG. 1) is connected to an external circuit, an anisotropic conductive sheet such as a heat sheet connector is often used as a connection member in many cases. In this case, it is desirable that the line width and interval of the wiring to be mounted (second metal wiring) is close to 1: 1 due to the characteristics of the anisotropic conductive sheet. However, when an opening (pad portion, connection region, through-hole region) for connecting the first metal wiring and the second metal wiring is provided in the pad portion, the line width and interval of the second metal wiring are 1: 1. In other words, the opening width of the connection region in the direction in which the second metal wirings are adjacent to each other cannot be increased to more than ½ of the wiring arrangement pitch. Therefore, when the interval between the select lines or the signal lines is narrow, the opening width becomes small, and a problem arises in that a through hole cannot be opened by a printing method such as screen printing, and a reliable connection cannot be made.

  As another problem, when the interlayer insulating film is formed by using the above-described screen printing method or the like, the insulating film in the pad portion is often made to have a thickness of 5 μm or more, which can be seen from the cross-sectional view of the pad portion in FIG. As described above, irregularities are generated in the second metal wiring of the pad portion, which causes a problem that highly reliable mounting cannot be performed.

  The present invention has been made in view of the problems that are prominently seen in the above-mentioned proposals. The purpose of the present invention is to employ the first metal wiring and the second metal in the connection region, which is suitable for use in an organic thin film transistor using an organic semiconductor. By providing an opening for connecting the metal wiring, there is little damage to the organic semiconductor, etc., and it has a configuration that allows a good connection with the external control circuit. The opening width for connecting the first metal wiring and the second metal wiring even when the line width (interval of the second metal wiring) and the interval in the connection area (pad portion) with the electric circuit are close to 1: 1. It is another object of the present invention to provide a structure and a manufacturing method of an electric circuit for a semiconductor device capable of realizing a highly reliable mounting without causing irregularities in the pad portion (wiring region) of the second metal wiring. Note that the present invention can be widely applied to a semiconductor device that does not include an organic semiconductor.

  In the electrical circuit for a semiconductor device of the present invention, the first metal wiring group and the first metal wiring group are arranged via an insulating film having an opening, and each of the first metal wirings is individually provided. The second metal wiring group is electrically connected at the opening position and further electrically connected to an external electric circuit, and is electrically connected to the external electric circuit of the second metal wiring. The connection region to be connected is formed narrower than the connection region with the first metal wiring.

  The connection area where the first metal wiring and the second metal wiring are electrically connected exists in a different area from the area (pad part) where the second metal wiring and the external electric circuit are electrically connected. Thus, the size of the through hole is not limited by the line width of the second metal wiring in the pad portion and the interval between adjacent wirings. Accordingly, it is possible to widen the opening in the connection region between the first metal wiring and the second metal wiring. As a result, the first metal wiring and the second metal wiring can be connected with high reliability. become. In addition, since there is no through hole in a region (pad portion) where the second metal wiring and an external electric circuit are electrically connected, the second metal wiring is not uneven. This enables a highly reliable connection between the second metal wiring and the external electric circuit.

  In particular, among the connection regions with the plurality of first metal wirings, the connection regions adjacent to each other so that the second metal wiring groups do not exist on the same strip portion extending in the adjacent direction. It may be arranged. Among the plurality of regions in which the first metal wiring and the second metal wiring are electrically connected, the adjacent regions do not exist on the same line in the direction in which the plurality of second metal wirings are adjacent to each other. The opening in the connection region between the metal wiring and the second metal wiring can be made wider than in the first configuration. As a result, even when the interval between the second metal wiring is finer, the first metal wiring And the second metal wiring can be connected with high reliability.

  A configuration in which at least one of the insulating films provided between the first metal wiring and the second metal wiring is formed by a printing method may be employed. An inexpensive organic thin film transistor can be realized by forming at least one of the insulating films having through-holes by a printing method. Screen printing can be used as the printing method. Since the printing method of the insulating film is screen printing, the region where the first metal wiring and the second metal wiring are electrically connected can be opened without etching the insulating film. And a highly reliable organic thin film transistor or the like can be formed.

  When connecting the first metal wiring and the second metal wiring by the through-hole, it is possible to widen an opening in the connection region, and a highly reliable connection between both the wirings becomes possible. In addition, the connection between the second metal wiring and the external electric circuit can be performed with high reliability. In a configuration in which adjacent connection regions do not exist on the same band-like portion, a highly reliable connection can be ensured even when the interval between the second metal wirings is finer.

  Hereinafter, the present invention will be described with reference to the drawings with embodiments. The pad structure of the present invention is preferably implemented in, for example, an organic thin film transistor used as an active matrix transistor as shown in FIG. The description of the organic thin film transistor itself will not be repeated, but, as in the case of the previously proposed case, a screen printing method or the like is used at the time of forming the organic thin film transistor, and the connection region (pad portion) is formed simultaneously with the formation of the insulating film. A part of the insulating film is opened, and the second electric wiring connected to the opening is formed as a pad portion.

  According to such a method, it is possible to open a part of the insulating film in the pad portion without going through a photolithography process, an etching process, or the like. Here, the pad structure of the present invention is necessary particularly when the number of select lines or signal lines connected to an external circuit is large and the interval between the select lines or signal lines is narrow.

  As described above, when connecting a select line or a signal line (first metal wiring in FIG. 1) to an external circuit, an anisotropic conductive sheet such as a heat sheet connector is often used as a connection member in many cases. . In this case, it is desirable that the line width and interval of the wiring to be mounted (second metal wiring) is close to 1: 1 due to the characteristics of the anisotropic conductive sheet. However, in the case where an opening for connecting the first metal wiring and the second metal wiring is provided in the pad portion, if there is a restriction that the line width and interval of the second metal wiring are 1: 1, the second metal wiring The opening width of the connection region in the direction in which they are adjacent to each other cannot be increased to more than half the wiring arrangement pitch. Therefore, when the interval between the select lines or the signal lines is narrow, the opening width becomes small, and a problem arises in that a through hole cannot be opened by a printing method such as screen printing, and a reliable connection cannot be made.

  As another problem, when the interlayer insulating film is formed by using the above-described screen printing method or the like, the insulating film in the pad portion is often made to have a thickness of 5 μm or more, which can be seen from the cross-sectional view of the pad portion in FIG. As described above, it has been explained that the second metal wiring in the pad portion has irregularities, which causes a problem that highly reliable mounting cannot be performed.

  Therefore, in the present invention, the first metal wiring group and the second metal wiring group electrically connected to each of the first metal wiring groups and extending in parallel to the same plane are electrically connected individually. A connection region for electrically connecting the second metal wiring and an external electric circuit (hereinafter also referred to as a wiring region) in the extending direction of the second metal wiring group The connection area of the second metal wiring that is electrically connected to the external electric circuit is formed to be narrower than the connection area of the first metal wiring so that the electric circuit is formed. Form.

[First Embodiment]
Hereinafter, the present invention will be described in detail with reference to the accompanying drawings. The first configuration of the present invention is shown in FIG. FIG. 3A is a plan view showing the configuration of the connection region and the pad portion of the select line according to the embodiment of the present invention in the organic thin film transistor, FIG. 3B is a cross-sectional view in the connection region, and FIG. FIG. 4 is a cross-sectional view at a pad portion. FIG. 4 is a cross-sectional view showing the process of forming the select line connection region according to the embodiment of the present invention. In this embodiment, the connection area where the first metal wiring and the second metal wiring are electrically connected is a narrow connection area where the second metal wiring and the external electric circuit are electrically connected (for wiring). Exists in a different area.

  As shown in the figure, in this embodiment, a gate electrode 2 and a gate electrode material 2a as a first metal wiring connected to the gate electrode are formed on an insulating substrate 1 made of a polycarbonate substrate or the like for the purpose of controlling transistor current. A connection region (pad portion) is provided (see FIG. 4A), and a gate insulating film is provided so as to cover the gate electrode 2. In this embodiment, when forming the gate insulating film, these regions are excluded so that there is no gate insulating film on the gate electrode material 2a corresponding to the connection region (pad portion) region and in the vicinity of the gate electrode material 2a. Thus, a gate insulating film is formed. Using these materials, a gate insulating film is formed by printing, for example, on the portion of the gate electrode material 2 corresponding to the connection region (pad portion region) and in the vicinity of the gate electrode material 2. In this formation, an opening is formed on the gate electrode material 2a in the connection region (pad portion) so that no gate insulating film exists.

  Examples of the gate insulating film material used in the present invention include polyvinylphenol, polyvinyl alcohol, polyvinyl butyral, and a polyimide film. In addition, as an interlayer insulating film material used in the present invention, an insulating paste composed of an insulating resin such as cresol novolac epoxy resin, epoxy resin, polyimide resin, phenol resin, acrylic resin, polyvinyl resin, and the above resin and an insulating filler Etc.

  A drain electrode for applying a current flowing through the channel portion and a source electrode for extracting a current flowing through the channel portion are provided on the gate insulating film. An organic semiconductor layer for controlling the channel of the transistor is provided between and on the drain electrode 4 and the source electrode 5. In this embodiment, the organic semiconductor material includes an acene-based crystalline material such as tetracene, pentacene, and rubrene, an alignment material such as polyalkylthiophene, a liquid crystalline material composed of a fluorene / thiophene copolymer and its derivatives, and tria. Examples thereof include a polymer material having a reelamine skeleton.

  And the interlayer insulation film 7 is provided so that the drain electrode 4, the source electrode 5, and an organic-semiconductor layer may be covered (refer FIG.4 (b)). In this embodiment, when the interlayer insulating film is formed, the interlayer insulating film 7 extends slightly from the end portion of the gate electrode material 2a corresponding to the pad portion region, and the interlayer insulating film 7 is formed in other regions. Excluding these regions, the interlayer insulating film 7 is formed so that there is no existence.

  In this way, an opening 10a without an insulating film is formed in the pad portion of the select line (gate electrode 2). When formed in this way, as shown in FIGS. 3 and 4B, the gate electrode material 2a corresponding to the connection region has a state in which the interlayer insulating film 7 is slightly extended from the end (a portion in the figure). ) Formed as a connection region. In the interlayer insulating film 7 formed on the gate electrode 2, an opening 10a is formed at a location that becomes a pad portion without going through an etching process.

  The insulating material of the interlayer insulating film 7 used in the present invention is composed of an insulating resin such as a cresol novolac epoxy resin, an epoxy resin, a polyimide resin, a phenol resin, an acrylic resin, a polyvinyl resin, and the above resin and an insulating filler. Insulating paste and the like.

  One end of the first connection electrode 80a is a second metal wiring for making electrical contact with an external electric circuit for inputting a signal of image information to the gate electrode material 2a of the opening 10a of the select line (gate electrode 2). And the other end extending outward is formed as a long metal wiring that becomes a pad region (external wiring region) electrically connected to the external electric circuit (see FIG. 3A). ). The first connection electrode 80a is formed by the same process as the process of forming the pixel electrode of the display element formed adjacently. By forming the first connection electrode 80a in the same process as the pixel electrode, process steps can be reduced.

  Incidentally, in the previous proposal described above, as shown in FIG. 1, it is assumed that the first connection electrode 80a having approximately the same area as the opening 10a is used as it is as a pad portion that is in electrical contact with an external electric circuit. Was. However, in the present invention, the opening 10a portion is used as a connection region with one end of the connection electrode 80a, and the narrow end portion of the first connection electrode 80a extending outward from the connection region is electrically connected to the external electric circuit. The pad portion (external wiring region) is in contact with the target.

  The first connection electrode 80a is formed so as to reach the upper portion of the interlayer insulating film 7 in the connection region 10a and further extend outward with a narrow width. For this reason, when connecting to an external electric circuit using a heat seal connector or the like, it becomes possible to connect the wiring region (pad portion) and the external electric circuit above the interlayer insulating film 7 and has high reliability. Electrical connection is possible. In addition, since the interlayer insulating film 7 is present in a portion slightly extending from the end of the pad portion on the gate electrode material 2a, the gate electrode material 2a is provided in a state where the adhesive strength with the substrate 1 is weak. Even in this case, the gate electrode material 2a can be prevented from peeling from the substrate 1. Of course, when the gate electrode material 2a is provided by manufacturing in a state where the adhesive strength between the gate electrode material 2a and the substrate 1 is strong, for example, by sputtering or the like, the interlayer insulating film 7 is formed on the end of the pad portion on the gate electrode material 2a. Even if it does not extend from the part, there is no possibility of peeling.

  The gate electrode 2, the source electrode 5, the drain electrode 4, each connection electrode (first metal wiring material, second metal wiring material), and the electrode material of the pixel electrode used in the above-described embodiment of the present invention are as follows. Au film, Al film, Cr film, silver film formed by screen printing method, silver, gold, Ag-Pd alloy formed by inkjet method or dispenser, created by vacuum deposition method or sputtering method, Examples include nanometal films such as Ni and Co. In particular, examples of the source electrode material and the drain electrode material include EDOT / PSS (polyethylenedioxythiophene doped with polystyrene sulfonic acid), PANI (polyaniline), and carbon paste, which are conductive polymers.

  According to said structure, the magnitude | size of the opening part 10a of the connection area | region which connects the gate electrode material 2a (1st metal wiring) and the 1st connection electrode 80a (2nd metal wiring) is 2nd metal. There are no restrictions associated with connecting the wiring 80a and an external electric circuit. More specifically, the opening width of the connection region in the direction in which the second metal wirings are adjacent to each other can be set to 1/2 or more of the arrangement pitch of the second metal wirings 80a. As a result, since the size of the opening of the connection region connecting the first metal wiring 2a and the second metal wiring 80a can be increased, it is possible to open the through hole even by using a printing technique. The first metal wiring 2a and the second metal wiring 80a can be connected with high reliability.

  In addition, since there is no connection area for connecting the first metal wiring 2 and the second metal wiring in the wiring area (pad portion) to which the external electric circuit is electrically connected, the second metal wiring is not penetrated. Since there is no unevenness due to the opening of the hole, the second metal wiring and the external electric circuit can be connected with high reliability.

  In addition, in the above-described configuration and manufacturing method, after the organic semiconductor layer is formed, the pad portion can be formed without performing the etching step. Therefore, the influence of heat on the organic semiconductor layer due to the etching step and the like, etching There is no damage and transistor characteristics can be prevented from deteriorating. In addition, since the connection electrode material is formed above the interlayer insulating film material in the pad region, when connecting to an external electric circuit using a heat seal connector or the like, the pad portion and the external Connection to a circuit is possible, and highly reliable electrical connection is possible.

  An inexpensive organic thin film transistor can be realized by forming at least one kind of insulating film having through holes by a printing method. In particular, since the printing method of the insulating film is screen printing, a region where the first metal wiring and the second metal wiring are electrically connected can be opened without etching the insulating film. A highly reliable organic thin film transistor can be formed with little damage.

  The technique in the above-described embodiment can be applied in the same manner to an electric circuit including a pad portion of a signal line (drain electrode). That is, the gate electrode 2 and the gate electrode material 2a described above correspond to the drain electrode material connected to the drain electrode and the drain electrode as the first metal wiring, respectively. What is necessary is just to connect and form wiring. In addition, detailed description and illustration are omitted because they overlap. The parts other than the electric circuit, such as elements, may be the same as those in the above embodiment or the previously proposed case.

[Second Embodiment]
The configuration of the second embodiment of the present invention is shown in FIG. The same reference numerals as those in FIG. 3 denote the same parts. In the configuration of the first embodiment shown in FIG. 3, the plurality of regions where the first metal wiring and the second metal wiring are electrically connected are on the same line in the direction in which the second metal wirings are adjacent to each other. Therefore, the opening width of the connection region cannot be greater than the arrangement pitch of the second metal wiring. The second embodiment solves this point, and among the plurality of connection regions in which the first metal wiring and the second metal wiring are electrically connected, a plurality of second connection regions are adjacent to each other. This is different from the previous embodiment in that the metal wiring groups are arranged so as not to exist on the same line in the adjacent direction (on a single strip-shaped part line having a predetermined width extending in the adjacent direction).

  As shown in FIG. 5, the plurality of connection regions connected through the through holes are not on the same line in the direction in which the second metal wirings are adjacent to each other, but are arranged in a so-called staggered pattern in the adjacent direction. ing. That is, in addition to the features shown in FIG. 3, among the plurality of connection regions in which the first metal wiring and the second metal wiring are electrically connected, the second metal wiring They are arranged so that they do not exist on the same virtual strip extending in the direction in which the groups are adjacent to each other. A portion extending in parallel to the outer side of the extending direction of the second metal wiring is formed to have a width narrower than the connection region to be a wiring region for electrically connecting an external electric circuit. According to this configuration, the adjacent metal wiring does not have a connection region at a position corresponding to the position of the connection region, and can be disposed close to the metal wiring, and the opening in the connection region is made wider than the first configuration. Is possible. As a result, even when the interval between the second metal wirings is small, the opening width of the connection region can be equal to or greater than the arrangement pitch of the second metal wirings. Of course, as in the previous embodiment, the first metal wiring and the second metal wiring can be connected with high reliability.

Example 1
A first metal wiring was formed on the polycarbonate substrate. The first metal wiring was formed using a mask vapor deposition method by sputtering a Cr film having a thickness of 100 nm. The first metal wiring had a length of 100 mm and a width of 160 μm, and 100 identical shapes were formed at a pitch of 200 μm in a direction perpendicular to the longitudinal direction of the wiring shape. That is, the wiring interval in the direction in which the first metal wirings are adjacent to each other is 40 μm.

  Next, a paste of an insulating material containing an acrylic resin and a filler was formed as an insulating film by a screen printing method, and baked at 120 ° C. for 30 minutes to obtain an insulating film. On the first metal wiring, through holes were formed in a part of the insulating film in a shape of 140 μm in length and width. The formation region of 100 through holes was formed so that the center positions of the through holes were in the same straight line.

  Next, a silver paste was formed as a second metal wiring using a screen printing method, and baked at 120 ° C. for 30 minutes. The shape of the second metal wiring is 180 μm in length and width above the through hole, and 100 pieces of the second metal wiring are arranged at a position where the center of the through hole and the center of the shape of 180 μm in length and breadth coincide with each other. It was formed in the same shape. The width of the second metal wiring other than the upper part of the through hole was 100 μm, the interval in the direction in which the second metal wirings were adjacent to each other was 100 μm, and the length other than the upper part of the through hole was set to 50 mm.

[Measurement results of electrical characteristics of Example 1]
When the electrical connection between the first metal wiring and the second metal wiring was inspected, all 100 pieces showed good electrical connection, and the contact between the first metal wiring and the second metal wiring. The resistance of the part showed a good value of 0.2Ω. Next, using the heat seal connector, the second metal wiring is connected to the external electric circuit in an area other than the presence of the through hole portion, and the second metal wiring is connected to the external electric circuit. As a result of the inspection, good electrical connection could be confirmed in all 100 pieces.

(Example 2)
A first metal wiring was formed on the polycarbonate substrate. The first metal wiring was formed using a mask vapor deposition method by sputtering a Cr film having a thickness of 100 nm. The first metal wiring has a shape of 100 mm in length and 160 μm in width except for the connection portion with the second metal wiring, and 100 identical shapes are formed at a pitch of 200 μm in the direction perpendicular to the longitudinal direction of the wiring shape. did. That is, the wiring interval in the direction in which the first metal wirings are adjacent to each other in this region is 40 μm.

  In the connection region with the second metal wiring, the shape is 220 μm in length and width. In order to prevent the first metal wirings from being short-circuited with each other, the connection regions are set such that the centers of the connection regions are separated from each other by 300 μm in the longitudinal direction of the first metal wirings.

  Next, a paste of an insulating material containing an acrylic resin and a filler was formed as an insulating film by a screen printing method, and baked at 120 ° C. for 30 minutes to obtain an insulating film. On the first metal wiring, a through hole having a shape of 200 μm in length and width was provided in a part of the insulating film in a portion of the connection region with the second metal wiring.

  Next, a silver paste was formed as a second metal wiring using a screen printing method, and baked at 120 ° C. for 30 minutes. The shape of the second metal wiring was 240 μm vertically and horizontally above the through hole. The width of the second metal wiring other than the upper part of the through hole was 100 μm, the interval in the direction in which the second metal wirings were adjacent to each other was 100 μm, and the length other than the upper part of the through hole was set to 50 mm.

[Measurement results of electrical characteristics of Example 2]
When the electrical connection between the first metal wiring and the second metal wiring was inspected, all 100 showed good electrical connection. Further, the resistance of the contact portion between the first metal wiring and the second metal wiring was 0.1Ω, which was lower than that in Example 1. Next, using a heat seal connector, the second metal wiring and the external electric circuit are connected in an area other than the presence of the through hole portion, and the second metal wiring and the external electric circuit are electrically connected. When the connection was inspected, good electrical connection could be confirmed in all 100 pieces.

(Comparative example)
A first metal wiring was formed on the polycarbonate substrate. The first metal wiring was formed using a mask vapor deposition method by sputtering a Cr film having a thickness of 100 nm. The first metal wiring had a length of 100 mm and a width of 160 μm, and 100 identical shapes were formed at a pitch of 200 μm in a direction orthogonal to the longitudinal direction of the wiring shape. That is, the wiring interval in the direction in which the first metal wirings are adjacent to each other is 40 μm.

  Next, a paste of an insulating material containing an acrylic resin and a filler was formed as an insulating film by a screen printing method, and baked at 120 ° C. for 30 minutes to obtain an insulating film. On the first metal wiring, a through hole having a shape of 20 mm in length and 80 μm in width was formed in a part of the insulating film in a connection region with an external electric circuit. The formation region of 100 through holes was formed so that the center positions of the through holes were in the same straight line.

  Next, a silver paste was formed as a second metal wiring using a screen printing method, and baked at 120 ° C. for 30 minutes. The shape of the second metal wiring is 50 mm in length and 100 μm in width, and 100 identical second metal wirings are arranged at positions where the longitudinal center line of the through hole and the longitudinal center line of the second metal wiring coincide. Formed in shape. The width of the second metal wiring was 100 μm, and the interval in the direction in which the second metal wirings were adjacent to each other was 100 μm.

[Measurement results of electrical characteristics of comparative example]
When electrical connection between the first metal wiring and the second metal wiring was inspected, disconnection was detected in 30 out of 100. This result seems to be because the through-hole width is as narrow as 80 μm, so that the screen printing does not open sufficiently and a contact failure between the first metal wiring and the second metal wiring occurs.

  Next, using a heat seal connector, the second metal wiring was connected to an external electric circuit, and the electrical connection between the second metal wiring and the external electric circuit was inspected. Disconnection was detected. This result seems to be because a connection failure occurred in the connection using the heat seal connector because the second metal wiring at the connection portion with the external circuit has irregularities.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is shown not by the above description of the embodiments but by the scope of claims for patent, and is intended to include meanings equivalent to the scope of claims for patent and all modifications within the scope.

It is a top view which shows the structure of the connection area | region (pad part) of the select line by the related technology of this invention. FIG. 2 is a cross-sectional view illustrating a configuration of a connection region (pad portion) of a select line in FIG. 1. (a)-(c) is a figure which shows the structure of the connection area | region (pad part) of the select line concerning embodiment of this invention. It is sectional drawing which shows the formation process of the connection area | region (pad part) of the select line concerning embodiment of this invention. (a)-(c) is a figure which shows the structure of the connection area | region (pad part) of the select line concerning other embodiment of this invention. It is sectional drawing which shows a general organic thin-film transistor structure. It is sectional drawing which shows the conventional structure of the pad part of a select line. It is sectional drawing which shows the conventional formation process of the pad part of a select line.

Explanation of symbols

1 ... Substrate 2 ... Gate electrode (select line)
2a ... Gate electrode material (select line; first metal wiring)
3 ... Gate insulating film 4 ... Drain electrode (signal line)
4a ... Drain electrode material (signal line; first metal wiring)
5 ... Source electrode 6 ... Organic semiconductor layer 7 ... Interlayer insulating film 10, 10a ... Opening (connection region, through-hole region)
80a ... 1st connection electrode (2nd metal wiring)

Claims (4)

The first metal wiring group and the first metal wiring group are arranged through an insulating film having an opening, and are electrically connected to each of the first metal wirings individually at the position of the opening. In addition, in the electrical circuit for a semiconductor device having a second metal wiring group electrically connected to an external electrical circuit,
An electrical circuit for a semiconductor device, wherein a connection region electrically connected to the external electric circuit of the second metal wiring is formed to be narrower than a connection region to the first metal wiring.   Among the connection areas with the plurality of first metal wirings, the connection areas adjacent to each other are arranged so that the second metal wiring groups do not exist on the same band-like portion extending in the adjacent direction. The electric circuit according to claim 1, wherein:   3. The electric circuit according to claim 1, wherein at least one of the insulating films provided between the first metal wiring and the second metal wiring is formed by a printing method. The electric circuit according to claim 3, wherein the printing method is screen printing.

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