JP2007114124A - Method and device for inspecting array substrate - Google Patents

Method and device for inspecting array substrate Download PDF

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JP2007114124A
JP2007114124A JP2005307720A JP2005307720A JP2007114124A JP 2007114124 A JP2007114124 A JP 2007114124A JP 2005307720 A JP2005307720 A JP 2005307720A JP 2005307720 A JP2005307720 A JP 2005307720A JP 2007114124 A JP2007114124 A JP 2007114124A
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array substrate
driving circuit
input terminal
circuit
drive
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Akira Tomita
暁 富田
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Japan Display Central Inc
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Toshiba Matsushita Display Technology Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for inexpensively inspecting an array substrate that has incorporated a drive circuit, and to provide its device. <P>SOLUTION: In a drive state of a scanning line drive circuit 24 that has applied a drive current V<SB>DD-Y</SB>, a relay 112 is switched; and in respective cases where a resistor 110 is separated and in another case where the resistor is added, an electron beam is irradiated on an OLB pad 31 by an electron gun 104; and a potential difference ΔV<SB>eb-Y</SB>of the OLB pad 31 is detected from the difference between detection amounts of secondary electrons generated thereby. A current value I<SB>YD1</SB>, flowing when driving the drive circuit 24 is calculated, on the basis of expression I<SB>YD1</SB>=(ΔV<SB>eb-Y</SB>×V<SB>DD-Y</SB>)/[R<SB>st-Y</SB>×(V<SB>DD-Y</SB>-ΔV<SB>eb-Y</SB>)] from detected potential difference ΔV<SB>eb-Y</SB>, and electrical defect of the drive circuit is detected, depending on whether consumption current of the drive circuit 24 is in a prescribed range. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、アクティブマトリックス型の液晶表示装置に用いられるアレイ基板の検査方法及びその装置に関する。   The present invention relates to an array substrate inspection method and apparatus used in an active matrix type liquid crystal display device.

近年、表示画面を構成する画素毎にスイッチング素子としてTFT(薄膜トランジスタ)を配置したアクティブマトリックス型の液晶表示装置は、隣接する画素間でクロストークがなく高精細化に適してることから広く普及しつつあり、特に、TFTとしてp−Si(多結晶シリコン)TFTを用いたものは、アレイ基板上に画素部のほかに駆動回路を集積することができるため、配線の容易化、装置の小型化に有利であるとされている。   In recent years, an active matrix type liquid crystal display device in which a TFT (thin film transistor) is arranged as a switching element for each pixel constituting a display screen has been widely spread because it is suitable for high definition without crosstalk between adjacent pixels. In particular, those using p-Si (polycrystalline silicon) TFTs as TFTs can integrate a driver circuit in addition to the pixel portion on the array substrate, thus facilitating wiring and miniaturizing the device. It is considered advantageous.

ところで、アレイ基板の製造工程終了後には、不良アレイ基板が次工程へ流入するのを防止するため、製造されたアレイ基板に対する検査が行われる。このようなアレイ基板の検査方法として、画素毎に電子線を照射して放出される二次電子を検出することで、画素電極上の電圧を検出し、表示画面中の欠陥画素の有無を検査するものが知られている(特許文献1参照)。この検査方法は、駆動回路を内蔵したp−Siアレイ基板を対象とした場合、駆動回路を介することなく画素電極上の電位を測定することができるため、精度よく欠陥画素の検出が可能である。   By the way, after the manufacturing process of the array substrate is completed, the manufactured array substrate is inspected to prevent the defective array substrate from flowing into the next process. As an inspection method for such an array substrate, the voltage on the pixel electrode is detected by detecting secondary electrons emitted by irradiating each pixel with an electron beam, and the presence or absence of defective pixels in the display screen is inspected. Is known (see Patent Document 1). In this inspection method, when a p-Si array substrate with a built-in drive circuit is targeted, the potential on the pixel electrode can be measured without going through the drive circuit, so that defective pixels can be detected with high accuracy. .

しかしながら、上記した電子線を用いた検査方法では、画素の検査を行うことができるが、駆動回路の検査を行うことができず、アレイ基板上に形成された入出力端子よりテストパターンを入力する電気的ドライバテスタによって駆動回路を検査する必要がある。そのため、駆動回路が内蔵されたアレイ基板を検査する場合、電子線を照射し二次電子を検出するEB(Electron Beam)テスタと電気的テスタとを併用しなければならず、アレイ基板の検査に要するコストが上昇する問題がある。また、EBテスタと電気的テスタを併用すると、両テスタ間の通信タイムラグに起因する処理能力の低下や、測定されたデータの処理が複雑化するといった問題がある。
特開2000−3142号公報
However, in the inspection method using the electron beam described above, the pixel can be inspected, but the drive circuit cannot be inspected, and the test pattern is input from the input / output terminals formed on the array substrate. It is necessary to inspect the drive circuit with an electrical driver tester. Therefore, when inspecting an array substrate with a built-in drive circuit, an EB (Electron Beam) tester that irradiates an electron beam and detects secondary electrons must be used in combination with an electrical tester. There is a problem that the cost required increases. Further, when the EB tester and the electrical tester are used in combination, there are problems such as a decrease in processing capability due to a communication time lag between the two testers and a complicated processing of measured data.
JP 2000-3142 A

本発明は上記問題に鑑みてなされたものであり、画素部及び駆動回路を内蔵したアレイ基板の検査に要するコストを削減することができるアレイ基板の検査方法及びその装置を提供することを目的とする。   The present invention has been made in view of the above problems, and an object thereof is to provide an array substrate inspection method and apparatus capable of reducing the cost required for inspection of an array substrate having a built-in pixel portion and drive circuit. To do.

本発明のアレイ基板の検査方法は、複数の走査線と複数の信号線の各交差部に配置された画素TFT及び各画素TFTに接続された画素電極を含む画素部と、前記画素部を駆動するための駆動回路と、外部電源から信号線駆動回路に電源を供給する入力端子と、を備えたアレイ基板の検査方法において、前記外部電源から前記入力端子を介して前記駆動回路に駆動電源を供給した状態で、前記入力端子に電子線を照射して二次電子を放出させ、該二次電子を検出することで第1電位情報を得る工程と、前記外部電源と前記入力端子との間に抵抗を介在させて前記外部電源から前記抵抗及び入力端子を介して前記駆動回路に駆動電源を供給した状態で、前記入力端子に電子線を照射して二次電子を放出させ、該二次電子を検出することで第2電位情報を得る工程と、を備え、前記第1電位情報と前記第2電位情報とから算出される前記入力端子の電位差に基づいて前記駆動回路の電気不良を検出することを特徴とする。   According to an array substrate inspection method of the present invention, a pixel TFT including a pixel TFT disposed at each intersection of a plurality of scanning lines and a plurality of signal lines and a pixel electrode connected to each pixel TFT, and driving the pixel section And an input terminal for supplying power from an external power supply to the signal line drive circuit. In the array substrate inspection method, the drive power is supplied from the external power supply to the drive circuit via the input terminal. In the supplied state, the input terminal is irradiated with an electron beam to emit secondary electrons, and the secondary potential is detected to obtain first potential information; and between the external power source and the input terminal In the state where driving power is supplied to the driving circuit from the external power source via the resistor and the input terminal with a resistor interposed between them, the input terminal is irradiated with an electron beam to emit secondary electrons, and the secondary power is emitted. By detecting electrons, the second power Comprising a step of obtaining information, and characterized by detecting an electrical failure of the drive circuit based on a potential difference of the input terminals that is calculated from the first potential information and the second electric potential information.

本発明によれば、EBテスタによって画素部及び駆動回路の検査を行うことができるため、電気的テスタが不要になり検査に要するコストを削減することができる。   According to the present invention, since the pixel portion and the drive circuit can be inspected by the EB tester, the electrical tester is not required, and the cost required for the inspection can be reduced.

以下、本発明の一実施形態について図面を参照して説明する。   Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

図1は、本発明の一実施形態において検査対象となるアレイ基板10を示す概略図であり、このアレイ基板10は、ガラス基板などの絶縁基板11上に、走査用の複数の走査線12と、これらの走査線12と交差する映像信号用の複数の信号線14とを有し、これらの走査線12と信号線14とが交差する各交差部近傍にそれぞれスイッチング素子としてのp−Si画素TFT(以下画素TFTという)16が設けられている。これらの各画素TFT16は、ソース端子が信号線12に、ドレイン端子が画素電極18に、ゲート端子が走査線12に、それぞれ接続されている。また、各画素電極18は、補助容量20の一端に接続され、各補助容量20の他端は補助容量線22に接続され、アレイ基板10上に表示領域19が形成されている。   FIG. 1 is a schematic view showing an array substrate 10 to be inspected in an embodiment of the present invention. The array substrate 10 has a plurality of scanning lines 12 for scanning on an insulating substrate 11 such as a glass substrate. A plurality of signal lines 14 for video signals intersecting with these scanning lines 12, and p-Si pixels as switching elements in the vicinity of the intersections where these scanning lines 12 and the signal lines 14 intersect. A TFT (hereinafter referred to as a pixel TFT) 16 is provided. Each pixel TFT 16 has a source terminal connected to the signal line 12, a drain terminal connected to the pixel electrode 18, and a gate terminal connected to the scanning line 12. Each pixel electrode 18 is connected to one end of the auxiliary capacitor 20, the other end of each auxiliary capacitor 20 is connected to the auxiliary capacitor line 22, and a display area 19 is formed on the array substrate 10.

また、アレイ基板10上の端部には、画素TFT16を制御して映像信号を信号線14を介して画素電極18に供給する駆動回路23が形成されている。より詳細には、駆動回路23は、走査線12の一端部に設けられた走査線駆動回路24と、信号線14の一端部に設けられた信号線選択回路26及びアレイ基板10の外部に配設され不図示の映像信号供給回路とを備える信号線駆動回路とを有している。走査線駆動回路24は、走査線14に走査信号を供給することにより画素TFT16を制御する。一方、信号線駆動回路では、映像信号供給回路から供給される映像信号を信号線選択回路26によって選択された信号線16に供給する。   Further, a drive circuit 23 that controls the pixel TFT 16 and supplies a video signal to the pixel electrode 18 through the signal line 14 is formed at the end on the array substrate 10. More specifically, the drive circuit 23 is arranged outside the scan line drive circuit 24 provided at one end of the scan line 12, the signal line selection circuit 26 provided at one end of the signal line 14, and the array substrate 10. And a signal line driving circuit including a video signal supply circuit (not shown). The scanning line driving circuit 24 controls the pixel TFT 16 by supplying a scanning signal to the scanning line 14. On the other hand, in the signal line driving circuit, the video signal supplied from the video signal supply circuit is supplied to the signal line 16 selected by the signal line selection circuit 26.

さらに、アレイ基板10の縁部には、駆動回路23内の走査線駆動回路24及び信号線選択回路26が動作するために必要な電源やロジック信号など入力するためのOLBパッド31〜39を含むOLBパッド群30が設けられている。詳細には、OLBパッド31,32は、走査線駆動回路24の電源端子に接続され、OLBパッド33は、走査線駆動回路24の信号入力端子に接続されている。また、OLBパッド34,35は、信号線選択回路26の電源端子に接続され、OLBパッド36は、信号線選択回路26の信号入力端子に接続されている。OLBパッド37は、アレイ基板10上に設けられてた配線28を介して全ての補助容量線22に接続されている。   Further, OLB pads 31 to 39 for inputting power, logic signals and the like necessary for the operation of the scanning line driving circuit 24 and the signal line selection circuit 26 in the driving circuit 23 are included at the edge of the array substrate 10. An OLB pad group 30 is provided. Specifically, the OLB pads 31 and 32 are connected to the power supply terminal of the scanning line driving circuit 24, and the OLB pad 33 is connected to the signal input terminal of the scanning line driving circuit 24. The OLB pads 34 and 35 are connected to the power supply terminal of the signal line selection circuit 26, and the OLB pad 36 is connected to the signal input terminal of the signal line selection circuit 26. The OLB pad 37 is connected to all the auxiliary capacitance lines 22 through the wiring 28 provided on the array substrate 10.

次に、上記のように構成されたアレイ基板10をEB法によって検査する方法について説明する。   Next, a method for inspecting the array substrate 10 configured as described above by the EB method will be described.

この検査に用いるEBテスタ100は、図2に示すように、検査対象とするアレイ基板10にテスト用の各種信号や電源を供給する電源/信号入出力部102と、電子線をアレイ基板10へ照射する電子銃104と、電子線の照射により放出される二次電子を検出する検出器106と、を備えている。   As shown in FIG. 2, the EB tester 100 used for this inspection includes a power / signal input / output unit 102 that supplies various test signals and power to the array substrate 10 to be inspected, and an electron beam to the array substrate 10. An electron gun 104 for irradiation and a detector 106 for detecting secondary electrons emitted by irradiation with an electron beam are provided.

電源/信号入出力部102は、不図示のプローブを介して、OLBパッド群30と接続されたプロービングパッド群40と接続されており、アレイ基板10上にテスト用の各種信号や電圧を供給する。より詳細には、電源/信号入出力部102は、抵抗110の付加と切離しの切替が可能なリレー112を介してOLBパッド31と接続されたプロービングパッド41に所定の電源電圧YVDDを供給し、OLBパッド32と接続されたプロービングパッド42に所定の電源電圧YVSSを供給し、OLBパッド33と接続されたプロービングパッド43にクロック信号や水平同期信号等の走査線駆動回路24を制御する制御信号YDATAを供給するようになっている。 The power / signal input / output unit 102 is connected to the probing pad group 40 connected to the OLB pad group 30 via a probe (not shown), and supplies various test signals and voltages to the array substrate 10. . More specifically, the power / signal input / output unit 102 supplies a predetermined power supply voltage YV DD to the probing pad 41 connected to the OLB pad 31 via a relay 112 that can be switched between addition and disconnection of the resistor 110. , A predetermined power supply voltage YV SS is supplied to the probing pad 42 connected to the OLB pad 32, and control for controlling the scanning line driving circuit 24 such as a clock signal and a horizontal synchronization signal to the probing pad 43 connected to the OLB pad 33 is performed. The signal Y DATA is supplied.

また、電源/信号入出力部102は、抵抗114の付加と切離しの切替が可能なリレー116を介してOLBパッド34と接続されたプロービングパッド44に所定の電源電圧XVDDを供給し、OLBパッド35と接続されたプロービングパッド45に所定の電源電圧XVSSを供給し、OLBパッド36と接続されたプロービングパッド46にクロック信号や映像信号等の信号線選択回路26を制御する制御信号XDATAを供給するようになっている。 Further, the power / signal input / output unit 102 supplies a predetermined power supply voltage XV DD to the probing pad 44 connected to the OLB pad 34 via the relay 116 capable of switching between addition and disconnection of the resistor 114, and the OLB pad. A predetermined power supply voltage XV SS is supplied to the probing pad 45 connected to the control signal 35, and a control signal X DATA for controlling the signal line selection circuit 26 such as a clock signal and a video signal is supplied to the probing pad 46 connected to the OLB pad 36. It comes to supply.

また、電源/信号入出力部102は、抵抗118の付加と切離しの切替えが可能なリレー120を介してOLBパッド37と接続されたプロービングパッド47に所定の補助容量電圧VCSを供給するようになっている。 The power supply / signal input-output unit 102, so as to supply a predetermined auxiliary capacitance voltage V CS to the probing pad 47 connected with the OLB pads 37 via the relay 120 capable of switching between addition and disconnection of the resistor 118 It has become.

さらに、電源/信号入出力部102は、電子銃104及び検出器106と接続されており、これらに制御信号や電源を供給する。これにより、電子銃104のアレイ基板10に対する電子線の照射を制御して、電子銃104が、アレイ基板10全体を走査したりアレイ基板10上の特定個所へ電子線を照射する。また、電源/信号入出力部102は、検出器106から電位情報が入力されることで、この電位情報に基づき、アレイ基板10内の電気不良部位の検出を行う。   Furthermore, the power / signal input / output unit 102 is connected to the electron gun 104 and the detector 106, and supplies control signals and power to them. Thus, the electron gun 104 is controlled to irradiate the array substrate 10 with the electron beam, and the electron gun 104 scans the entire array substrate 10 or irradiates a specific portion on the array substrate 10 with the electron beam. The power source / signal input / output unit 102 receives electrical potential information from the detector 106 and detects an electrical failure site in the array substrate 10 based on the electrical potential information.

走査線駆動回路24の検査をする際には、まず、リレー112を抵抗110と切離し、電源/信号入出力部102から、OLBパッド31,32を介して走査線駆動回路24に電源を供給するとともに、OLBパッド33を介して制御信号YDATAを入力することで、走査線駆動回路24を通常の駆動状態にする。そして、この状態で、電子銃104からOLBパッド31に電子線を照射することにより、OLBパッド31の電位に対応した二次電子が発生し、検出器106による二次電子の検出量を第1電位情報として検出する(図4参照)。また、このときに走査線駆動回路24に流れる電流IYD1は下記式(1)で与えられる。ここで、VDDは、信号/電源発生部102から走査線駆動回路24に供給される電源の電圧値であって、OLBパッド31及びOLBパッド32に印加される電位差(YVDD−YVSS)に相当するものであり、RYDは走査線駆動回路24の内部抵抗値である。 When inspecting the scanning line driving circuit 24, first, the relay 112 is disconnected from the resistor 110, and power is supplied from the power source / signal input / output unit 102 to the scanning line driving circuit 24 via the OLB pads 31 and 32. At the same time, the control signal Y DATA is input via the OLB pad 33, so that the scanning line driving circuit 24 is brought into a normal driving state. In this state, when the electron gun 104 irradiates the OLB pad 31 with an electron beam, secondary electrons corresponding to the potential of the OLB pad 31 are generated, and the amount of secondary electrons detected by the detector 106 is reduced to the first level. It is detected as potential information (see FIG. 4). At this time, the current I YD1 flowing in the scanning line driving circuit 24 is given by the following equation (1). Here, V DD is a voltage value of the power supplied from the signal / power generation unit 102 to the scanning line driving circuit 24, and a potential difference (YV DD −YV SS ) applied to the OLB pad 31 and the OLB pad 32. RYD is an internal resistance value of the scanning line driving circuit 24.

YD1=VDD/RYD 式(1)
次いで、リレー112を切替えて抵抗110をプロービングパッド41と電源/信号入出力部102との間に介在させ、上記同様、走査線駆動回路24に電源及び制御信号YDATAを供給し、この状態で、電子銃104からOLBパッド31に電子線を照射し、検出器106による二次電子の検出量を第2電位情報として検出する(図4参照)。また、このときに走査線駆動回路24に流れる電流IYD2は下記式(2)で与えられる。ここで、RST−Yは抵抗110の抵抗値である。
I YD1 = V DD / R YD formula (1)
Next, the relay 112 is switched and the resistor 110 is interposed between the probing pad 41 and the power / signal input / output unit 102, and similarly to the above, the power and control signal Y DATA are supplied to the scanning line driving circuit 24. Then, the electron gun 104 irradiates the OLB pad 31 with an electron beam, and the amount of secondary electrons detected by the detector 106 is detected as second potential information (see FIG. 4). At this time, the current I YD2 flowing in the scanning line driving circuit 24 is given by the following equation (2). Here, R ST-Y is the resistance value of the resistor 110.

YD2=VDD−Y/(RYD+RST−Y) 式(2)
次いで、図4に示すように、抵抗110を切離した場合と付加した場合における二次電子の検出量の差から、それぞれの場合におけるOLBパッド31の電位差ΔVeb−Yを検出する。この電位差ΔVeb−Yは抵抗110を付加したことによる電圧降下量に相当するため、電位差ΔVeb−Y、電流IYD2及び抵抗値RST−Yとの間には下記式(3)の関係が成立する。
I YD2 = V DD−Y / (R YD + R ST−Y ) Formula (2)
Next, as shown in FIG. 4, the potential difference ΔV eb−Y of the OLB pad 31 in each case is detected from the difference in the detected amount of secondary electrons when the resistor 110 is disconnected and when the resistor 110 is added. Since this potential difference ΔV eb−Y corresponds to the amount of voltage drop due to the addition of the resistor 110, the relationship between the potential difference ΔV eb−Y , the current I YD2 and the resistance value R ST−Y is expressed by the following equation (3). Is established.

YD2=ΔVeb−Y/RST−Y 式(3)
式(1)に式(2),(3)を代入することで下記式(4)が得られ、この式(4)に基づき電位差ΔVeb−Yから走査線駆動回路24の駆動時に流れる電流値IYD1を検出することができ、これにより、走査線駆動回路24の消費電流が所定の範囲内であるか否かの検査を行うことができる。
I YD2 = ΔV eb−Y / R ST−Y formula (3)
By substituting the equations (2) and (3) into the equation (1), the following equation (4) is obtained. Based on this equation (4), the current that flows when the scanning line driving circuit 24 is driven from the potential difference ΔV eb−Y. The value I YD1 can be detected, whereby it is possible to check whether or not the consumption current of the scanning line driving circuit 24 is within a predetermined range.

YD1=(ΔVeb−Y×VDD−Y)/[RST−Y×(VDD−Y−ΔVeb−Y)] 式(4)
また、信号線選択回路26の検査は、上記した走査線選択回路24の場合と同様の方法により検査することができる。すなわち、信号線選択回路26に電源及び制御信号XDATAを入力した駆動状態において、リレー116を切り替えて、抵抗114を切離した場合と付加した場合のそれぞれの場合で、OLBパッド34に電子線を照射し、これにより発生する二次電子の検出量の差からOLBパッド34の電位差ΔVeb−Xを検出する。検出された電位差ΔVeb−Xを下記式(5)に代入することで、信号線選択回路26の駆動時に流れる電流値IXD1を検出することができ、これにより、信号線選択回路26の消費電流が所定の範囲内であるか否か検査を行うことができる。なお、下記式(5)において、VDD−Xは、信号/電源発生部102から走査線駆動回路24に供給される電源の電圧値であって、OLBパッド34及びOLBパッド35に印加される電位差(XVDD−XVSS)に相当するものであり、RXDは信号線選択回路26の内部抵抗値、RST−Xは抵抗114の抵抗値である。
I YD1 = (ΔV eb−Y × V DD−Y ) / [R ST−Y × (V DD−Y −ΔV eb−Y )] Formula (4)
The signal line selection circuit 26 can be inspected by the same method as that for the scanning line selection circuit 24 described above. That is, in the driving state in which the power supply and the control signal XDATA are input to the signal line selection circuit 26, the relay 116 is switched, and the electron beam is applied to the OLB pad 34 in each of the cases where the resistor 114 is disconnected and added. Irradiation is performed, and the potential difference ΔV eb−X of the OLB pad 34 is detected from the difference in the detected amount of secondary electrons generated thereby. By substituting the detected potential difference ΔV eb−X into the following formula (5), the current value I XD1 that flows when the signal line selection circuit 26 is driven can be detected. It can be checked whether the current is within a predetermined range. In the following formula (5), V DD-X is a voltage value of the power supplied from the signal / power generation unit 102 to the scanning line driving circuit 24 and is applied to the OLB pad 34 and the OLB pad 35. This corresponds to a potential difference (XV DD −XV SS ), R XD is an internal resistance value of the signal line selection circuit 26, and R ST-X is a resistance value of the resistor 114.

XD1=[ΔVeb−X×VDD−X]/[Rst−X×(VDD−X−ΔVeb−X)] 式(5)
さらにまた、補助容量20の欠陥および補助容量線22の短絡の検査も、上記した走査線選択回路24の場合と同様の方法により検査することができ、補助容量20に補助容量電圧VCSを入力した状態において、リレー118を切り替え、抵抗120を切離した場合と付加した場合のそれぞれの場合で、OLBパッド37に電子線を照射し、これにより発生する二次電子の検出量の差からOLBパッド37の電位差ΔVeb−CSを検出する。補助容量20の欠陥や補助容量線22の短絡のない正常状態であれば、信号/電源発生部102から補助容量20の間には電流が流れないため、電位差ΔVeb−CSが生じることはなく、一方、補助容量20の欠陥や補助容量線22の短絡があれば、リーク電流が発生するため、電位差ΔVeb−CSが生じることとなる。
I XD1 = [ΔV eb−X × V DD−X ] / [R st−X × (V DD−X −ΔV eb−X )] Formula (5)
Furthermore, the defect of the auxiliary capacitor 20 and the short circuit of the auxiliary capacitor line 22 can be inspected by the same method as in the scanning line selection circuit 24 described above, and the auxiliary capacitor voltage V CS is input to the auxiliary capacitor 20. In this state, the relay 118 is switched and the OLB pad 37 is irradiated with an electron beam in each of the case where the resistor 120 is disconnected and the case where the resistor 120 is added, and the OLB pad is determined from the difference in the detected amount of secondary electrons generated thereby. The potential difference ΔV eb−CS of 37 is detected. In a normal state where there is no defect in the auxiliary capacitor 20 and no short circuit of the auxiliary capacitor line 22, no current flows between the signal / power supply generation unit 102 and the auxiliary capacitor 20, and therefore no potential difference ΔV eb−CS occurs. On the other hand, if there is a defect in the auxiliary capacitor 20 or if the auxiliary capacitor line 22 is short-circuited, a leak current is generated, and a potential difference ΔV eb-CS is generated.

次に、画素部19を検査するには、信号/電源発生部102よりプローブ108、プロービングパッド群40及びOLBパッド群30を介して、走査線駆動回路24及び信号線選択回路26に電源及び画素部19を検査するための制御信号を入力するとともに、補助容量線20に所定の補助容量電圧VCSを入力する。これにより、画素部19の各画素電極18は所定電圧が順次印加されるように走査され、これと同期して電子銃104から電子線を各画素電極18に照射し、放出される二次電子を検出器106で検出することで、各画素電極18の電圧値を検出することができ、画素部19中に欠陥があるか否か検査を行うことができる。 Next, in order to inspect the pixel unit 19, the power / pixel is supplied from the signal / power generation unit 102 to the scanning line driving circuit 24 and the signal line selection circuit 26 via the probe 108, the probing pad group 40 and the OLB pad group 30. A control signal for inspecting the unit 19 is input, and a predetermined auxiliary capacitance voltage VCS is input to the auxiliary capacitance line 20. Thereby, each pixel electrode 18 of the pixel unit 19 is scanned so that a predetermined voltage is sequentially applied, and in synchronization with this, the electron gun 104 irradiates each pixel electrode 18 with the electron beam and emits secondary electrons. Is detected by the detector 106, the voltage value of each pixel electrode 18 can be detected, and it can be inspected whether the pixel portion 19 has a defect.

以上のように、本実施形態におけるアレイ基板の検査方法では、EBテスタ100によって画素部及び駆動回路の検査を行うことができるため、電気的テスタが不要になり検査に要するコストを削減することができる。   As described above, in the array substrate inspection method according to the present embodiment, since the pixel unit and the drive circuit can be inspected by the EB tester 100, an electrical tester is not necessary, and the cost required for the inspection can be reduced. it can.

本発明の一実施形態において検査対象とするアレイ基板を示す概略図である。It is the schematic which shows the array board | substrate made into test object in one Embodiment of this invention. アレイ基板の駆動回路の検査方法を示す概略図である。It is the schematic which shows the inspection method of the drive circuit of an array board | substrate. 駆動回路の検査時における二次電子の検出量を示す図である。It is a figure which shows the detection amount of the secondary electron at the time of the test | inspection of a drive circuit.

符号の説明Explanation of symbols

10…アレイ基板
12…走査線
14…信号線
16…画素TFT
18…画素電極
19…画素部
23…駆動回路
24…走査線駆動回路
26…信号線選択回路
100…EBテスタ
102…電源/信号入出力部
104…電子銃
106…検出器
110、114…抵抗
112、116…リレー
10 ... Array substrate 12 ... Scanning line 14 ... Signal line 16 ... Pixel TFT
DESCRIPTION OF SYMBOLS 18 ... Pixel electrode 19 ... Pixel part 23 ... Drive circuit 24 ... Scan line drive circuit 26 ... Signal line selection circuit 100 ... EB tester 102 ... Power supply / signal input / output part 104 ... Electron gun 106 ... Detector 110, 114 ... Resistance 112 116 ... Relay

Claims (7)

複数の走査線と複数の信号線の各交差部に配置された画素TFTと、前記走査線に走査信号を供給する走査線駆動回路と、前記信号線に映像信号を供給する信号線駆動回路と、前記走査線駆動回路及び前記信号線駆動回路に外部電源から電源を供給するための入力端子と、を備えたアレイ基板の検査方法であって、
前記走査線駆動回路及び前記信号線駆動回路の少なくともいずれか一方の駆動回路に前記外部電源から前記入力端子を介して駆動電源を供給した状態で、前記入力端子に電子線を照射して二次電子を放出させ、該二次電子を検出することで第1電位情報を得る工程と、
前記外部電源と前記入力端子との間に抵抗を介在させて前記外部電源から前記抵抗及び入力端子を介して前記駆動回路に駆動電源を供給した状態で、前記入力端子に電子線を照射して二次電子を放出させ、該二次電子を検出することで第2電位情報を得る工程と、を備え、
前記第1電位情報と前記第2電位情報とから算出される前記入力端子の電位差に基づいて前記駆動回路の電気不良を検出することを特徴とするアレイ基板の検査方法。
A pixel TFT disposed at each intersection of a plurality of scanning lines and a plurality of signal lines; a scanning line driving circuit for supplying scanning signals to the scanning lines; and a signal line driving circuit for supplying video signals to the signal lines; An inspection method for an array substrate comprising: an input terminal for supplying power from an external power source to the scanning line driving circuit and the signal line driving circuit,
In a state in which driving power is supplied from the external power source to the driving circuit through at least one of the scanning line driving circuit and the signal line driving circuit through the input terminal, the input terminal is irradiated with an electron beam to perform secondary operation. Obtaining first potential information by emitting electrons and detecting the secondary electrons;
In the state where a drive power is supplied from the external power supply to the drive circuit via the resistor and the input terminal by interposing a resistor between the external power supply and the input terminal, the input terminal is irradiated with an electron beam. A step of emitting secondary electrons and obtaining second potential information by detecting the secondary electrons,
An inspection method for an array substrate, comprising: detecting an electrical failure of the drive circuit based on a potential difference between the input terminals calculated from the first potential information and the second potential information.
前記駆動回路が前記アレイ基板上に形成されていることを特徴とする請求項1に記載のアレイ基板の検査方法。   2. The array substrate inspection method according to claim 1, wherein the drive circuit is formed on the array substrate. 前記外部電源から前記入力端子を介して前記駆動回路に駆動電源を供給した状態において前記駆動回路を流れる駆動電流値Iを下記式より算出し、前記駆動電流値Iに基づいて、前記駆動回路の電気不良を検出することを特徴とする請求項1または2に記載のアレイ基板の検査方法。
=ΔVeb×VDD/[Rst×(VDD−ΔVeb)]
ただし、ΔVは入力端子の電位差、VDDは外部電源が駆動回路に供給する駆動電源の電圧値、Rstは外部電源と入力端子との間に介在させた抵抗の抵抗値である。
A drive current value ID flowing through the drive circuit in a state in which drive power is supplied from the external power supply to the drive circuit via the input terminal is calculated from the following formula, and the drive is calculated based on the drive current value ID. 3. The method for inspecting an array substrate according to claim 1, wherein an electrical failure of the circuit is detected.
I D = ΔV eb × V DD / [R st × (V DD −ΔV eb )]
Here, ΔV e is a potential difference of the input terminal, V DD is a voltage value of the driving power source supplied to the driving circuit by the external power source, and R st is a resistance value of a resistor interposed between the external power source and the input terminal.
前記駆動回路が、前記走査線駆動回路であることを特徴とする請求項1〜3に記載のアレイ基板の検査方法。   4. The array substrate inspection method according to claim 1, wherein the driving circuit is the scanning line driving circuit. 前記駆動回路が、前記信号線駆動回路であることを特徴とする請求項1〜3に記載のアレイ基板の検査方法。   4. The array substrate inspection method according to claim 1, wherein the drive circuit is the signal line drive circuit. 前記信号線駆動回路は、映像信号を出力する映像信号供給回路と、前記映像信号供給回路からの映像信号を複数の信号線の中から選択された信号線に対して供給する信号線選択回路と、を有し、前記信号線選択回路が前記アレイ基板上に形成されていることを特徴とする請求項1〜3に記載のアレイ基板の検査方法。   The signal line driving circuit includes a video signal supply circuit that outputs a video signal, a signal line selection circuit that supplies a video signal from the video signal supply circuit to a signal line selected from a plurality of signal lines, and The array substrate inspection method according to claim 1, wherein the signal line selection circuit is formed on the array substrate. 複数の走査線と複数の信号線の各交差部に配置された画素TFTと、前記走査線に走査信号を供給する走査線駆動回路と、前記信号線に映像信号を供給する信号線駆動回路と、走査線駆動回路及び信号線駆動回路に外部からの電源を供給する入力端子と、を備えたアレイ基板の検査を行うアレイ基板検査装置であって、
前記入力端子を介して前記駆動回路に駆動電源を供給する電源供給手段と、
前記電源供給手段と前記入力端子との間において、抵抗を介在させるか否かを切り替える切替手段と、
前記駆動回路に駆動電源を供給した状態において、抵抗を切り離した場合と付加した場合のそれぞれの場合で、前記入力端子に電子線を照射して二次電子を放出させ、該二次電子を検出することで電位情報を取得する検出手段と、
前記電位情報から算出される前記入力端子の電位差に基づいて前記駆動回路の電気不良を検出する不良解析手段と、
を備えることを特徴とするアレイ基板の検査装置。
A pixel TFT disposed at each intersection of a plurality of scanning lines and a plurality of signal lines; a scanning line driving circuit for supplying scanning signals to the scanning lines; and a signal line driving circuit for supplying video signals to the signal lines; An array substrate inspection apparatus for inspecting an array substrate having an input terminal for supplying power from outside to the scanning line driving circuit and the signal line driving circuit,
Power supply means for supplying drive power to the drive circuit via the input terminal;
Switching means for switching whether or not to interpose a resistor between the power supply means and the input terminal;
When the drive power is supplied to the drive circuit, the secondary electron is emitted by irradiating the input terminal with an electron beam in each of the case where the resistor is disconnected and the case where the resistor is added, and the secondary electron is detected. Detecting means for acquiring potential information by doing,
A failure analysis means for detecting an electrical failure of the drive circuit based on a potential difference of the input terminal calculated from the potential information;
An inspection apparatus for an array substrate, comprising:
JP2005307720A 2005-10-21 2005-10-21 Method and device for inspecting array substrate Pending JP2007114124A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012133020A (en) * 2010-12-20 2012-07-12 Shimadzu Corp Tft array inspection device
US8232984B2 (en) 2009-05-19 2012-07-31 Samsung Electronics Co., Ltd. Thin film transistor array panel having a driver inspection unit and display device including the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8232984B2 (en) 2009-05-19 2012-07-31 Samsung Electronics Co., Ltd. Thin film transistor array panel having a driver inspection unit and display device including the same
JP2012133020A (en) * 2010-12-20 2012-07-12 Shimadzu Corp Tft array inspection device

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