JP2007109829A - Solder joint forming method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a solder joint forming method capable of enhancing initial joint strength in solder joint, and of securely solder joining electronic devices or the like. <P>SOLUTION: An electronic device mounting substrate 1 includes a substrate 2, an electrode layer 4 formed on the substrate, and a solder layer 5 formed on the electrode layer. The solder joint is formed beforehand by applying heat treatment at a low heat treatment temperature lower than a melting point of the solder layer 5 to the electronic device mounting substrate 1, where an electronic device is joined with the solder layer 5. The initial joint strength can be made ≥30 MPa as an equilibrium state by heat treating a solder constituting the solder layer 5 after the solder junction of the electronic device. Failure soldering of the electronic device is reduced to improve the yield in the electronic device mounting. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a method for forming a solder joint when an electronic device such as a semiconductor device is joined to a solder layer provided on a substrate.

Normally, various electronic components are mounted at predetermined locations on a copper wiring pattern formed on a printed circuit board and soldered to connect electronic circuits.
However, when various resins such as paper phenol resin, epoxy resin, and glass epoxy resin are used as the material of the printed circuit board, the substrate is low in cost but has poor heat dissipation.

  Patent Document 1 discloses a semiconductor mounting circuit in which an insulating filler is poured onto a patterned metal base substrate made of Al, Cu or the like to form a circuit for high-density mounting of a circuit board for mounting a semiconductor. A circuit board is disclosed. In the substrate described in this document, a silica-containing epoxy resin having a thickness of 100 μm is used as an insulating filler, and a foil made of aluminum and copper is formed as a wiring layer on the upper surface of the resin.

  In Patent Document 2, a conductive layer made of Cu or the like is provided on a ceramic substrate made of AlN by pasting or the like, and this conductive layer is patterned to form a circuit, which is used for an IC package or the like. A metal thin film multilayer ceramic substrate that can be used is disclosed.

  In the various substrates described above, a solder layer is further formed on the conductive layer, and various components such as a semiconductor device, a resistor, and a capacitor are mounted on the solder layer by solder bonding. In recent years, it has been proposed to form a solder layer with a so-called Pb-free solder that does not contain lead (Pb), for example, a solder such as Au—Sn, Ag—Sn, In—Sn, or Zn—Sn, in order to reduce environmental burden. Has been.

  When an electrode layer whose uppermost layer is made of gold (Au) is formed on the submount substrate, and a solder layer is formed on the electrode layer with Pb-free solder such as Au-Sn, the solder layer is heated once. Dissolve, then quench and harden. For this reason, it is known that the solder itself constituting the solder layer tends to be in a non-equilibrium state, and the initial bonding strength becomes unstable. For example, Non-Patent Document 1 reports that even if Pb-free solder is left at room temperature, it takes 10 months or more to reach equilibrium.

  For this reason, it is known that the solder itself constituting the solder layer using Pb-free solder is likely to be in an unbalanced state, and the initial bonding strength is unstable. In Non-Patent Document 2, in a semiconductor laser package using Pb-free solder, when a load due to a thermal cycle after solder bonding is applied, the bonding strength of the solder junction gradually changes due to the thermal cycle load. It has been reported. Therefore, when an electronic device such as a semiconductor device is mounted, the initial bonding strength of the Pb-free solder bonding of the electronic device is relatively low.

Japanese Patent No. 3156798 Japanese Patent No. 2762007 V. SIMIC and Z. MARINKOVIC, “Thin film interdiffusion of Au and Sn at room temperature”, J. Less-Common Metals, 51, pp.177-179, 1977 J-H. Kuang and five others, “Effect of Temperature Cycling on Joint Strength of PbSn and AuSn Solders in Laser Packages”, IEEE Trans., Adv. Pack, Vol.24, No.4, pp.563-568, 2001

In conventional solder bonding, it is preferable to bond at a temperature of 300 ° C. or higher in order to improve the bonding strength between an electronic device such as a semiconductor device and a solder layer. However, when solder bonding is performed at a temperature of 300 ° C. or higher, a thermal load on an electronic device such as a semiconductor device or an electronic component increases, and the semiconductor device chip itself may be damaged.
On the other hand, when solder bonding is performed at a temperature of 300 ° C. or lower, the thermal load on the electronic device is reduced, so that the possibility of damage to the chip of the semiconductor device is reduced. Since the strength is weak and there is a possibility that the solder joint may come off due to dropping or the like, attention must be paid to the handling of the board on which the electronic component is mounted. Therefore, it is a problem to increase the bonding strength of solder bonding in a short time.

  In view of the above points, an object of the present invention is to provide a method for forming a solder joint in which an initial joint strength in solder joint is increased and an electronic device or the like can be securely soldered.

In order to achieve the above object, a method for forming a solder joint according to the present invention includes, in advance, an electronic device mounting substrate including a substrate, an electrode layer formed on the substrate, and a solder layer formed on the electrode layer. The electronic device mounting substrate in which the electronic device is bonded to the solder layer is heat-treated at a heat treatment temperature lower than the melting point of the solder layer.
The method for forming a solder joint of the present invention is a method for forming a solder joint of an electronic device to an electronic device mounting substrate including a substrate, an electrode layer formed on the substrate, and a solder layer formed on the electrode layer. And a step of soldering the electronic device with a solder layer, and a step of heat-treating the solder layer at a heat treatment temperature lower than the melting point of the solder layer.

  According to the above configuration, the solder constituting the solder layer is heat-treated after the electronic device is joined by heating, so that the initial joining strength of the electronic device is improved and the electronic device is securely soldered. . Therefore, defective soldering of the electronic device is reduced, the yield in mounting the electronic device is improved, and handling of the board on which the electronic device is mounted becomes easy.

In the above configuration, the temperature at which solder bonding is performed is preferably 300 ° C. or less. The heat treatment temperature is preferably 125 ° C. or higher. The heat treatment time is preferably 25 hours or longer.
According to the above configuration, damage to the chip of the semiconductor device can be prevented by setting the solder bonding temperature to 300 ° C. or lower. The initial bonding strength of the electronic device can be increased to 30 MPa or more by heat treatment of the solder layer.

  According to the present invention, the initial bonding strength can be set to 30 MPa or more by heat-treating the solder constituting the solder layer after the solder bonding of the electronic device. As a result, the initial bonding strength of the solder bonding of the electronic device is increased, so that the electronic device is securely soldered, the soldering failure of the electronic device is reduced, and the yield in mounting the electronic device is improved.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In each figure, the same or corresponding members are denoted by the same reference numerals.
First, the substrate used in the solder joint forming method of the present invention will be described.
FIG. 1 is a cross-sectional view schematically showing the structure of a substrate used in the solder joint forming method of the present invention. As shown in FIG. 1, an electronic device mounting substrate 1 includes an electrode layer 4 formed on one side and / or both sides of a submount substrate 2, a solder layer 5 formed at a predetermined position on the surface of the electrode layer 4, It is composed of The solder layer 5 may be formed on the electrode layer 4 through the adhesion layer 3. Here, the predetermined portion of the electrode layer 4 may be the entire surface or an electrode pattern in the case of a light emitting diode or the like. Further, a gold wire may be connected to a part of the electrode layer 4 to form an electric circuit.

  As the submount substrate 2, aluminum nitride (AlN), silicon carbide (SiC), diamond IIa, or the like having high thermal conductivity can be used. Further, an electrode layer similar to the above may be formed on the side surface of the submount substrate 2 to electrically connect the upper surface and the lower surface of the submount substrate 2.

  2 and 3 are cross-sectional views schematically showing the structure of a metal-ceramic composite substrate as another example of the substrate used in the solder joint forming method of the present invention. In FIG. 2, the metal-ceramic composite substrate 10 includes a metal substrate 11, ceramic layers 12 and 12 formed so as to cover the entire metal substrate 11 on the front and back surfaces of the metal substrate 11, and the surface side thereof. The electrode layer 13 is formed on the surface of the ceramic layer 12 so as to cover a part or the entire surface of the ceramic layer 12, and the solder layer 14 is formed at a predetermined position 13 </ b> A on the surface of the electrode layer 13. .

  Here, the predetermined portion 13A of the electrode layer 13 may be the entire surface in the case of a light emitting diode or the like. There may also be an electrode layer 13B on which no solder layer is formed. A pattern may be formed on the electrode layer 13B. Further, an electric circuit may be formed by connecting a gold wire to a part of the electrode layer 13B.

  An electrode layer 13 and a solder layer 14 may also be provided on the back side of the metal substrate 11. In the case of the metal-ceramic composite substrate 10 </ b> A shown in FIG. 3, an example is shown in which the ceramic layer 12, the electrode layer 13, and the solder layer 14 are sequentially laminated on the back surface side of the metal substrate 11. In addition, an adhesion layer may be disposed between the metal substrate 11 and the ceramic layer 12 and / or between the electrode layer 13 and the solder layer 14 in order to improve adhesion during film formation. Titanium can be suitably used as the adhesion layer.

  As the metal substrate 11, a metal base substrate made of a metal such as copper or aluminum can be used. Such a metal base substrate desirably has a thermal conductivity of, for example, 200 W / mK or more.

  As the ceramic layer 12, a ceramic thin film having good adhesion to the metal substrate 11, preferably a nitride ceramic thin film such as aluminum nitride (AlN) having a low thermal resistance can be used.

  Although two examples of the electronic device mounting substrates 1 and 10 used in the solder joint forming method of the present invention have been described, the present invention is not limited to the above examples, and includes electrode layers 4 and 13 and solder layers 5 and 14 formed thereon. A substrate having any structure may be used as long as the electronic device is bonded by the solder layers 5 and 14, that is, can be mounted.

  The electrode layers 4 and 13 are preferably made of metal, particularly gold (Au), platinum (Pt), silver (Ag), copper (Cu), iron (Fe), aluminum (Al), titanium (Ti), tungsten (W Or alloys containing any of these metals may be used.

  The solder layers 5 and 14 are preferably free of lead (Pb), that is, Pb-free solder. More preferably, two or more kinds of elements of silver, gold, copper, zinc (Zn), nickel (Ni), indium (In), gallium (Ga), bismuth (Bi), aluminum, and tin (Sn) are used. The contained solder can be preferably used.

  For the adhesion layer 3, it is preferable to use a metal having a high melting point that has good adhesion to the submount substrate 1 and hardly causes mutual diffusion with the solder layer 5. As the metal material used for the adhesion layer 3, a material mainly containing any one of titanium (Ti), Cr (chromium), Ni (nickel), Mo (molybdenum), and the like can be used. Moreover, you may form using the material which has any one alloy of Ti, Ni, Cr, Mo as a main component.

Next, mounting of a semiconductor device using the substrate 1 or the metal-ceramic composite substrate 10 used in the present invention will be described.
FIG. 4 is a cross-sectional view schematically showing a structure in which a semiconductor device is mounted on the submount of the present invention. As shown in FIG. 4, in the submount 1, the semiconductor device 7 can be soldered by the solder layer 5a.

  FIG. 5 is a cross-sectional view schematically showing a structure in which a semiconductor device is mounted on the metal-ceramic composite substrate of FIG. As shown in FIG. 5, in the metal-ceramic composite substrate 10 used in the present invention, the lower electrode 15 </ b> A of the semiconductor device 15 can be soldered to the metal-ceramic composite substrate 10 by the solder layer 14. Further, when the solder layer 14 made of Au—Sn alloy that is used for general purposes is used, the semiconductor device 15 can be soldered without flux.

  On the other hand, as shown in the drawing, the upper electrode 15B of the semiconductor device 15 is wire-bonded by Au wire 16 or the like on the left electrode layer 13B that is insulated from the right electrode layer 13A and has no solder layer formed thereon. Can be connected.

Here, the semiconductor devices 7 and 15 are light emitting elements such as laser diodes or light emitting diodes, diodes, active elements such as transistors and thyristors used for high frequency amplification and switching, integrated circuits, and the like.
4 and 5, the semiconductor devices 7 and 15 are shown as electronic components to be mounted, but any so-called electronic device including passive elements and various active elements may be used, and a plurality of electronic devices may be mounted on the substrate. The solder layers 5 and 14 may be soldered together.

Here, the solder bonding to the lower electrode layers 4a and 13A of the semiconductor devices 7 and 15 is performed in detail as follows.
FIG. 6 is a flowchart sequentially showing the steps in the method of forming a solder joint on a substrate according to the present invention. The substrate will be described as the metal-ceramic composite substrate 10 shown in FIG. 2, but the same applies to the electronic device mounting substrate 1 shown in FIG. As shown in the flowchart of FIG. 6, in step S <b> 1, first, the lower electrode 15 </ b> A of the semiconductor device 15 is placed on the solder layer 14 of the metal-ceramic composite substrate 10.

  Subsequently, in step S2, the solder layer 14 is heated, for example, in an air atmosphere at 300 ° C. by a lamp heating method or the like, and the solder constituting the solder layer 14 is dissolved. As a result, the solder comes into contact with the lower electrode 15A of the semiconductor device 15 and is in a so-called wet state. When the heating is completed, the solder constituting the solder layer 14 is cured by being lowered to the heat treatment temperature performed in the next step S3, and is soldered. At this time, even if the solder constituting the solder layer 14 is lowered to the heat treatment temperature, the initial bonding strength is unstable. In this case, if the temperature is lowered to the heat treatment temperature too early, the solder layer 14 is distorted during cooling and residual stress is generated, which is not preferable. The temperature lowering to the heat treatment temperature may be performed, for example, by so-called furnace cooling of a furnace used for heating.

  Alternatively, after soldering, the solder layer 14 or the electronic device mounting substrates 1 and 10 may be heated to a heat treatment temperature to be described later.

  Next, in step S3, the solder layer 14 is heat-treated at a predetermined heat treatment temperature for a predetermined time. Thereby, the initial joining strength of the solder which comprises the solder layer 14 can be improved. In this case, the heat treatment temperature is preferably temperature-controlled so that the furnace used for heating is kept at a constant temperature.

  The heat treatment may be performed in two or more stages. For example, the first heat treatment temperature may be 150 ° C., and then 200 ° C. Further, the temperature may be continuously changed from the first heat treatment temperature of 125 ° C. or higher to a predetermined heat treatment temperature in a temperature range not exceeding the melting point of the solder layer 14. Further, the heat treatment time may be such that the bonding strength of the solder joint finally becomes 30 MPa or more in consideration of each heat treatment temperature. Preferably, it is 35 MPa or more. For example, after heat treatment at the above heat treatment temperature, the heat treatment may be performed again after cooling to room temperature. The heat treatment can be performed by a heating device used for solder bonding or a heating device using a dedicated electric furnace for heat treatment.

  The steps S1 to S3 are preferably performed in a predetermined gas atmosphere. As such a gas, air, an inert gas such as nitrogen, a gas obtained by mixing an inert gas with hydrogen, or the like can be used. In addition, after the electronic device is soldered to the electronic device mounting substrates 1 and 10 in advance, the heat treatment may be performed on these substrates. By doing so, it is possible to perform batch processing, that is, batch processing, of heat treatment for solder bonding formed on a large number of substrates prepared in large quantities in advance.

  When solder composed of Au and Sn having a composition with a melting point of 300 ° C. or lower is used as the solder layer 14, the heat treatment temperature is preferably 125 ° C. or higher and 200 ° C. or lower, for example. At this heat treatment temperature, the bonding strength can be effectively improved. When heat treatment is performed at the same heat treatment temperature, the initial bonding strength between the semiconductor device 15 and the solder layer 14 can be set to 30 MPa or more by setting the heat treatment time to 25 hours or more. Bond strength that can withstand Therefore, the residual stress of the solder layer 14 can be eliminated by performing the heat treatment for a long time at a low temperature. And when performing heat processing for a short time at comparatively high temperature, since joint strength can be improved in a short time, the solder joint formation excellent in mass-productivity can be implemented.

  In this manner, the semiconductor devices 7 and 15 are soldered to the electrode layers 4 and 13 of the substrate through the solder layers 5 and 14 brought into an equilibrium state by the heat treatment. The residual stress 14 is reduced, and the rearrangement of the structure of the solder layers 5 and 14 is performed. For this reason, since the initial joining strength of solder joining is stabilized, solder joining is reliably performed. Therefore, the occurrence of solder defects in the electronic device mounting process is suppressed, and the yield of electronic device mounting is improved.

In the embodiment described above, the ceramic layer 12 may be formed on the entire surface of the metal substrate 11.
Moreover, you may form in the predetermined part of the surface of the metal substrate 11 as needed. In this case, before the ceramic layer 12 is deposited, the ceramic layer 12 is deposited after the patterning by the photolithography method, and then the resist film used for the patterning is etched. The ceramic layer 12 can be formed only in the region.
Further, the ceramic layer 12 may be deposited in a state where a metal mask having a predetermined portion opened is placed on the metal substrate 11. In this case, the ceramic layer 12 is formed only in the opening of the metal mask.

  In the embodiment described above, the metal-ceramic composite substrate 10 is configured as a single-sided substrate, but the ceramic layer 12 is not only on one side on the front side of the metal substrate 11 but also on the back side, that is, on both sides. The electrode layer 13 and the solder layer 14 may be provided, and a ceramic layer protective film may be inserted between the ceramic layer 12 and the electrode layer 13 as necessary.

Hereinafter, the present invention will be described in more detail based on examples.
Initially, the manufacturing method of the metal-ceramic composite substrate used for the Example is demonstrated.
The surface of the metal substrate 11 is cleaned by cleaning both surfaces of the metal substrate 11 made of Cu having a size of 50 mm × 50 mm, a thickness of 300 μm, and a thermal conductivity of 300 W / mK. Further, a ceramic layer 12 made of AlN having a thickness of 10 μm was formed by a PVD method (physical vapor deposition). As the PVD method, a sputtering apparatus was used. AlN thin film 12 was deposited by using Al as a target and supplying nitrogen gas simultaneously. The thermal conductivity of this AlN thin film was 200 W / mK.
Next, in the metal-ceramic composite substrate shown in FIG. 1, Ti having a thermal conductivity of 20 W / mK and serving as a ceramic layer protective film on the entire front and back surfaces of the AlN thin film 12 is further reduced to 0 by a vacuum deposition apparatus. .05 μm deposited.

Subsequently, in order to perform patterning by photolithography, a resist is uniformly applied to the entire surface of the metal substrate 11 on which the AlN thin film 12 and the ceramic layer protective film are formed using a spinner, and then predetermined baking is performed in a baking furnace. Then, gamma ray contact exposure was performed using a mask aligner. The mask for exposure was designed so that 2500 masks could be simultaneously patterned with a 1 mm square submount size.
After the exposure, the resist for the portion that becomes the electrode layer 13 was dissolved with a tetramethylamine-based liquid developer to expose the ceramic layer protective film. At this time, the ceramic layer protective film on the back surface side of the metal substrate 11 was not patterned.
Next, gold having a thermal thermal conductivity of 315 W / mK was vapor-deposited on the ceramic layer protective films on the front and back sides of the metal substrate 11 by a vacuum vapor deposition apparatus. And the lift-off process was given to the resist pattern formed in the ceramic layer protective film of the surface side of the metal substrate 11. FIG. Specifically, by dissolving the entire resist using acetone, Au other than the electrode layer 13 was removed, and a predetermined electrode layer 13 was formed. The thickness of the electrode layer 13 was 0.1 μm, and the size was 800 μm square on both sides.

Subsequently, a solder layer 14 having a thickness of 5 μm was formed on a part of the electrode layer 13 formed on the surface of the metal substrate 11 by a lift-off process using the photolithography method and the vacuum vapor deposition apparatus similarly to the electrode layer 13. As the solder layer 14, Au _0.7 Sn _0.3 having a thermal thermal conductivity of 50 W / mK and a melting point of 278 ° C. was used. The size of the solder layer 14 is 500 μm square at the semiconductor element bonding surface and 800 μm square at the submount bonding surface. At this time, the solder layer 14 on the Au layer provided on the back side of the metal substrate 11 was not patterned.

  Finally, the obtained metal substrate 11 was cut into 1 mm square using a dicing apparatus to produce a metal-ceramic composite substrate.

  A light emitting diode was soldered to this metal-ceramic composite substrate. Specifically, the metal-ceramic composite substrate was heated with a lamp, and light emitting diode soldering was performed at 280 ° C. in an air atmosphere. After soldering, the metal-ceramic composite substrate was rapidly cooled to room temperature. Next, heat treatment was performed at 125 ° C. for 25, 50, and 75 hours, respectively, in an air atmosphere to obtain a mounting example of Example 1.

  In Example 2, a light emitting diode was mounted in the same manner as in Example 1 except that the heat treatment temperature was 150 ° C. and heat treatment was performed for 25, 50, and 75 hours.

  In Example 3, a light emitting diode was mounted in the same manner as in Example 1 except that the heat treatment temperature was 175 ° C. and heat treatment was performed for 25, 50, and 75 hours.

  In Example 4, a light emitting diode was mounted in the same manner as in Example 1 except that the heat treatment temperature was 200 ° C. and heat treatment was performed for 25, 50, and 75 hours.

Next, a comparative example will be described.
(Comparative example)
A light emitting diode was soldered to a metal-ceramic composite substrate in the same manner as in the example except that the heat treatment after soldering in the example was not performed.

  Next, the bonding strength of the solder bonding in Examples 1 to 4 and the comparative example was examined by a tape peeling test. The tape peel test is the same as the method generally used for measuring the adhesion strength of metal, and the tape used has a certain adhesive strength. Of the solder joints of the light-emitting diodes that were joined, those that were peeled off by the tape peel test were regarded as poor solder joints, and the ratio of the number of poor solder joints to the number of samples was defined as the tape peel rate (%). Here, the number of samples was 20 for each of the examples and comparative examples. In any case of Examples 1 to 4, the chip was not damaged during the solder bonding.

Table 1 is a table showing the tape peeling rate (%) of Example 1. As shown in Table 1, the tape peeling rate of Example 1 with a heat treatment temperature of 125 ° C. was 10% when the heat treatment time was 25 hours, but when the heat treatment time was 50 hours and 75 hours, the tape peeling It turns out that does not occur. In Examples 2-4, it turned out that tape peeling does not arise in any case where heat processing time is 25 hours, 50 hours, and 75 hours.
On the other hand, in the case of the comparative example, the tape peeling rate was 15%, and it was found that tape peeling was more likely to occur than in Examples 1 to 4. Thus, in the comparative example, tape peeling occurred not a little by soldering at 280 ° C. alone.

  Next, in Examples 1 to 4 and the comparative example, a sample that was not peeled by the tape peel test was used to perform a die shear test of the light emitting diode chip, and so-called chip shear strength was measured. The die shear test was carried out in accordance with the MIL standard (MIL-STD-883C, Method 2019.4), each condition N number = 10, and the chip shear strength was obtained from the average value.

Table 2 is a table | surface which shows the chip | tip shear strength (MPa) measured by the die shear shear test with respect to the heat processing of Examples 1-4.
As is clear from Table 2, in Examples 1 to 4, it was found that the chip shear strength increases as the heat treatment time is increased. Specifically, the chip shear strength of Example 1 (heat treatment temperature = 125 ° C.) increases to 28.3 MPa, 30.1 MPa, and 30.2 MPa when the heat treatment time is 25, 50, and 75 hours, respectively. Then, a chip shear strength of 30 MPa or more was obtained by heat treatment for about 50 hours.

  The chip shear strength of Example 2 (heat treatment temperature = 150 ° C.) increased to 31.3 MPa, 35.2 MPa, and 36.3 MPa when the heat treatment time was 25, 50, and 75 hours, respectively, and 25 hours or more. It was found that a chip shear strength of 31 MPa or more can be obtained by this heat treatment.

  The chip shear strength of Example 3 (heat treatment temperature = 175 ° C.) increased to 35.3 MPa, 36.3 MPa, and 36.5 MPa, respectively, when the heat treatment time was 25, 50, and 75 hours, and 25 hours or more. It was found that a chip shear strength of 35 MPa or more can be obtained by this heat treatment.

  The chip shear strength of Example 4 (heat treatment temperature = 200 ° C.) is approximately the same as 32.2 MPa, 31.3 MPa, and 32.8 MPa when the heat treatment time is 25, 50, and 75 hours, respectively. It was found that a chip shear strength of about 31 MPa or more can be obtained by heat treatment for more than an hour.

As is apparent from this result, when Au _0.7 Sn _0.3 having a melting point of 278 ° C. is used as the solder layer, in Example 1, the heat treatment temperature is set to 125 ° C. and the heat treatment time is set to approximately 50 hours or more. A chip shear strength of 30 MPa or more was obtained. Furthermore, when the heat treatment temperatures of Examples 2 to 4 were 150 ° C., 175 ° C., and 200 ° C., respectively, a chip shear strength of 30 MPa or more was obtained if the heat treatment time was 25 hours or more.

  On the other hand, the chip shear strength of the comparative example was 27.7 MPa.

  According to the above examples and comparative examples, it has been found that according to the solder bonding formation method of the examples, the bonding strength can be reliably improved to 30 MPa or more.

  In the above-described embodiments, the case where the semiconductor device 15 is mounted as an electronic device has been described. However, the present invention is not limited to this, and any electronic device such as a semiconductor device or a circuit component having a back electrode can be applied. It is needless to say that various modifications are possible within the scope of the invention described in, and these are also included within the scope of the present invention. For example, the semiconductor device is not limited to a light emitting diode or the like, and the case where Cu or Al is used as the metal substrate 11 is described. However, the present invention is not limited to this, and the metal substrate 11 is made of another metal. The substrate may be a submount or another substrate. Moreover, in the embodiment mentioned above, although the ceramic layer 12 is comprised from AlN, it may comprise not only this but another ceramic material. Furthermore, the patterns of the electrode layers 4 and 13 and the solder layers 5 and 14 may be appropriately designed so as to obtain a target circuit configuration.

It is sectional drawing which shows typically the structure of the board | substrate used for the electronic device mounting of this invention. It is sectional drawing which shows typically the structure of the metal-ceramic composite board | substrate used for the electronic device mounting of this invention. It is sectional drawing which shows typically the structure of the metal-ceramic composite board | substrate used for the electronic device mounting of this invention. It is sectional drawing which shows typically the structure which mounted the semiconductor device in the submount of this invention. It is sectional drawing which shows typically the structure which mounted the semiconductor device on the metal-ceramic composite substrate of FIG. It is a flowchart which shows the process in the solder joint formation method of the metal-ceramic composite board | substrate of this invention in order.

Explanation of symbols

1: Electronic device mounting substrate 2: Submount substrate 3: Adhesion layer 4, 13: Electrode layer 5, 14: Solder layer 7, 15: Semiconductor device 10: Metal-ceramic composite substrate 11: Metal substrate 12: Ceramic layer (ceramic Thin film)
15A: Upper electrode 15B of the semiconductor device: Lower electrode 16 of the semiconductor device: Au wire

Claims (5)

  An electronic device mounting substrate comprising: a substrate; an electrode layer formed on the substrate; and a solder layer formed on the electrode layer. An electronic device mounting substrate in which an electronic device is bonded to the solder layer in advance. A method for forming a solder joint, wherein the heat treatment is performed at a heat treatment temperature lower than the melting point of the solder layer. A method for forming a solder joint of an electronic device to an electronic device mounting substrate comprising a substrate, an electrode layer formed on the substrate, and a solder layer formed on the electrode layer,
Soldering the electronic device with the solder layer;
And a step of heat-treating the solder layer at a heat treatment temperature lower than the melting point of the solder layer.   The method for forming a solder joint according to claim 1 or 2, wherein a temperature at which the solder joint is performed is 300 ° C or lower.   The method for forming a solder joint according to claim 1, wherein the heat treatment temperature is 125 ° C. or higher. 3. The method for forming a solder joint according to 1 or 2, wherein the heat treatment time is 25 hours or more.

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