JP2007074771A - Voltage driving type switching circuit, multiphase inverter device, and method of voltage driving type switching control - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a voltage driving type switching circuit which can avoid thermal deconstruction even if there is dispersion in the properties of two or more voltage driving type elements connected in parallel, a multiphase inverter device, and a method of voltage driving type switching control. <P>SOLUTION: A gate driving circuit 11 is equipped with a PchMOSFET (P-channel Metal-Oxide Semiconductor Field Effect Transistor)(Q4, Q6 and Q8) and an NchMOSFET (N-channel Metal-Oxide Semiconductor Field Effect Transistor)(Q5, Q7 and Q9) which are push-pull-connected as a plurality of gate drive circuits for PWM (Pulse Width Modulation)-driving each of a plurality of voltage drive type elements IGBT (Q1)-(Q3) which are connected in parallel to constitute a semiconductor module 10. It becomes possible to alternately drive corresponding IGBTs (Q1)to (Q3), switching them in order, by inputting input signals PWM1-PWM3 to switch them on in order to any one gate terminal or two or more gate terminals out of them. For example, in case that the switching loss of IGBTs (Q1)to(Q3) is larger than stationary loss, the above alternate drive is performed, and in other cases, all the IGBTs (Q1)to (Q3) are driven at the same time. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a voltage-driven switching circuit, a multiphase inverter device, and a voltage-driven switching control method.

  A multi-phase inverter device having a configuration in which a series circuit in which two voltage-driven elements connected in parallel are connected in series is connected in parallel for the number of phases according to the number of phases is generally known. In such a multi-phase inverter device, if there are variations in the wiring impedance of a plurality of voltage-driven elements connected in parallel, the current is concentrated on a specific voltage-driven element having the minimum impedance, and connected in parallel. There is a possibility that a specific voltage driven element among the plurality of voltage driven elements generates heat and may be thermally destroyed.

  For this reason, as described in Japanese Patent Laid-Open No. 7-7958 “Power Conversion Device” disclosed in Patent Document 1, as a semiconductor module in which the impedances of the current paths of a plurality of voltage-driven elements connected in parallel are equalized A method of avoiding the problem that a specific voltage-driven element is thermally destroyed by forming is proposed. In other words, by making the wiring pattern serving as a current path into the same shape, the current flowing through each voltage driven element is made uniform, and the steady loss generated in the voltage driven element is uniformly distributed, so that the voltage driven type It is possible to reduce the steady loss of the element, thereby preventing thermal destruction of the voltage driven element.

In this case, all of the plurality of voltage-driven elements connected in parallel as a semiconductor module are simultaneously turned on / off for each control period, and the semiconductor module is operated as one voltage-driven switching element, whereby a multi-phase inverter device To work as.
Japanese Patent Laid-Open No. 7-7958

  However, the technique disclosed in Patent Document 1 has the following problems.

  In a semiconductor module in which multiple voltage-driven elements are connected in parallel, the impedance on the circuit between the voltage-driven elements is set to the same value, thereby reducing steady loss and preventing thermal destruction of the voltage-driven elements. However, since attention is paid only to steady-state loss, no consideration has been given to switching loss, which is another cause of power loss of voltage-driven elements, and thermal destruction can be prevented. There is a problem of being incomplete.

  In other words, the gate threshold value at the time of turning on / off the voltage-driven element usually varies depending on variations between semiconductor elements, etc., and it is difficult to make the switching loss uniform at the time of turning on / off the gate. is there. Therefore, when all the voltage driven elements are turned on at the same time, the current flows in a voltage driven element having a low gate threshold, and the switching loss of the voltage driven element is another element connected in parallel. There is still the possibility of causing thermal destruction.

  The present invention has been made in view of such circumstances, and realizes a voltage-driven switching circuit, a multiphase inverter device, and a voltage-driven switching control method that can easily avoid thermal destruction of a voltage-driven element. The purpose is that.

  In order to solve the above-described problem, the present invention includes a plurality of gate driving units corresponding to a plurality of voltage-driven elements connected in parallel, and based on instructions from a control unit that controls a switching operation in advance. A plurality of voltage-driven elements connected in parallel by inputting a PWM signal to one or more gate driving units arbitrarily selected from among the plurality of gate driving units for each predetermined control period The corresponding one or more voltage-driven elements are driven.

  According to the voltage-driven switching circuit, the multiphase inverter device, and the voltage-driven switching control method of the present invention, a plurality of gate drive units each corresponding to a plurality of voltage-driven elements connected in parallel are provided, and a plurality of gates are provided. Since the driving unit can be driven independently, it is possible to perform alternate driving in which any one or a plurality of selected voltage-driven elements are sequentially switched and driven at predetermined control periods. A highly reliable switching operation that can easily avoid thermal destruction can be performed.

  DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of a voltage-driven switching circuit, a multiphase inverter device, and a voltage-driven switching control method according to the present invention will be described below in detail with reference to the drawings.

(First embodiment)
First, a first embodiment of a voltage driven switching circuit according to the present invention will be described.

(Configuration of this embodiment)
First, an example of the configuration of the voltage-driven switching circuit according to the present invention will be described with reference to FIG. FIG. 1 is a circuit diagram showing the configuration of the first embodiment as a configuration example of a voltage-driven switching circuit according to the present invention, and is an IGBT (Insulated Gate Bipolar Transistor) that is one of voltage-driven elements. A circuit configuration including a semiconductor module 10 using a plurality of transistors) and an IGBT gate drive circuit 11 is shown. In the present embodiment, the case where an IGBT is used as the voltage-driven element is shown. However, the present invention is not limited to such a case. For example, a MOS power transistor may be used. .

  The semiconductor module 10 includes a plurality of (three in the example of FIG. 1) IGBTs (Q1) to (Q3) connected in parallel as voltage-driven elements, and each IGBT (Q1) to (Q3) is connected to each other. The gate terminals (G1) to (G3) are connected to the gate drive circuit 11.

  The gate drive circuit 11 includes a plurality of gate drive units corresponding to each of the plurality of voltage drive type element IGBTs (Q1) to (Q3), and has a push-pull configuration as a gate drive part for the voltage drive type element IGBT (Q1). The Pch MOSFET (Q4) and the Nch MOSFET (Q5) of the PchMOSFET (Q6) and the Nch MOSFET (Q7) of the push-pull configuration are used as the gate drive unit for the voltage drive type IGBT (Q2). As gate drive units, push-pull PchMOSFETs (Q8) and NchMOSFETs (Q9) are respectively arranged.

  A plurality of gate drive units, that is, push-pull PchMOSFETs (Q4), (Q6), (Q8) and NchMOSFETs (in accordance with instructions from a control unit that controls the switching operation of the voltage-driven switching circuit shown in FIG. Q5), (Q7), and (Q9) are connected in parallel by inputting a PWM signal to one or more arbitrarily selected gate drive units, that is, push-pull PchMOSFETs and NchMOSFETs. Among the plurality of voltage driven elements IGBTs (Q1) to (Q3), the corresponding one or more voltage driven elements IGBT are driven.

  Here, the gate terminal (G1) of the IGBT (Q1) is connected to the power supply voltage Vcc via the PchMOSFET (Q4) and the resistor R1, and to the reference potential Vee via the NchMOSFET (Q5) and the resistor R1. In addition, the Pch MOSFET (Q4) and the Nch MOSFET (Q5) have a push-pull configuration. Similarly, the gate terminal (G2) and the gate terminal (G3) of the IGBT (Q2) and IGBT (Q3) are supplied via the PchMOSFET (Q6) and the resistor R2, and the PchMOSFET (Q8) and the resistor R3, respectively. It is connected to Vcc, and is connected to a reference potential Vee through an Nch MOSFET (Q7) and a resistor R2, an Nch MOSFET (Q9) and a resistor R3, respectively. Further, a Pch MOSFET (Q6), an Nch MOSFET (Q7), and a PchMOSFET ( Q8) and the Nch MOSFET (Q9) each have a push-pull configuration.

  The reference potential Vee is the same potential as the emitter terminal (E) taken out from the IGBTs (Q1) to (Q3) and commonly connected thereto, and is the reference potential of the gate drive circuit 11.

  Furthermore, the gate terminal of the Pch MOSFET (Q4) is connected to the output terminal of a photocoupler IC (I1) that performs insulation transmission of a PWM signal that has been subjected to pulse width modulation (PWM). Here, the output terminal of the photocoupler IC (I1) is pull-up connected to the power source Vcc via the resistor R4. Similarly, the gate terminals of PchMOSFET (Q6) and PchMOSFET (Q8) are connected to the output terminals of photocoupler IC (I2) and photocoupler IC (I3), respectively, and photocoupler IC (I2) and photocoupler. Each output terminal of the IC (I3) is pulled up to the power source Vcc via a resistor R5 and a resistor R6.

  The gate terminals of the push-pull PchMOSFET (Q4) and NchMOSFET (Q5) are connected to the input signal terminal 1 via the photocoupler IC (I1), and the PWM input signal PWM1 causes the PchMOSFET (Q4) to The NchMOSFET (Q5) can be turned on / off.

  Similarly, the gate terminals of the Pch MOSFET (Q6) and the Nch MOSFET (Q7) having the push-pull configuration and the gate terminals of the Pch MOSFET (Q8) and the Nch MOSFET (Q9) having the push-pull configuration are respectively connected to the photocoupler IC ( I2) and photocoupler IC (I3) are connected to input signal terminal 2 and input signal terminal 3, respectively, and PchMOSFET (Q6), NchMOSFET (Q7), PchMOSFET ( Q8) and NchMOSFET (Q9) can be turned on / off, respectively.

  In other words, in the configuration example of the voltage-driven switching circuit shown in FIG. 1, any one of the IGBTs (Q1) to (Q3) of the plurality of voltage-driven elements connected in parallel is sequentially turned on / off for each predetermined control cycle. In order to turn off, PchMOSFETs (Q4), (Q6), (Q8) and NchMOSFETs (Q5) of the gate drive circuit 11 by PWM drive using input signals PWM1 to PWM3 input from the outside to the gate drive circuit 11. ), (Q7), and (Q9) are sequentially turned on / off, and any one of the IGBTs (Q1) to (Q3) of the voltage driving elements forming the semiconductor module 10 is turned on. It is configured to be switched on and off sequentially.

  Here, the input signals PWM1 to PWM3 input from the PWM generation circuit 12 installed outside the gate drive circuit 11 will be described in detail later, but the IGBT (Q1) of the voltage drive element is set for each predetermined control cycle. ) To (Q3) are signals for alternating driving for switching and driving in order.

(Operation of this embodiment)
Next, the operation in the configuration example of the voltage-driven switching circuit in FIG. 1 will be described.

  First, voltage-driven element IGBTs (Q1) to (Q3) shown in the configuration example of FIG. 1 (that is, a voltage-driven switching circuit having a parallel connection that is switched on / off by PWM driving via a gate driving circuit 11). A multi-phase inverter device including at least a parallel circuit in which two semiconductor modules 10) having IGBTs (Q1) to (Q3) are connected in series to form a series circuit and the series circuits are connected in parallel for the number of phases. The power loss in the IGBT when the electric motor is operated will be described.

  In general, the total power loss of the IGBT is represented not only by the steady loss but also by the sum of the switching loss and the steady loss as described above. Here, in the three-phase inverter device when the number of phases of the multiphase inverter device is three, the switching loss (Psw) and the steady loss (Psat) per element are expressed by the following equations (1): As well as the formula (2). Here, the case where each IGBT which comprises a three-phase inverter apparatus is comprised by one element is shown.

Psw = (1 / π) × Esw × fc (1)
Psat = Icp × Vce × {1/8 + (D × cos θ / 3 / π)} (2)
Here, the meaning of each parameter is as follows.

Esw: Loss per switching pulse fc: PWM drive frequency (carrier frequency)
Icp: IGBT collector current peak value Vce: IGBT collector voltage Vce = Vce1 (Vce at Icp) × sinx (x: phase)
D: Modulation rate cos θ: Power factor As shown in equations (1) and (2), the switching loss (Psw) is proportional to the PWM drive frequency fc (hereinafter also referred to as carrier frequency), The steady loss (Psat) is proportional to the collector current value (collector current peak value Icp).

  FIG. 2 is a time chart showing an example of the operation in the first embodiment of the present invention. In the configuration example of the voltage-driven switching circuit, that is, the semiconductor module 10 and the gate drive circuit 11 in FIG. The collector current waveforms of the voltage driven elements IGBT (Q1) to (Q3) when the PWM3 is sequentially turned on / off for each predetermined control cycle are shown.

  As shown in FIG. 2, the corresponding IGBTs (Q1) to (Q3) are sequentially switched on by alternately driving the input signals PWM1 to PWM3 in a predetermined order at predetermined control cycles. Accordingly, the collector current flows only to the IGBT that is switched on. In other words, the collector current Ic flowing into the semiconductor module 10 in FIG. 1 is only one of the IGBTs (Q1) to (Q3) connected in parallel, which is sequentially switched on in each control cycle and is turned on. All will be energized.

  Thus, by switching the IGBTs that are sequentially switched according to the control cycle, the switching loss is equally distributed to each of the IGBTs (Q1) to (Q3) connected in parallel. It is possible to prevent a situation in which switching loss increases and causes thermal destruction only in the IGBT.

  On the other hand, in order to suppress the heat generation of the IGBTs (Q1) to (Q3), that is, the semiconductor module 10, as in the prior art, all the IGBTs (Q1) to (Q3) connected in parallel are simultaneously turned on / off. In the case where the collector current Ic is operated so that the current is equally applied to the IGBTs (Q1) to (Q3), as described above, the causes of variations in the gate threshold values of the IGBTs (Q1) to (Q3), etc. As a result, the current load increases only for the specific IGBT, and as a result, the switching loss of the specific IGBT increases and there is a risk of causing thermal destruction.

  On the other hand, in the case of the present embodiment, as described above, the IGBTs (Q1) to (Q3) are sequentially switched on by alternately driving with the PWM1 to PWM3 that are sequentially turned on every control cycle. Thus, it is possible to reliably prevent a situation in which switching loss increases only in a specific IGBT and causes thermal destruction.

  However, since the collector current Ic flowing into the semiconductor module 10 as shown in FIG. 2 is all energized to one IGBT every control cycle, the collector current of the IGBT to be energized is all the plurality of IGBTs every control cycle. As compared with the case where the two are simultaneously turned on / off, the steady loss (Psat) becomes large as shown in the equation (2).

  For this reason, as shown in FIG. 2, it is also important to specify conditions for switching IGBTs (Q1) to (Q3) alternately for each control period.

  For example, in the case of IGBT power loss, the switching loss (Psw) is dominant as compared to the steady loss (Psat), and the power loss of the IGBT increases to cause thermal destruction. Only when the condition is satisfied, as described above, the IGBTs (Q1) to (Q3) may be alternately switched for each control cycle and alternately driven to turn on in turn. On the other hand, in the case of other conditions in which such a condition is not satisfied, the IGBTs (Q1) to (Q3) are all switched at the same time for each control cycle so as to perform simultaneous driving to turn on / off. By performing such control, it is possible to suppress the total power loss of the IGBT and enable stable operation of the multiphase inverter device.

  As shown in FIG. 1, a plurality of gate drive units, that is, push-pull PchMOSFETs (Q4), (Q6), (Q8) and NchMOSFETs corresponding to the plurality of voltage driven elements IGBTs (Q1) to (Q3), respectively. In the voltage-driven switching circuit including (Q5), (Q7), and (Q9), the control unit that controls the switching operation of the voltage-driven switching circuit includes a plurality of gate drive units, that is, push-pull PchMOSFETs (Q4 ), (Q6), (Q8) and NchMOSFETs (Q5), (Q7), (Q9) are instructed to input a PWM signal to one or more arbitrarily selected gate drive units. Thus, any one to a plurality of voltage-driven elements I corresponding among the plurality of voltage-driven elements IGBTs (Q1) to (Q3) connected in parallel. It is possible to drive the BT.

  As described above, the control unit that controls the switching operation of the voltage-driven switching circuit selects and drives one or more of the plurality of voltage-driven elements IGBT (Q1) to (Q3) connected in parallel. Therefore, it is also possible to control the operation of the voltage-driven switching circuit between the alternating operation and the simultaneous operation by setting the specific condition as described above. An example of an operation in the case of controlling by switching between alternating drive and simultaneous drive based on a condition set in advance as the condition will be described below with reference to operation flowcharts of FIGS. 3 and 4.

  FIG. 3 is an operation flowchart for explaining an example of the operation in the first embodiment of the present invention. In order to control the electric motor to an arbitrary operation state desired, the switching is performed as a specific condition as described above. An example of controlling the voltage-driven element constituting the multiphase inverter device, that is, the driving method of the IGBT, and controlling the output current from the IGBT by comparing the loss (Psw) and the steady loss (Psat) is shown. ing.

  In FIG. 3, a current command is used as a control command so that a predetermined output current desired for the multiphase inverter device, that is, an output current from the voltage-driven elements IGBT (Q1) to (Q3), is obtained at an arbitrary time. When the value (Ia) is input, the control unit that controls the switching control first includes the switching loss (Psw) of the voltage-driven elements IGBT (Q1) to (Q3) at the input current command value (Ia). The steady loss (Psat) is compared (step S1).

  If the switching loss (Psw) is larger than the steady loss (Psat) (YES in step S1), the process branches to step S2, and the switching loss (Psw) between IGBTs (Q1) to (Q3) does not occur. As described above, the IGBT alternate driving is performed so that only one IGBT is sequentially driven every control cycle (step S2).

  On the other hand, when the switching loss (Psw) is not larger than the steady loss (Psat) (NO in step S1), the process branches to step S3, and the switching loss (Psw) between the IGBTs (Q1) to (Q3) is increased. Rather than preventing imbalance, by distributing the collector current evenly between the IGBTs (Q1) to (Q3), the burden of the steady loss (Psat) of the IGBTs (Q1) to (Q3) is reduced. In order to reduce the total power loss of the IGBTs (Q1) to (Q3), the IGBT simultaneous driving for simultaneously driving all the IGBTs (Q1) to (Q3) every control period is performed (step S3).

  By performing such an operation, the voltage-driven switching circuit can reduce the total power loss of the voltage-driven elements IGBT (Q1) to (Q3), and can perform a stable operation without causing thermal destruction. it can.

  Next, the operation flowchart of FIG. 4 will be described.

  Also in FIG. 4, as in FIG. 3, in order to control the electric motor to a desired arbitrary operation state, a voltage-driven element, that is, an IGBT driving method that constitutes the multiphase inverter device under the specific conditions as described above. Is a flowchart showing an example in which the output current from the IGBT is controlled, but an example different from the above-described FIG. 3 is described.

  In FIG. 4, a current command value (Ia) is input as a control command so that a desired predetermined inverter output current, that is, an output current from the voltage-driven elements IGBT (Q1) to (Q3), is input at an arbitrary time. In this case, the control unit that controls the switching control firstly collects the input current command value (Ia) and the collector current value at which the switching loss (Psw) between the IGBTs (Q1) to (Q3) becomes significant. A predetermined current command value (Ia1) preset as a current command value corresponding to (Ic1), that is, an unbalanced generated current value is compared (step S11).

  If the input current command value (Ia) is larger than the predetermined current command value (Ia1) (YES in step S11), the process branches to step S12, and then the switching loss between IGBTs (Q1) to (Q3). In order to determine whether or not the switching loss (Psw) between the IGBTs (Q1) to (Q3) is more dominant than the steady loss (Psat) when the (Psw) imbalance is significant. In addition, the carrier frequency (PWM drive frequency: fc) that is proportional to the switching loss (Psw) is controlled by a predetermined carrier frequency (fc1), that is, the switching loss (Psw) is more dominant than the steady loss (Psat). A threshold frequency set in advance as a target frequency is compared (step S12).

  Here, as described above, the predetermined carrier frequency (fc1) uses the carrier frequency (fc) that is proportional to the switching loss (Psw) and uses the carrier frequency (fc) of the voltage-driven elements IGBT (Q1) to (Q3). The minimum carrier frequency (PWM drive frequency) value at which the switching loss (Psw) is dominant as the power loss of the voltage-driven elements IGBT (Q1) to (Q3) is preset as the threshold frequency. is there.

  If the carrier frequency fc is larger than the predetermined carrier frequency (fc1) (YES in step S12), the process branches to step S13, and the switching loss (Psw) of the IGBTs (Q1) to (Q3) becomes the steady loss (Psat). In order to prevent the switching loss (Psw) imbalance between the IGBTs (Q1) to (Q3) from becoming more prominent in a state that is dominant, only one IGBT is driven in order for each control period. IGBT alternate drive is performed (step S13).

  On the other hand, when the input current command value (Ia) is not larger than the predetermined current command value (Ia1) (NO in step S11), or when the carrier frequency fc is not larger than the predetermined carrier frequency (fc1). (NO in step S12), branching to step S14, the collector between IGBT (Q1) and (Q3) is prevented rather than preventing the imbalance of the switching loss (Psw) between IGBT (Q1) and (Q3). In order to reduce the total power loss of IGBT (Q1) to (Q3) by reducing the burden of steady loss (Psat) of IGBT (Q1) to (Q3) by distributing current evenly , IGBTs (Q1) to (Q3) are all driven at the same time for each control period, and IGBT simultaneous driving is performed (step S14).

  By switching between IGBT alternate drive and IGBT simultaneous drive using specific conditions as shown in the operation flowcharts of FIGS. 3 and 4, while avoiding thermal breakdown due to an imbalance of IGBT power loss, etc. Stable operation of the inverter device becomes possible.

  Next, in the control unit that controls the switching operation of the voltage-driven switching element, the specific conditions for switching and selecting the IGBT alternate drive and the IGBT simultaneous drive are different from those in FIG. 3 and FIG. A method of selecting using unique characteristics will be described. FIG. 5 is an IV characteristic diagram showing the relationship between the collector current (Ic) of the IGBT and the collector-emitter voltage (Vce) as a characteristic unique to the IGBT. In FIG. 5, the solid line is a curve showing the IV characteristics when the IGBT temperature is normal temperature, and the broken line is a curve showing the IV characteristics when the IGBT temperature is higher than normal temperature.

  As shown in FIG. 5, as the temperature characteristic peculiar to the IGBT, there is a point A where the IV characteristic curve when the IGBT temperature is normal temperature and the IV characteristic curve when the IGBT temperature is higher than normal temperature cross each other. .

  Hereinafter, a situation in which the power loss of the IGBT is different from the cross point A in FIG. 5 will be described using the IGBTs (Q1) to (Q3) connected in parallel as shown in FIG. 1 as an example. Here, the value of the collector current at the cross point A is expressed as a cross point collector current value (IcA). Furthermore, the collector current value (IcA) when the collector current of the same value flows at the same collector-emitter voltage (Vce) at the normal temperature and at a higher temperature than the normal temperature is defined as the threshold current.

  That is, when the collector current (Ic) is less than the cross-point collector current value (IcA) defined as the threshold current, the collector-emitter voltage (Vce) when the same collector current (Ic) flows is higher than that at room temperature. If the collector current (Ic) is equal to or greater than the cross-point collector current value (IcA) defined as the threshold current, the collector-emitter current flows when the same collector current (Ic) flows. The voltage (Vce) is larger at a higher temperature than at a normal temperature.

  Next, consider the case of simultaneous driving in which a plurality of IGBTs (Q1) to (Q3) connected in parallel as shown in FIG. 1 are simultaneously driven.

  Here, when the gate threshold values of the respective IGBTs (Q1) to (Q3) are different, as described above, an imbalance occurs in the current at the time of switching. Therefore, only the switching loss (Psw) of the specific IGBT is generated. Will increase. As a result, the amount of heat generated by the switching loss is increased in the IGBT in which the imbalance in the switching loss (Psw) of the IGBT becomes significant.

  Thus, when the IGBT collector current (Ic) is less than the cross-point collector current value (IcA) at the cross-point A in FIG. The collector-emitter voltage (Vce) of the IGBT that has become higher than the normal temperature tends to shift in a decreasing direction (see FIG. 5).

  For this reason, since the energization current to the IGBT having a large heat generation amount is further increased, the steady loss (Psat) is increased, and the loss imbalance between the IGBTs is further increased. Therefore, when the IGBT collector current (Ic) is less than the cross-point collector current value (IcA), the plurality of IGBTs (Q1) to (Q3) connected in parallel as shown in FIG. It is effective to reduce the switching loss (Psw) imbalance by adopting the IGBT alternate driving in which the IGBTs (Q1) to (Q3) are sequentially switched every control period.

  On the other hand, when the collector current of the IGBT is equal to or greater than the cross-point collector current value (IcA) at the cross-point A in FIG. 5, the switching loss (Psw) increases due to the IV temperature characteristics of the IGBT and heat is generated. As the amount increases, the collector-emitter voltage (Vce) of the IGBT that has become higher than normal temperature tends to increase (see FIG. 5).

  For this reason, since the energization current to the IGBT having a large calorific value is reduced, the steady loss (Psat) is reduced and the loss imbalance between the IGBTs is reduced. Accordingly, when the IGBT collector current (Ic) is equal to or greater than the cross-point collector current value (IcA), the plurality of IGBTs (Q1) to (Q3) connected in parallel as shown in FIG. By adopting the IGBT simultaneous drive that simultaneously operates the IGBTs (Q1) to (Q3) in each control cycle, the switching loss (Psw) imbalance cannot be reduced, but the steady loss (Psat) is reduced. Can behave like this. This is particularly effective when the steady loss (Psat) is more dominant than the switching loss (Psw).

  As described above with reference to FIG. 5, the control unit responsible for switching control has an IGBT-specific characteristic that the IV characteristic curve intersects at normal temperature and high temperature due to the IV temperature characteristic of the IGBT. Using the specified IGBT's collector current (Ic), the IGBT alternate drive based on whether or not the collector-emitter voltage (Vce) is operating below the crossing point collector current value (IcA) It is effective to select whether to perform simultaneous driving or IGBT.

In the above description of the first embodiment, a case has been described in which alternating driving is performed for three IGBTs (Q1) to (Q3) connected in parallel. However, power-driven elements connected in parallel, for example, IGBTs May be composed of two or more arbitrary numbers, and the alternate drive is performed only when the number of IGBTs to be driven in turn in each control cycle is one. As described above, a plurality of voltage-driven elements connected in parallel are grouped into one or more, and one or more voltage-driven elements are selected and driven in order for each control period. You may make it do.
(Second Embodiment)
Next, a second embodiment of the voltage driven switching circuit according to the present invention will be described.

(Configuration of this embodiment)
First, an example different from FIG. 1 of the configuration of the voltage-driven switching circuit according to the present invention will be described with reference to FIG. FIG. 6 is a circuit diagram showing the configuration of the second embodiment as a configuration example of a voltage-driven switching circuit according to the present invention. Like FIG. 1, a semiconductor using a plurality of IGBTs which are one of voltage-driven elements. It consists of two blocks, a module 20 and an IGBT gate drive circuit 21. However, unlike the case of FIG. 1, the configuration of FIG. 6 is for the alternate drive as described in FIGS. 1 and 2 as the first embodiment from one PWM signal input to the gate drive circuit 21. The PWM signal (PWM_A, PWM_B, PWM_C) is generated.

  The semiconductor module 20 is configured by connecting a plurality of IGBTs (Q11) to (Q13) in parallel in the example of FIG. 6 as in FIG. 1 and each IGBT (Q11) to (Q13) is connected in parallel. The gate terminals (G11) to (G13) are connected to the gate drive circuit 21.

  As in FIG. 1, the gate terminal (G11) of the IGBT (Q11) is connected to the power supply voltage Vcc via the PchMOSFET (Q14) and the resistor R11, and is connected to the reference potential via the NchMOSFET (Q15) and the resistor R11. The PchMOSFET (Q14) and the NchMOSFET (Q15) are in a push-pull configuration. Similarly, the gate terminal (G12) and the gate terminal (G13) of the IGBT (Q12) and IGBT (Q13) are supplied via the PchMOSFET (Q16) and the resistor R12, and the PchMOSFET (Q18) and the resistor R13, respectively. And connected to the reference potential Vee via the NchMOSFET (Q17) and the resistor R12, the NchMOSFET (Q19) and the resistor R13, respectively. Further, the PchMOSFET (Q16), the NchMOSFET (Q17), and the PchMOSFET ( Q18) and the Nch MOSFET (Q19) each have a push-pull configuration.

  Here, the reference potential Vee is the same potential as the emitter terminal (E) taken out from the IGBTs (Q11) to (Q13) and commonly connected thereto, and is the reference potential of the gate drive circuit 21.

  The above configuration is exactly the same as in FIG. 1, but the circuit configuration described below generates three PWM signals of PWM_A, PWM_B, and PWM_C for IGBT alternate driving from one input PWM signal. The circuit block has a configuration different from that shown in FIG. First, the gate terminal of the Pch MOSFET (Q14) is connected to the output terminal of the three-state NOT element (I13). Similarly, the gate terminals of the Pch MOSFET (Q16) and the Pch MOSFET (Q18) are connected to the output terminals of the three-state NOT element (I14) and the three-state NOT element (I15), respectively.

  Here, the control terminal (S1) of the three-state NOT element (I13), the control terminal (S2) of the three-state NOT element (I14), and the control terminal (S3) of the three-state NOT element (I15) are all The output terminal of the photocoupler (I12) via the NOT element (I30) is connected. When the inputs to the control terminal (S1), the control terminal (S2), and the control terminal (S3) are at the Hi level, the three-state NOT element (I13), the three-state NOT element (I14), and the three-state NOT element The output of (I15) is permitted, and conversely, when it is at the Lo level, the output is inhibited, that is, the state is in a high impedance (HiZ) state.

  Here, when the output of the three-state NOT element (I13), the three-state NOT element (I14), and the three-state NOT element (I15) is permitted, the three-state NOT element (I13) and the three-state NOT element (I14), respectively. ), The signal level input to the three-state NOT element (I15) is inverted and output.

  Note that the control element (S1) of the three-state NOT element (I13), the control terminal (S2) of the three-state NOT element (I14), and the control terminal (S3) of the three-state NOT element (I15) are respectively connected to the NOT element ( The photocoupler (I12) that is output via I30) has a control signal for selecting whether to drive each of the IGBTs (Q11) to (Q13) alternately or simultaneously as a SELECT signal. Entered. The output terminal of the photocoupler (I12) is connected to the power supply Vcc via a resistor R14.

  Also, signal input terminals for inputting a PWM signal as one input signal are a push-pull PchMOSFET (Q14) and NchMOSFET (through an optocoupler (I11) and a three-state NOT element (I29), respectively. Q15), PchMOSFET (Q16) and NchMOSFET (Q17), and PchMOSFET (Q18) and NchMOSFET (Q19) are connected to the respective gate terminals.

  With this circuit configuration, the PchMOSFET (Q14) and NchMOSFET (Q15), the PchMOSFET (Q16) and NchMOSFET (Q17), and the PchMOSFET (Q18) are turned on / off according to on / off of the PWM signal input to the photocoupler (I11). ) And the Nch MOSFET (Q19) can be turned on / off, respectively.

  Here, the control signal output from the photocoupler (I12) input as the SELECT signal is input to the control terminal (S4) of the three-state NOT element (I29).

  Next, three drive signals (PWM_A, PWM_B, PWM_C) necessary for alternately driving the IGBTs (Q11) to (Q13) are generated from one PWM signal input to the photocoupler (I11). The PWM generation circuit 22 will be described.

  The PWM generation circuit 22 includes a counter unit 23 that counts a PWM signal input to the photocoupler (I11) as a clock signal (CLK), and a logic generation unit 24.

  The counter unit 23 is formed by connecting two flip-flops (I16) and (I17) in series. The output terminal of the photocoupler (I11) to which the PWM signal is inputted is connected to the flip-flop (I16) and the flip-flop (I17) so that a time difference is generated between the PWM signals inputted as the clock signal (CLK). The output terminal of the photocoupler (I11) is directly connected to the clock terminal of the I17), whereas the output terminal of the photocoupler (I11) functions as a delay element to the clock terminal of the flip-flop (I16). They are connected via (I18) and (I19).

  The output terminals (DOUT1) and (DOUT2) of the flip-flops (I16) and (I17) are connected to the input terminal of the NOR element (I20), and the output terminal of the NOR element (I20) is the flip-flop (I16). To the input terminal (DIN1).

  On the other hand, the logic generation unit 24 uses the output signals from the flip-flops (I16) and (I17) of the counter unit 23 and the PWM signal output via the photocoupler (I11) to determine a predetermined control cycle. In addition, three PWM signals (PWM_A, PWM_B, PWM_C) that are turned on in order are generated.

  That is, in the logic generation unit 24, the output terminals (DOUT1) and (DOUT2) of the flip-flops (I16) and (I17) of the counter unit 23 are connected to the NAND element (I22), the NOT element (I25), and the AND element ( To the input terminal of the NAND element (I22), the AND element (I24), and the NOT element (I28). The output terminals of the NOT element (I25) and NOT element (I28) are connected to the input terminals of the AND element (I24) and AND element (I27).

  The output terminals of the NAND element (I22), the AND element (I24), and the AND element (I27) are connected to the input terminals of the AND element (I21), the AND element (I23), and the AND element (I26). . The output terminal of the photocoupler (I11) to which the PWM signal is input is connected to the other input terminals of the AND element (I21), the AND element (I23), and the AND element (I26).

  The output terminals of the AND element (I21), the AND element (I23), and the AND element (I26) are connected to the input terminals of the three-state NOT element (I13), the three-state NOT element (I14), and the three-state NOT element (I15). Is done.

  As a result, the three PWM signals (PWM_A, PWM_B, and PWM_C) for alternate driving respectively output from the output terminals of the AND element (I21), the AND element (I23), and the AND element (I26) are three-state NOT. It is input to the element (I13), the three-state NOT element (I14), and the three-state NOT element (I15).

(Operation of this embodiment)
Next, an example of the operation in the configuration example of the voltage-driven switching circuit of FIG. 6, that is, the gate drive circuit of the voltage-driven element will be described with reference to FIG.

  FIG. 7 is a time chart showing an example of the operation in the second embodiment of the present invention, and shows the IGBT alternate drive operation and the IGBT simultaneous drive operation in the configuration example of FIG. As shown in FIG. 7, as long as the SELECT signal is at the Hi level, the logic generation unit 24 has the counter values (DOUTl) and (DOUTl) counted by the two flip-flops (I16) and (I17) of the counter unit 23. Using the output of DOUT2), three PWM signals (PWM_A, PWM_B, PWM_C) for alternating driving that are sequentially switched from one input PWM signal are generated, and IGBT (Q11) is generated for each control period. ) To (Q13), any one IGBT is sequentially switched to the ON state. As a result, the IGBT alternate drive operation in which the collector current of the semiconductor module 20 flows concentrically only in the on-state IGBT, and the operation to avoid the switching loss (Psw) imbalance becomes effective.

  On the other hand, when the voltage level of the SELECT signal is switched from the Hi level to the Lo level, the logic generation unit 24 switches from the IGBT alternate drive to the IGBT simultaneous drive operation, and the logic generation unit 24 inputs one input signal for each control cycle. All three PWM signals (PWM_A, PWM_B, PWM_C) for simultaneous driving are simultaneously generated from the PWM signal, and all of the IGBTs (Q11) to (Q13) are simultaneously switched on. As a result, the collector current of the semiconductor module 20 is switched to the IGBT simultaneous drive operation in which the collector current flows evenly distributed to the IGBTs (Q11) to (Q13), and the steady loss (Psat) of the IGBTs (Q11) to (Q13). Can be reduced.

Since the operation and effect of the voltage-driven switching circuit using the operation as described above is exactly the same as that described in the first embodiment, further description thereof is omitted here.
As described above in detail as the first embodiment and the second embodiment, in the present invention, a voltage-driven switching circuit (that is, a plurality of parallel-connected circuits) that performs a stable operation capable of avoiding thermal destruction. The semiconductor module having the voltage-driven element group and the gate drive circuit for driving each voltage-driven element can be realized.

  Furthermore, by applying the voltage-driven switching circuit as described in the first embodiment or the second embodiment to the multiphase inverter device, a highly reliable and stable inverter device can be realized, and the vehicle can be mounted. It can also be used sufficiently as a multiphase inverter device for an electric motor.

  That is, as a multi-phase inverter device, two voltage-driven switching circuits each having a plurality of voltage-driven elements connected in parallel and a plurality of gate-drive circuits that drive each of the plurality of voltage-driven elements are connected in series. The voltage-driven switching circuit applied to a multi-phase inverter device when the series circuit is further configured to include at least a parallel circuit connected in parallel by the number of phases according to the number of phases. Is constituted by any of the voltage-driven switching circuits described in the first and second embodiments, a stable multiphase inverter device capable of avoiding thermal destruction can be realized.

1 is a circuit diagram showing a configuration of a first embodiment as a configuration example of a voltage-driven switching circuit according to the present invention. It is a time chart which shows an example of the operation | movement in the 1st Embodiment of this invention. It is an operation | movement flowchart for demonstrating an example of the operation | movement in the 1st Embodiment of this invention. 5 is an operation flowchart for explaining an example different from FIG. 3 of the operation in the first embodiment of the present invention. It is the IV characteristic figure which showed the relationship between the collector current (Ic) of IGBT, and the collector-emitter voltage (Vce). It is a circuit diagram which shows the structure of 2nd Embodiment as a structural example of the voltage drive type switching circuit by this invention. It is a time chart which shows an example of the operation | movement in the 2nd Embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10,20 ... Semiconductor module, 11, 21 ... Gate drive circuit, 12, 22 ... PWM generation circuit, 23 ... Counter part, 24 ... Logic generation part, G1, G2, G3, G11, G12, G13 ... Gate terminal (IGBT ), I1, I2, I3, I11, I12 ... Photocoupler IC, I13, I14, I15 ... Three-state NOT element, I16, I17 ... Flip-flop, I18, I19 ... NOT element, I20 ... NOR element, I21 ... AND element , I22 ... NAND element, I23 ... AND element, I25 ... NOT element, I26, I27 ... AND element, I28 ... NOT element, I29 ... Three-state NOT element, I30 ... NOT element, Q1, Q2, Q3 ... IGBT, Q4 Q6, Q8 ... PchMOSFET, Q5, Q7, Q9 ... NchMOSFET, Q11 Q12, Q13 ... IGBT, Q14, Q16, Q18 ... PchMOSFET, Q15, Q17, Q19 ... NchMOSFET, Vcc ... power supply voltage, Vee ... reference potential.

Claims (17)

  In a voltage-driven switching circuit comprising a plurality of voltage-driven elements connected in parallel and a gate drive circuit for PWM driving the plurality of voltage-driven elements, the gate drive circuit is connected to each of the plurality of voltage-driven elements. Correspondingly, a plurality of gate driving units are provided, and each of the plurality of gate driving units is arbitrarily selected based on an instruction of a control unit that controls the switching operation of the voltage-driven switching circuit for each predetermined control period. By inputting a PWM signal to the selected one or more gate driving units, the corresponding one or more voltage driven elements among the plurality of voltage driven elements connected in parallel are driven. A voltage-driven switching circuit that is characterized.   The voltage-driven switching circuit according to claim 1, wherein the plurality of voltage-driven elements connected in parallel are made of IGBT.   Based on an instruction from the control unit, the PWM signal is supplied to a gate driving unit selected in order from one to a plurality of gate driving units among the plurality of gate driving units for each predetermined control cycle. 2 is input, alternating driving is performed by sequentially switching and driving one to a plurality of corresponding voltage-driven elements among the plurality of voltage-driven elements connected in parallel. 3. The voltage driven switching circuit according to 2.   The control unit determines that the switching loss in the voltage-driven element is larger than the steady-state loss when a current command value specifying the output current value of the plurality of voltage-driven elements connected in parallel flows. In this case, the PWM signal is input to the gate driving unit selected in order from one to a plurality of gate driving units among the plurality of gate driving units for each predetermined control cycle. Thus, alternate driving is performed in which the corresponding one or more voltage-driven elements are sequentially switched and driven. On the other hand, if it is determined that the switching loss is not greater than the steady loss, the plurality of gate drives Simultaneously, all of the plurality of voltage-driven elements connected in parallel are simultaneously driven by simultaneously inputting the PWM signal to all the units. Voltage-driven switching circuit according to claim 1 or 2, characterized in that the dynamic is performed.   A current command value for designating values of output currents of the plurality of voltage-driven elements is set in advance by the control unit as an output current in which unevenness in switching loss among the plurality of voltage-driven elements is significant. When it is determined that the PWM drive frequency that is greater than the imbalance occurrence current value and that indicates the control period is greater than a threshold frequency that is set in advance as a frequency at which the switching loss is dominant compared to the steady loss, Correspondingly, the PWM signal is input to each of the gate driving units sequentially selected from any one of the plurality of gate driving units for each of the predetermined control periods. Alternate driving is performed by sequentially switching one to a plurality of voltage-driven elements, while the current command value is the unbalanced current. If it is determined that the PWM drive frequency is not greater than the threshold frequency, or if it is determined that the PWM drive frequency is not greater than the threshold frequency, the PWM signal is simultaneously input to all of the plurality of gate drive units. The voltage-driven switching circuit according to claim 1, wherein simultaneous driving is performed in which all of the plurality of voltage-driven elements connected in parallel are simultaneously driven.   With respect to the temperature characteristics of the collector current and the collector-emitter voltage of the IGBT forming the voltage-driven element by the control unit, at the same collector-emitter voltage at room temperature and at a higher temperature than the room temperature. When it is determined that the collector current value of the IGBT is smaller than the threshold current when the collector current value when the collector current is the same value is a threshold current, a plurality of the gate driving units are provided for each predetermined control cycle. When the PWM signal is input to the gate driver selected in order from one to a plurality of gate drivers, the corresponding one or more voltage-driven elements are sequentially switched and driven. On the other hand, when it is determined that the collector current of the IGBT is not smaller than the threshold current, alternate driving is performed. 3. The simultaneous driving in which all of the plurality of voltage-driven elements connected in parallel are simultaneously driven by simultaneously inputting the PWM signal to all of the gate driving sections of claim 2 is performed. The voltage-driven switching circuit described.   The voltage-driven switching circuit according to claim 1, wherein the plurality of PWM signals are input from outside the gate driving circuit including the plurality of gate driving units.   Every one of the plurality of gate driving units from the one PWM signal input every predetermined control cycle, and each of the gate driving units selected in turn for each control cycle. A PWM generation circuit that generates a plurality of the PWM signals inputted to the gate drive circuit is built in the gate drive circuit, and one to a plurality of voltage drive elements are controlled by the control unit that controls the switching operation of the voltage drive switching circuit. When an alternating drive instruction signal for sequentially switching and driving is received, the control cycle is applied to the gate driver selected in order from any one of the plurality of gate drivers. A plurality of P generated by the PWM generation circuit built in the gate drive circuit based on one PWM signal input every time Voltage-driven switching circuit according to any one of claims 1 to 6, characterized in that M signals are sequentially inputted.   9. The voltage-driven switching circuit according to claim 1, wherein the plurality of voltage-driven elements connected in parallel are configured as a semiconductor module.   Two voltage-driven switching circuits each including a plurality of voltage-driven elements connected in parallel and a gate drive circuit having a plurality of gate drive units for PWM driving each of the plurality of voltage-driven elements are connected in series. 10. The voltage-driven switching circuit according to claim 1, wherein the voltage-driven switching circuit is formed in a multiphase inverter device including at least a parallel circuit in which a circuit is formed and the series circuits are connected in parallel for the number of phases. A multiphase inverter device comprising a type switching circuit.   In the voltage-driven switching control method for controlling a voltage-driven switching circuit comprising a plurality of voltage-driven elements connected in parallel and a gate drive circuit for PWM driving the plurality of voltage-driven elements, the gate drive circuit includes: By providing a plurality of gate driving units corresponding to each of the plurality of voltage driven elements, one or more gate driving units arbitrarily selected from the plurality of gate driving units for each predetermined control period A voltage-driven switching control method comprising driving one or more corresponding voltage-driven elements among the plurality of voltage-driven elements connected in parallel by inputting a PWM signal to the unit.   The voltage-driven switching control method according to claim 11, wherein the plurality of voltage-driven elements connected in parallel are made of IGBT.   Corresponding among a plurality of voltage-driven elements connected in parallel by inputting the PWM signal to a gate driver selected in order from one to a plurality of gate drivers among the plurality of gate drivers. 13. The voltage-driven switching control method according to claim 11 or 12, wherein one or a plurality of voltage-driven elements to be driven are alternately switched and sequentially driven.   When the current of a current command value that specifies the value of the output current of the plurality of voltage-driven elements connected in parallel flows and the switching loss in the voltage-driven element is larger than the steady loss, the predetermined control By inputting the PWM signal to one of the plurality of gate driving units selected in order from one to a plurality of gate driving units in each cycle, the corresponding one or more voltage driving types are provided. When the switching loss is not larger than the steady loss, the parallel connection is achieved by simultaneously inputting the PWM signal to all of the plurality of gate driving units. The simultaneous driving for simultaneously driving all of the plurality of the voltage-driven elements is performed. Pressure driven switching control method.   The current command value that specifies the value of the output current of the plurality of voltage-driven elements is an imbalance occurrence current value that is preset as an output current in which the non-uniformity of the switching loss among the plurality of voltage-driven elements becomes significant And the PWM drive frequency indicating the control period is greater than a threshold frequency that is preset as a frequency at which the switching loss is dominant compared to the steady loss, for each predetermined control period, By sequentially inputting the PWM signal to the gate driving unit selected in order from one to a plurality of gate driving units among the plurality of gate driving units, the corresponding one to a plurality of voltage driven elements are sequentially switched. On the other hand, if the current command value is not larger than the imbalance occurrence current value, or When the WM drive frequency is not greater than the threshold frequency, the PWM signals are simultaneously input to all the plurality of gate drive units, thereby simultaneously driving all of the plurality of voltage-driven elements connected in parallel. The voltage-driven switching control method according to claim 11 or 12, wherein driving is performed.   Regarding the temperature characteristics of the collector current and the collector-emitter voltage of the IGBT forming the voltage-driven element, the collector current having the same value at the same collector-emitter voltage at normal temperature and at a higher temperature than the normal temperature. When the collector current value of the IGBT is smaller than the threshold current when the collector current value is a threshold current, any one to a plurality of gates out of the plurality of gate driving units for each predetermined control period By inputting the PWM signal to the gate drive unit selected in turn for each drive unit, the corresponding one or a plurality of voltage-driven elements are sequentially switched and driven, while the collector current of the IGBT is Is not smaller than the threshold current, the PWM signal is applied to all of the plurality of gate drivers. By inputting sometimes voltage-driven switching control method according to claim 12, characterized in that simultaneous driving that drives all of the plurality of the voltage-driven type element connected in parallel at the same time.   From one PWM signal input every predetermined control cycle, every one to a plurality of gate drive units among the plurality of gate drive units are sequentially selected for each control cycle. When a PWM generation circuit for generating a plurality of input PWM signals is further incorporated in the gate drive circuit, an alternate drive instruction signal for sequentially switching and driving one to a plurality of voltage drive elements is performed. The gate drive circuit based on one PWM signal input for each control period with respect to a gate drive unit selected in order from one to a plurality of gate drive units among the plurality of gate drive units The plurality of PWM signals generated by the built-in PWM generation circuit are sequentially input. Voltage-driven switching control method according to.

Images