JP2007048784A - Chip resistor and its manufacturing method - Google Patents

Chip resistor and its manufacturing method Download PDF

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JP2007048784A
JP2007048784A JP2005228764A JP2005228764A JP2007048784A JP 2007048784 A JP2007048784 A JP 2007048784A JP 2005228764 A JP2005228764 A JP 2005228764A JP 2005228764 A JP2005228764 A JP 2005228764A JP 2007048784 A JP2007048784 A JP 2007048784A
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resistor
electrode
chip resistor
chip
insulating substrate
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Shoichi Muramoto
昭一 村本
Orie Shinohara
おりえ 篠原
Yumiko Okubo
裕美子 大久保
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Tateyama Kagaku Kogyo Co Ltd
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Tateyama Kagaku Kogyo Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a chip resistor of low resistance which has a simple structure, can mount a resistor toward a circuit board-side, has sufficient detergency after mounting, and cannot easily be influenced by heat due to heat generation of the resistor. <P>SOLUTION: A pair of surface electrodes 14 are formed on a surface of an insulating substrate 12, and resistors 16 and 17 are arranged between surface electrodes 14. Support projections 30 which project rather than the surface side of the resistor 17 are formed on the surface electrodes 14, and stably support the insulating substrate 12 on an upper part on a surface of a circuit board 34. The support projections 30 are formed by laminating projections 18 formed of insulating materials or conduction materials, an electrode material or a resistor material. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

この発明は、回路基板表面に表面実装されるチップ抵抗器であって、特に低抵抗のチップ抵抗器とその製造方法に関する。   The present invention relates to a chip resistor that is surface-mounted on the surface of a circuit board, and particularly to a low-resistance chip resistor and a method for manufacturing the same.

従来、一般に絶縁基板表面に抵抗体材料を印刷し焼成して成る厚膜型チップ抵抗器は、端子部分の電極高さよりも抵抗体表面の保護層が盛り上がって高く形成され、回路基板への実装時には、抵抗体を上にして表面実装されている。   Conventionally, a thick film chip resistor, which is generally formed by printing and firing a resistor material on the surface of an insulating substrate, has a protective layer on the surface of the resistor that is higher than the electrode height of the terminal portion, and is mounted on a circuit board. Sometimes it is surface mounted with the resistor on top.

また、特許文献1に開示されているように、抵抗体の保護層と電極表面との段差を小さくして、抵抗体を回路基板側にして実装した場合も、チップ抵抗器が傾いたりしないようにしたチップ抵抗器もある。   Further, as disclosed in Patent Document 1, the chip resistor is not tilted even when the resistor is mounted on the circuit board side by reducing the step between the protective layer of the resistor and the electrode surface. Some chip resistors are also available.

さらに、低抵抗のチップ抵抗器において、特許文献2に開示されているように、電極表面の高さを抵抗体の保護層の表面よりも僅かに高くなるようにメッキ層を厚く形成して、抵抗体を回路基板面に対面させて実装しても、抵抗体が回路基板表面に接することがないようにしたものも提案されている。これにより、電極部分の抵抗による影響を抑え、素子全体としての抵抗値のバラツキを小さくしているものである。特に、表面実装型のチップ抵抗器のうち100mΩ以下の超抵抗のチップ抵抗器においては、高精度で低温度係数(T.C.R)のものに対する要求が増大しており、電極抵抗を抑えるためにも、抵抗体を回路基板側にして実装することが求められている。
特開平10−199702号公報 特開2003−45702号公報
Furthermore, in the low resistance chip resistor, as disclosed in Patent Document 2, the plating layer is formed thick so that the height of the electrode surface is slightly higher than the surface of the protective layer of the resistor, There has also been proposed a resistor in which the resistor is not in contact with the circuit board surface even when the resistor is mounted facing the circuit board surface. As a result, the influence of the resistance of the electrode portion is suppressed, and the variation of the resistance value of the entire element is reduced. In particular, in a surface-mount type chip resistor, a chip resistor having a super resistance of 100 mΩ or less is increasing in demand for a high-precision and low temperature coefficient (TCR), and suppresses electrode resistance. Therefore, it is required to mount the resistor with the circuit board side.
JP-A-10-199702 JP 2003-45702 A

しかしながら、上記特許文献1の場合、抵抗体の保護層は回路基板に接しているものであり、大電流が流れる低抵抗の素子の場合、素子表面の温度が高温になるため、回路基板が焼けたり焦げてしまう恐れがあった。   However, in the case of Patent Document 1, the protective layer of the resistor is in contact with the circuit board, and in the case of a low resistance element in which a large current flows, the temperature of the element surface becomes high, so the circuit board is burned. There was a risk of burning.

さらに、上記特許文献2の場合も、抵抗体の保護層は回路基板表面から僅かに離れてはいるが、隙間がせまく、抵抗体からの放熱により、回路基板が焼ける恐れがある。また、回路基板とチップ抵抗器との間の空間に、ハンダ付け時に用いるフラックス等が入り込み、ハンダ付け後の洗浄においても除去されにくいという問題もある。   Further, in the case of Patent Document 2, the protective layer of the resistor is slightly separated from the surface of the circuit board, but a gap is formed, and the circuit board may be burned due to heat radiation from the resistor. In addition, there is a problem that flux used for soldering enters the space between the circuit board and the chip resistor and is not easily removed even after cleaning after soldering.

この発明は、上記従来の技術に鑑みて成されたもので、簡単な構成で、抵抗体を回路基板側に向けて実装可能であって、実装後の洗浄性が良く、抵抗体による熱の影響も受けにくい低抵抗のチップ抵抗器をとその製造方法を提供することを目的とする。   The present invention has been made in view of the above-described conventional technology, and can be mounted with a simple configuration with the resistor facing the circuit board, has good cleanability after mounting, and heat generated by the resistor. An object of the present invention is to provide a low-resistance chip resistor that is not easily affected and a manufacturing method thereof.

この発明は、絶縁基板の表面に一対の表面電極が形成され、この表面電極間に抵抗体が設けられたチップ抵抗器であって、前記抵抗体の表面側よりも突出して前記表面電極上に形成され、上方の前記絶縁基板を回路基板表面で安定に支持する支持突起が設けられたチップ抵抗器である。   The present invention provides a chip resistor in which a pair of surface electrodes are formed on the surface of an insulating substrate, and a resistor is provided between the surface electrodes, and protrudes from the surface side of the resistor so as to be on the surface electrode. The chip resistor is formed and provided with a support protrusion that stably supports the insulating substrate above the circuit board surface.

前記支持突起は、絶縁材料または導電材料により形成された凸部から成るものである。または、前記支持突起は、電極材料を複数層積層して成るものや、前記抵抗体を前記表面電極に積層して成るものでも良い。   The support protrusion is formed of a convex portion formed of an insulating material or a conductive material. Alternatively, the support protrusion may be formed by laminating a plurality of electrode materials or by laminating the resistor on the surface electrode.

またこの発明は、絶縁基板の表面に抵抗体とその抵抗体の両端に接続した表面電極を形成し、前記一対の表面電極の上に、前記抵抗体の保護層よりも突出するように絶縁体または導電体のペーストを塗布して凸部を形成し、この凸部によりチップ抵抗器を回路基板表面で安定に支持する支持突起を形成するチップ抵抗器の製造方法である。   The present invention also provides a resistor and a surface electrode connected to both ends of the resistor on the surface of the insulating substrate, and the insulator is projected on the pair of surface electrodes from the protective layer of the resistor. Alternatively, it is a method for manufacturing a chip resistor, in which a conductive paste is applied to form a convex portion, and a convex protrusion is formed by this convex portion to stably support the chip resistor on the surface of the circuit board.

またこの発明は、絶縁基板の表面に抵抗体とその抵抗体の両端に積層した表面電極を形成し、前記抵抗体及び電極材料を複数層積層して、前記抵抗体の保護層よりも突出し前記チップ抵抗器を回路基板表面で安定に支持する支持突起を形成するチップ抵抗器の製造方法である。   Further, the present invention forms a resistor and a surface electrode laminated on both ends of the resistor on the surface of the insulating substrate, laminates a plurality of layers of the resistor and electrode material, protrudes from the protective layer of the resistor, and This is a method for manufacturing a chip resistor in which a support protrusion for stably supporting the chip resistor on the surface of the circuit board is formed.

この発明のチップ抵抗器は、回路基板に対して安定に表面実装可能であり、抵抗体を回路基板側に向けて実装した状態で、回路基板側と十分か間隔をとることができ、実装後の洗浄性が良く、抵抗体の発熱の影響も受けにくいものである。   The chip resistor of the present invention can be stably surface-mounted on the circuit board, and can be sufficiently spaced from the circuit board side in a state where the resistor is mounted facing the circuit board side. It is easy to clean and is not easily affected by the heat generated by the resistor.

以下、この発明の実施の形態について図面に基づいて説明する。図1、図2はこの発明のチップ抵抗器の第一実施形態を示すもので、この実施形態のチップ抵抗器10は、図1に示すように、セラミックス等の絶縁基板12の表面にAg−Pd、Ag−Pt等のメタルグレーズペーストを焼成した一次電極として、表面電極14及び裏面電極15が形成されている。表面電極14間には、酸化ルテニウムやAg−Pd等の抵抗体ペーストを焼成した抵抗体16,17が2層になって形成されている。   Hereinafter, embodiments of the present invention will be described with reference to the drawings. 1 and 2 show a first embodiment of a chip resistor according to the present invention. As shown in FIG. 1, a chip resistor 10 of this embodiment has an Ag-- A front electrode 14 and a back electrode 15 are formed as primary electrodes obtained by firing a metal glaze paste such as Pd or Ag—Pt. Between the surface electrodes 14, resistors 16 and 17 obtained by baking a resistor paste such as ruthenium oxide or Ag—Pd are formed in two layers.

さらに、一対の表面電極14の表面には、ガラスペーストや電極用のメタルグレーズペースト等を塗布し焼成して成る凸部18が形成されている。凸部18は、後述する保護層24よりも突出して形成され、凸部18とメッキ層28等により、保護層24よりも突出した支持突起30が形成されている。凸部18は、上端面が絶縁基板12の表面と平行な直線状に形成され、一対の凸部18により安定にチップ抵抗器10を支持する。   Furthermore, the convex part 18 formed by apply | coating and baking glass paste, the metal glaze paste for electrodes, etc. on the surface of a pair of surface electrode 14 is formed. The protrusion 18 is formed so as to protrude from a protective layer 24 described later, and a support protrusion 30 protruding from the protection layer 24 is formed by the protrusion 18 and the plating layer 28. The protrusions 18 are formed in a straight line whose upper end surface is parallel to the surface of the insulating substrate 12, and the chip resistor 10 is stably supported by the pair of protrusions 18.

凸部18及び表面電極14の表面には、二次電極20が、表面電極14と同様の材料により形成されている。また、抵抗体17の表面には、ホウケイ酸鉛ガラス等による薄いガラスコート22が形成され、その表面に、ガラスコート22と同様に塗布焼成された保護層24が形成されている。   A secondary electrode 20 is formed of the same material as that of the surface electrode 14 on the surface of the convex portion 18 and the surface electrode 14. Further, a thin glass coat 22 made of lead borosilicate glass or the like is formed on the surface of the resistor 17, and a protective layer 24 that is applied and baked in the same manner as the glass coat 22 is formed on the surface.

絶縁基板12の両端面及び凸部18の側面には、導電ペースト等による端面電極26が形成されている。そして、端面電極26及び二次電極20の表面は、保護層としてのNiメッキとその外側のSnメッキ等によるメッキ層28が形成されている。   End electrodes 26 made of conductive paste or the like are formed on both end surfaces of the insulating substrate 12 and the side surfaces of the protrusions 18. And the plating layer 28 by Ni plating as a protective layer, Sn plating, etc. of the outer side is formed in the surface of the end surface electrode 26 and the secondary electrode 20. As shown in FIG.

次にこの実施形態のチップ抵抗器10の製造方法について図2を基にして説明する。この実施形態のチップ抵抗器10は、図2(A)に示すように、後で分割して絶縁基板12を多数個取りするためのアルミナ製分割用基板32に、表面電極14、裏面電極15のメタルグレーズペーストを複数列印刷し、850℃程度の温度で焼成する。そして、各表面電極14間に、図2(B)に示すように、抵抗体16を形成する抵抗体ペーストを印刷し、850℃程度の温度で焼成する。同様に図2(C)に示すように、抵抗体17を形成する抵抗体ペーストを印刷し、850℃程度の温度で焼成する。   Next, a manufacturing method of the chip resistor 10 of this embodiment will be described with reference to FIG. As shown in FIG. 2 (A), the chip resistor 10 of this embodiment is divided into an alumina dividing substrate 32 for dividing a plurality of insulating substrates 12 later and a front electrode 14 and a back electrode 15. A plurality of rows of metal glaze pastes are printed and fired at a temperature of about 850 ° C. And between each surface electrode 14, as shown in FIG.2 (B), the resistor paste which forms the resistor 16 is printed, and it bakes at the temperature of about 850 degreeC. Similarly, as shown in FIG. 2C, a resistor paste for forming the resistor 17 is printed and baked at a temperature of about 850 ° C.

次に、図2(D)に示すように、一対の表面電極14の表面に、ガラスペーストや電極の導電ペースト等を塗布して凸部18を形成し、焼成する。凸部18は、後に形成する保護層24よりも突出するように、1回または複数回塗布し50〜100μm程度の高さに形成して、850℃程度の温度で焼成する。さらに、図2(E)に示すように、凸部18及び表面電極14の表面に、表面電極14と同様のメタルグレーズペースト等を塗布し、850℃程度の温度で焼成して二次電極20を形成する。   Next, as shown in FIG. 2D, glass bumps, electrode conductive paste, or the like is applied to the surfaces of the pair of surface electrodes 14 to form convex portions 18 and fired. The convex portion 18 is applied once or a plurality of times so as to protrude from the protective layer 24 to be formed later, is formed to a height of about 50 to 100 μm, and is baked at a temperature of about 850 ° C. Further, as shown in FIG. 2E, a metal glaze paste or the like similar to that of the surface electrode 14 is applied to the surface of the convex portion 18 and the surface electrode 14, and the secondary electrode 20 is baked at a temperature of about 850 ° C. Form.

次に、図2(F)に示すように、抵抗体17の表面に、ホウケイ酸鉛ガラス等のガラスペーストを塗布して620℃程度で焼成し、薄いガラスコート22を形成する。この後、抵抗体16,17をレーザートリミングして、抵抗値を調整する。   Next, as shown in FIG. 2F, a glass paste such as lead borosilicate glass is applied to the surface of the resistor 17 and baked at about 620 ° C. to form a thin glass coat 22. Thereafter, the resistors 16 and 17 are laser trimmed to adjust the resistance value.

さらに、図2(G)に示すように、ガラスコート22に重ねて保護層24を形成するガラスペースト等の材料を塗布する。そして、1枚の分割用基板32を、抵抗体16の両側の表面電極14及び凸部18の端部で、表面電極14の整列方向と平行に1次分割し、表面電極14の端部の絶縁基板12の端面を露出させる。次に、図2(H)に示すように、絶縁基板12の端面及び二次電極20及び裏面電極15の基板端面側に、端面電極26用のメタルグレーズペースト等の導電ペーストを塗布し、620℃程度で保護層24及び端面電極26を同時に焼成する。   Further, as shown in FIG. 2G, a material such as a glass paste that forms the protective layer 24 is applied to the glass coat 22. Then, a single dividing substrate 32 is primarily divided in parallel with the alignment direction of the surface electrode 14 at the ends of the surface electrode 14 and the convex portion 18 on both sides of the resistor 16, and The end surface of the insulating substrate 12 is exposed. Next, as shown in FIG. 2 (H), a conductive paste such as a metal glaze paste for the end face electrode 26 is applied to the end face of the insulating substrate 12 and the substrate end face side of the secondary electrode 20 and the back electrode 15. The protective layer 24 and the end face electrode 26 are baked at about the same temperature.

続いて、1次分割した絶縁基板12を、さらに1次分割と直交する方向に2次分割してチップ状に形成し、図2(I)に示すように、二次電極20、裏面電極15、及び端面電極26に、Niメッキ、Snメッキを施してメッキ層28を形成する。   Subsequently, the primary divided insulating substrate 12 is further divided into chips in the direction orthogonal to the primary division to form a chip. As shown in FIG. 2I, the secondary electrode 20 and the back electrode 15 are formed. The plated layer 28 is formed by applying Ni plating and Sn plating to the end face electrode 26.

この実施形態のチップ抵抗器10によれば、基板12の両端部に抵抗体16,17の保護層24よりも突出した凸部18により、保護層24よりも突出した支持突起30がチップ抵抗器10の両端部に形成される。これにより、チップ抵抗器10の抵抗体16を回路基板34のランド36側に向けて安定に表面実装可能であり、回路基板34と保護層24間に十分な空間が形成され、放熱性が良く、ハンダ付け時のフラックス等の洗浄も確実になされる。なお、この実施形態において、抵抗体16,17は、必要な抵抗値に応じて抵抗体16,17のうちの一層にしても良い。   According to the chip resistor 10 of this embodiment, the support protrusions 30 protruding from the protective layer 24 are formed at the both ends of the substrate 12 by the protrusions 18 protruding from the protective layer 24 of the resistors 16 and 17. 10 at both ends. As a result, the resistor 16 of the chip resistor 10 can be stably surface-mounted toward the land 36 side of the circuit board 34, a sufficient space is formed between the circuit board 34 and the protective layer 24, and heat dissipation is good. In addition, it is possible to reliably clean the flux during soldering. In this embodiment, the resistors 16 and 17 may be one layer of the resistors 16 and 17 according to a required resistance value.

次に、この発明の第二実施形態のチップ電子部品について、図3を基にして説明する。ここで上述の実施形態と同様の部材は、同一符号を付して説明を省略する。この実施形態のチップ抵抗器38は、上記第一実施形態の抵抗体16,17を延長して表面電極14と二次電極20に積層し、その上に凸部18を設けて、支持突起30を形成したものである。   Next, a chip electronic component according to a second embodiment of the present invention will be described with reference to FIG. Here, the same members as those of the above-described embodiment are denoted by the same reference numerals, and description thereof is omitted. In the chip resistor 38 of this embodiment, the resistors 16 and 17 of the first embodiment are extended and laminated on the surface electrode 14 and the secondary electrode 20, and the protrusion 18 is provided thereon, and the support protrusion 30. Is formed.

この実施形態のチップ抵抗器38の製造方法は、図3(A)に示すように、まず、分割用基板32の表面に抵抗体16を一面に形成し、裏面に裏面電極15のメタルグレーズペーストを複数列印刷し、850℃程度の温度で焼成する。そして、図3(B)に示すように、抵抗体16の表面に、一次電極として表面電極14のメタルグレーズペーストを複数列印刷し、850℃程度の温度で焼成する。次に、各表面電極14間及びその表面に、図3(C)に示すように、2層目の抵抗体17の抵抗体ペーストを印刷し、850℃程度の温度で焼成する。   In the manufacturing method of the chip resistor 38 of this embodiment, as shown in FIG. 3A, first, the resistor 16 is formed on the entire surface of the dividing substrate 32, and the metal glaze paste of the back electrode 15 is formed on the back surface. Are printed in multiple rows and fired at a temperature of about 850 ° C. Then, as shown in FIG. 3B, a plurality of rows of the metal glaze paste of the surface electrode 14 as the primary electrode are printed on the surface of the resistor 16 and fired at a temperature of about 850 ° C. Next, as shown in FIG. 3C, a resistor paste of the second-layer resistor 17 is printed between the surface electrodes 14 and on the surface thereof, and baked at a temperature of about 850 ° C.

次に、図3(D)に示すように、ガラスペーストや電極の導電ペースト等を塗布して凸部18を形成し、焼成する。凸部18は、後に形成する保護層24と同程度または突出するように、1回または複数回塗布し、例えば50μm程度の高さに形成して、850℃程度の温度で焼成する。そして、図3(E)に示すように、抵抗体17の表面電極14と対向する位置に、二次電極20の導電ペーストを印刷し凸部18を覆い、850℃程度の温度で焼成する。   Next, as shown in FIG. 3D, a glass paste, a conductive paste for electrodes, or the like is applied to form the convex portion 18 and baked. The convex portion 18 is applied once or a plurality of times so as to be the same as or protruding from the protective layer 24 to be formed later, formed to a height of, for example, about 50 μm, and baked at a temperature of about 850 ° C. Then, as shown in FIG. 3E, the conductive paste of the secondary electrode 20 is printed at a position facing the surface electrode 14 of the resistor 17 so as to cover the convex portion 18 and fired at a temperature of about 850 ° C.

次に、図3(F)に示すように、抵抗体17の表面に、ガラスペーストを塗布して620℃程度で焼成し、薄いガラスコート22を形成する。この後、抵抗体16,17をレーザートリミングして、抵抗値を調整する。   Next, as shown in FIG. 3F, a glass paste is applied to the surface of the resistor 17 and baked at about 620 ° C. to form a thin glass coat 22. Thereafter, the resistors 16 and 17 are laser trimmed to adjust the resistance value.

さらに、図3(G)に示すように、ガラスコート22に重ねて保護層24を形成するガラスペースト等の材料を塗布する。そして、1枚の分割用基板32を、抵抗体16の両側の表面電極14の端部で、表面電極14の整列方向と平行に1次分割し、表面電極14の端部の絶縁基板12の端面を露出させる。次に、図3(H)に示すように、絶縁基板12の端面及び二次電極20及び裏面電極15の基板端面側に、端面電極26用のメタルグレーズペースト等の導電ペーストを塗布し、保護層24及び端面電極26を620℃程度で同時に焼成する。   Further, as shown in FIG. 3G, a material such as a glass paste that forms the protective layer 24 is applied to the glass coat 22. Then, a single dividing substrate 32 is primarily divided at the ends of the surface electrode 14 on both sides of the resistor 16 in parallel with the alignment direction of the surface electrode 14, and the insulating substrate 12 at the end of the surface electrode 14 is divided. Expose end face. Next, as shown in FIG. 3H, a conductive paste such as a metal glaze paste for the end face electrode 26 is applied to the end face of the insulating substrate 12 and the end face sides of the secondary electrode 20 and the back electrode 15 to protect it. The layer 24 and the end face electrode 26 are simultaneously fired at about 620 ° C.

続いて、1次分割した絶縁基板12を、さらに1次分割と直交する方向に2次分割してチップ状に形成し、図3(I)に示すように、二次電極20、裏面電極15、及び端面電極26に、Niメッキ、Snメッキを施してメッキ層28を形成する。   Subsequently, the primary divided insulating substrate 12 is further divided into chips in the direction perpendicular to the primary division to form a chip. As shown in FIG. 3I, the secondary electrode 20 and the back electrode 15 are formed. The plated layer 28 is formed by applying Ni plating and Sn plating to the end face electrode 26.

この実施形態のチップ抵抗器38によれば、基板12の両端部に抵抗体16,17が延び、さらに凸部18、表面電極14及び二次電極20が形成され、これらにより保護層24よりも突出した支持突起30が形成される。これにより、上記実施形態と同様の効果を得ることができる。なお、この実施形態においても、抵抗体16,17は、必要な抵抗値に応じていずれか一方の一層にしても良い。   According to the chip resistor 38 of this embodiment, the resistors 16 and 17 extend at both ends of the substrate 12, and the convex portion 18, the surface electrode 14, and the secondary electrode 20 are formed. A protruding support protrusion 30 is formed. Thereby, the effect similar to the said embodiment can be acquired. Also in this embodiment, the resistors 16 and 17 may be either one layer according to a required resistance value.

次に、この発明の第三実施形態のチップ電子部品について、図4を基にして説明する。ここで上述の実施形態と同様の部材は、同一符号を付して説明を省略する。この実施形態のチップ抵抗器40は、表面電極14に積層するように一層の抵抗体16を形成し、その上に凸部18を形成してなるものである。   Next, a chip electronic component according to a third embodiment of the present invention will be described with reference to FIG. Here, the same members as those of the above-described embodiment are denoted by the same reference numerals, and description thereof is omitted. The chip resistor 40 of this embodiment is formed by forming a single-layer resistor 16 so as to be laminated on the surface electrode 14 and forming a convex portion 18 thereon.

この実施例のチップ抵抗器40の製造方法は、図4(A)に示すように、まず、分割用基板32の表面に、一次電極として表面電極14、裏面電極15のメタルグレーズペーストを複数列印刷し、850℃程度の温度で焼成する。次に、各表面電極14間及びその表面に、図4(B)に示すように、抵抗体16を形成する抵抗体ペーストを一面に印刷し、850℃程度の温度で焼成する。   In the manufacturing method of the chip resistor 40 of this embodiment, as shown in FIG. 4A, first, a plurality of rows of metal glaze pastes of the front electrode 14 and the back electrode 15 as primary electrodes are formed on the surface of the dividing substrate 32. Print and fire at a temperature of about 850 ° C. Next, as shown in FIG. 4B, between the surface electrodes 14 and on the surface thereof, a resistor paste for forming the resistor 16 is printed on one side and fired at a temperature of about 850 ° C.

次に、図4(C)に示すように、ガラスペーストや電極の導電ペースト等を塗布して凸部18を形成し、焼成する。凸部18は、後に形成する保護層24と同程度または突出するように、1回または複数回塗布し、例えば50μm程度の高さに形成して、850℃程度の温度で焼成する。   Next, as shown in FIG. 4C, a glass paste, a conductive paste for electrodes, or the like is applied to form the projections 18 and fired. The convex portion 18 is applied once or a plurality of times so as to be the same as or protruding from the protective layer 24 to be formed later, formed to a height of, for example, about 50 μm, and baked at a temperature of about 850 ° C.

次に、図4(D)に示すように、凸部18の表面及びその周辺の、抵抗体16の表面電極14と対向する位置に、二次電極20の導電ペーストを印刷し、850℃程度の温度で焼成する。そして、図4(E)に示すように、抵抗体16の表面に、ガラスペーストを塗布して620℃程度で焼成し、薄いガラスコート22を形成する。この後、抵抗体16をレーザートリミングして、抵抗値を調整する。   Next, as shown in FIG. 4D, the conductive paste of the secondary electrode 20 is printed at a position facing the surface electrode 14 of the resistor 16 on and around the surface of the convex portion 18 and is about 850 ° C. Firing at a temperature of Then, as shown in FIG. 4E, a glass paste is applied to the surface of the resistor 16 and baked at about 620 ° C. to form a thin glass coat 22. Thereafter, the resistor 16 is laser trimmed to adjust the resistance value.

さらに、図4(F)に示すように、ガラスコート22に重ねて保護層24を形成するガラスペースト等の材料を塗布する。そして、1枚の分割用基板32を、抵抗体16の両側の表面電極14の端部で、表面電極14の整列方向と平行に1次分割し、表面電極14の端部の絶縁基板12の端面を露出させる。次に、図4(G)に示すように、絶縁基板12の端面及び二次電極20及び裏面電極15に、メタルグレーズペースト等の導電ペーストを塗布し、保護層24及び端面電極26を620℃程度で同時に焼成する。   Further, as shown in FIG. 4F, a material such as a glass paste that forms the protective layer 24 is applied to the glass coat 22. Then, a single dividing substrate 32 is primarily divided at the ends of the surface electrode 14 on both sides of the resistor 16 in parallel with the alignment direction of the surface electrode 14, and the insulating substrate 12 at the end of the surface electrode 14 is divided. Expose end face. Next, as shown in FIG. 4G, a conductive paste such as a metal glaze paste is applied to the end face of the insulating substrate 12, the secondary electrode 20, and the back face electrode 15, and the protective layer 24 and the end face electrode 26 are set to 620 ° C. Bake at the same time.

続いて、1次分割した絶縁基板12を、さらに1次分割と直交する方向に2次分割してチップ状に形成し、図4(H)に示すように、二次電極20、裏面電極15、及び端面電極26に、Niメッキ、Snメッキを施してメッキ層28を形成する。   Subsequently, the primary divided insulating substrate 12 is further divided into chips in the direction orthogonal to the primary division to form a chip. As shown in FIG. 4H, the secondary electrode 20 and the back electrode 15 are formed. The plated layer 28 is formed by applying Ni plating and Sn plating to the end face electrode 26.

この実施形態のチップ抵抗器40によれば、基板12の両端部に抵抗体16が延び、さらに表面電極14と二次電極20が形成され、凸部18により保護層24よりも突出した支持突起30が形成される。これにより、上記実施形態と同様の効果を得ることができる。なお、この実施形態においても、抵抗体16は、必要な抵抗値に応じて二層にしても良い。   According to the chip resistor 40 of this embodiment, the resistor 16 extends at both ends of the substrate 12, the surface electrode 14 and the secondary electrode 20 are formed, and the support protrusion protruding from the protective layer 24 by the protrusion 18. 30 is formed. Thereby, the effect similar to the said embodiment can be acquired. Also in this embodiment, the resistor 16 may have two layers according to a required resistance value.

次に、この発明の第四実施形態のチップ電子部品について、図5、図6を基にして説明する。ここで上述の実施形態と同様の部材は、同一符号を付して説明を省略する。この実施形態のチップ抵抗器42は、端面電極を省略した構造のものである。   Next, a chip electronic component according to a fourth embodiment of the present invention will be described with reference to FIGS. Here, the same members as those of the above-described embodiment are denoted by the same reference numerals, and description thereof is omitted. The chip resistor 42 of this embodiment has a structure in which the end face electrode is omitted.

この実施形態のチップ抵抗器42の製造方法について図5を基にして説明する。この実施形態のチップ抵抗器42は、図5(A)に示すように、分割用基板32に、表面電極14のメタルグレーズペーストを複数列印刷し、850℃程度の温度で焼成する。そして、各表面電極14間に、図5(B)に示すように、抵抗体16を形成する抵抗体ペーストを印刷し、850℃程度の温度で焼成する。同様に図5(C)に示すように、抵抗体17を形成する抵抗体ペーストを印刷し、850℃程度の温度で焼成する。   A method for manufacturing the chip resistor 42 of this embodiment will be described with reference to FIG. As shown in FIG. 5A, the chip resistor 42 of this embodiment prints a plurality of rows of the metal glaze paste of the surface electrode 14 on the dividing substrate 32 and fires it at a temperature of about 850 ° C. And between each surface electrode 14, as shown in FIG.5 (B), the resistor paste which forms the resistor 16 is printed, and it bakes at the temperature of about 850 degreeC. Similarly, as shown in FIG. 5C, a resistor paste for forming the resistor 17 is printed and baked at a temperature of about 850 ° C.

次に、図5(D)に示すように、一対の表面電極14の表面に、ガラスペーストや電極の導電ペースト等を塗布して凸部18を形成し、焼成する。さらに、図5(E)に示すように、凸部18及び表面電極14の表面に、表面電極14と同様のメタルグレーズペースト等を塗布し、850℃程度の温度で焼成して二次電極20を形成する。   Next, as shown in FIG. 5D, glass bumps, conductive paste of electrodes, or the like is applied to the surfaces of the pair of surface electrodes 14 to form convex portions 18 and fired. Further, as shown in FIG. 5E, a metal glaze paste or the like similar to that of the surface electrode 14 is applied to the surface of the convex portion 18 and the surface electrode 14, and the secondary electrode 20 is baked at a temperature of about 850 ° C. Form.

次に、図5(F)に示すように、抵抗体17の表面に、ホウケイ酸鉛ガラス等のガラスペーストを塗布して620℃程度で焼成し、薄いガラスコート22を形成する。この後、抵抗体16,17をレーザートリミングして、抵抗値を調整する。さらに、図5(G)に示すように、ガラスコート22に重ねて保護層24を形成するガラスペースト等の材料を塗布し、620℃程度で焼成する。   Next, as shown in FIG. 5F, a glass paste such as lead borosilicate glass is applied to the surface of the resistor 17 and baked at about 620 ° C. to form a thin glass coat 22. Thereafter, the resistors 16 and 17 are laser trimmed to adjust the resistance value. Further, as shown in FIG. 5G, a material such as a glass paste for forming the protective layer 24 is applied on the glass coat 22 and fired at about 620 ° C.

そして、1枚の分割用基板32を、抵抗体16の両側の表面電極14及び凸部18の端部で、表面電極14の整列方向と平行に1次分割する。続いて、1次分割した絶縁基板12を、さらに1次分割と直交する方向に2次分割してチップ状に形成し、図5(H)に示すように、二次電極20に、Niメッキ、Snメッキを施してメッキ層28を形成する。   Then, the single dividing substrate 32 is primarily divided in parallel with the alignment direction of the surface electrodes 14 at the ends of the surface electrodes 14 and the convex portions 18 on both sides of the resistor 16. Subsequently, the primary divided insulating substrate 12 is further divided into chips in the direction orthogonal to the primary division to form chips, and the secondary electrode 20 is plated with Ni as shown in FIG. , Sn plating is performed to form the plating layer 28.

この実施形態のチップ抵抗器42によれば、上記実施形態と同様の効果に加えて、図6に示すように、回路基板34のランド36小さくすることができ、実装面積を小さくすることができる。また、この実施形態のチップ抵抗器は、上記第二、第三実施形態のように抵抗体を基板一面に形成したものでも良く、端面電極を省略することにより同様の効果を得ることができる。さらに、抵抗体も一層乃至複数層いずれの構造でも良い。   According to the chip resistor 42 of this embodiment, in addition to the same effects as those of the above embodiment, as shown in FIG. 6, the land 36 of the circuit board 34 can be reduced, and the mounting area can be reduced. . Further, the chip resistor of this embodiment may be one in which a resistor is formed on the entire surface of the substrate as in the second and third embodiments, and the same effect can be obtained by omitting the end face electrode. Furthermore, the resistor may have a single-layer or multi-layer structure.

尚、この発明のチップ抵抗器とその製造方法は、上記実施形態に限定されず、支持突起の上端部は、安定にチップ抵抗器を支持可能な形状であれば良く、一定の面からなるものであれば良い。また、抵抗体や電極の種類は問わないものである。   The chip resistor and the manufacturing method thereof according to the present invention are not limited to the above-described embodiment, and the upper end of the support protrusion only needs to have a shape that can stably support the chip resistor, and has a certain surface. If it is good. Moreover, the kind of a resistor or an electrode is not ask | required.

この発明の第一実施形態のチップ抵抗器の実装状態を示す縦断面図である。It is a longitudinal cross-sectional view which shows the mounting state of the chip resistor of 1st embodiment of this invention. この発明の第一実施形態のチップ抵抗器の製造工程を示す縦断面図である。It is a longitudinal cross-sectional view which shows the manufacturing process of the chip resistor of 1st embodiment of this invention. この発明の第二実施形態のチップ抵抗器の製造工程を示す縦断面図である。It is a longitudinal cross-sectional view which shows the manufacturing process of the chip resistor of 2nd embodiment of this invention. この発明の第三実施形態のチップ抵抗器の製造工程を示す縦断面図である。It is a longitudinal cross-sectional view which shows the manufacturing process of the chip resistor of 3rd embodiment of this invention. この発明の第四実施形態のチップ抵抗器の製造工程を示す縦断面図である。It is a longitudinal cross-sectional view which shows the manufacturing process of the chip resistor of 4th embodiment of this invention. この発明の第四実施形態のチップ抵抗器の実装状態を示す縦断面図である。It is a longitudinal cross-sectional view which shows the mounting state of the chip resistor of 4th embodiment of this invention.

符号の説明Explanation of symbols

10 チップ抵抗器
12 絶縁基板
14 表面電極
16,17 抵抗体
18 凸部
20 二次電極
22 ガラスコート
24 保護層
26 端面電極
28 メッキ層
30 支持突起
32 分割用基板
34 回路基板
DESCRIPTION OF SYMBOLS 10 Chip resistor 12 Insulating substrate 14 Surface electrode 16, 17 Resistor 18 Protruding part 20 Secondary electrode 22 Glass coat 24 Protective layer 26 End surface electrode 28 Plating layer 30 Supporting protrusion 32 Dividing substrate 34 Circuit substrate

Claims (7)

絶縁基板の表面に一対の表面電極が形成され、この表面電極間に抵抗体が設けられたチップ抵抗器において、前記抵抗体の表面側よりも突出して前記表面電極上に形成され、上方の前記絶縁基板を回路基板表面で安定に支持する支持突起が設けられたことを特徴とするチップ抵抗器。   In a chip resistor in which a pair of surface electrodes is formed on the surface of the insulating substrate and a resistor is provided between the surface electrodes, the chip resistor is formed on the surface electrode so as to protrude from the surface side of the resistor, A chip resistor comprising a support projection for stably supporting an insulating substrate on a circuit board surface. 前記支持突起は、絶縁材料または導電材料により形成された凸部から成るものである請求項1記載のチップ抵抗器。   The chip resistor according to claim 1, wherein the support protrusion is formed of a convex portion formed of an insulating material or a conductive material. 前記支持突起は、電極材料を複数層積層して成る請求項1記載のチップ抵抗器。   The chip resistor according to claim 1, wherein the support protrusion is formed by laminating a plurality of electrode materials. 前記支持突起は、前記抵抗体を前記表面電極に積層して成る請求項1記載のチップ抵抗器。   The chip resistor according to claim 1, wherein the support protrusion is formed by laminating the resistor on the surface electrode. 絶縁基板の表面に抵抗体とその抵抗体の両端に接続した表面電極を形成し、前記一対の表面電極の上に、前記抵抗体の保護層よりも突出するように絶縁体または導電体のペーストを塗布して凸部を形成し、この凸部により前記チップ抵抗器を回路基板表面で安定に支持する支持突起を形成するチップ抵抗器の製造方法。   A resistor and a surface electrode connected to both ends of the resistor are formed on the surface of the insulating substrate, and an insulator or conductor paste is formed on the pair of surface electrodes so as to protrude from the protective layer of the resistor. Is applied to form a convex portion, and the convex portion is used to form a support protrusion that stably supports the chip resistor on the surface of the circuit board. 絶縁基板の表面に抵抗体とその抵抗体の両端に積層した表面電極を形成し、前記抵抗体及び電極材料を複数層積層して、前記抵抗体の保護層よりも突出し前記チップ抵抗器を回路基板表面で安定に支持する支持突起を形成するチップ抵抗器の製造方法   A resistor and a surface electrode laminated on both ends of the resistor are formed on the surface of the insulating substrate, a plurality of layers of the resistor and electrode material are laminated, and the chip resistor is projected from the protective layer of the resistor. Chip resistor manufacturing method for forming support protrusions for stable support on a substrate surface 前記支持突起は、前記抵抗体を前記絶縁基板表面に一面に形成した上に設ける請求項5または6記載のチップ抵抗器。

7. The chip resistor according to claim 5, wherein the support protrusion is provided on the insulating substrate formed on the entire surface of the resistor.

JP2005228764A 2005-08-05 2005-08-05 Chip resistor and its manufacturing method Pending JP2007048784A (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010147853A (en) * 2008-12-19 2010-07-01 Murata Mfg Co Ltd Non-reciprocal circuit element
JP2012004538A (en) * 2010-05-18 2012-01-05 Rohm Co Ltd Surface mounting type resistor and surface mounting substrate mounted with the same
KR101771822B1 (en) * 2015-12-29 2017-08-25 삼성전기주식회사 Chip resistor and chip resistor assembly
KR101853170B1 (en) 2015-12-22 2018-04-27 삼성전기주식회사 Chip Resistor and method for manufacturing the same
JP2020053433A (en) * 2018-09-21 2020-04-02 Koa株式会社 Strain sensor resistor

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010147853A (en) * 2008-12-19 2010-07-01 Murata Mfg Co Ltd Non-reciprocal circuit element
JP2012004538A (en) * 2010-05-18 2012-01-05 Rohm Co Ltd Surface mounting type resistor and surface mounting substrate mounted with the same
KR101853170B1 (en) 2015-12-22 2018-04-27 삼성전기주식회사 Chip Resistor and method for manufacturing the same
KR101771822B1 (en) * 2015-12-29 2017-08-25 삼성전기주식회사 Chip resistor and chip resistor assembly
JP2020053433A (en) * 2018-09-21 2020-04-02 Koa株式会社 Strain sensor resistor

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