JP2007043101A5

JP2007043101A5 -

Info

Publication number: JP2007043101A5
Application number: JP2006162592A
Authority: JP
Filing date: 2006-06-12
Publication date: 2009-05-07

Claims

Forming an element layer having a plurality of integrated circuits on one surface of the substrate;
Forming a protective layer so as to cover at least the end face of the substrate;
Thinning the substrate using physical means,
Removing the protective layer;
A method for manufacturing a semiconductor device, wherein the substrate and the element layer are divided to form a stacked body including a layer provided with at least one of the plurality of integrated circuits.

Forming an element layer having a plurality of integrated circuits on one surface of the substrate;
Forming a protective layer so as to cover at least the end face of the substrate;
Grinding the other side of the substrate,
Polishing the other ground surface of the substrate;
Removing the protective layer;
A method for manufacturing a semiconductor device, comprising: dividing a polished substrate and the element layer to form a stacked body including a layer provided with at least one of the plurality of integrated circuits.

Forming an element layer having a plurality of integrated circuits on one surface of the substrate;
Forming a protective layer so as to cover the other surface of the substrate and the end surface of the substrate;
Grinding the other side of the substrate,
Polishing the other ground surface of the substrate;
Removing the protective layer;
A method for manufacturing a semiconductor device, comprising: dividing a polished substrate and the element layer to form a stacked body including a layer provided with at least one of the plurality of integrated circuits.

4. The method for manufacturing a semiconductor device according to claim 2 , wherein the polished substrate has a thickness of 2 μm to 50 μm.

In any one of claims 1 to 4, the method for manufacturing a semiconductor device, characterized by sealing the one or both surfaces of the laminate with a film having flexibility.

5. The method for manufacturing a semiconductor device according to claim 1, wherein one or both surfaces of the multilayer body are sealed with a multilayer film including an antistatic film.

5. The semiconductor device according to claim 1, wherein one or both surfaces of the stacked body are sealed using a stacked film including a film to which an oxide containing indium and tin is attached. Manufacturing method.

Forming an element layer having a plurality of integrated circuits on one surface of the substrate;
After dividing the substrate and the element layer to form a laminate having a layer provided with at least one of the plurality of integrated circuits,
Forming a protective layer so as to cover at least the end face of the laminate,
Thinning the substrate in the laminate using physical means,
A method for manufacturing a semiconductor device, wherein the protective layer is removed.

Forming an element layer having a plurality of integrated circuits on one surface of the substrate;
After dividing the substrate and the element layer to form a laminate having a layer provided with at least one of the plurality of integrated circuits,
Forming a protective layer so as to cover at least the end face of the laminate,
Grinding the other surface of the substrate in the laminate,
Polishing the other ground surface of the substrate;
A method for manufacturing a semiconductor device, wherein the protective layer is removed.

Forming an element layer having a plurality of integrated circuits on one surface of the substrate;
After dividing the substrate and the element layer to form a laminate having a layer provided with at least one of the plurality of integrated circuits,
Wherein the protective layer is formed so as to cover the end surface of the other surface and the laminate of the substrate in the laminate,
Grinding the other surface of the substrate in the laminate,
Polishing the other ground surface of the substrate;
A method for manufacturing a semiconductor device, wherein the protective layer is removed.

According to claim 9 or 10, the thickness of the polished substrate, the method for manufacturing a semiconductor device, characterized in that at 2μm or more 50μm or less.

In any one of claims 1 to 11, the protective layer, a screen printing method, spin coating method, a method for manufacturing a semiconductor device characterized by formed by a droplet discharge method, or a dispenser method.

In any one of claims 1 to 12, a method for manufacturing a semiconductor device, which comprises using a reversible material as the protective layer.

In any one of claims 1 to 12, a method for manufacturing a semiconductor device, which comprises using a hot melt wax or UV peelable resin as the protective layer.