JP2007035787A - Wiring board with shield and its manufacturing method - Google Patents

Wiring board with shield and its manufacturing method Download PDF

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Publication number
JP2007035787A
JP2007035787A JP2005214534A JP2005214534A JP2007035787A JP 2007035787 A JP2007035787 A JP 2007035787A JP 2005214534 A JP2005214534 A JP 2005214534A JP 2005214534 A JP2005214534 A JP 2005214534A JP 2007035787 A JP2007035787 A JP 2007035787A
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wiring
shield
signal
wiring board
film
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JP4634883B2 (en
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Hiroshi Takamatsu
宏 高松
Yoshio Ogawa
誉夫 小川
Susumu Yanagihori
進 柳堀
Yoshifumi Ueno
祥史 上野
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Dexerials Corp
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Sony Chemical and Information Device Corp
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/025—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
    • H05K1/0253—Impedance adaptations of transmission lines by special lay-out of power planes, e.g. providing openings
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09681—Mesh conductors, e.g. as a ground plane

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring board with uniform characteristic impedances of signal wirings. <P>SOLUTION: When a shield film 20 is wound around a board body 10, an overlapping region 28 in the vicinity of ends 25<SB>1</SB>, 25<SB>2</SB>of the shield film 20 are made to cross obliquely parallel portions of the signal wirings 11a, so as to permit each signal wiring 11a to traverse obliquely the overlapping region 28. The overlapping region 28 is prevented from being unevenly distributed to make equal the characteristic impedances of the respective signal wirings 11a. The characteristic impedances are made further equal by making equal traversing lengths of the respective signal wirings 11a. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は配線基板の技術分野にかかり、特に、シールドで両面が覆われた配線基板に関する。   The present invention relates to the technical field of wiring boards, and more particularly to a wiring board whose both surfaces are covered with a shield.

従来の配線基板は、基板本体に、シールドフィルムが巻き回されて構成されている。   A conventional wiring board is configured by winding a shield film around a board body.

図１１の符号１１０は、基板本体であり、ベースフィルム１１７上に、複数本の配線１１１が配置されており、その表面には、カバーフィルムが配置されている。
配線１１１は直線状であり、互いに平行に配置されている。両端に配置された配線１１１は、接地配線であり、その上のカバーフィルムの部分には開口が形成されている。
両端位置の接地配線を除く配線１１１は、信号配線であり、信号配線の厚みと接地配線の厚みは等しくされている。 Reference numeral 110 in FIG. 11 denotes a substrate body, on which a plurality of wirings 111 are arranged on a base film 117, and a cover film is arranged on the surface thereof.
The wirings 111 are linear and are arranged in parallel to each other. The wiring 111 arranged at both ends is a ground wiring, and an opening is formed in the cover film portion thereon.
The wiring 111 excluding the ground wiring at both end positions is a signal wiring, and the thickness of the signal wiring is equal to the thickness of the ground wiring.

次に、図１２の符号１２０はシールドフィルムを示しており、ベースフィルム１２７上に、網状のシールド配線１２１が配置されている。シールド配線１２１の表面には、異方導電性接着剤１２８が塗布されている。   Next, reference numeral 120 in FIG. 12 denotes a shield film, and a net-like shield wiring 121 is arranged on the base film 127. An anisotropic conductive adhesive 128 is applied to the surface of the shield wiring 121.

このシールドフィルム１２０の異方導電性接着剤側をカバーフィルムに当接させ、基板本体１１０に巻き回すと、異方導電性接着剤により、接地配線とシールド配線１２１とが接続され、図１３(ａ)、(ｂ)に示すように、信号配線がシールド配線１２１で囲まれた配線基板１３０が得られる。図１３(ａ)は、正面図、同図(ｂ)は背面図である。   When the anisotropic conductive adhesive side of the shield film 120 is brought into contact with the cover film and wound around the substrate body 110, the ground wiring and the shield wiring 121 are connected by the anisotropic conductive adhesive, and FIG. As shown in a) and (b), the wiring board 130 in which the signal wiring is surrounded by the shield wiring 121 is obtained. FIG. 13A is a front view, and FIG. 13B is a rear view.

シールドリム１２０を巻き回したときに隙間が生じないように、シールドフィルム１２０の幅は、基板本体１１０の幅の二倍以上の大きさにされており、シールドフィルム１２０の左右両端１２５1、１２５2が重なり合う重複領域１２８が生じる。 As no gap when the wound shield rim 120, the width of the shielding film 120 is more than doubled in size of the width of the substrate main body 110, right and left ends 125 1, 125 of the shielding film 120 An overlapping region 128 where 2 overlaps occurs.

この重複領域１２８では左右両端１２５1、１２５2のシールド配線１２１が重なり合うため、重複領域１２５以外の部分に比べ、シールド配線１２１の面積が大きくなる。 In this overlapping region 128, the shield wirings 121 at both the left and right ends 125 1 and 125 2 overlap each other, so that the area of the shielding wiring 121 becomes larger than the portion other than the overlapping region 125.

従って、重複領域１２５上に位置する信号配線の特性インピーダンスと、重複領域１２５以外の領域上に位置する信号配線の特性インピーダンスが一致しないという問題が生じた。   Therefore, there has been a problem that the characteristic impedance of the signal wiring located on the overlapping region 125 and the characteristic impedance of the signal wiring located on the region other than the overlapping region 125 do not match.

シールド配線のパターン形状については、例えば下記先行技術で言及されている。
特開平４−１２７５９８号公報 The pattern shape of the shield wiring is mentioned in the following prior art, for example.
Japanese Patent Laid-Open No. 4-127598

本発明は上記従来技術の問題を解決するために創作されたものであり、その目的は、各々の信号配線で特性インピーダンスに差が生じない配線基板を提供することにある。   The present invention was created to solve the above-described problems of the prior art, and an object of the present invention is to provide a wiring board in which there is no difference in characteristic impedance between each signal wiring.

上記課題を解決するため、本発明は、ベースフィルム上に複数の信号配線が配置された基板本体と、網状のシールド配線が設けられたシールドフィルムとを有し、前記シールドフィルムは前記基板本体に巻き回され、前記シールドフィルムの巻き回しの両端は重ね合わされ、前記シールドフィルムの重複領域が形成された配線基板であって、前記信号配線は、互いに平行に配置された部分を有し、前記重複領域は前記信号配線の平行に配置された部分と斜めに交差し、前記各信号配線は前記重複領域を斜めに横断するように配置された配線基板である。
本発明は、請求項１記載の配線基板であって、前記重複領域の幅は一定である。
本発明は、請求項１又は請求項２のいずれか１項記載の配線基板であって、前記各信号配線の前記重複領域を横断する部分の長さは等しくされた配線基板である。
本発明は、請求項１乃至請求項３のいずれか１項記載の配線基板であって、前記重複領域は、前記基板本体の片側に配置された配線基板である。
本発明は、ベースフィルム上に複数の信号配線が配置された基板本体と、網状のシールド配線が設けられたシールドフィルムとを有し、前記シールドフィルムは前記基板本体に巻き回された配線基板であって、前記シールドフィルムの巻き回しの両端には、前記シールド配線が存しない隙間領域が設けられ、前記信号配線は、互いに平行に配置された部分を有し、前記隙間領域は前記信号配線の平行に配置された部分と斜めに交差し、前記各信号配線は前記隙間領域を斜めに横断するように配置された配線基板である。
本発明は、請求項５記載の配線基板であって、前記隙間領域の幅は一定である。
本発明は、請求項５又は請求項６のいずれか１項記載の配線基板であって、前記各信号配線の前記隙間領域を横断する部分の長さは等しくされた配線基板である。
本発明は、請求項５乃至請求項７のいずれか１項記載の配線基板であって、前記隙間領域は、前記基板本体の片側に配置された配線基板である。
本発明は、請求項１乃至請求項８のいずれか１項記載の配線基板であって、前記信号配線の両脇にはそれぞれ接地配線が配置され、前記シールド配線は前記接地配線に接続された配線基板である。
本発明は、請求項９記載の配線基板であって、前記カバーフィルムには開口が設けられ、前記シールド配線は前記開口底面に露出する前記接地配線に接続され配線基板である。
本発明は、請求項１乃至請求項１０のいずれか１項記載の配線基板であって、前記シールドフィルムは互いに平行な第一、第二の辺と、前記第一、第二の辺とは９０°以外の角度を成し、互いに平行な第三、第四の辺を有し、前記第一、第二の辺の間の距離は前記信号配線の両端間の距離よりも短く、前記第一、第二の辺の外側に前記信号配線の両端が位置する配線基板である。
本発明は、ベースフィルム上に複数の信号配線が配置された基板本体に、網状のシールド配線が設けられたシールドフィルムを巻き回し、配線基板を製造する配線基板製造方法であって、前記シールドフィルムの巻き回しの両端を重ね合わせて重複領域を形成する際、前記重複領域と、前記信号配線の互いに平行に配置された部分とを斜めに交差させ、前記各信号配線が前記重複領域を斜めに横断させる配線基板製造方法である。
本発明は、請求項１２記載の配線基板の製造方法であって、前記各信号配線が前記重複領域を横断する部分の長さを等しくさせる。
本発明は、ベースフィルム上に複数の信号配線が配置された基板本体に、網状のシールド配線が設けられたシールドフィルムを巻き回し、配線基板を製造する配線基板製造方法であって、前記シールドフィルムの巻き回しの両端を接触させず、前記信号配線の互いに平行に配置された部分に対して斜めに交差する隙間領域を設け、前記各信号配線に、前記隙間領域を斜めに横断させる配線基板製造方法である。
本発明は、請求項１４記載の配線基板の製造方法であって、前記各信号配線が前記隙間領域を横断する部分の長さを等しくさせる。 In order to solve the above-mentioned problems, the present invention has a substrate body in which a plurality of signal wires are arranged on a base film, and a shield film in which a net-like shield wire is provided, and the shield film is attached to the substrate body. The wiring board is wound, and both ends of the winding of the shield film are overlapped, and an overlapping region of the shielding film is formed, and the signal wiring has portions arranged in parallel to each other, and the overlapping The region is a wiring substrate disposed so as to obliquely intersect with the portion of the signal wiring arranged in parallel, and each signal wiring is disposed obliquely across the overlapping region.
The present invention is the wiring board according to claim 1, wherein the width of the overlapping region is constant.
The present invention is the wiring board according to any one of claims 1 and 2, wherein the lengths of the portions of the signal wirings that cross the overlapping region are equal.
The present invention is the wiring board according to any one of claims 1 to 3, wherein the overlapping region is arranged on one side of the board body.
The present invention has a substrate body in which a plurality of signal wires are arranged on a base film, and a shield film provided with a net-like shield wire, and the shield film is a wiring substrate wound around the substrate body. In addition, a gap region where the shield wiring does not exist is provided at both ends of the winding of the shield film, the signal wiring has portions arranged in parallel to each other, and the gap region is formed of the signal wiring. The signal wirings are wiring boards arranged so as to cross diagonally with the parallel parts, and so that each of the signal wirings crosses the gap region diagonally.
The present invention is the wiring board according to claim 5, wherein the width of the gap region is constant.
The present invention is the wiring board according to any one of claims 5 and 6, wherein the lengths of the portions of the signal wirings that cross the gap region are equal.
The present invention is the wiring board according to any one of claims 5 to 7, wherein the gap region is disposed on one side of the board body.
The present invention is the wiring board according to any one of claims 1 to 8, wherein ground wirings are arranged on both sides of the signal wiring, and the shield wiring is connected to the ground wiring. It is a wiring board.
The present invention is the wiring board according to claim 9, wherein the cover film is provided with an opening, and the shield wiring is connected to the ground wiring exposed at the bottom of the opening.
The present invention is the wiring board according to any one of claims 1 to 10, wherein the shield film includes first and second sides parallel to each other and the first and second sides. The first and second sides have an angle other than 90 ° and are parallel to each other, and the distance between the first and second sides is shorter than the distance between both ends of the signal wiring. It is a wiring board in which both ends of the signal wiring are located outside the first and second sides.
The present invention is a wiring board manufacturing method for manufacturing a wiring board by winding a shielding film provided with a net-like shielding wiring around a substrate body on which a plurality of signal wirings are arranged on a base film, the shielding film When overlapping regions are formed by overlapping both ends of the winding, the overlapping region and a portion of the signal wiring arranged in parallel with each other are obliquely intersected, and each signal wiring obliquely intersects the overlapping region. A wiring board manufacturing method for traversing.
The present invention is the method for manufacturing a wiring board according to claim 12, wherein the lengths of the portions where each of the signal wirings crosses the overlapping region are made equal.
The present invention is a wiring board manufacturing method for manufacturing a wiring board by winding a shielding film provided with a net-like shielding wiring around a substrate body in which a plurality of signal wirings are arranged on a base film, wherein the shielding film A wiring board manufacturing method in which a gap region that obliquely intersects each of the signal wirings arranged parallel to each other is provided without contacting both ends of the winding of the wire, and each signal wiring is obliquely crossing the gap region Is the method.
The present invention is the method for manufacturing a wiring board according to claim 14, wherein the lengths of the portions where each of the signal wirings crosses the gap region are made equal.

本発明は上記のように構成されており、各信号配線がシールドフィルムで囲まれるようにするため、シールドフィルムの巻き始め位置付近と巻き終わり位置付近を重ね合わせ、重複領域を形成している。
この重複領域が偏在すると各信号配線と重複領域との間の容量成分の大きさが一致しない。 The present invention is configured as described above, and in order to surround each signal wiring with a shield film, the vicinity of the winding start position and the vicinity of the winding end position of the shield film are overlapped to form an overlapping region.
If this overlapping area is unevenly distributed, the magnitudes of the capacitance components between the signal wirings and the overlapping area do not match.

本発明では、重複領域を信号配線の平行な部分に対して斜めに配置し、全ての信号配線が重複領域を斜めに横断させるか、又は、巻き始め位置と巻き終わり位置の間に隙間領域を設け、全ての信号配線が隙間領域を斜めに横断するようにする。隙間領域部分には接地配線は設けない。
各信号配線が重複領域を横断する部分の長さを等しくし、又は各信号配線が隙間領域を横断する部分の長さを等しくすると、更に容量成分の大きさが一致する。 In the present invention, the overlapping region is arranged obliquely with respect to the parallel part of the signal wiring, and all the signal wirings cross the overlapping region diagonally, or a gap region is provided between the winding start position and the winding end position. Provide all signal wirings diagonally across the gap area. No ground wiring is provided in the gap area.
When the length of the part where each signal wiring crosses the overlapping region is made equal, or the length of the part where each signal wiring crosses the gap region is made equal, the magnitudes of the capacitance components further match.

重複領域の偏在が解消され、各々の信号配線に対する重複領域や隙間領域の影響が等しくなる。   The uneven distribution of the overlapping area is eliminated, and the influence of the overlapping area and the gap area on each signal wiring becomes equal.

本発明の実施例を説明する。
図１、図２の符号１０は基板本体であり、ＰＥＴフィルムやポリイミドフィルム等のベースフィルム１７上に、配線１１が配置されている。配線１１は、金属細線やパターニングされた金属箔で構成されている。金属の種類は銅や銅合金であるが、それに限定されない。 Examples of the present invention will be described.
Reference numeral 10 in FIGS. 1 and 2 denotes a substrate body, and a wiring 11 is disposed on a base film 17 such as a PET film or a polyimide film. The wiring 11 is composed of a thin metal wire or a patterned metal foil. The type of metal is copper or a copper alloy, but is not limited thereto.

配線１１上にはＰＥＴフィルムやポリイミド等のカバーフィルム１８が貼付されている。図２は、図１のＡ−Ａ線切断面図であるが、図１では、カバーフィルム１８は省略されている。   A cover film 18 such as a PET film or polyimide is stuck on the wiring 11. FIG. 2 is a cross-sectional view taken along the line AA in FIG. 1, but the cover film 18 is omitted in FIG. 1.

配線１１は等幅の直線状であり、互いに平行に等間隔に配置されている。互いに平行に並んだ配線のうち、両端に位置する配線は接地配線であり、接地配線で挟まれた配線は信号配線である。図１、図２の符号１１ａは信号配線を示しており、符号１１ｂは接地配線を示している。   The wiring 11 is a straight line having an equal width and is arranged in parallel with each other at equal intervals. Of the wirings arranged in parallel to each other, the wirings located at both ends are ground wirings, and the wirings sandwiched between the ground wirings are signal wirings. In FIG. 1 and FIG. 2, reference numeral 11a indicates a signal wiring, and reference numeral 11b indicates a ground wiring.

カバーフィルム１８のうち、接地配線１１ｂ上の部分は接地配線１１ｂに沿って開口１９が形成され、開口１９底面に接地配線１１ｂの表面が露出されている。接地配線１１ｂの厚みと信号配線１１ａの厚みは同じである。   An opening 19 is formed in the cover film 18 on the ground wiring 11 b along the ground wiring 11 b, and the surface of the ground wiring 11 b is exposed on the bottom of the opening 19. The thickness of the ground wiring 11b and the thickness of the signal wiring 11a are the same.

図３、図４の符号２０はシールドフィルムであり、ＰＥＴフィルムやポリイミドフィルム等のベースフィルム２７上に、網状のシールド配線２１が配置されている。網の目に当たる部分２２には、シールド配線２１は配置されていない。   Reference numeral 20 in FIGS. 3 and 4 denotes a shield film, and a net-like shield wiring 21 is disposed on a base film 27 such as a PET film or a polyimide film. The shield wiring 21 is not arranged in the portion 22 that hits the mesh.

シールド配線２１上には異方導電性接着剤層２８が配置されている。図４は、図３のＢ−Ｂ線切断面図であるが、図３では、異方導電性接着剤層２８は省略されている。   An anisotropic conductive adhesive layer 28 is disposed on the shield wiring 21. 4 is a cross-sectional view taken along the line BB of FIG. 3, but the anisotropic conductive adhesive layer 28 is omitted in FIG. 3.

シールドフィルム２０の平面形状は平行四辺形に近く、互いに平行な第一、第二の辺２４ａ、２４ｂと、第一、第二の辺２４ａ、２４ｂに対して９０°以外の角度θを成す第三、第四の辺２５1、２５2を有している。第三、第四の辺２５1、２５2は互いに平行である。 The planar shape of the shield film 20 is close to a parallelogram, and the first and second sides 24a and 24b that are parallel to each other and the first and second sides 24a and 24b form an angle θ other than 90 °. It has third and fourth sides 25 1 , 25 2 . The third and fourth sides 25 1 and 25 2 are parallel to each other.

各配線１１の両端には接続領域１２が設けられている。接続領域１２上にはカバーフィルムは配置されておらず、その表面は露出されている。
基板本体１０は、配線１１の長さと平行な方向が長辺となる長方形形状であり、接続領域１２は、基板本体１０の短辺の近くに、短辺に沿って並べられている。 Connection regions 12 are provided at both ends of each wiring 11. The cover film is not disposed on the connection region 12, and the surface thereof is exposed.
The substrate body 10 has a rectangular shape having a long side in a direction parallel to the length of the wiring 11, and the connection region 12 is arranged near the short side of the substrate body 10 along the short side.

シールドフィルム２０を基板本体１０に貼付するときには、先ず、シールドフィルム２０の異方導電性接着剤層２８を基板本体１０に向け、基板本体１０に異方導電性接着剤層２８が密着するように巻き回すと、開口１９底面に露出する接地配線１１ｂとシールド配線２１とが、異方導電性接着剤層２８中に含有された導電粒子を介して密着され、互いに電気的に接続される。   When sticking the shield film 20 to the substrate body 10, first, the anisotropic conductive adhesive layer 28 of the shield film 20 is directed to the substrate body 10 so that the anisotropic conductive adhesive layer 28 is in close contact with the substrate body 10. When wound, the ground wiring 11b exposed to the bottom surface of the opening 19 and the shield wiring 21 are brought into close contact with each other through the conductive particles contained in the anisotropic conductive adhesive layer 28, and are electrically connected to each other.

シールドフィルム２０の第一、第二の辺２４ａ、２４ｂ間の距離Ｌは、各配線１１の接続領域１２を除く部分の長さよりも短くされており、シールドフィルム２０を巻き回す際には、シールドフィルム２０の第一、第二の辺２４ａ、２４ｂが、接続領域１２の並び方向に対して平行になるようにし、接続領域１２がシールドフィルム２０で覆われた部分の外側に位置するようにする。接続領域１２がシールドフィルム２０の外側に位置するのでシールドフィルム２０で覆われない。   The distance L between the first and second sides 24a, 24b of the shield film 20 is shorter than the length of the portion excluding the connection region 12 of each wiring 11, and when the shield film 20 is wound, the distance L The first and second sides 24 a and 24 b of the film 20 are made parallel to the direction in which the connection regions 12 are arranged, and the connection region 12 is positioned outside the portion covered with the shield film 20. . Since the connection region 12 is located outside the shield film 20, it is not covered with the shield film 20.

第一、第二の辺２４ａ、２４ｂは、互いに向き合う部分を有しており、その部分を二辺とし、第一、第二の辺２４ａ、２４ｂに垂直な線分を他の二辺とする仮想的な長方形Ｓが構成される。   The first and second sides 24a and 24b have portions facing each other, the two portions are the two sides, and the line segments perpendicular to the first and second sides 24a and 24b are the other two sides. A virtual rectangle S is constructed.

その長方形Ｓの幅Ｆ、即ち第一、第二の辺２４ａ、２４ｂの対向する部分の長さＦは、基板本体１０の幅(短辺の長さ)Ｒと等しいか、それよりも広くされており、仮想的な四角形Ｓを基板本体１０の表面側に配置し、長方形Ｓの両側部分が基板本体１０の裏面側の面に折り曲げられているときには、第三、第四の辺２５1、２５2は、裏面側に位置する。 The width F of the rectangle S, that is, the length F of the opposing portions of the first and second sides 24a and 24b is equal to or wider than the width (short side length) R of the substrate body 10. When the virtual rectangle S is disposed on the front surface side of the substrate body 10 and both side portions of the rectangle S are bent on the back surface side of the substrate body 10, the third and fourth sides 25 1 , 25 2 is located on the back side.

第三、第四の辺２５1、２５2の間の距離であって、第一、第二の辺２４ａ、２４ｂに沿った方向の長さＷは、基板本体１０の幅Ｒの二倍よりも大きくされており、そのため、シールドフィルム１０を折り曲げ、基板本体１０に巻き回したときに、シールドフィルム１０の第三、第四の辺２５1、２５2側の端部は基板本体１０の裏面側で重なり合う。 The distance W between the third and fourth sides 25 1 , 25 2 and the length W in the direction along the first and second sides 24 a, 24 b is more than twice the width R of the substrate body 10. Therefore, when the shield film 10 is bent and wound around the substrate body 10, the end portions on the third and fourth sides 25 1 and 25 2 side of the shield film 10 are the back surface of the substrate body 10. Overlap on the side.

図５(ａ)、(ｂ)の符号３０は、基板本体１０にシールドフィルム２０が巻き回された本発明の第一例の配線基板を示している。同図(ａ)は表面側、同図(ｂ)は裏面側である。カバーフィルム１８は省略してある。   Reference numeral 30 in FIGS. 5A and 5B denotes the wiring board of the first example of the present invention in which the shield film 20 is wound around the substrate body 10. FIG. 4A shows the front side, and FIG. 4B shows the back side. The cover film 18 is omitted.

図５(ｂ)に示すように、裏面側には第三、第四の辺２５1、２５2の付近が重なった重複領域２８が形成される。
この重複領域２８は、基板本体１０の一方の長辺から他方の長辺まで亘っており、重複領域２８の両端は、基板本体１０の縁付近に位置する接地配線１１ｂと重なっている。 As shown in FIG. 5B, an overlapping region 28 in which the vicinity of the third and fourth sides 25 1 and 25 2 overlap is formed on the back surface side.
The overlapping region 28 extends from one long side to the other long side of the substrate body 10, and both ends of the overlapping region 28 overlap with the ground wiring 11 b located near the edge of the substrate body 10.

また、重複領域２８の一端は、基板本体１０の一方の短辺側に位置し、他端は他方の短辺側に位置しており、従って、重複領域２８は、信号配線１１ａ上を斜めに横断している。   One end of the overlap region 28 is located on one short side of the substrate body 10 and the other end is located on the other short side. Therefore, the overlap region 28 is inclined on the signal wiring 11a. Crossing.

シールドフィルム２０の第三、第四の辺２５1、２５2は、巻き回された状態でも互いに平行になっており、従って、重複領域２８の幅は一定であり、各信号配線１１ａが重複領域２８上を横断する長さは等しく、各信号配線１１ａは重複領域２８と重なる部分の面積は等しくなる。 The third and fourth sides 25 1 , 25 2 of the shield film 20 are parallel to each other even when they are wound. Therefore, the width of the overlapping region 28 is constant, and each signal line 11a is overlapped. The lengths crossing over 28 are equal, and each signal wiring 11a has the same area in the portion overlapping the overlapping region 28.

従って、重複領域２８内でのシールド配線２１の分布が均一であるとすると、重複領域２８と信号配線１１aとの間に形成される容量成分の大きさは、各信号配線１１ａ間で等しくなる。   Therefore, if the distribution of the shield wiring 21 in the overlapping region 28 is uniform, the size of the capacitance component formed between the overlapping region 28 and the signal wiring 11a is equal between the signal wirings 11a.

重複領域２８以外の部分でも、シールドフィルム２０と各信号配線１１ａ間の容量成分の大きさは等しいから、結局、各信号配線１１ａとシールドフィルム２０との間の容量成分は等しくなり、信号配線１１ａの特性インピーダンスが一致する。   Even in the portion other than the overlapping region 28, the magnitude of the capacitance component between the shield film 20 and each signal wiring 11a is the same. Consequently, the capacitance component between each signal wiring 11a and the shield film 20 becomes equal, and the signal wiring 11a. The characteristic impedance of

上記配線基板３０では、シールドフィルム２０の両端に隙間や重複が生じないように巻き回すことが困難であったため、ノイズが侵入しないように、シールドフィルム２０の巻き回し両端位置を重ね合わせ、基板本体１０の全周をシールドフィルム２０によって覆ったが、重複部分が厚くなると不都合な場合がある。   In the wiring substrate 30, since it was difficult to wind the shield film 20 so that no gaps or overlaps occur at both ends, the shield film 20 is wound at both ends so that noise does not invade. Although the entire circumference of 10 is covered with the shield film 20, it may be inconvenient if the overlapping portion becomes thick.

図８の符号３１は、本発明の第二例の配線基板を示しており、重複部分は設けられていない。図８は、第二例の配線基板３１の裏面である。図８のＤ−Ｄ線切断面図を図９に示す。   The code | symbol 31 of FIG. 8 has shown the wiring board of the 2nd example of this invention, and the overlapping part is not provided. FIG. 8 is a back surface of the wiring board 31 of the second example. A sectional view taken along the line D-D in FIG. 8 is shown in FIG.

この配線基板３１は、上記第一例の配線基板３０と同じ基板本体１０とを有している。第二例の配線基板３１は、第一例の配線基板３０のシールドフィルム２０とは平面形状が異なる他は同じ構造のシールドフィルム５０を有している。   The wiring board 31 has the same substrate body 10 as the wiring board 30 of the first example. The wiring board 31 of the second example has a shielding film 50 having the same structure except that the planar shape is different from the shielding film 20 of the wiring board 30 of the first example.

第二例の配線基板３１の表面側の平面形状は第一例の配線基板３０の表面側の平面形状と同じであり、図５(ａ)に表されている。
第二例の配線基板３１のシールドフィルム５０の平面図を図１０に示す。このシールドフィルム５０については、上記実施例のシールドフィルム２０と同じ部材には同じ符号を付して説明を省略する。 The planar shape on the surface side of the wiring board 31 of the second example is the same as the planar shape on the surface side of the wiring board 30 of the first example, and is shown in FIG.
A plan view of the shield film 50 of the wiring board 31 of the second example is shown in FIG. About this shield film 50, the same code | symbol is attached | subjected to the same member as the shield film 20 of the said Example, and description is abbreviate | omitted.

このシールドフィルム５０の平面形状は略平行四辺形であり、前例のシールドフィルム２０と同様に、第一、第二の辺２４ａ、２４ｂに対して９０°以外の角度θを成す第三、第四の辺２５1、２５2を有している。 The planar shape of the shield film 50 is a substantially parallelogram, and, like the shield film 20 of the previous example, the third and fourth angles forming an angle θ other than 90 ° with respect to the first and second sides 24a and 24b. Side 25 1 , 25 2 .

第一、第二の辺２４ａ、２４ｂの長さＵは、基板本体１０の幅Ｒの二倍よりも短くされており、従って、第一、第二の辺２４ａ、２４ｂを基板本体１０の幅方向と平行にし、シールドフィルム５０の中央部分が基板本体１０の表面側に位置するように巻き回したときに、シールドフィルム５０の両端は接触せず、網状のシールド配線２１が存しない隙間領域２９が形成される。   The length U of the first and second sides 24 a and 24 b is shorter than twice the width R of the substrate body 10, and accordingly, the first and second sides 24 a and 24 b are made the width of the substrate body 10. When it is wound so that the central portion of the shield film 50 is positioned on the surface side of the substrate body 10 in parallel with the direction, the both ends of the shield film 50 are not in contact with each other, and the gap region 29 in which the net-like shield wiring 21 does not exist Is formed.

第一、第二の辺２４ａ、２４ｂは互いに平行であり、第三、第四の辺２５1、２５2の第一、第二の辺２４ａ、２４ｂに対する角度θは等しいから、第三、第四の辺２５1、２５2は平行であり、隙間領域２９の幅は一定である。 The first and second sides 24a and 24b are parallel to each other, and the angles θ of the third and fourth sides 25 1 and 25 2 with respect to the first and second sides 24a and 24b are equal. The four sides 25 1 and 25 2 are parallel, and the width of the gap region 29 is constant.

また、この隙間領域２９は基板本体１０に対して斜めに配置されており、各信号配線１１ａは隙間領域２９を横断している。ここでは、信号配線１１ａの両端に配置された接地配線１１ｂも隙間領域２９を横断している。   Further, the gap region 29 is disposed obliquely with respect to the substrate body 10, and each signal wiring 11 a crosses the gap region 29. Here, the ground wiring 11b disposed at both ends of the signal wiring 11a also crosses the gap region 29.

各信号配線１１ａが隙間領域２９を横断する長さは等しく、各信号配線１１ａが隙間領域２９と重複する部分の面積は等しいから、隙間領域２９が各信号配線１１ａの容量成分に与える影響は等しくなり、その結果、信号配線１１ａ間の電気的特性が相違しないようになっている。   Since the length of each signal wiring 11a traversing the gap region 29 is equal and the area of each signal wiring 11a overlapping the gap region 29 is equal, the influence of the gap region 29 on the capacitance component of each signal wiring 11a is equal. As a result, the electrical characteristics between the signal wirings 11a do not differ.

ここで、隙間領域２９の幅は大きくても数ｍｍ、望ましくは１ｍｍ以下であり、シールド配線２１が存しない部分は短いので信号配線１１ａにノイズは侵入しない。   Here, the width of the gap region 29 is several mm at most, preferably 1 mm or less, and the portion where the shield wiring 21 does not exist is short, so that noise does not enter the signal wiring 11a.

なお、上記第二例の配線基板３１では、隙間領域２９にはシールドフィルム５０が存せず、従ってシールドフィルム５０のカバーフィルム２７も存しなかったが、予め、シールドフィルム５０のカバーフィルム２７上に、シールド配線２１が存しない部分を設けておき、隙間領域２９にその部分が位置するように巻き回し、シールド配線２１が配置されないカバーフィルム２７によって隙間領域２９を形成してもよい。   In the wiring substrate 31 of the second example, the shield film 50 does not exist in the gap region 29, and thus the cover film 27 of the shield film 50 does not exist. In addition, a portion where the shield wiring 21 does not exist may be provided, and the gap region 29 may be formed by the cover film 27 where the shield wiring 21 is not disposed by winding the portion so that the portion is located in the gap region 29.

上記第一、第二例では、シールド配線２１は、互いに平行で等間隔な配線を交差させたが、シールド配線２１はそれに限定されるものではなく、網状に形成すればよい。   In the first and second examples, the shield wirings 21 are crossed at equal intervals and parallel to each other. However, the shield wirings 21 are not limited thereto and may be formed in a net shape.

例えば、図７に示すシールドフィルム４０のように、ベースフィルム４７上に配置された金属箔、又は金属層をエッチングによって部分的に除去し、残った部分でシールド配線４１を構成させてもよい。同図符号４２は、除去部分を示しており、円形の他、三角形、四角形、六角形等の多角形状でもよい。また、それらを混在させてもよい。   For example, like the shield film 40 shown in FIG. 7, the metal foil or the metal layer arranged on the base film 47 may be partially removed by etching, and the shield wiring 41 may be configured by the remaining portion. The reference numeral 42 indicates a removed portion, and may be a polygonal shape such as a triangle, a quadrangle, or a hexagon other than a circle. Moreover, you may mix them.

いずれにしろ、本発明に用いることができるシールドフィルムは、平行四辺形に近い平面形状であり、基板本体１０に巻き回したときに、互いに平行な二辺４５1、４５2に近い部分が重なり合うか、又は隙間ができるようにすればよく、更に、重複領域や隙間領域は一定幅にし、各信号配線１１ａが重複領域、又は隙間領域上を横断する長さは等しく、その結果、各信号配線１１ａに与える重複領域や隙間領域の影響が同じで、各信号配線１１ａの容量成分が等しくなればよい。
更に、シールド配線２１は、エッチングではなく、金属箔の打ち抜きで形成してもよい。 In any case, the shield film that can be used in the present invention has a planar shape close to a parallelogram, and when wound around the substrate body 10, the portions close to the two parallel sides 45 1 and 45 2 overlap each other. In addition, the overlap area or the gap area may be made constant, and the lengths of the signal wirings 11a crossing the overlap area or the gap area are equal. As a result, each signal wiring The influence of the overlapping region and the gap region on 11a is the same, and it is only necessary that the capacitance components of the signal wirings 11a are equal.
Further, the shield wiring 21 may be formed by punching a metal foil instead of etching.

なお、上記第一、第二例の配線基板３０、３１では、重複領域２８や隙間領域２９を基板本体１０の裏面側に配置したが、カバーフィルム１８が位置する表面側に配置してもよい。   In the wiring substrates 30 and 31 of the first and second examples, the overlapping region 28 and the gap region 29 are disposed on the back side of the substrate body 10, but may be disposed on the front side where the cover film 18 is located. .

また、基板本体１０は長方形形状に限定されるものではなく、重複領域２８や隙間領域２９を各信号配線１１ａが横断し、各信号配線１１ａの横断する部分の長さが等しくなればよい。要するに、各信号配線１１ａと重複領域２８との間に形成される容量成分の大きさが等しくなり、又は隙間領域２９が各信号配線１１ａに与える影響が等しくなり、各信号配線１１ａの電気的特性が一致すればよい。
上記配線１１ａ、１１ｂの両端の接続領域１２は、他の部分よりも幅広に形成してもよい。 Further, the substrate body 10 is not limited to a rectangular shape, and it is only necessary that each signal wiring 11a crosses the overlapping region 28 and the gap region 29 and the lengths of the portions crossing each signal wiring 11a are equal. In short, the size of the capacitance component formed between each signal line 11a and the overlap region 28 becomes equal, or the influence of the gap region 29 on each signal line 11a becomes equal, and the electrical characteristics of each signal line 11a. Should match.
The connection regions 12 at both ends of the wirings 11a and 11b may be formed wider than other portions.

また、上記実施例では、接地配線１１ｂを両端に配置し、シールド性を向上させたが、必ずしも両端に配置される場合に限定されるものではない。
更に又、両端に配置した接地配線に加え、他の接地配線を信号配線中に混在させることもできる。 Moreover, in the said Example, although the ground wiring 11b was arrange | positioned at both ends and the shielding property was improved, it is not necessarily limited to the case where it arrange | positions at both ends.
Furthermore, in addition to the ground wiring arranged at both ends, other ground wiring can be mixed in the signal wiring.

なお、第一例の配線基板３０では重複領域２８が設けられ、第二例の配線基板３１では隙間領域２９が設けられていたが、本発明の配線基板はシールド配線２１の重複領域２８と隙間領域２９とが混在せず、いずれか一方の領域を信号配線１１ａが横断するようにすればよい。   In addition, although the overlap area 28 was provided in the wiring board 30 of the first example and the gap area 29 was provided in the wiring board 31 of the second example, the wiring board of the present invention has a gap between the overlap area 28 and the shield wiring 21. What is necessary is just to make it the signal wiring 11a cross the any one area | region without mixing with the area | region 29. FIG.

本発明に用いられる基板本体の一例Example of substrate body used in the present invention そのＡ−Ａ線切断断面図Sectional view taken along line AA 本発明に用いられるシールドフィルムの一例An example of a shield film used in the present invention そのＢ−Ｂ線切断断面図Sectional view taken along line BB 本発明の第一例の配線基板の(ａ)：表面、(ｂ)：裏面(A): front surface, (b): back surface of the wiring board of the first example of the present invention そのＣ−Ｃ線切断断面図The CC sectional view taken on the line 本発明に用いられるシールドフィルムの他の例Other examples of shield film used in the present invention 本発明の第二例の配線基板(裏面)The wiring board (back surface) of the second example of the present invention そのＤ−Ｄ線切断面図The DD line cut surface view 第二例の配線基板に用いられるシールドフィルムの例Example of shield film used for wiring board of second example 基板本体の例Example of board body シールドフィルムの例Shield film example 従来技術の配線基板の(ａ)：表面、(ｂ)：裏面Conventional circuit board (a): Front side, (b): Back side

符号の説明Explanation of symbols

１０……基板本体
１１ａ……信号配線
１１ｂ……接地配線
１７……ベースフィルム
１９……開口
２０、４０、５０……シールドフィルム
２８……重複領域
２９……隙間領域
３０、３１……配線基板 DESCRIPTION OF SYMBOLS 10 ... Board | substrate body 11a ... Signal wiring 11b ... Grounding wiring 17 ... Base film 19 ... Opening 20, 40, 50 ... Shield film 28 ... Overlapping area 29 ... Crevice area 30, 31 ... Wiring board

Claims (15)

ベースフィルム上に複数の信号配線が配置された基板本体と、
網状のシールド配線が設けられたシールドフィルムとを有し、
前記シールドフィルムは前記基板本体に巻き回され、
前記シールドフィルムの巻き回しの両端は重ね合わされ、前記シールドフィルムの重複領域が形成された配線基板であって、
前記信号配線は、互いに平行に配置された部分を有し、
前記重複領域は前記信号配線の平行に配置された部分と斜めに交差し、前記各信号配線は前記重複領域を斜めに横断するように配置された配線基板。 A substrate body in which a plurality of signal wires are arranged on a base film;
Having a shield film provided with a net-like shield wiring,
The shield film is wound around the substrate body,
Both ends of the winding of the shield film are overlapped, a wiring board in which an overlapping region of the shield film is formed,
The signal wiring has portions arranged in parallel to each other,
The wiring board is arranged such that the overlapping region obliquely intersects with the portion of the signal wiring arranged in parallel, and each signal wiring obliquely crosses the overlapping region. 前記重複領域の幅は一定である請求項１記載の配線基板。   The wiring board according to claim 1, wherein a width of the overlapping region is constant. 前記各信号配線の前記重複領域を横断する部分の長さは等しくされた請求項１又は請求項２のいずれか１項記載の配線基板。   3. The wiring board according to claim 1, wherein lengths of portions of the respective signal wirings that cross the overlapping region are equalized. 4. 前記重複領域は、前記基板本体の片側に配置された請求項１乃至請求項３のいずれか１項記載の配線基板。   The wiring substrate according to claim 1, wherein the overlapping region is disposed on one side of the substrate body. ベースフィルム上に複数の信号配線が配置された基板本体と、
網状のシールド配線が設けられたシールドフィルムとを有し、
前記シールドフィルムは前記基板本体に巻き回された配線基板であって、
前記シールドフィルムの巻き回しの両端には、前記シールド配線が存しない隙間領域が設けられ、
前記信号配線は、互いに平行に配置された部分を有し、
前記隙間領域は前記信号配線の平行に配置された部分と斜めに交差し、前記各信号配線は前記隙間領域を斜めに横断するように配置された配線基板。 A substrate body in which a plurality of signal wires are arranged on a base film;
Having a shield film provided with a net-like shield wiring,
The shield film is a wiring board wound around the substrate body,
At both ends of the winding of the shield film, a gap region where the shield wiring does not exist is provided,
The signal wiring has portions arranged in parallel to each other,
The wiring substrate is arranged such that the gap region obliquely intersects with a portion of the signal wiring arranged in parallel, and the signal wirings obliquely cross the gap region. 前記隙間領域の幅は一定である請求項５記載の配線基板。   The wiring board according to claim 5, wherein a width of the gap region is constant. 前記各信号配線の前記隙間領域を横断する部分の長さは等しくされた請求項５又は請求項６のいずれか１項記載の配線基板。   The wiring board according to any one of claims 5 and 6, wherein lengths of portions of the signal wirings that cross the gap region are made equal. 前記隙間領域は、前記基板本体の片側に配置された請求項５乃至請求項７のいずれか１項記載の配線基板。   The wiring board according to claim 5, wherein the gap region is disposed on one side of the substrate body. 前記信号配線の両脇にはそれぞれ接地配線が配置され、前記シールド配線は前記接地配線に接続された請求項１乃至請求項８のいずれか１項記載の配線基板。   The wiring board according to any one of claims 1 to 8, wherein ground wirings are arranged on both sides of the signal wiring, and the shield wiring is connected to the ground wiring. 前記カバーフィルムには開口が設けられ、前記シールド配線は前記開口底面に露出する前記接地配線に接続された請求項９記載の配線基板。   The wiring board according to claim 9, wherein an opening is provided in the cover film, and the shield wiring is connected to the ground wiring exposed at a bottom surface of the opening. 前記シールドフィルムは互いに平行な第一、第二の辺と、前記第一、第二の辺とは９０°以外の角度を成し、互いに平行な第三、第四の辺を有し、
前記第一、第二の辺の間の距離は前記信号配線の両端間の距離よりも短く、前記第一、第二の辺の外側に前記信号配線の両端が位置する請求項１乃至請求項１０のいずれか１項記載の配線基板。 The shield film has first and second sides parallel to each other, and the first and second sides form an angle other than 90 °, and has third and fourth sides parallel to each other,
The distance between the first and second sides is shorter than the distance between both ends of the signal wiring, and both ends of the signal wiring are located outside the first and second sides. The wiring board according to any one of 10. ベースフィルム上に複数の信号配線が配置された基板本体に、網状のシールド配線が設けられたシールドフィルムを巻き回し、配線基板を製造する配線基板製造方法であって、
前記シールドフィルムの巻き回しの両端を重ね合わせて重複領域を形成する際、
前記重複領域と、前記信号配線の互いに平行に配置された部分とを斜めに交差させ、前記各信号配線が前記重複領域を斜めに横断させる配線基板製造方法。 A wiring board manufacturing method for manufacturing a wiring board by winding a shield film provided with a net-like shield wiring on a substrate body in which a plurality of signal wirings are arranged on a base film,
When forming overlapping regions by overlapping both ends of the winding of the shield film,
A method of manufacturing a wiring board, wherein the overlapping region and a portion of the signal wiring arranged in parallel with each other are obliquely intersected, and the signal wirings obliquely cross the overlapping region. 前記各信号配線が前記重複領域を横断する部分の長さを等しくさせる請求項１２記載の配線基板製造方法。   13. The method of manufacturing a wiring board according to claim 12, wherein the lengths of the portions where each of the signal wires cross the overlapping region are made equal. ベースフィルム上に複数の信号配線が配置された基板本体に、網状のシールド配線が設けられたシールドフィルムを巻き回し、配線基板を製造する配線基板製造方法であって、
前記シールドフィルムの巻き回しの両端を接触させず、前記信号配線の互いに平行に配置された部分に対して斜めに交差する隙間領域を設け、
前記各信号配線に、前記隙間領域を斜めに横断させる配線基板製造方法。 A wiring board manufacturing method for manufacturing a wiring board by winding a shield film provided with a net-like shield wiring on a substrate body in which a plurality of signal wirings are arranged on a base film,
Without contacting both ends of the winding of the shield film, providing a gap region that obliquely intersects with the portions of the signal wiring arranged in parallel with each other,
A method of manufacturing a wiring board, wherein the signal wiring is obliquely traversed by the gap region. 前記各信号配線が前記隙間領域を横断する部分の長さを等しくさせる請求項１４記載の配線基板製造方法。   The method for manufacturing a wiring board according to claim 14, wherein the lengths of the portions where each of the signal wires cross the gap region are made equal.
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010103722A1 (en) * 2009-03-10 2010-09-16 住友ベークライト株式会社 Circuit board
WO2013081074A1 (en) * 2011-11-30 2013-06-06 住友大阪セメント株式会社 Thin-film electroconductive film
JP2017020632A (en) * 2015-07-15 2017-01-26 アズビル株式会社 Positioner
US9915677B2 (en) 2011-07-01 2018-03-13 Tokyo Electron Limited Data acquisition method of substrate processing apparatus and sensing substrate

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6448311A (en) * 1987-08-19 1989-02-22 Fujikura Ltd Shielded tape wire
JPH0364996A (en) * 1989-08-02 1991-03-20 Kitagawa Kogyo Kk Mesh tape
JPH04127598A (en) * 1990-09-19 1992-04-28 Nec Corp Multilayer wiring board
JPH06326476A (en) * 1993-05-13 1994-11-25 Sony Corp Multilayered wiring board
JPH10112224A (en) * 1996-10-04 1998-04-28 Molex Inc Flat flexible cable
JP2000077802A (en) * 1998-08-24 2000-03-14 Itei Kofun Yugenkoshi Substrate having shielding plane with various kinds of opening patterns for transmission time and impedance control
JP2002118339A (en) * 2000-10-05 2002-04-19 Sony Chem Corp Wiring board and manufacturing method therefor

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6448311A (en) * 1987-08-19 1989-02-22 Fujikura Ltd Shielded tape wire
JPH0364996A (en) * 1989-08-02 1991-03-20 Kitagawa Kogyo Kk Mesh tape
JPH04127598A (en) * 1990-09-19 1992-04-28 Nec Corp Multilayer wiring board
JPH06326476A (en) * 1993-05-13 1994-11-25 Sony Corp Multilayered wiring board
JPH10112224A (en) * 1996-10-04 1998-04-28 Molex Inc Flat flexible cable
JP2000077802A (en) * 1998-08-24 2000-03-14 Itei Kofun Yugenkoshi Substrate having shielding plane with various kinds of opening patterns for transmission time and impedance control
JP2002118339A (en) * 2000-10-05 2002-04-19 Sony Chem Corp Wiring board and manufacturing method therefor

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010103722A1 (en) * 2009-03-10 2010-09-16 住友ベークライト株式会社 Circuit board
US9915677B2 (en) 2011-07-01 2018-03-13 Tokyo Electron Limited Data acquisition method of substrate processing apparatus and sensing substrate
KR101853505B1 (en) * 2011-07-01 2018-04-30 도쿄엘렉트론가부시키가이샤 Data acquisition method of substrate processing apparatus and sensing substrate
WO2013081074A1 (en) * 2011-11-30 2013-06-06 住友大阪セメント株式会社 Thin-film electroconductive film
JP2017020632A (en) * 2015-07-15 2017-01-26 アズビル株式会社 Positioner

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