JP2007019404A - High frequency package device - Google Patents

High frequency package device Download PDF

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JP2007019404A
JP2007019404A JP2005201746A JP2005201746A JP2007019404A JP 2007019404 A JP2007019404 A JP 2007019404A JP 2005201746 A JP2005201746 A JP 2005201746A JP 2005201746 A JP2005201746 A JP 2005201746A JP 2007019404 A JP2007019404 A JP 2007019404A
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side wall
cavity
wall portion
substrate plate
line
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Japanese (ja)
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Kazutaka Takagi
一考 高木
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Toshiba Corp
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Toshiba Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

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  • Microwave Amplifiers (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a high frequency package device in which occurrence of a gap is prevented at the joint of a lid forming a cavity and a partition wall without increasing the cost. <P>SOLUTION: The high frequency package device comprises a first sidewall 12a provided on a substrate plate 11 to surround a first space above the substrate plate 11, a first lid 15a sealing the upper opening of the first sidewall 12a and forming a first airtight cavity above the substrate plate 11 together with the first sidewall 12a, a second sidewall 12b provided on the substrate plate 11 to surround a second space different from the first space above the substrate plate 11, and a second lid 15b sealing the upper opening of the second sidewall 12b and forming a second airtight cavity above the substrate plate 11 together with the second sidewall 12b and independent from the first lid 15a. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、マイクロ波やミリ波などの高周波帯で使用する高周波回路を収納する高周波パッケージ装置に関する。   The present invention relates to a high-frequency package apparatus that houses a high-frequency circuit used in a high-frequency band such as a microwave or a millimeter wave.

高周波パッケージ装置は、金属製の基板プレートなどを利用した底壁部およびこの底壁部上の一部空間を囲むある高さの側壁部、この側壁部の上部開口を封止する蓋部などから構成され、その一部に、底壁部および側壁部、蓋部によって囲まれた気密性の空洞が設けられている。そして、半導体素子やマイクロストリップ線路、抵抗、コイルなどの回路素子で形成した高周波回路がその気密性の空洞内に収納される。また、空洞内に設けた高周波回路と空洞外の高周波回路を接続する入力用線路および出力用線路が側壁部を貫通して設けられている。   The high-frequency package device includes a bottom wall portion using a metal substrate plate and the like, a side wall portion having a certain height surrounding a part of the space on the bottom wall portion, and a lid portion for sealing the upper opening of the side wall portion. An airtight cavity surrounded by a bottom wall portion, a side wall portion, and a lid portion is provided. And the high frequency circuit formed with circuit elements, such as a semiconductor element, a microstrip line, resistance, and a coil, is stored in the airtight cavity. An input line and an output line for connecting the high-frequency circuit provided in the cavity and the high-frequency circuit outside the cavity are provided through the side wall.

上記した構造において、外部から入力する信号は入力用線路を介して高周波パッケージの空洞内の高周波回路に加えられ、増幅される。また、増幅した信号は出力用線路を介して空洞外に取り出される。   In the structure described above, a signal input from the outside is applied to the high frequency circuit in the cavity of the high frequency package via the input line and amplified. The amplified signal is taken out of the cavity through the output line.

ところで、高周波パッケージ装置の空洞はその空洞幅に依存した共振周波数を有し、空洞内に設ける高周波回路は、通常、空洞の共振周波数よりも低い周波数で使用される。   By the way, the cavity of the high-frequency package device has a resonance frequency depending on the width of the cavity, and the high-frequency circuit provided in the cavity is usually used at a frequency lower than the resonance frequency of the cavity.

また、近年、高周波回路は高出力化に伴って、たとえば高周波回路を構成する半導体素子の数が増加するなど、高周波回路を収納する高周波パッケージ装置の空洞幅が増加する傾向にある。空洞幅が増加すると空洞の共振周波数が低下し、高周波回路の周波数帯と空洞幅に依存した空洞の共振周波数が接近し、高周波回路の電気的特性が劣化する。   In recent years, with the increase in output of high-frequency circuits, for example, the number of semiconductor elements constituting the high-frequency circuit has increased, and the cavity width of a high-frequency package device that accommodates the high-frequency circuit tends to increase. When the cavity width increases, the resonance frequency of the cavity decreases, the resonance frequency of the cavity depending on the frequency band of the high-frequency circuit and the cavity width approaches, and the electrical characteristics of the high-frequency circuit deteriorate.

従来の高周波パッケージ装置では、上記したような電気的特性の劣化を防止するために、たとえば幅の大きい空洞を仕切壁などで幅の小さい複数の空洞に分割し、空洞幅に依存した共振周波数を高くしている（特許文献１参照）。
特開平５−８３０１０号公報 In the conventional high-frequency package device, in order to prevent the deterioration of the electrical characteristics as described above, for example, a cavity having a large width is divided into a plurality of cavities having a small width by a partition wall or the like, and a resonance frequency depending on the cavity width is set. It is made high (refer patent document 1).
JP-A-5-83010

従来の高周波パッケージ装置は、大きな空洞幅の空洞を使用する場合、仕切壁によって空洞内を複数に分割し、空洞幅に依存した共振周波数が高くなるようにしている。   In the conventional high-frequency package device, when a cavity with a large cavity width is used, the inside of the cavity is divided into a plurality of parts by a partition wall so that the resonance frequency depending on the cavity width becomes high.

しかし、仕切壁で空洞内を分割する場合、導波管モードの発生を抑えるために、側壁部の上部開口を封止する蓋と仕切壁との接合部分に隙間が生じないようにする必要がある。蓋は金属製の平坦な板状であるため、接合部分の隙間をなくすためには、空洞を形成する側壁部と仕切壁との高さを同じにする必要がある。しかし、加工精度の問題もあり、側壁部と仕切壁の高さが同じにすることは容易ではなく、蓋と仕切壁との接合部分に隙間が発生する場合がある。   However, when the inside of the cavity is divided by the partition wall, in order to suppress the occurrence of the waveguide mode, it is necessary to prevent a gap from being generated at the joint portion between the lid and the partition wall that seals the upper opening of the side wall portion. is there. Since the lid is in the form of a flat plate made of metal, it is necessary to make the side wall portion forming the cavity and the partition wall have the same height in order to eliminate the gap between the joint portions. However, there is a problem of processing accuracy, and it is not easy to make the side wall portion and the partition wall have the same height, and a gap may be generated at the joint portion between the lid and the partition wall.

従来の高周波パッケージ装置は、蓋と仕切壁の接合部分に発生する隙間をなくすために、たとえば蓋と仕切壁との間に金リボンを配置している（特開２０００−３２３５９５号公報）。しかし、この方法は金リボンなどの部品が新に必要となり、コストが増大する。   In the conventional high-frequency package device, a gold ribbon is disposed, for example, between the lid and the partition wall in order to eliminate a gap generated at the joint between the lid and the partition wall (Japanese Patent Laid-Open No. 2000-323595). However, this method requires new parts such as a gold ribbon, which increases costs.

本発明は、上記した欠点を解決し、コストを増大させることなしに、空洞を形成する蓋と仕切壁との接合部分の隙間の発生を防止した高周波パッケージ装置を提供することを目的とする。   An object of the present invention is to provide a high-frequency package device that solves the above-described drawbacks and prevents the generation of a gap at the joint portion between the lid and the partition wall that form the cavity without increasing the cost.

本発明の高周波パッケージ装置は、基板プレート上に設けられ前記基板プレート上方の第１空間を囲む第１側壁部と、この第１側壁部の上部開口を封止し、前記第１側壁部とともに前記基板プレート上に気密性の第１空洞を形成する第１蓋部と、前記基板プレート上に設けられ前記基板プレート上方の前記第１空間と相違する第２空間を囲む第２側壁部と、この第２側壁部の上部開口を封止して、前記第２側壁部とともに前記基板プレート上に気密性の第２空洞を形成し、かつ、前記第１蓋部とは独立の第２蓋部とを具備している。   The high-frequency package device of the present invention seals a first side wall portion provided on a substrate plate and surrounding a first space above the substrate plate, and an upper opening of the first side wall portion, together with the first side wall portion, A first lid that forms an airtight first cavity on the substrate plate; a second side wall that is provided on the substrate plate and surrounds a second space different from the first space above the substrate plate; Sealing an upper opening of the second side wall portion to form an airtight second cavity on the substrate plate together with the second side wall portion; and a second lid portion independent of the first lid portion; It has.

本発明は、第１空洞および第２空洞にそれぞれ独立した蓋を設けている。したがって、第１空洞および第２空洞間を仕切る壁部分と蓋との接合部分に隙間のない高周波パッケージ装置が得られる。   In the present invention, independent lids are provided in the first cavity and the second cavity, respectively. Therefore, a high-frequency package device can be obtained in which there is no gap in the joint between the wall and the lid that partitions the first cavity and the second cavity.

本発明の実施形態について図１を参照して説明する。   An embodiment of the present invention will be described with reference to FIG.

高周波パッケージ装置１０は、空洞幅の小さいたとえば第１および第２の２つのパッケージ１０ａ、１０ｂから構成されている。第１パッケージ１０ａおよび第２パッケージ１０ｂは、共通する１枚の金属製基板プレート１１上に、たとえば隣接して設けられている。   The high frequency package device 10 is composed of, for example, first and second two packages 10a and 10b having a small cavity width. The first package 10a and the second package 10b are provided adjacent to each other on a common metal substrate plate 11, for example.

第１パッケージ１０ａは、たとえば基板プレート１１の一部を利用した第１底壁部１１ａおよびこの底壁部１１ａ上に設けた第１側壁部１２ａなどから構成されている。第１側壁部１２ａはある高さとある厚さを有し、第１底壁部１１ａ上方の一部空間を囲むたとえば四角枠状に形成されている。第１側壁部１２ａは金属製で、その一部、たとえば第１入力線路１３ａが貫通する図示前面ａ１の第１周辺部１４ａは誘電体で形成されている。第１側壁部１２ａの後面ａ２は第１出力線路が貫通し、その周辺部は誘電体で形成されている。第１出力線路および誘電体の部分は図面の関係で示されていない。また、第１側壁部１２ａの上部開口は金属製の第１蓋部１５ａで封止されている。第１側壁部１２ａおよび第１蓋部１５ａは底壁部１１ａ上に気密性の空洞を形成し、その空洞内には、半導体素子やマイクロストリップ線路、抵抗、コイルなどで形成した高周波回路、たとえば増幅回路が収納される。   The first package 10a includes, for example, a first bottom wall portion 11a using a part of the substrate plate 11 and a first side wall portion 12a provided on the bottom wall portion 11a. The first side wall portion 12a has a certain height and a certain thickness, and is formed in, for example, a rectangular frame shape surrounding a partial space above the first bottom wall portion 11a. The first side wall 12a is made of metal, and a part thereof, for example, the first peripheral portion 14a of the illustrated front surface a1 through which the first input line 13a passes is formed of a dielectric. The rear surface a2 of the first side wall portion 12a is penetrated by the first output line, and the periphery thereof is formed of a dielectric. The first output line and the dielectric portion are not shown in the drawing. The upper opening of the first side wall 12a is sealed with a metal first lid 15a. The first side wall portion 12a and the first lid portion 15a form an airtight cavity on the bottom wall portion 11a. In the cavity, a high-frequency circuit formed by a semiconductor element, a microstrip line, a resistor, a coil, etc. An amplifier circuit is accommodated.

第２パッケージ１０ｂは、たとえば第１パッケージ１０ａと同じ構造をしている。基板プレート１１の一部たとえば第１底壁部１１ａに隣接する領域を利用した第２底壁部１１ｂおよびこの第２底壁部１１ｂ上に設けた第２側壁部１２ｂ、第２側壁部１２ｂの上部開口を封止する第２蓋部１５ｂなどから構成されている。また、第２側壁部１２ｂの前面ｂ１を第２入力線路１３ｂが貫通し、その周辺部１４ｂは誘電体で形成されている。第２側壁部１２ｂの後面ｂ２を第２出力線路（図示せず）が貫通している。   The second package 10b has, for example, the same structure as the first package 10a. A part of the substrate plate 11, for example, a second bottom wall portion 11b using a region adjacent to the first bottom wall portion 11a, a second side wall portion 12b provided on the second bottom wall portion 11b, and a second side wall portion 12b It is composed of a second lid portion 15b that seals the upper opening. The second input line 13b penetrates the front surface b1 of the second side wall portion 12b, and the peripheral portion 14b is formed of a dielectric. A second output line (not shown) passes through the rear surface b2 of the second side wall portion 12b.

また、第１側壁部１３ａの前面ａ１および第２側壁部１３ｂの前面ｂ１に沿って誘電体基板１６が配置されている。誘電体基板１６には１つの線路から２つの線路に分岐する分岐線路１７が形成されている。分岐した２つの線路は、それぞれ第１側壁部１３ａを貫通する第１入力線路１３ａ、および第２側壁部１３ｂを貫通する第２入力線路１３ｂを介して、第１パッケージ１０ａおよび第２パッケージ１０ｂ内の高周波回路（図示せず）に接続される。   The dielectric substrate 16 is disposed along the front surface a1 of the first side wall portion 13a and the front surface b1 of the second side wall portion 13b. A branch line 17 that branches from one line to two lines is formed on the dielectric substrate 16. The two branched lines are respectively in the first package 10a and the second package 10b via the first input line 13a penetrating the first side wall 13a and the second input line 13b penetrating the second side wall 13b. Connected to a high frequency circuit (not shown).

また、第１側壁部１２ａおよび第２側壁部１２ｂの後面ａ２、ｂ２に沿って誘電体基板が配置され、この誘電体基板上に２つの線路を１つの線路に合成する合成線路が形成されているが、これらは図面の関係で示されていない。合成線路の２つの線路部分は、それぞれ図示されていない第１出力線路および第２出力線路を介して、第１パッケージ１０ａおよび第２パッケージ１０ｂ内の高周波回路に接続される。   In addition, a dielectric substrate is disposed along the rear surfaces a2 and b2 of the first side wall portion 12a and the second side wall portion 12b, and a synthetic line for synthesizing two lines into one line is formed on the dielectric substrate. These are not shown in the drawing. The two line portions of the composite line are connected to the high-frequency circuits in the first package 10a and the second package 10b via a first output line and a second output line not shown, respectively.

ここで、上記した高周波パッケージ装置１０について、第１蓋部１５ａおよび第２蓋部１５ｂを取り外し、上方から見た状態を図２の上面図で説明する。図２は、図１に対応する部分に同じ符号を付し、重複する説明を一部省略する。   Here, with respect to the high-frequency package device 10 described above, a state in which the first lid portion 15a and the second lid portion 15b are removed and viewed from above will be described with reference to a top view of FIG. In FIG. 2, parts corresponding to those in FIG.

図２は、第１側壁部１２ａの後面ａ２および第２側壁部１２ｂの後面ｂ２に沿って配置される誘電体基板２１、および誘電体基板２１上に形成した合成線路２２が示されている。   FIG. 2 shows a dielectric substrate 21 disposed along the rear surface a2 of the first side wall portion 12a and the rear surface b2 of the second side wall portion 12b, and the synthetic line 22 formed on the dielectric substrate 21.

また、第１パッケージ１０ａおよび第２パッケージ１０ｂの空洞２３ａ、２３ｂ内にはそれぞれ高周波回路、たとえば入力側整合回路２４ａ、２４ｂおよび増幅用半導体素子２５ａ、２５ｂ、出力側整合回路２６ａ、２６ｂなどが配置されている。   In addition, high-frequency circuits such as input-side matching circuits 24a and 24b, amplification semiconductor elements 25a and 25b, and output-side matching circuits 26a and 26b are disposed in the cavities 23a and 23b of the first package 10a and the second package 10b, respectively. Has been.

また、第１パッケージ１０ａおよび第２パッケージ１０ｂの空洞２３ａ、２３ｂ内の図示下端に誘電体基板２７ａ１、２７ｂ１が設けれ、２つの誘電体基板２７ａ１、２７ｂ１上に、それぞれ第１入力線路１３ａと第２入力線路１３ｂの空洞２３ａ、２３ｂ内への延長部分が形成されている。空洞２３ａ、２３ｂ内の図示上端には誘電体基板２７ａ２、２７ｂ２が設けられ、誘電体基板２７ａ２、２７ｂ２上に、それぞれ第１出力線路２８ａと第２出力線路２８ｂの空洞２３ａ、２３ｂ内への延長部分が形成されている。   In addition, dielectric substrates 27a1 and 27b1 are provided at the lower ends in the cavities 23a and 23b of the first package 10a and the second package 10b, respectively, and the first input line 13a and the first input line 13a and Extension portions into the cavities 23a and 23b of the two-input line 13b are formed. Dielectric substrates 27a2 and 27b2 are provided at the upper ends of the cavities 23a and 23b in the drawing, and the first output line 28a and the second output line 28b extend into the cavities 23a and 23b on the dielectric substrates 27a2 and 27b2, respectively. A part is formed.

なお、第１および第２の入力線路１３ａ、１３ｂと入力側整合回路２４ａ、２４ｂとの間、入力側整合回路２４ａ、２４ｂと増幅用半導体素子２５ａ、２５ｂとの間、増幅用半導体素子２５ａ、２５ｂと出力側整合回路２６ａ、２６ｂとの間、出力側整合回路２６ａ、２６ｂと第１および第２の出力線路２８ａ、２８ｂとの間は、それぞれワイヤーＷで電気的に接続されている。   The first and second input lines 13a and 13b and the input side matching circuits 24a and 24b, the input side matching circuits 24a and 24b and the amplification semiconductor elements 25a and 25b, the amplification semiconductor elements 25a and 25b, 25b and the output side matching circuits 26a and 26b, and the output side matching circuits 26a and 26b and the first and second output lines 28a and 28b are electrically connected by wires W, respectively.

上記した構成において、外部から入力する入力信号は分岐線路１７で２分され、その一方は第１入力線路１３ａおよび入力側整合回路２４ａを経て増幅用半導体素子２５ａに加えられ、増幅される。増幅された信号は出力側整合回路２６ａおよび第１出力線路２８ａを経て合成線路２２に出力する。   In the configuration described above, an input signal input from the outside is divided into two by the branch line 17, and one of them is added to the amplifying semiconductor element 25a via the first input line 13a and the input side matching circuit 24a and amplified. The amplified signal is output to the synthesis line 22 via the output side matching circuit 26a and the first output line 28a.

分岐線路１７で２分された他方の信号は第２入力線路１３ｂおよび入力側整合回路２４ｂを経て増幅用半導体素子２５ｂに加えられ、増幅される。増幅された信号は出力側整合回路２６ｂおよび第２出力線路２８ｂ、合成線路２２に出力する。そして、増幅用半導体素子２５ａで増幅された信号と増幅用半導体素子２５ｂで増幅された信号は合成線路２２で合成され、外部の高周波回路へと伝送される。   The other signal divided into two by the branch line 17 is added to the amplifying semiconductor element 25b via the second input line 13b and the input side matching circuit 24b and amplified. The amplified signal is output to the output side matching circuit 26b, the second output line 28b, and the combined line 22. The signal amplified by the amplifying semiconductor element 25a and the signal amplified by the amplifying semiconductor element 25b are combined by the combining line 22 and transmitted to an external high-frequency circuit.

上記した構成によれば、たとえば１つの入力信号を複数に分割し、分割した複数の入力信号をそれぞれ別の高周波回路で増幅する場合、各高周波回路をそれぞれ独立したパッケージに収納している。したがって、各パッケージの空洞幅を小さくできる。その結果、空洞幅に依存する共振周波数が高くなり、高周波回路の使用帯域を空洞幅に依存する共振周波数よりも低くできる。   According to the configuration described above, for example, when one input signal is divided into a plurality of parts and each of the divided input signals is amplified by different high frequency circuits, each high frequency circuit is housed in an independent package. Therefore, the cavity width of each package can be reduced. As a result, the resonance frequency depending on the cavity width becomes high, and the use band of the high frequency circuit can be made lower than the resonance frequency depending on the cavity width.

また、複数のパッケージに対してそれぞれ独立した蓋を用いているため、蓋の接合部分に隙間が発生するようなこともない。   In addition, since independent lids are used for a plurality of packages, no gap is generated at the joint portion of the lid.

上記の実施形態は、１つの入力信号を２つに分岐する場合で説明している。しかし、本発明は、１つの入力信号を３つ以上に分岐する場合にも適用できる。この場合、３つ以上のパッケージが出力する信号を１つに合成する構造の合成線路が用いられる。また、隣り合うパッケージどうしが接する構成になっているが、隣り合うパッケージ間に隙間を設けた構造にすることもできる。   The above embodiment has been described in the case where one input signal is branched into two. However, the present invention can also be applied to a case where one input signal is branched into three or more. In this case, a combined line having a structure for combining signals output by three or more packages into one is used. Further, although the adjacent packages are in contact with each other, a structure in which a gap is provided between adjacent packages can also be used.

本発明の実施形態を説明するための斜視図である。It is a perspective view for demonstrating embodiment of this invention. 本発明の実施形態を説明するための上面図で、蓋部を取り外した状態を示す図である。It is a top view for demonstrating embodiment of this invention, and is a figure which shows the state which removed the cover part.

符号の説明Explanation of symbols

１０…高周波パッケージ装置
１０ａ…第１パッケージ
１０ｂ…第２パッケージ
１１…基板プレート
１１ａ…第１底壁部
１１ｂ…第２底壁部
１２ａ…第１側壁部
１２ｂ…第２側壁部
１３ａ…第１入力線路
１３ｂ…第２入力線路
１４ａ…第１周辺部
１４ｂ…第２周辺部
１５ａ…第１蓋部
１５ｂ…第２蓋部
１６…誘電体基板
１７…分岐線路 DESCRIPTION OF SYMBOLS 10 ... High frequency package apparatus 10a ... 1st package 10b ... 2nd package 11 ... Substrate plate 11a ... 1st bottom wall part 11b ... 2nd bottom wall part 12a ... 1st side wall part 12b ... 2nd side wall part 13a ... 1st input Line 13b ... Second input line 14a ... First peripheral portion 14b ... Second peripheral portion 15a ... First lid portion 15b ... Second lid portion 16 ... Dielectric substrate 17 ... Branch line

Claims (2)

基板プレート上に設けられ前記基板プレート上方の第１空間を囲む第１側壁部と、この第１側壁部の上部開口を封止し、前記第１側壁部とともに前記基板プレート上に気密性の第１空洞を形成する第１蓋部と、前記基板プレート上に設けられ前記基板プレート上方の前記第１空間と相違する第２空間を囲む第２側壁部と、この第２側壁部の上部開口を封止して、前記第２側壁部とともに前記基板プレート上に気密性の第２空洞を形成し、かつ、前記第１蓋部とは独立の第２蓋部とを具備したことを特徴とする高周波パッケージ装置。   A first side wall portion provided on the substrate plate and surrounding a first space above the substrate plate and an upper opening of the first side wall portion are sealed, and the first side wall portion and the first side wall portion are hermetically sealed on the substrate plate. A first lid that forms one cavity, a second side wall that is provided on the substrate plate and surrounds a second space that is different from the first space above the substrate plate, and an upper opening of the second side wall. Sealed to form an airtight second cavity on the substrate plate together with the second side wall portion, and a second lid portion independent of the first lid portion is provided. High frequency package equipment. 第１空洞内に第１高周波回路が収納され、第２空洞内に第２高周波回路が収納され、かつ、１つの線路が前記第１高周波回路と前記第２高周波回路とに接続する線路に分岐する分岐線路および前記第１高周波回路と前記第２高周波回路に接続する線路を１つの線路に合成する合成線路を基板プレート上に設けた請求項１記載の高周波パッケージ装置。   A first high-frequency circuit is accommodated in the first cavity, a second high-frequency circuit is accommodated in the second cavity, and one line branches into a line connected to the first high-frequency circuit and the second high-frequency circuit The high-frequency package apparatus according to claim 1, further comprising: a synthetic line for synthesizing a branch line to be connected and a line connected to the first high-frequency circuit and the second high-frequency circuit into a single line.
JP2005201746A 2005-07-11 2005-07-11 High frequency package device Pending JP2007019404A (en)

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JP2005201746A JP2007019404A (en) 2005-07-11 2005-07-11 High frequency package device

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019062577A (en) * 2014-06-18 2019-04-18 キヤノン株式会社 Image processing device, image processing method and program

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019062577A (en) * 2014-06-18 2019-04-18 キヤノン株式会社 Image processing device, image processing method and program

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