JP2007018288A - Arithmetic processor and power saving mode changeover method therefor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce a start-up time when returning from a power saving mode to a normal mode. <P>SOLUTION: When returning from the power saving mode to the normal mode, a reset signal is supplied to a CPU 1 from a power saving control part 19 for a necessary period after power is turned on. After the reset signal is released, the CPU 1 decides whether a power saving flag is present in an internal buffer memory of the power saving control part 19 or not. Because a program is already developed on a main memory 3 when the power saving flag is present, the CPU 1 performs prescribed processing on the basis of the program developed on the main memory 3. Accordingly, when the power saving flag is present, the CPU 1 can omit operation wherein the CPU 1 reads the compressed program from a program memory 2 and develops it on the main memory 3. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an arithmetic processing device and a power saving mode switching method thereof, and more particularly, to an arithmetic processing device and a power saving mode switching method thereof for reducing a startup time when returning from a power saving mode to a normal mode.

  Up to now, the image forming apparatus has realized the power saving mode by using the power saving mode of the CPU. However, in order to further reduce the power, it is necessary to cut off the power of the CPU. However, when the print job is received to return from the power saving mode to the normal mode, if the same processing as the power-on is performed, it takes time until the system starts up, and data is lost. .

Therefore, a technique is disclosed in which an image forming apparatus that does not shift to the power saving mode is prepared on the network to prevent data loss or to shorten the time until data output (Patent Documents 1 and 2). 2).
JP 2000-187579 A JP 2000-235470 A

  However, in the techniques described in Patent Documents 1 and 2, there is always an image forming apparatus that cannot shift to the power saving mode, and there is a problem that all the image forming apparatuses cannot achieve power saving.

  The present invention has been proposed in order to solve the above-described problems, and provides an arithmetic processing device and a power saving mode switching method thereof that reduce the startup time when returning from the power saving mode to the normal mode. With the goal.

  An arithmetic processing unit according to the present invention includes a program storage unit that stores a compression program, a first storage unit that stores data, and reads the compression program from the program storage unit, and the compression unit stores the compression program using the first storage unit. An arithmetic processing means for performing predetermined control based on the decompressed program after decompressing the program, and a flag for generating a power saving flag indicating that the power saving mode is entered when shifting from the normal mode to the power saving mode Generation means, flag storage means for storing the power saving flag generated by the flag generation means, and in normal mode, the program storage means, the first storage means, the arithmetic processing means, and the flag storage means In the power saving mode, power is supplied to each of the first storage unit and the flag storage unit. The power supply to the serial program storage means and said arithmetic processing means and a, and a power supply means for stopping.

  The power saving mode switching method of the arithmetic processing unit according to the present invention includes a program storage unit that stores a compression program, a first storage unit that stores data, and reads the compression program from the program storage unit, And an arithmetic processing means for performing predetermined control based on the decompressed program after decompressing the compressed program in the storage means, and in a normal mode, Power saving indicating that the power saving mode has been entered when the program storage means, the first storage means, the arithmetic processing means, and the flag storage means are each supplied with power and shifted from the normal mode to the power saving mode. A flag is generated and stored, and power supply to the program storage unit and the arithmetic processing unit is stopped.

  The program storage means stores a compressed program obtained by compressing the program used by the arithmetic processing means. When the power is supplied, the arithmetic processing means reads the compressed program from the program storage means, decompresses the compressed program by the first storage means, and performs predetermined control based on the decompressed program. Therefore, when the power supply is stopped in the power saving mode and the power is supplied after returning to the normal mode, the arithmetic processing unit takes time until it is completely started and predetermined control becomes possible.

  Therefore, the flag generation unit generates a power saving flag indicating that the power saving mode has been entered when shifting from the normal mode to the power saving mode. This power saving flag is stored in the flag storage means.

  Here, in the normal mode, power is supplied to the program storage means, the first storage means, the arithmetic processing means, and the flag storage means. In the power saving mode, power is supplied to the first storage means and the flag storage means. However, the power supply to the program storage means and the arithmetic processing means is stopped. Therefore, even in the power saving mode, the power saving flag is not erased from the flag storage means.

  Therefore, each of the inventions generates and stores a power saving flag indicating that the power saving mode has been entered when shifting from the normal mode to the power saving mode, and supplies power to the program storage means and the arithmetic processing means. Since the power saving flag stored in the flag storage means is not erased even in the power saving mode, it is possible to determine whether or not the power saving mode has been restored and to quickly start up.

  The arithmetic processing unit may further include a flag determination unit that determines whether or not the power saving flag is stored in the flag storage unit when returning from the power saving mode to the normal mode. At this time, when the flag determining unit determines that the power saving flag is present, the arithmetic processing unit performs predetermined control based on a program stored in the first storage unit, and performs the determination. When it is determined by the means that the power saving flag is not present, the compressed program is read from the program storage means, the compressed program is decompressed by the first storage means, and then a predetermined value is determined based on the decompressed program. Control is good.

  In the power saving mode switching method of the arithmetic processing unit, it may be determined whether or not the power saving flag is stored in the flag storage means when returning from the power saving mode to the normal mode. At this time, when the flag determining unit determines that the power saving flag is present, the arithmetic processing unit performs predetermined control based on a program stored in the first storage unit, and performs the determination. When it is determined by the means that the power saving flag is not present, the compressed program is read from the program storage means, the compressed program is decompressed by the first storage means, and then a predetermined value is determined based on the decompressed program. Control is good.

  Thereby, each said invention determines whether the power saving flag is memorize | stored when returning from power saving mode to normal mode, and when it determines with there being a power saving flag, 1st memory | storage means By performing predetermined control based on the program stored in the program, it is possible to omit the process of reading and decompressing the compressed program from the program storage means again, and to start up in a short time.

  The arithmetic processing unit and its power saving mode switching method according to the present invention can be started up in a short time when returning from the power saving mode to the normal mode.

  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings.

[First Embodiment]
FIG. 1 is a block diagram showing a configuration of an image forming apparatus according to the first embodiment of the present invention. The image forming apparatus includes a CPU (Central Processing Unit) 1 that controls the entire apparatus, a program memory 2 that stores a compressed program, a main memory 3, and a power control that controls power supply to each circuit. A circuit 4, an image output unit (hereinafter referred to as "IOT (Image Output Terminal)") 5 for outputting an image, an image memory 6 for temporarily storing image data, and external oscillators 7, 8 for generating a predetermined clock. 9 and an input / output device (hereinafter referred to as “I / O device”) for controlling data input / output via a network or a bus.

  When power is supplied, the CPU 1 reads the compressed program from the program memory 2, expands (decompresses) the program in the main memory 3, and then performs predetermined control according to the program in the main memory 3.

  The power supply control circuit 4 supplies power to each circuit in the image forming apparatus via the power supply lines L1 and L2. For example, the power supply control circuit 4 supplies power to the main memory 3, the image memory 6, the external oscillator 9, and the I / O device 10 through the power supply line L 1, and the CPU 1, program memory 2, IOT 5 through the power supply line 2. The power is supplied to the external oscillators 7 and 8. The power supply control circuit 4 always supplies power to the power supply line L1, but supplies power to the power supply line L2 according to a power supply control signal or stops supply.

  The IOT 5 outputs an image based on image data supplied via the Ethernet (registered trademark) and the I / O device 10. The image memory 6 is a DRAM, for example, and is a memory dedicated to image data. The image memory 6 also performs image processing such as rotation / reduction of image data.

  The external oscillators 7 and 8 generate clocks to be supplied to a later-described PLL circuit in the I / O device 10. The external oscillator 9 generates a clock to be supplied to a circuit (not shown) in the image forming apparatus.

  The I / O device 10 includes a USB controller 11 connected to a USB bus, an Ethernet (registered trademark) controller 12 connected to Ethernet (registered trademark), and a hard disk drive interface (hereinafter referred to as “HDD_I” connected to a hard disk (not shown). / F ”) 13, CPU_I / F 14 connected to CPU 1, print output control unit 15 connected to IOT 5, memory control unit 16 connected to image memory 6, and PLL that generates an internal clock Circuits 17 and 18 and a power saving control unit 19 for controlling the device are provided.

  The USB controller 11 is connected to an external device (not shown) via the USB bus, and transmits / receives data to / from the external device. The Ethernet (registered trademark) controller 12 is connected to an external computer (not shown) via the Ethernet (registered trademark), and transmits and receives data to and from the external computer.

(Transition to power saving mode)
FIG. 2 is a flowchart illustrating a transition routine in which the image forming apparatus shifts from the normal mode to the power saving mode. For example, when the time during which data is not received exceeds a certain time, the image forming apparatus shifts from the normal mode to the power saving mode as described below to suppress power consumption.

  In step S1, the power saving control unit 19 of the I / O device 10 sets the main memory 3 and the image memory 6 to a power saving mode, for example, a self-refresh mode. In the self-refresh mode, the clock is deactivated to reduce the power consumption of the main memory 3 and the image memory 6, and the refresh operation is automatically executed using the internal refresh counter.

  In step S2, the power saving control unit 19 stores the configuration information of the image memory 6 (in this embodiment, the time until returning from the power saving mode to the normal mode) in an internal buffer memory (not shown).

  In step S3, the power saving control unit 19 stops unnecessary clocks in the I / O device 10 and stops the HDD_I / F 13, the print output control unit 15, the memory control unit 16, and the PLL circuits 17 and 18.

  In step S <b> 4, the power saving control unit 19 sets the high impedance between the CPU 1, IOT 5, each HDD terminal not shown, and the terminal of the image memory 6 in the power saving mode that are to be turned off. Thereby, in the power saving mode, between the CPU 1 and the image memory 6, between the IOT 5 and the image memory 6, and between the HDD and the image memory 6 are blocked.

  In step S5, the power saving control unit 19 generates a power saving flag indicating the power saving mode, stores it in the internal buffer memory, and starts the power saving mode. Note that the power saving flag is erased when the main power is turned off or when the normal mode is entered, but is retained otherwise. In the power saving mode, the power saving control unit 19 outputs a high level power control signal to the power control circuit 4.

  When receiving the high-level power control signal, the power control circuit 4 stops the power supply through the power line L2, and turns off the power of the CPU 1, the external oscillators 8 and 9, an external device (for example, HDD) not shown, and the IOT 5. To. As a result, only the I / O device 10, the main memory 3 and the image memory 6 to which power is supplied through the power line L1 are energized. As will be described later, the power supply control circuit 4 supplies power through the power supply line L2 when a low level power supply control signal is received.

  Accordingly, when the image forming apparatus receives data via the Ethernet (registered trademark) during the power saving mode, the data is transmitted via the Ethernet (registered trademark) controller 12 and the memory control unit 16 in the I / O device 10. And stored in the image memory 6. That is, all data received from the Ethernet (registered trademark) during the power saving mode is stored in the image memory 6. For this reason, it is possible to prevent data transmitted from the outside in the power saving mode from being missed. Even in the power saving mode, the main memory 3 is in an energized state, so the main memory 3 continues to store the program read from the program memory 2.

  Since the main memory 3 has a larger storage capacity than the image memory 6, a part of the main memory 3 may be used as the image memory 6 during the power saving mode.

(Return from power saving mode to normal mode)
FIG. 3 is a flowchart illustrating a return routine in which the image forming apparatus returns from the power saving mode to the normal mode.

  In step S <b> 11, the power saving control unit 19 uses the power saving mode until data is received by the USB controller 11 or the Ethernet (registered trademark) controller 12 or until a power saving cancellation signal is input to the I / O device 10. To maintain. The power saving release signal is a signal generated when a user presses a power saving release button (not shown) provided in the image forming apparatus. The power saving control unit 19 supplies a low level power control signal to the power control circuit 4 when detecting that any of them is received or input.

  When receiving the low-level power control signal, the power control circuit 4 starts power supply to an external device (not shown) such as the CPU 1, the program memory 2, the IOT 5, the external oscillators 7 and 8, and the HDD via the power line L2. .

  In step S <b> 12, the power saving control unit 19 outputs a reset signal for a necessary period to the CPU 1. The reset signal is generally required because the CPU has a reset input limit for a certain period after the power is turned on. As an example of the reset signal output, the power saving control unit 19 may set in advance how many clock cycles the reset signal is necessary and output the reset signal according to the setting.

  At the same time, the power saving control unit 19 waits until the clocks output from the external oscillators 7 and 8 are stabilized. The standby time can be set according to the specifications of the external oscillators 7 and 8.

  In step S <b> 13, the power saving control unit 19 cancels the stop signal supplied to the PLL circuits 17 and 18 after the time until the clocks of the external oscillators 7 and 8 become stable has elapsed. As a result, the PLL circuits 17 and 18 start outputting the clock. The power saving control unit 19 waits until the clocks output from the PLL circuits 17 and 18 are locked. The standby time can be set according to the specifications of the PLL circuits 17 and 18.

  In step S <b> 14, the power saving control unit 19 releases the high impedance between the CPU 1, the IOT 5, each HDD terminal (not shown), and the image memory 6 terminal. As a result, data can be transmitted and received between the CPU 1 and the image memory 6, between the IOT 5 and the image memory 6, and between the HDD and the image memory 6.

  In step S15, the power saving control unit 19 cancels the power saving mode of the image memory 6. Specifically, the power saving control unit 19 issues a self-refresh end command and waits for a recovery time according to the specifications of the image memory 6.

  Here, when the Ethernet (registered trademark) controller 12 detects that data has been received, the power saving control unit 19 stores the received data in the image memory 6 via the memory control unit 16 and receives the received data. An interrupt flag indicating that data is on the image memory 6 is set.

  In step S16, the CPU 1 starts to start. Here, the operation of the CPU 1 will be described. The CPU 1 is supplied with a reset signal from the power saving control unit 19 for a necessary period after the power is turned on. Then, after the reset signal is canceled, the CPU 1 determines whether or not there is a power saving flag in the internal buffer memory of the power saving control unit 19.

  When there is a power saving flag, the CPU 1 performs a predetermined process based on the program expanded in the main memory 3 because the program has already been expanded on the main memory 3. Therefore, when there is a power saving flag, the CPU 1 omits reading the compressed program from the program memory 2 and developing it in the main memory 3, so that the system can be started quickly.

  On the other hand, when there is no power saving flag, the CPU 1 loads the program from the program memory 2 and expands it in the main memory 3 because the program is not expanded on the main memory 3.

  Next, after the system is started up, the CPU 1 determines whether there is received data in the image memory 6 by determining whether there is an interrupt signal from the power saving control unit 19, and there is an interrupt signal. In this case, since there is received data in the image memory 6, this data is processed.

  As described above, when the image forming apparatus according to the first embodiment shifts from the normal mode to the power saving mode, the power saving flag is set, the power of the CPU 1 is turned off, and the image forming apparatus is always in the energized state. The program of the CPU 1 is continuously stored in the main memory 3.

  When the image forming apparatus returns from the power saving mode to the normal mode, the CPU 1 supplies power to the CPU 1 to determine the presence or absence of the power saving flag. When the power saving flag exists, the CPU 1 stores the power saving flag in the main memory 3. The control is executed using the program that is installed. As a result, it is possible to omit the process in which the CPU 1 reads the compressed program from the program memory 2 and develops it in the main memory 3, so that the rise time can be greatly shortened.

  In the image forming apparatus, even in the power saving mode, the energized image memory 6 receives data from the Ethernet (registered trademark), thereby preventing data from being dropped from the outside in the power saving mode. Can do.

[Second Embodiment]
Next, a second embodiment of the present invention will be described. In addition, the same code | symbol is attached | subjected to the site | part same as 1st Embodiment, and the detailed description is abbreviate | omitted. The image forming apparatus according to the second embodiment is configured in substantially the same manner as in the first embodiment, except that the power of the image memory 6 is supplied from the power supply line L2. The image forming apparatus having such a configuration shifts from the normal mode to the power saving mode as follows.

(Transition to power saving mode)
FIG. 4 is a flowchart illustrating a transition routine in which the image forming apparatus according to the second embodiment shifts from the normal mode to the power saving mode.

  In step S21, the power saving control unit 19 of the I / O device 10 sets only the main memory 3 to the power saving mode, for example, the self refresh mode.

  In step S22, the power saving control unit 19 stores the configuration information of the image memory 6 (in this embodiment, the time from when the power is turned on until it becomes accessible, the DDR mode).

  In step S <b> 23, the power saving control unit 19 stops unnecessary clocks in the I / O device 10 and stops the HDD_I / F 13, the print output control unit 15, the memory control unit 16, and the PLL circuits 17 and 18.

  In step S <b> 24, the power saving control unit 19 sets a high impedance between each of the CPU 1, IOT 5, each HDD terminal not shown, and the image memory 6 terminal to be powered off. As a result, the CPU 1 and the image memory 6, the IOT 5 and the image memory 6, and the HDD and the image memory 6 are disconnected.

  In step S25, the power saving control unit 19 sets a power saving flag indicating the power saving mode, and starts the power saving mode. In the power saving mode, the power supply control circuit 4 stops the power supply through the power supply line L2, and turns on the power of the CPU 1, the external oscillators 8 and 9, an external device (for example, HDD) (not shown), the IOT 5, and the image memory 6. Turn off. As a result, only the I / O device 10 and the main memory 3 to which power is supplied through the power supply line L1 are energized.

  Thereby, even in the power saving mode, the main memory 3 is in an energized state, so the main memory 3 continues to store the program read from the program memory 2.

(Return from power saving mode to normal mode)
FIG. 5 is a flowchart illustrating a return routine in which the image forming apparatus returns from the power saving mode to the normal mode. Steps S31 to S34 and S36 are the same as steps S21 to S24 and S26 shown in FIG.

  In step S35, the image memory 6 is initialized. Specifically, based on the configuration information, it waits for the time from when the power is turned on until it can be accessed, outputs a clock, precharges all banks, resets the DLL with an extended mode register setting command, Wait, precharge all banks, perform auto refresh twice, and execute mode register setting. These processes are determined by the specifications of the DRAM constituting the image memory 6. Thereafter, the process of step S36 is executed.

  As described above, when the image forming apparatus according to the second embodiment shifts from the normal mode to the power saving mode, the power saving flag is set, the power of the CPU 1 is turned off, and the image forming apparatus is always in the energized state. The program of the CPU 1 is continuously stored in the main memory 3.

  When the image forming apparatus returns from the power saving mode to the normal mode, the CPU 1 supplies power to the CPU 1 to determine the presence or absence of the power saving flag. When the power saving flag exists, the CPU 1 stores the power saving flag in the main memory 3. The control is executed using the program that is installed. As a result, it is possible to omit the process in which the CPU 1 reads the compressed program from the program memory 2 and develops it in the main memory 3, so that the rise time can be greatly shortened.

  In the second embodiment, the main memory 3 may store data received from the outside in the power saving mode.

  The present invention is not limited to the above-described embodiment, and it is needless to say that the present invention can also be applied to a design modified within the scope of the claims.

  In the embodiment described above, switching of the operation mode of the image forming apparatus has been described as an example, but the present invention is not limited to this. The present invention is also applicable to, for example, a computer that is always connected to a network and has a CPU.

1 is a block diagram illustrating a configuration of an image forming apparatus according to an embodiment of the present invention. 4 is a flowchart illustrating a transition routine in which the image forming apparatus according to the first embodiment shifts from a normal mode to a power saving mode. 6 is a flowchart illustrating a return routine for the image forming apparatus to return from a power saving mode to a normal mode. 10 is a flowchart illustrating a transition routine in which the image forming apparatus according to the second embodiment shifts from a normal mode to a power saving mode. 6 is a flowchart illustrating a return routine for the image forming apparatus to return from a power saving mode to a normal mode.

Explanation of symbols

1 CPU
2 Program memory 3 Main memory 4 Power supply control circuit 5 IOT
6 Image memory 7, 8, 9 External oscillator 10 I / O device 11 USB controller 12 Ethernet (registered trademark) controller 13 HDD_I / F
16 Memory control unit 17, 18 PLL circuit 19 Power saving control unit

Claims (10)

Program storage means for storing the compression program;
First storage means for storing data;
An arithmetic processing unit that reads the compressed program from the program storage unit, decompresses the compressed program in the first storage unit, and performs predetermined control based on the decompressed program;
Flag generating means for generating a power saving flag indicating that the power saving mode is entered when shifting from the normal mode to the power saving mode;
Flag storage means for storing the power saving flag generated by the flag generation means;
In the normal mode, power is supplied to the program storage means, the first storage means, the arithmetic processing means, and the flag storage means. In the power saving mode, power is supplied to the first storage means and the flag storage means. Power supply means for stopping the power supply to the program storage means and the arithmetic processing means,
An arithmetic processing apparatus comprising: Data receiving means for receiving data transmitted from outside via a network;
Second storage means for storing data received by the data receiving means,
The arithmetic processing apparatus according to claim 1, wherein the power supply unit constantly supplies power to the data receiving unit and the second storage unit. A flag determination unit for determining whether or not the power saving flag is stored in the flag storage unit when returning from the power saving mode to the normal mode;
The arithmetic processing means performs predetermined control based on a program stored in the first storage means when the flag determination means determines that the power saving flag is present, and the determination means When it is determined that there is no power saving flag, the compressed program is read from the program storage unit, the compressed program is expanded by the first storage unit, and then predetermined control is performed based on the expanded program The arithmetic processing apparatus according to claim 1 or 2. The arithmetic unit according to claim 2 or 3, wherein the arithmetic processing unit performs predetermined control using data stored in the second storage unit after returning from the power saving mode to the normal mode. Processing equipment. The arithmetic processing device according to claim 2 or 3, wherein a reset signal for a necessary period is output to the arithmetic processing means when returning from the power saving mode to the normal mode. A program storage means for storing a compressed program, a first storage means for storing data, and the compressed program is read from the program storage means, and the compressed program is decompressed by the first storage means, and then decompressed. An arithmetic processing means for performing predetermined control based on a program, and a power saving mode switching method of an arithmetic processing device comprising:
In the normal mode, power is supplied to the program storage means, the first storage means, the arithmetic processing means, and the flag storage means,
A calculation process for generating and storing a power saving flag indicating that the power saving mode has been entered when shifting from the normal mode to the power saving mode, and stopping the power supply to the program storage means and the arithmetic processing means. Method for switching the power saving mode of the device. The arithmetic processing apparatus further includes data receiving means for receiving data transmitted from outside via a network, and second storage means for storing data received by the data receiving means,
The method according to claim 6, wherein power is constantly supplied to the data receiving unit and the second storage unit. Determining whether or not the power saving flag is stored in the flag storage means when returning from the power saving mode to the normal mode;
The arithmetic processing means performs predetermined control based on a program stored in the first storage means when the flag determination means determines that the power saving flag is present, and the determination means When it is determined that there is no power saving flag, the compressed program is read from the program storage unit, the compressed program is expanded by the first storage unit, and then predetermined control is performed based on the expanded program A method for switching a power saving mode of the arithmetic processing device according to claim 6 or 7. The arithmetic unit according to claim 7 or 8, wherein the arithmetic processing unit performs predetermined control using data stored in the second storage unit after returning from the power saving mode to the normal mode. A method for switching the power-saving mode of a processing apparatus. The method for switching the power-saving mode of the arithmetic processing apparatus according to claim 7 or 8, wherein a reset signal is output to the arithmetic processing means for a necessary period when returning from the power-saving mode to the normal mode.

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