JP2006524380A5 - - Google Patents

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JP2006524380A5
JP2006524380A5 JP2006506116A JP2006506116A JP2006524380A5 JP 2006524380 A5 JP2006524380 A5 JP 2006524380A5 JP 2006506116 A JP2006506116 A JP 2006506116A JP 2006506116 A JP2006506116 A JP 2006506116A JP 2006524380 A5 JP2006524380 A5 JP 2006524380A5
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Japan
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processor
threads
thread
logic circuit
cycle
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JP2006506116A
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Japanese (ja)
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JP4536717B2 (ja
JP2006524380A (ja
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Priority claimed from US10/422,025 external-priority patent/US7657893B2/en
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JP2006506116A 2003-04-23 2004-04-14 同時マルチスレッド（ｓｍｔ）プロセッサにおいてスレッドごとのプロセッサ・リソースの使用を決定するためのアカウンティング方法および論理 Expired - Fee Related JP4536717B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/422,025 US7657893B2 (en) 2003-04-23 2003-04-23 Accounting method and logic for determining per-thread processor resource utilization in a simultaneous multi-threaded (SMT) processor
PCT/GB2004/001586 WO2004095282A1 (en) 2003-04-23 2004-04-14 Accounting method and logic for determining per-thread processor resource utilization in a simultaneous multi-threaded (smt) processor

Publications (3)

Publication Number Publication Date
JP2006524380A JP2006524380A (ja) 2006-10-26
JP2006524380A5 true JP2006524380A5 (enExample) 2010-04-08
JP4536717B2 JP4536717B2 (ja) 2010-09-01

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JP2006506116A Expired - Fee Related JP4536717B2 (ja) 2003-04-23 2004-04-14 同時マルチスレッド（ｓｍｔ）プロセッサにおいてスレッドごとのプロセッサ・リソースの使用を決定するためのアカウンティング方法および論理

Country Status (14)

Country Link
US (3) US7657893B2 (enExample)
EP (1) EP1616259B1 (enExample)
JP (1) JP4536717B2 (enExample)
KR (1) KR100754153B1 (enExample)
CN (1) CN100458727C (enExample)
AT (1) ATE364204T1 (enExample)
BR (1) BRPI0409710B1 (enExample)
CA (1) CA2518468C (enExample)
DE (1) DE602004006858T2 (enExample)
ES (1) ES2286630T3 (enExample)
IL (1) IL171706A (enExample)
MX (1) MXPA05011307A (enExample)
TW (1) TWI291131B (enExample)
WO (1) WO2004095282A1 (enExample)

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