JP2006520964A - 分岐ターゲットに基づいて分岐予測をするための方法および装置 - Google Patents
分岐ターゲットに基づいて分岐予測をするための方法および装置 Download PDFInfo
- Publication number
- JP2006520964A JP2006520964A JP2006507365A JP2006507365A JP2006520964A JP 2006520964 A JP2006520964 A JP 2006520964A JP 2006507365 A JP2006507365 A JP 2006507365A JP 2006507365 A JP2006507365 A JP 2006507365A JP 2006520964 A JP2006520964 A JP 2006520964A
- Authority
- JP
- Japan
- Prior art keywords
- branch
- address
- instruction
- branch target
- branch instruction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3802—Instruction prefetching
- G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding
- G06F9/3806—Instruction prefetching for branches, e.g. hedging, branch folding using address prediction, e.g. return stack, branch history buffer
-
- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61P—SPECIFIC THERAPEUTIC ACTIVITY OF CHEMICAL COMPOUNDS OR MEDICINAL PREPARATIONS
- A61P31/00—Antiinfectives, i.e. antibiotics, antiseptics, chemotherapeutics
- A61P31/04—Antibacterial agents
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3802—Instruction prefetching
- G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3842—Speculative instruction execution
- G06F9/3844—Speculative instruction execution using dynamic branch prediction, e.g. using branch history tables
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Health & Medical Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Organic Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Communicable Diseases (AREA)
- General Chemical & Material Sciences (AREA)
- Medicinal Chemistry (AREA)
- Nuclear Medicine, Radiotherapy & Molecular Imaging (AREA)
- Oncology (AREA)
- Pharmacology & Pharmacy (AREA)
- Life Sciences & Earth Sciences (AREA)
- Animal Behavior & Ethology (AREA)
- General Health & Medical Sciences (AREA)
- Public Health (AREA)
- Veterinary Medicine (AREA)
- Advance Control (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/394,820 US7266676B2 (en) | 2003-03-21 | 2003-03-21 | Method and apparatus for branch prediction based on branch targets utilizing tag and data arrays |
| PCT/US2004/008438 WO2004086219A2 (en) | 2003-03-21 | 2004-03-19 | Method and apparatus for branch prediction based on branch targets |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2006520964A true JP2006520964A (ja) | 2006-09-14 |
| JP2006520964A5 JP2006520964A5 (https=) | 2007-05-10 |
Family
ID=32988465
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006507365A Pending JP2006520964A (ja) | 2003-03-21 | 2004-03-19 | 分岐ターゲットに基づいて分岐予測をするための方法および装置 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US7266676B2 (https=) |
| EP (1) | EP1625493A2 (https=) |
| JP (1) | JP2006520964A (https=) |
| TW (1) | TWI319533B (https=) |
| WO (1) | WO2004086219A2 (https=) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010524106A (ja) * | 2007-04-10 | 2010-07-15 | インターナショナル・ビジネス・マシーンズ・コーポレーション | データをキャッシュ・メモリにプリフェッチする方法、コンピュータ・プログラム、及びシステム |
| JP2012511212A (ja) * | 2008-12-04 | 2012-05-17 | アナログ デバイシス, インコーポレイテッド | デジタルプロセッサにおいてジャンプ動作を実施するための方法および装置 |
| JP2015036888A (ja) * | 2013-08-13 | 2015-02-23 | 富士通株式会社 | 演算処理装置及び演算処理装置の制御方法 |
Families Citing this family (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7386679B2 (en) * | 2004-04-15 | 2008-06-10 | International Business Machines Corporation | System, method and storage medium for memory management |
| US8719837B2 (en) | 2004-05-19 | 2014-05-06 | Synopsys, Inc. | Microprocessor architecture having extendible logic |
| US7328332B2 (en) * | 2004-08-30 | 2008-02-05 | Texas Instruments Incorporated | Branch prediction and other processor improvements using FIFO for bypassing certain processor pipeline stages |
| US7836288B2 (en) * | 2004-09-14 | 2010-11-16 | Arm Limited | Branch prediction mechanism including a branch prediction memory and a branch prediction cache |
| WO2006085324A2 (en) * | 2005-02-11 | 2006-08-17 | Sandisk Il Ltd. | Nand flash memory system architecture |
| US8971461B2 (en) | 2005-06-01 | 2015-03-03 | Qualcomm Incorporated | CQI and rank prediction for list sphere decoding and ML MIMO receivers |
| US20070073925A1 (en) | 2005-09-28 | 2007-03-29 | Arc International (Uk) Limited | Systems and methods for synchronizing multiple processing engines of a microprocessor |
| US7827392B2 (en) * | 2006-06-05 | 2010-11-02 | Qualcomm Incorporated | Sliding-window, block-based branch target address cache |
| US8935517B2 (en) * | 2006-06-29 | 2015-01-13 | Qualcomm Incorporated | System and method for selectively managing a branch target address cache of a multiple-stage predictor |
| US20080097914A1 (en) * | 2006-10-24 | 2008-04-24 | Kent Dicks | Systems and methods for wireless processing and transmittal of medical data through multiple interfaces |
| EP2106584A1 (en) * | 2006-12-11 | 2009-10-07 | Nxp B.V. | Pipelined processor and compiler/scheduler for variable number branch delay slots |
| US7913068B2 (en) * | 2008-02-21 | 2011-03-22 | International Business Machines Corporation | System and method for providing asynchronous dynamic millicode entry prediction |
| US9946545B2 (en) * | 2010-11-16 | 2018-04-17 | Arm Limited | Buffer store with a main store and and auxiliary store |
| US8886920B2 (en) * | 2011-05-13 | 2014-11-11 | Oracle International Corporation | Associating tag to branch instruction to access array storing predicted target addresses for page crossing targets for comparison with resolved address at execution stage |
| US9250909B2 (en) * | 2012-06-12 | 2016-02-02 | International Business Machines Corporation | Fast index tree for accelerated branch prediction |
| US9250912B2 (en) * | 2012-06-12 | 2016-02-02 | International Business Machines Corporation | Fast index tree for accelerated branch prediction |
| US20140250289A1 (en) * | 2013-03-01 | 2014-09-04 | Mips Technologies, Inc. | Branch Target Buffer With Efficient Return Prediction Capability |
| US9489204B2 (en) * | 2013-03-15 | 2016-11-08 | Qualcomm Incorporated | Method and apparatus for precalculating a direct branch partial target address during a misprediction correction process |
| US10831491B2 (en) * | 2018-06-29 | 2020-11-10 | Intel Corporation | Selective access to partitioned branch transfer buffer (BTB) content |
| US11762660B2 (en) * | 2020-06-23 | 2023-09-19 | Ampere Computing Llc | Virtual 3-way decoupled prediction and fetch |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07281895A (ja) * | 1993-12-24 | 1995-10-27 | Advanced Risc Mach Ltd | 分岐キャッシュ |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5142634A (en) * | 1989-02-03 | 1992-08-25 | Digital Equipment Corporation | Branch prediction |
| US5608886A (en) * | 1994-08-31 | 1997-03-04 | Exponential Technology, Inc. | Block-based branch prediction using a target finder array storing target sub-addresses |
| US5732253A (en) * | 1994-10-18 | 1998-03-24 | Cyrix Corporation | Branch processing unit with target cache storing history for predicted taken branches and history cache storing history for predicted not-taken branches |
| US5864697A (en) * | 1996-06-28 | 1999-01-26 | Texas Instruments Incorporated | Microprocessor using combined actual and speculative branch history prediction |
| US6119222A (en) * | 1996-12-23 | 2000-09-12 | Texas Instruments Incorporated | Combined branch prediction and cache prefetch in a microprocessor |
| TW357318B (en) * | 1997-03-18 | 1999-05-01 | Ind Tech Res Inst | Branching forecast and reading device for unspecified command length extra-purity pipeline processor |
| US5964870A (en) * | 1997-09-22 | 1999-10-12 | Intel Corporation | Method and apparatus for using function context to improve branch |
| US6185675B1 (en) * | 1997-10-24 | 2001-02-06 | Advanced Micro Devices, Inc. | Basic block oriented trace cache utilizing a basic block sequence buffer to indicate program order of cached basic blocks |
| US6446197B1 (en) | 1999-10-01 | 2002-09-03 | Hitachi, Ltd. | Two modes for executing branch instructions of different lengths and use of branch control instruction and register set loaded with target instructions |
-
2003
- 2003-03-21 US US10/394,820 patent/US7266676B2/en not_active Expired - Lifetime
-
2004
- 2004-03-19 EP EP04757879A patent/EP1625493A2/en not_active Withdrawn
- 2004-03-19 JP JP2006507365A patent/JP2006520964A/ja active Pending
- 2004-03-19 TW TW093107413A patent/TWI319533B/zh not_active IP Right Cessation
- 2004-03-19 WO PCT/US2004/008438 patent/WO2004086219A2/en not_active Ceased
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07281895A (ja) * | 1993-12-24 | 1995-10-27 | Advanced Risc Mach Ltd | 分岐キャッシュ |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010524106A (ja) * | 2007-04-10 | 2010-07-15 | インターナショナル・ビジネス・マシーンズ・コーポレーション | データをキャッシュ・メモリにプリフェッチする方法、コンピュータ・プログラム、及びシステム |
| JP2012511212A (ja) * | 2008-12-04 | 2012-05-17 | アナログ デバイシス, インコーポレイテッド | デジタルプロセッサにおいてジャンプ動作を実施するための方法および装置 |
| JP2015036888A (ja) * | 2013-08-13 | 2015-02-23 | 富士通株式会社 | 演算処理装置及び演算処理装置の制御方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| TWI319533B (en) | 2010-01-11 |
| WO2004086219A2 (en) | 2004-10-07 |
| EP1625493A2 (en) | 2006-02-15 |
| TW200422864A (en) | 2004-11-01 |
| WO2004086219A3 (en) | 2006-01-12 |
| US7266676B2 (en) | 2007-09-04 |
| US20040186985A1 (en) | 2004-09-23 |
| WO2004086219A9 (en) | 2004-12-09 |
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