TWI319533B - Method and apparatus for branch prediction based on branch targets - Google Patents

Method and apparatus for branch prediction based on branch targets

Info

Publication number
TWI319533B
TWI319533B TW093107413A TW93107413A TWI319533B TW I319533 B TWI319533 B TW I319533B TW 093107413 A TW093107413 A TW 093107413A TW 93107413 A TW93107413 A TW 93107413A TW I319533 B TWI319533 B TW I319533B
Authority
TW
Taiwan
Prior art keywords
branch
prediction based
targets
branch prediction
branch targets
Prior art date
Application number
TW093107413A
Other languages
English (en)
Other versions
TW200422864A (en
Inventor
Thang M Tran
Ravi Pratap Singh
Deepa Duraiswamy
Srikanth Kannan
Original Assignee
Analog Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Analog Devices Inc filed Critical Analog Devices Inc
Publication of TW200422864A publication Critical patent/TW200422864A/zh
Application granted granted Critical
Publication of TWI319533B publication Critical patent/TWI319533B/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding
    • G06F9/3806—Instruction prefetching for branches, e.g. hedging, branch folding using address prediction, e.g. return stack, branch history buffer
    • A—HUMAN NECESSITIES
    • A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61P—SPECIFIC THERAPEUTIC ACTIVITY OF CHEMICAL COMPOUNDS OR MEDICINAL PREPARATIONS
    • A61P31/00—Antiinfectives, i.e. antibiotics, antiseptics, chemotherapeutics
    • A61P31/04—Antibacterial agents
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842—Speculative instruction execution
    • G06F9/3844—Speculative instruction execution using dynamic branch prediction, e.g. using branch history tables

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Organic Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Communicable Diseases (AREA)
  • General Chemical & Material Sciences (AREA)
  • Medicinal Chemistry (AREA)
  • Nuclear Medicine, Radiotherapy & Molecular Imaging (AREA)
  • Oncology (AREA)
  • Pharmacology & Pharmacy (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Animal Behavior & Ethology (AREA)
  • General Health & Medical Sciences (AREA)
  • Public Health (AREA)
  • Veterinary Medicine (AREA)
  • Advance Control (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
TW093107413A 2003-03-21 2004-03-19 Method and apparatus for branch prediction based on branch targets TWI319533B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/394,820 US7266676B2 (en) 2003-03-21 2003-03-21 Method and apparatus for branch prediction based on branch targets utilizing tag and data arrays

Publications (2)

Publication Number Publication Date
TW200422864A TW200422864A (en) 2004-11-01
TWI319533B true TWI319533B (en) 2010-01-11

Family

ID=32988465

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093107413A TWI319533B (en) 2003-03-21 2004-03-19 Method and apparatus for branch prediction based on branch targets

Country Status (5)

Country Link
US (1) US7266676B2 (zh)
EP (1) EP1625493A2 (zh)
JP (1) JP2006520964A (zh)
TW (1) TWI319533B (zh)
WO (1) WO2004086219A2 (zh)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
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US7386679B2 (en) * 2004-04-15 2008-06-10 International Business Machines Corporation System, method and storage medium for memory management
US20050278505A1 (en) * 2004-05-19 2005-12-15 Lim Seow C Microprocessor architecture including zero impact predictive data pre-fetch mechanism for pipeline data memory
US7328332B2 (en) * 2004-08-30 2008-02-05 Texas Instruments Incorporated Branch prediction and other processor improvements using FIFO for bypassing certain processor pipeline stages
US7836288B2 (en) * 2004-09-14 2010-11-16 Arm Limited Branch prediction mechanism including a branch prediction memory and a branch prediction cache
WO2006085324A2 (en) * 2005-02-11 2006-08-17 Sandisk Il Ltd. Nand flash memory system architecture
US8971461B2 (en) * 2005-06-01 2015-03-03 Qualcomm Incorporated CQI and rank prediction for list sphere decoding and ML MIMO receivers
US20070074007A1 (en) 2005-09-28 2007-03-29 Arc International (Uk) Limited Parameterizable clip instruction and method of performing a clip operation using the same
US7827392B2 (en) * 2006-06-05 2010-11-02 Qualcomm Incorporated Sliding-window, block-based branch target address cache
US8935517B2 (en) 2006-06-29 2015-01-13 Qualcomm Incorporated System and method for selectively managing a branch target address cache of a multiple-stage predictor
US20080097914A1 (en) * 2006-10-24 2008-04-24 Kent Dicks Systems and methods for wireless processing and transmittal of medical data through multiple interfaces
EP2106584A1 (en) * 2006-12-11 2009-10-07 Nxp B.V. Pipelined processor and compiler/scheduler for variable number branch delay slots
US7640400B2 (en) * 2007-04-10 2009-12-29 International Business Machines Corporation Programmable data prefetching
US7913068B2 (en) * 2008-02-21 2011-03-22 International Business Machines Corporation System and method for providing asynchronous dynamic millicode entry prediction
US7941653B2 (en) * 2008-12-04 2011-05-10 Analog Devices, Inc. Jump instruction having a reference to a pointer for accessing a branch address table
US9946545B2 (en) * 2010-11-16 2018-04-17 Arm Limited Buffer store with a main store and and auxiliary store
US8886920B2 (en) * 2011-05-13 2014-11-11 Oracle International Corporation Associating tag to branch instruction to access array storing predicted target addresses for page crossing targets for comparison with resolved address at execution stage
US9250909B2 (en) * 2012-06-12 2016-02-02 International Business Machines Corporation Fast index tree for accelerated branch prediction
US9250912B2 (en) * 2012-06-12 2016-02-02 International Business Machines Corporation Fast index tree for accelerated branch prediction
US20140250289A1 (en) * 2013-03-01 2014-09-04 Mips Technologies, Inc. Branch Target Buffer With Efficient Return Prediction Capability
US9489204B2 (en) * 2013-03-15 2016-11-08 Qualcomm Incorporated Method and apparatus for precalculating a direct branch partial target address during a misprediction correction process
JP6273718B2 (ja) * 2013-08-13 2018-02-07 富士通株式会社 演算処理装置及び演算処理装置の制御方法
US10831491B2 (en) * 2018-06-29 2020-11-10 Intel Corporation Selective access to partitioned branch transfer buffer (BTB) content
US11762660B2 (en) * 2020-06-23 2023-09-19 Ampere Computing Llc Virtual 3-way decoupled prediction and fetch

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5142634A (en) * 1989-02-03 1992-08-25 Digital Equipment Corporation Branch prediction
GB2285154B (en) * 1993-12-24 1998-04-01 Advanced Risc Mach Ltd Branch cache
US5608886A (en) * 1994-08-31 1997-03-04 Exponential Technology, Inc. Block-based branch prediction using a target finder array storing target sub-addresses
US5732253A (en) * 1994-10-18 1998-03-24 Cyrix Corporation Branch processing unit with target cache storing history for predicted taken branches and history cache storing history for predicted not-taken branches
US5864697A (en) * 1996-06-28 1999-01-26 Texas Instruments Incorporated Microprocessor using combined actual and speculative branch history prediction
US6119222A (en) * 1996-12-23 2000-09-12 Texas Instruments Incorporated Combined branch prediction and cache prefetch in a microprocessor
TW357318B (en) * 1997-03-18 1999-05-01 Ind Tech Res Inst Branching forecast and reading device for unspecified command length extra-purity pipeline processor
US5964870A (en) * 1997-09-22 1999-10-12 Intel Corporation Method and apparatus for using function context to improve branch
US6185675B1 (en) * 1997-10-24 2001-02-06 Advanced Micro Devices, Inc. Basic block oriented trace cache utilizing a basic block sequence buffer to indicate program order of cached basic blocks
US6446197B1 (en) 1999-10-01 2002-09-03 Hitachi, Ltd. Two modes for executing branch instructions of different lengths and use of branch control instruction and register set loaded with target instructions

Also Published As

Publication number Publication date
TW200422864A (en) 2004-11-01
JP2006520964A (ja) 2006-09-14
WO2004086219A2 (en) 2004-10-07
WO2004086219A3 (en) 2006-01-12
US7266676B2 (en) 2007-09-04
EP1625493A2 (en) 2006-02-15
US20040186985A1 (en) 2004-09-23
WO2004086219A9 (en) 2004-12-09

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