JP2006345398A - High frequency switching circuit and semiconductor device using high frequency switch - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To increase an input power by suppressing both the deterioration of an insertion loss and the deterioration of a high frequency distortion in a high frequency switching circuit. <P>SOLUTION: The high frequency switching circuit 100 includes: a terminal 151 for input and output for inputting or outputting a high frequency signal; and a basic switch 130 constituted of a plurality of serially connected field effect transistors 131-134, and controlling an ON or OFF state of an electric connection between the terminal 151 for input and output and an earth 171. A transistor (131) of the most terminal 151 side for the input and output in sequence of the electric connection among the plurality of field effect transistors 131-134 has a larger threshold voltage than the remaining transistors (132-134) of the plurality of field effect transistors 131-134. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a high-frequency switch circuit, and more particularly to the realization of a high-frequency switch circuit having high input power characteristics.

  In recent years, with the improvement in performance of mobile communication devices and the like, there has been a strong demand for miniaturization and higher performance of high-frequency semiconductor devices used in terminals. In particular, high-frequency switch circuits that perform antenna switching are required to simultaneously achieve low insertion loss, low distortion, and high input power. In view of this, there has been proposed a method of constructing a high-frequency switch circuit using field effect transistors (hereinafter referred to as FETs) connected in multiple stages.

  FIG. 6 is a diagram showing a conventional high-frequency switch circuit described in Patent Document 1. In FIG. The high-frequency switch circuit includes a first input / output terminal 11 connected to the receiver, a second input / output terminal 12 connected to the transmitter, and a third input / output terminal 13 connected to the antenna. I have.

  Here, the first input / output terminal 11 is grounded via the reception shunt FET 3 and is connected to the third input / output terminal 13 via the reception transfer FET 1. The second input / output terminal 12 is connected to the third input / output terminal 13 via the transmission transfer FET 2 and grounded via the transmission shunt FET 4.

  Further, the gate of the reception transfer FET 1 and the gate of the transmission shunt FET 4 are respectively connected to the first control terminal VC1 through the resistor 20, and the gate of the reception shunt FET 3 and the gate of the transmission transfer FET 2 are Are connected to the second control terminal VC2 through the resistors 20, respectively.

  When a signal is received by such a high frequency switch circuit, a high voltage is applied to the first control terminal VC1 and a low voltage is applied to the second control terminal VC2. As a result, the reception transfer FET 1 and the transmission shunt FET 4 are turned on, and the reception shunt FET 3 and the transmission transfer FET 2 are turned off. Accordingly, the first input / output terminal 11 and the third input / output terminal 13 are electrically connected, and the receiver and the antenna are short-circuited. As a result, the reception signal input from the antenna is output from the receiver.

  When transmitting a signal, a low voltage is applied to the first control terminal VC1 and a high voltage is applied to the second input / output terminal 12, contrary to the signal reception. As a result, the reception transfer FET 1 and the transmission shunt FET 4 are turned off, and the reception shunt FET 3 and the transmission transfer FET 2 are turned on. Accordingly, the second input / output terminal 12 and the third input / output terminal 13 are electrically connected, and the transmitter and the antenna are short-circuited. As a result, the transmission signal input from the transmitter is output from the antenna.

  Next, the high-frequency switch circuit shown in FIG. 7 replaces the reception transfer FET1 in the high-frequency switch circuit of FIG. 6 with a structure in which FET11 and FET12 are connected in series in two stages, and the transmission shunt FET4 is replaced with FET41 and FET42. Is replaced with a structure connected in series in two stages.

  By adopting such a structure, the signal voltage input from the antenna during signal transmission is divided by the FET 11, FET 12, FET 41 and FET 42. For this reason, even when a large signal is input, these four FETs (FET11, FET12, FET41, and FET42) are easily maintained in the OFF state. From this, it is possible to obtain excellent distortion characteristics, a high input saturation voltage, and the like as compared with the high-frequency switch circuit of FIG. 6 in which each of the reception transfer FET 2 and the transmission shunt FET 4 is configured by a single stage FET.

In the high-frequency switch circuit of FIG. 7, the FET 11 and FET 12 constituting the reception transfer FET and the FET 41 and FET 42 constituting the transmission shunt FET have various conditions such as threshold value, gate length, and gate width, respectively. Are the same.
JP-A-8-70245

  In the high-frequency switch circuit as described above, when the threshold value is deepened, the insertion loss is improved, but there is a problem that the input power cannot be increased because the third-order harmonic distortion is degraded.

  Therefore, in view of the problem, the present invention provides a high-frequency switch circuit that can increase input power while suppressing deterioration of insertion loss in a high-frequency switch circuit using FETs connected in multiple stages, and such a high-frequency switch circuit. It is an object of the present invention to provide a semiconductor device having

  When a high-frequency signal is input to a plurality of FETs connected in multiple stages in series, the voltage applied between the gate and source of each FET is the largest in the FET located at the end on the side where the high-frequency signal is input. It is known that the signal becomes smaller from the input side toward the opposite side. Therefore, the inventors of the present application enable an increase in input power while preventing deterioration of insertion loss by adjusting the gate threshold voltage of each FET in a plurality of FETs connected in multiple stages in series. Inspired.

  More specifically, in order to solve the above-described problem, the first high-frequency switch circuit of the present invention includes an input / output terminal for inputting or outputting a high-frequency signal, and a plurality of field effect transistors connected in series. And a basic switch unit that controls an on / off state of electrical connection between the input / output terminal and the ground, and is the most input / output terminal in the order of electrical connection among the plurality of field effect transistors. The one on the side has a higher threshold voltage than the rest of the plurality of field effect transistors.

  According to the first high-frequency switch circuit, the FET having the largest gate-source voltage when a high-frequency signal is input to the basic switch portion, the FET located closest to the input / output terminal in the order of electrical connection , The threshold voltage is larger than that of the remaining FETs. In other words, in the remaining FETs having a gate-source voltage smaller than that of the FET on the input / output terminal side, the threshold voltage is also lower than that of the FET on the input / output terminal side.

  This makes it possible to increase the input power while suppressing both the deterioration of the insertion loss and the deterioration of the high-frequency distortion, as compared with the conventional basic switch unit in which the threshold voltages are the same in all FETs. The reason for this will be described below.

  When a high-frequency signal is input to a basic switch unit configured by connecting multiple FETs in series, the gate-source voltage in the FET on the most input / output terminal side is the gate-source in the remaining FETs. It becomes larger than the inter-voltage. For this reason, by making the threshold voltage of the FET closest to the input / output terminal larger than the threshold voltages of the remaining FETs, it is possible to reduce the deterioration of the input loss in the basic switch section.

  For the remaining FETs, the gate-source voltage is smaller than that of the FET on the input / output terminal side, so the threshold voltage is made lower than that of the FET on the input / output terminal side while preventing deterioration of input loss. can do. By reducing the threshold voltage in this way, it is possible to suppress the degradation of the harmonic distortion, so that the harmonic distortion in the basic switch unit is reduced.

The basic switch section is composed of n (n is an integer of 2 or more) field effect transistors connected in series, and is i-th (i is an integer of 1 to n) counted from the input / output terminal side. When the threshold voltage of the field effect transistor of Vth (i) is Vth (i),
Vth (i-1) ≧ Vth (i)
It is preferable that the relational expression represented by

  In other words, the threshold voltage of the third and subsequent FETs from the input / output terminal side is preferably equal to or lower than the threshold voltage of the FET positioned on the input / output terminal side with respect to the FET. In the first high-frequency switch circuit, since the threshold voltage of the FET on the most input / output terminal side (i = 1) is larger than the threshold voltage of the remaining FETs, Vth (1)> Vth (2) is established.

  In this way, it is possible to realize the effect of increasing the input power more reliably while suppressing the deterioration of the insertion loss and the harmonic distortion. In other words, in a plurality of FETs connected in series, the larger the order counted from the input / output terminal side, the smaller the voltage between the gate and the source, so the FET having the larger order counted from the input / output terminal side. The effect described above is realized by reducing the threshold voltage.

  In order to achieve the above object, a second high-frequency switch circuit according to the present invention is connected in series with a first input / output terminal and a second input / output terminal for inputting or outputting a high-frequency signal. And a basic switch unit configured to control an on / off state of electrical connection between the first input / output terminal and the second input / output terminal. One of the input / output terminal and the second input / output terminal is an off-time active terminal to which signal power is applied when the basic switch unit is in an off state. The one that is closest to the active terminal side in the off-state in the order of the general connection has a threshold voltage that is higher than the remaining one of the plurality of field effect transistors.

  According to the second high-frequency switch circuit, the FET having the largest gate-source voltage when a high-frequency signal is input to the basic switch portion, is located closest to the active terminal when OFF in the order of electrical connection. The threshold voltage of the FET is larger than that of the remaining FETs. In other words, in the remaining FETs whose gate-source voltage is smaller than that of the FET on the active terminal side when off, the threshold voltage is also smaller than that of the FET on the active terminal side when off.

  By doing so, as with the first high-frequency switch circuit, both the deterioration of insertion loss and the deterioration of high-frequency distortion are suppressed compared to the conventional basic switch section in which the threshold voltage is the same in all FETs. However, the input power can be increased.

The basic switch section is composed of n (n is an integer of 2 or more) field effect transistors connected in series, and is i-th (i is an integer of 1 to n) counted from the active terminal side when OFF. When the threshold voltage of the field effect transistor of Vth (i) is Vth (i),
Vth (i-1) ≧ Vth (i)
It is preferable that the relational expression represented by

  That is, it is preferable that the threshold voltage of the third and subsequent FETs from the active terminal side when off is one or less than the threshold voltage of the FET located on the active terminal side when off. In the second high-frequency switch circuit, since the threshold voltage of the FET on the active terminal side when off (i = 1) is larger than the threshold voltage of the remaining FETs, Vth (1)> Vth (2) is established.

  In this way, it is possible to realize the effect of increasing the input power more reliably while suppressing the deterioration of the insertion loss and the harmonic distortion. In other words, in a plurality of FETs connected in series, the larger the order counted from the active terminal side when off, the smaller the voltage between the gate and the source, so the FET whose order counted from the active terminal side when off is larger. The effect described above is realized by reducing the threshold voltage.

  In order to achieve the above object, a third high-frequency switch circuit according to the present invention comprises an input / output terminal for inputting or outputting a high-frequency signal, and a multi-gate field effect transistor having a plurality of gate electrodes, and A basic switch unit that controls the on / off state of the electrical connection between the input / output terminal and the ground, and the one that is closest to the input / output terminal in the order of electrical connection among the plurality of gate electrodes, It has a threshold voltage greater than the rest of the plurality of gate electrodes.

  According to the third high-frequency switch circuit, the gate electrode has the largest voltage between the gate and the source when a high-frequency signal is input to the basic switch portion. The threshold voltage of the gate electrode positioned is higher than that of the remaining gate electrodes. In other words, the threshold voltage of the remaining gate electrode having a smaller gate-source voltage than the gate electrode on the input / output terminal side is smaller than that on the input / output terminal side. Yes.

  As a result, the input power is reduced while suppressing both the deterioration of the insertion loss and the deterioration of the high-frequency distortion, as compared with the conventional basic switch section in which the multi-gate field effect transistor having the same threshold voltage is used in all the gate electrodes. Can be increased.

  The reason for this is the same as in the case of the first high-frequency switch circuit that uses a basic switch unit configured by a plurality of FETs connected in series. In other words, since the gate-source voltage is the largest in the gate electrode closest to the input / output terminal, the threshold voltage of the gate electrode is made larger than the threshold voltage of the remaining gate electrodes. Deterioration of insertion loss can be reduced. Further, the remaining gate electrode has a smaller gate-source voltage than the gate electrode on the input / output terminal side, so that the threshold voltage can be reduced while suppressing deterioration of insertion loss. . As a result, harmonic distortion in the basic switch portion can be reduced.

The basic switch section is composed of a multi-gate field effect transistor having n (n is an integer of 2 or more) gate electrodes, and is the i-th (i is an integer of 1 to n) counted from the input / output terminal side. ) When the threshold voltage of the gate electrode of V) is Vth (i),
Vth (i-1) ≧ Vth (i)
It is preferable that the relational expression represented by

  That is, the threshold voltage of the third and subsequent gate electrodes from the input / output terminal side is preferably equal to or lower than the threshold voltage of one gate electrode positioned on the input / output terminal side with respect to the gate electrode. . In the third high-frequency switch circuit, since the threshold voltage of the gate electrode closest to the input / output terminal (i = 1) is larger than the threshold voltage of the remaining gate electrodes, Vth (1 )> Vth (2) is established.

  In this way, it is possible to realize the effect of increasing the input power more reliably while suppressing the deterioration of the insertion loss and the harmonic distortion. In other words, in the plurality of gate electrodes of the multi-gate field effect transistor, the larger the order counted from the input / output terminal side, the smaller the gate-source voltage, so the order counted from the input / output terminal side is The effect described above is realized by reducing the threshold voltage for larger gate electrodes.

  To achieve the above object, a fourth high-frequency switch circuit according to the present invention includes a first input / output terminal and a second input / output terminal for inputting or outputting a high-frequency signal, and a plurality of gate electrodes. And a basic switch unit that controls an on / off state of electrical connection between the first input / output terminal and the second input / output terminal. One of the input / output terminals and the second input / output terminal is an off-time active terminal to which signal power is applied when the basic switch unit is in an off state. The one that is closest to the active terminal when off in the order of the general connection has a threshold voltage that is higher than the remaining one of the plurality of gate electrodes.

  According to the fourth high-frequency switch circuit, among the plurality of gate electrodes of the multi-gate field effect transistor, the gate electrode is the gate electrode that has the highest gate-source voltage when a high-frequency signal is input to the basic switch portion. The threshold voltage of the gate electrode located closest to the active terminal when off in relation to the order of connection is higher than that of the remaining gate electrodes. In other words, the threshold voltage of the remaining gate electrode, which has a smaller gate-source voltage than the gate electrode on the active terminal side when off, is smaller than the gate electrode on the active terminal side when off. Yes.

  By doing so, as in the third high-frequency switch circuit, the insertion loss is deteriorated as compared with the conventional basic switch unit using the multi-gate field effect transistor having the same threshold voltage in all the gate electrodes. In addition, it is possible to increase the input power while suppressing both the deterioration of the high frequency distortion.

The basic switch section is composed of a multi-gate field effect transistor having n (n is an integer of 2 or more) gate electrodes, and is the i-th (i is an integer of 1 to n) counted from the active terminal side when OFF. ) When the threshold voltage of the gate electrode of V) is Vth (i),
Vth (i-1) ≧ Vth (i)
It is preferable that the relational expression represented by

  That is, the threshold voltage of the third and subsequent gate electrodes from the off-state active terminal side is preferably equal to or lower than the threshold voltage of the gate electrode adjacent to the off-state active terminal side. In the fourth high-frequency switch circuit, the gate electrode closest to the active terminal side (i = 1) has a threshold voltage larger than that of the other gate electrodes, so that Vth (1) > Vth (2) is established.

  In this way, it is possible to realize the effect of increasing the input power more reliably while suppressing the deterioration of the insertion loss and the harmonic distortion. That is, in the plurality of gate electrodes of the multi-gate field effect transistor, the larger the order counted from the off-state active terminal side, the smaller the gate-source voltage, so the order counted from the off-state active terminal side is The effect described above is realized by reducing the threshold voltage for larger gate electrodes.

  In order to achieve the above object, a fifth high-frequency switch circuit according to the present invention includes a plurality of input / output terminals for inputting or outputting a high-frequency signal, and any one of the first to fourth aspects according to the present invention. A plurality of high-frequency switch circuits, which are high-frequency switch circuits, are provided, and the flow of high-frequency signals is switched between a plurality of input / output terminals.

  According to the fifth high-frequency switch circuit, in the high-frequency switch circuit that switches the flow of the high-frequency signal between the plurality of input / output terminals, the effect of increasing the input power while suppressing the deterioration of the insertion loss and the harmonic distortion is realized. be able to.

  In order to achieve the above object, in a semiconductor device according to the present invention, first to fifth high-frequency switch circuits according to the present invention are formed on a substrate.

  According to the semiconductor device of the present invention, input power can be increased while suppressing deterioration of insertion loss and harmonic distortion in a semiconductor device that realizes a high-frequency switch circuit.

  According to the high-frequency switch circuit of the present invention and the semiconductor device using the high-frequency switch circuit, the threshold value of each gate electrode in the basic switch unit configured by the field effect transistors or multi-gate field effect transistors connected in multiple stages in series. By setting the voltages to different values, it is possible to increase the input power while suppressing deterioration of insertion loss and harmonic distortion. For this reason, it is possible to increase the input power while maintaining the same performance as the conventional high-frequency switch circuit.

(First embodiment)
A high-frequency switch circuit according to a first embodiment of the present invention and a semiconductor device in which the high-frequency switch circuit is integrated on a substrate will be described below with reference to the drawings.

  FIG. 1 is a circuit diagram of a high-frequency switch circuit 100 integrated on a substrate in the semiconductor device according to the first embodiment of the present invention. The high-frequency switch circuit 100 includes first to fourth basic switch units 110, 120, 130, and 140, and first to third input / output terminals 151, 152, and 153. Further, first and second ground terminals 161 and 162 and first and second control terminals 171 and 172 are provided.

  Here, each of the four basic switch sections opens and closes an electrical connection at the provided position, and switches between on and off states. The three input / output terminals are all terminals for inputting or outputting a high-frequency signal.

  The first basic switch unit 110 is provided between the first input / output terminal 151 and the third input / output terminal 153, and the second basic switch unit 120 is the second input / output terminal. It is provided between the terminal 152 and the third input / output terminal 153. These first and second basic switch sections are both inserted in series with respect to the high-frequency signal transmission path between the two input / output terminals, and pass and block the flow of the high-frequency signal. It functions as a transfer circuit that switches between and.

  Further, the third basic switch unit 130 is provided between the first input / output terminal 151 and the first ground terminal 161, and the fourth basic switch unit 140 is provided with the second input / output terminal 152. And the second ground terminal 162. These third and fourth basic switch sections are both inserted in parallel with the high-frequency signal transmission path between the input / output terminal and the ground terminal, and allow the leakage signal to escape to ground. Function as a shunt circuit.

  As described above, the high-frequency switch circuit 100 is configured by combining two transfer circuits and two shunt circuits, and functions as an SPDT (Single Pole Double Throw) circuit.

  Further, the first control terminal 171 supplies a control voltage to the first basic switch unit 110 and the fourth basic switch unit 140, and switches the two basic switch units on and off. Similarly, the second control terminal 172 supplies a control voltage to the second basic switch unit 120 and the third basic switch unit 130, and switches the two basic switch units on and off.

  Each basic switch section is composed of four FETs connected in series. More specifically, for example, the first basic switch unit 110 has a configuration in which an FET 111, an FET 112, an FET 113, and an FET 114 are connected in series. Similarly, the second basic switch unit 120 has a configuration in which FETs 121 to 124, the third basic switch unit 130 have FETs 131 to 134, and the fourth basic switch unit 140 has FETs 141 to 144 connected in series. Further, a resistance element R is connected to each of the gate electrodes of the FETs constituting the first to fourth basic switch sections, and the control signals supplied from the first control terminal 171 and the second control terminal 172. Are supplied to the gate electrodes of the respective FETs through the respective resistance elements R.

  In FIG. 1, each resistance element is indicated only by R, but the resistance element connected to the gate electrode of the FET 111 is called R111, and the resistance element connected to the gate electrode of the FET 112 is called R112. The individual resistance elements are called by adding R to the sign of the corresponding FET.

  Next, the operation of the high-frequency switch circuit 100 described above will be described. Here, first, a case where a signal is transmitted from the first input / output terminal 151 to the third input / output terminal 153 will be described.

  In such a case, a high voltage (for example, 3V) is applied to the first control terminal 171 and a low voltage (for example, 0V) is applied to the second control terminal 172. As a result, the FETs 111 to 114 (first basic switch unit 110) and the FETs 141 to 144 (fourth basic switch unit 140) are turned on, and the FETs 121 to 124 (second basic switch unit 120) and the FETs 131 to 131 are turned on. 134 (third basic switch unit 130) is turned off. That is, the first input / output terminal 151 and the third input / output terminal 153 are short-circuited, and a signal is transmitted from the first input / output terminal 151 to the third input / output terminal 153. Can do.

  At this time, since the second basic switch unit 120 is in the OFF state, the second control terminal 172 and the third input / output terminal 153 are disconnected, and no signal is transmitted. Further, the leakage signal at the second input / output terminal 152 is released to the second ground terminal 162 because the fourth basic switch unit 140 is in the ON state. The third basic switch unit 130 is in an off state, and no signal escapes from the first input / output terminal 151 to the first ground terminal 161.

  In contrast, when a signal is transmitted from the second input / output terminal 152 to the third input / output terminal 153, the first control terminal 131 has a low voltage and the second control terminal, contrary to the previous case. A high voltage is applied to 132. As a result, the on / off states of the four basic switch units are reversed, and a signal is transmitted from the second input / output terminal 152 to the third input / output terminal 153. At this time, the FETs 111 to 114 and the FETs 141 to 144 are turned off, and the FETs 121 to 124 and the FETs 131 to 134 are turned on.

  As described above, when transmitting a signal, some basic switch units are in an off state. At this time, a capacitance component is generated in each FET constituting the basic switch unit in the off state. Here, in the high-frequency switch circuit 100, the FET that is off when the signal is transmitted from the first input / output terminal 151 to the third input / output terminal 153 is shown in FIGS. 2 (a) and 2 (b). Indicates the volume component.

  More specifically, FIG. 2A shows the capacitance components C31 to C34 and C41 to C48 for the FETs 131 to 134 constituting the third basic switch unit 130. Here, C31 to C34 are capacitance components between the drain and the source for the FETs 131 to 134 in order, and C41 to C48 are capacitance components between the gate and the source and between the gate and the drain for the FETs 131 to 134. Consider point A at the same potential as the first input / output terminal 151, point B between the FET 131 and FET 132, point C between the FET 132 and FET 133, and point D between the FET 133 and FET 134.

  Also, FIG. 2B shows capacitance components C11 to C14 and C21 to C28 for the FETs 121 to 124 that constitute the second basic switch unit 120. Here, C11 to C14 are capacitance components between the drain and the source for the FETs 121 to 124 in order, and C21 to C28 are capacitance components between the gate and the source and between the gate and the drain for the FETs 121 to 124. Also, consider point E at the same potential as third input / output terminal 153, point F between FET 121 and FET 122, point G between FET 122 and FET 123, and point H between FET 123 and FET 124.

  When a signal is transmitted from the first input / output terminal 151 to the third input / output terminal 153, as described above, the FETs 111 to 114 and the FETs 141 to 144 are turned on, and the FETs 121 to 124 and the FET 131 are turned on. ˜134 are controlled to be in the off state. In this state, the signal voltage input from the first input / output terminal 151 is divided by the stray capacitances C11 to C14, C21 to C28, C31 to C34, and C41 to C48 of the FET in the off state.

  As a result, the voltages at points B, C, and D shown in FIG. 2A are 3/4 times, 2/4 times, and 1/4 times the voltage at point A, respectively. Further, the voltages at points F, G, and H shown in FIG. 2B are 3/4 times, 2/4 times, and 1/4 times the voltage at point E, respectively.

  Thus, the terminal voltage decreases as the distance from the signal path increases. As the voltage decreases, the influence on the signal path is reduced. In other words, since the input signal is gradually reduced, the influence of distortion is also reduced. Therefore, the gate threshold voltage of the FET constituting the basic switch unit can be reduced as the distance from the signal path increases.

  Therefore, first, the FETs 131 to 134 constituting the third basic switch unit 130 that is a shunt circuit that is turned off when a signal is transmitted from the first input / output terminal 151 to the third input / output terminal 153. For the above, an FET having a larger threshold voltage is used closer to the first input / output terminal 151 to which signal power is applied. Specifically, for example, the gate threshold voltages of the FETs 131, 132, 133, and 134 are set to −0.9V, −1.0V, −1.1V, and −1.2V in this order.

  Further, regarding the FETs 121 to 124 that constitute the second basic switch unit 120 that is a transfer circuit that is turned off when a signal is transmitted from the first input / output terminal 151 to the third input / output terminal 153, An FET having a larger threshold voltage is used as it is closer to an input / output terminal (active terminal when off) to which a signal voltage is applied when the transfer circuit is off. Specifically, for example, the gate threshold voltages of the FETs 121, 122, 123, and 124 are set to −0.9V, −1.0V, −1.1V, and −1.2V in order.

  With respect to the high-frequency switch circuit 100 having the above configuration, FIG. 3A shows the input dependency of insertion loss, and FIG. 3B shows the input dependency of harmonic distortion. The conventional high-frequency switch circuit having the same gate threshold voltage for all FETs is also shown. In both cases, the frequency is 1 GHz and the control voltage is 3V.

  In FIG. 3A, the vertical axis represents insertion loss, and the horizontal axis represents input power. As shown in FIG. 3A, the insertion loss at the low input level (for example, when the input power is about 30 dBm or less) in the high frequency switch circuit 100 is equivalent to that of the conventional high frequency switch circuit. Further, the input level at which the insertion loss is degraded in the high frequency switch circuit 100 is about 1 dBm larger than that of the conventional high frequency switch circuit.

  In FIG. 3B, the vertical axis represents harmonic distortion and the horizontal axis represents input power. As shown in FIG. 3B, the second-order harmonic distortion at the low input level (for example, when the input power is about 30 dBm or less) in the high-frequency switch circuit 100 is equivalent to that of the conventional high-frequency switch circuit. Moreover, the point at which the deterioration of the second harmonic distortion in the high frequency switch circuit 100 starts is about 1 dBm larger than that of the conventional high frequency switch circuit.

  In this way, the plurality of FETs connected in series constituting the basic switch unit have different threshold voltages, thereby reducing the input power while preventing both the deterioration of the insertion loss and the deterioration of the harmonic distortion. Can be bigger.

  In the above description, the value of the gate threshold voltage of the FET included in the high-frequency switch circuit 100 is an example, and is not limited to these values.

  For example, in the case of a shunt circuit composed of n (n is an integer of 2 or more) FETs connected in series with the basic switch section, the i th (i is 1 or more) counted from the input / output terminal side. It is only necessary that Vth (1) is larger than Vth (2) to Vth (n), where Vth (i) is the gate threshold voltage of the FET of n). With this configuration, input power can be increased while suppressing deterioration of insertion loss and high-frequency distortion.

  In addition to this, it is more preferable that the following expression (1) holds for i that is 3 or more.

Vth (i−1) ≧ Vth (i) (1)
That is, the gate threshold voltage Vth (1) of the FET located closest to the input / output terminal is the largest, and the gate threshold voltage Vth (i) (where i is 2 or more) of the other FETs, The gate threshold voltage Vth (i−1) of the FET adjacent to the input / output terminal side with respect to the FET is preferably equal to or lower.

  More preferably, for i that is 3 or more, the following equation (2) is satisfied.

Vth (i-1)> Vth (i) (2)
That is, it is preferable that the gate threshold voltage be higher as the FET is located closer to the input / output terminal. This is because the gate-source voltage increases as the FET is closer to the input / output terminal side (i value is smaller).

  In addition, the gate threshold voltage of each FET shown in this embodiment is an example which satisfy | fills Formula (2).

  Further, when the basic switch unit is a transfer circuit composed of n (n is an integer of 2 or more) FETs connected in series, the i-th (i is 1 or more and n) counting from the active terminal side when OFF. When the gate threshold voltage of the FET of the following integer) is Vth (i), it is only necessary to satisfy the same relationship as in the case of the shunt circuit.

  That is, it is only necessary that Vth (1) is larger than Vth (2) to Vth (n). Moreover, it is more preferable to satisfy | fill Formula (1), and it is still more preferable to satisfy | fill Formula (2).

  As described above, in the basic switch unit composed of FETs connected in multiple stages in series, by setting the gate threshold voltage individually, the deterioration of the insertion loss and the high-frequency distortion is suppressed and The input power can be increased while maintaining the same performance. In other words, at least one FET having a different gate threshold voltage may be included in the plurality of FETs constituting the basic switch unit so as to satisfy the relationship as described above.

  In the above description, the case where a signal is transmitted between the first input / output terminal 151 and the third input / output terminal 153 has been described. Further, the second basic switch unit 120 and the third basic switch unit 130 that are turned off in this case have been described in detail. On the other hand, when a signal is transmitted between the second input / output terminal 152 and the third input / output terminal 153, the input power is similarly reduced while suppressing the deterioration of insertion loss and high-frequency distortion. Can be increased. In this case, the first basic switch unit 110 and the fourth basic switch unit 140 are turned off.

  For this reason, since the signal power is applied to the second input / output terminal 152 side for the fourth basic switch section 140 (FETs 141 to 144) which is a shunt circuit, the FETs 141, 142, 143 and 144 are applied. For example, -0.9V, -1.0V, -1.1V, and -1.2V may be sequentially set.

  In addition, since the signal power is applied to the third input / output terminal 153 side (the active terminal side in the off state) for the first basic switch unit 110 (FETs 111 to 114) which is a transfer circuit, For the FETs 111, 112, 113, and 114, for example, -0.9V, -1.0V, -1.1V, and -1.2V may be sequentially set.

  Further, when the gate threshold voltage of the i-th FET (i is an integer of 1 to n) counted from the input / output terminal side or the off-time active terminal side is Vth (i), Vth (1) is The fact that it should be larger than any one of Vth (2) to Vth (n) is similar to the case described above. Further, it is more preferable that the expression (1) is satisfied, and the same is true for the expression (2).

  Further, in the high frequency switch circuit 100, when the path between the first input / output terminal 151 and the third input / output terminal 153 is effective, the second input / output terminal 152 and the third input / output terminal 153 are effective. The characteristics are the same as when the path to the output terminal 153 is effective. For this reason, the characteristics shown in FIGS. 3A and 3B are not limited to the path between the first input / output terminal 151 and the third input / output terminal 153 but also the second input / output. It can be considered that the route between the terminal 152 for use and the third input / output terminal 153 is also shown. However, the present invention is not limited to such a case. That is, the path between the second input / output terminal 152 and the third input / output terminal 153 is the path between the first input / output terminal 151 and the third input / output terminal 153. It may have different characteristics.

  Further, by integrating the high-frequency switch circuit 100 of the first embodiment described above on a substrate, the high-frequency switch circuit can increase the input power while suppressing the deterioration of insertion loss and high-frequency distortion as compared with the prior art. Can be realized as a semiconductor device.

(Second Embodiment)
Next, a high-frequency switch circuit according to a second embodiment of the present invention and a semiconductor device in which the high-frequency switch circuit is integrated on a substrate will be described with reference to the drawings.

  FIG. 4 is a circuit diagram of a high-frequency switch circuit 200 integrated on a substrate in a semiconductor device according to the second embodiment of the present invention. The high-frequency switch circuit 200 is different from the high-frequency switch circuit 100 of the first embodiment in the configuration of basic switch units (first to fourth basic switch units 110, 120, 130, and 140 in FIG. 1). These components are the same as those of the high-frequency switch circuit 100. Therefore, the same components as those in FIG. 4 are denoted by the same reference numerals as those in FIG. Hereinafter, the basic switch part which is particularly different will be described.

  In the high-frequency switch circuit 100 shown in FIG. 1, each of the first to fourth basic switch units 110 to 140 is composed of a plurality of FETs connected in series. For example, the first basic switch unit 110 is composed of FETs 111 to 114.

  On the other hand, in the high-frequency switch circuit 200 according to this embodiment shown in FIG. 4, each of the first to fourth basic switch units is configured by a multi-gate FET having a plurality of gate electrodes.

  Specifically, for example, the multi-gate FET 201 constituting the first basic switch unit 210 includes a gate electrode 211, a gate electrode 212, a gate electrode 213, and a gate electrode 214 in order from the third input / output terminal 153 side. Is provided. Similarly, the multi-gate FET 202 constituting the second basic switch unit 220 includes gate electrodes 221 to 224 in order from the third input / output terminal 153 side. The multi-gate FET 203 constituting the third basic switch unit 230 includes gate electrodes 231, 232, 233 and 234 in order from the first input / output terminal 151 side. Similarly, the multi-gate FET 204 constituting the fourth basic switch unit 240 includes gate electrodes 241 to 244 in order from the second input / output terminal 152 side.

  Note that a control voltage for switching the on / off state of each basic switch unit is supplied to each gate electrode from the first ground terminal 171 or the second control terminal 172 via the resistance element R. . Here, in FIG. 4, the resistance element is shown only as R, but the resistance element connected to the gate electrode of the FET 211 is referred to as R211 and the resistance element connected to the gate electrode of the FET 212 is referred to as R212. Each resistance element is called by adding R to the corresponding FET code.

  Since the operation of the high-frequency switch circuit 200 having the above configuration is the same as the operation of the high-frequency switch circuit 100 according to the first embodiment, it will be briefly described here. First, when a signal is transmitted from the first input / output terminal 151 to the third input / output terminal 153, a high voltage (for example, 3V) is applied to the first control terminal 171 and the second control terminal. A low voltage (eg, 0 V) is supplied to 172. Accordingly, the first basic switch unit 210 (gate electrodes 211 to 214) and the fourth basic switch unit 240 (gate electrodes 241 to 244) are turned on, and the second basic switch unit 220 (gate electrode 221). 224) and the third basic switch unit 230 (gate electrodes 231 to 234) are turned off. As a result, a signal can be transmitted from the first input / output terminal 151 to the third input / output terminal 153 as described above.

  On the other hand, when signal transmission is performed between the second input / output terminal 152 and the third input / output terminal 153, the low voltage is applied to the first control terminal 171, contrary to the previous case. A high voltage may be supplied to the second control terminal 172. As a result, the second and third basic switch sections are turned on, and the first and fourth basic switch sections are both turned off, and the second input / output terminal 152 and the third input / output terminal 153 Signals are transmitted between the two.

  When signal transmission is performed in this way, the gate threshold voltage is reduced as the distance from the signal path increases in the high-frequency switch circuit 100 of the present embodiment as well as the high-frequency switch circuit 100 of the first embodiment. be able to. For this reason, for each multi-gate FET constituting the basic switch unit, the gate electrode closer to the input / output terminal to which the signal power is applied has a larger threshold voltage, thereby reducing the insertion loss. In addition, it is possible to increase the input power while preventing degradation of harmonic distortion.

  Specifically, for example, a case where a signal is transmitted from the first input / output terminal 151 to the third input / output terminal 153 is considered. In this case, the gate electrodes 231 to 234 in the third basic switch unit 230 which is a shunt circuit that is turned off are closer to the first input / output terminal 151 to which signal power is applied. The gate electrode has a value voltage. For example, the gate threshold voltages of the gate electrodes 231, 232, 233, and 234 are set to −0.9V, −1.0V, −1.1V, and −1.2V in this order.

  In addition, the gate electrode in the second basic switch unit 220 which is a transfer circuit that is turned off at the same time has a larger threshold value as it is closer to the input / output terminal on the side to which the signal power is applied (active terminal at the off time). The gate electrode has a value voltage. For example, the gate electrodes 221, 222, 223, and 224 are sequentially set to −0.9 V, −1.0 V, −1.1 V, and −1.2 V, respectively.

  Further, a detailed description of the case of transmitting a signal between the second input / output terminal 152 and the third input / output terminal 153 is omitted, but the gate electrode provided in the basic switch unit is similarly described. By setting the threshold voltage, it is possible to increase the input power while preventing both the degradation of insertion loss and the degradation of harmonic distortion.

  FIG. 5 (a) shows the input dependency of the insertion loss for the high-frequency switch circuit 200 as described above and a conventional high-frequency switch circuit using a multi-gate FET having the same gate threshold voltage in all gate electrodes. FIG. 5B shows the input dependency of the harmonic distortion.

  As shown in FIG. 5A, the deterioration of the insertion loss in the high-frequency switch circuit 200 starts at an input level that is about 1 dBm larger than that of the conventional high-frequency switch circuit. Further, as shown in FIG. 5B, the deterioration of the insertion loss in the high-frequency switch circuit 200 also starts at an input level that is about 1 dBm larger than that of the conventional high-frequency switch circuit. The high-frequency switch circuit 200 has a symmetric configuration, and the characteristics shown in FIGS. 5A and 5B are the same as those of the first input / output terminal 151 and the third input / output terminal 153. It may be considered that both the case of transmitting a signal between them and the case of transmitting a signal between the second input / output terminal 152 and the third input / output terminal 153 are shown.

  As described above, according to the high-frequency switch circuit 200 of the present embodiment, it is possible to increase the input power while suppressing the deterioration of the insertion loss and the high-frequency distortion.

  In addition, although the specific example was shown about the gate threshold voltage of each gate electrode, it is not limited to these values.

  For example, when the basic switch unit is a shunt circuit configured by a multi-gate FET having n gate electrodes (n is an integer of 2 or more), the i-th (i is 1 or more and n) from the input / output terminal side. Vth (1) should be larger than Vth (2) to Vth (n) where Vth (i) is the gate threshold voltage of the gate electrode of the following integer). With this configuration, input power can be increased while suppressing deterioration of insertion loss and high-frequency distortion.

  In addition to this, more preferably, for i that is 3 or more, the following equation (1) similar to that described in the first embodiment may be satisfied.

Vth (i−1) ≧ Vth (i) (1)
That is, the gate threshold voltage Vth (1) of the gate electrode located closest to the input / output terminal is the largest, and the gate threshold voltages Vth (i) of the other gate electrodes are the same for each gate electrode. Therefore, it is preferable that the voltage be equal to or lower than the gate threshold voltage Vth (i−1) of the gate electrode adjacent to the input / output terminal side.

  More preferably, for i that is 3 or more, the following equation (2) similar to that described in the first embodiment may be satisfied.

Vth (i-1)> Vth (i) (2)
In other words, the gate threshold voltage is preferably increased as the gate electrode is positioned closer to the input / output terminal. This is because the gate-source voltage increases as the gate electrode is closer to the input / output terminal side (i value is smaller).

  In addition, the gate threshold voltage of each gate electrode shown in this embodiment is an example which satisfy | fills Formula (2).

  In the case where the basic switch unit is a transfer circuit composed of a multi-gate FET having n (n is an integer of 2 or more) gate electrodes, the i-th (i is 1) counted from the active terminal side when off. When the gate threshold voltage of the gate electrode of (n is an integer of n or less) is Vth (i), it is only necessary to satisfy the same relationship as in the case of the shunt circuit.

  That is, Vth (1) only needs to be larger than any one of Vth (2) to Vth (n). Moreover, it is more preferable to satisfy | fill Formula (1), and it is still more preferable to satisfy | fill Formula (2).

  As described above, in the basic switch unit configured by a multi-gate FET having a plurality of gate electrodes, the threshold voltage of each gate electrode is individually set to suppress the deterioration of insertion loss and high-frequency distortion. The input power can be increased while maintaining the same performance as the high-frequency switch circuit. In other words, for the multi-gate FET constituting the basic switch unit, it is sufficient that at least one gate has a gate threshold voltage different from the other gates and satisfies the relationship as described above. .

  Further, by integrating the high-frequency switch circuit 200 or the like of the embodiment described above on a substrate, a high-frequency switch circuit that can increase input power while suppressing deterioration of insertion loss and high-frequency distortion as compared with the conventional semiconductor is provided. It can be realized as a device.

  According to the high frequency switch circuit of the present invention, the input power can be increased while suppressing the deterioration of the insertion loss and the high frequency distortion and maintaining the same performance as the conventional high frequency switch circuit. It can also be used for switching circuits.

FIG. 1 is a circuit diagram of a high-frequency switch circuit according to a first embodiment of the present invention. 2A and 2B are diagrams showing capacitance components of the FET in the off state in the high-frequency switch circuit shown in FIG. 3A and 3B are diagrams showing characteristics of the high-frequency switch circuit shown in FIG. 1 and the conventional high-frequency switch circuit. FIG. 4 is a circuit diagram of a high-frequency switch circuit according to the second embodiment of the present invention. 5A and 5B are diagrams showing the characteristics of the high-frequency switch circuit shown in FIG. 4 and the conventional high-frequency switch circuit. FIG. 6 is a circuit diagram of a conventional high-frequency switch circuit. FIG. 7 is a circuit diagram of a conventional high-frequency switch circuit.

Explanation of symbols

100 High-frequency switch circuit 110, 120, 130, 140 Basic switch part 111-114, 121-124, 131-134, 141-144 FET
151, 152, 153 Input / output terminals 161, 162 Ground terminals 171, 172 Control terminal R Resistive element 200 High-frequency switch circuit 210, 220, 230, 240 Basic switch unit 201, 202, 203, 204 Multi-gate FET
211-214, 221-224, 231-234, 241-244 Gate electrode

Claims (10)

An input / output terminal for inputting or outputting a high-frequency signal;
A plurality of field effect transistors connected in series, and a basic switch unit that controls an on / off state of electrical connection between the input / output terminal and the ground, and
Of the plurality of field effect transistors, the one closest to the input / output terminal in the order of electrical connection has a threshold voltage higher than the remaining one of the plurality of field effect transistors. High-frequency switch circuit featuring In claim 1,
The basic switch unit is composed of n (n is an integer of 2 or more) field effect transistors connected in series,
When the threshold voltage of the i-th field effect transistor counted from the input / output terminal side (i is an integer of 1 to n) is Vth (i), i of 3 or more
Vth (i-1) ≧ Vth (i)
A high-frequency switch circuit characterized in that a relational expression expressed by: A first input / output terminal and a second input / output terminal for inputting or outputting a high-frequency signal;
A basic switch unit configured by a plurality of field effect transistors connected in series and controlling an on / off state of electrical connection between the first input / output terminal and the second input / output terminal; With
One of the first input / output terminal and the second input / output terminal is an off-time active terminal to which signal power is applied when the basic switch unit is in an off state;
Among the plurality of field effect transistors, the one that is closest to the active terminal side in the off state in the order of electrical connection has a threshold voltage larger than the remaining one of the plurality of field effect transistors. High-frequency switch circuit featuring In claim 3,
The basic switch unit is composed of n (n is an integer of 2 or more) field effect transistors connected in series,
When the threshold voltage of the i-th field effect transistor counting from the active terminal side at the off time (i is an integer of 1 to n) is Vth (i), i of 3 or more
Vth (i-1) ≧ Vth (i)
A high-frequency switch circuit characterized in that a relational expression expressed by: An input / output terminal for inputting or outputting a high-frequency signal;
A multi-gate field effect transistor having a plurality of gate electrodes, and comprising a basic switch unit for controlling an on / off state of electrical connection between the input / output terminal and the ground,
Among the plurality of gate electrodes, the one closest to the input / output terminal in the order of electrical connection has a threshold voltage higher than the remaining one of the plurality of gate electrodes. High frequency switch circuit. In claim 5,
The basic switch unit is configured by a multi-gate field effect transistor having n (n is an integer of 2 or more) gate electrodes,
When the threshold voltage of the i-th gate electrode from the input / output terminal side (i is an integer of 1 to n) is Vth (i), i is 3 or more.
Vth (i-1) ≧ Vth (i)
A high-frequency switch circuit characterized in that a relational expression expressed by: A first input / output terminal and a second input / output terminal for inputting or outputting a high-frequency signal;
A basic switch unit configured by a multi-gate field effect transistor having a plurality of gate electrodes and controlling an on / off state of electrical connection between the first input / output terminal and the second input / output terminal And
One of the first input / output terminal and the second input / output terminal is an off-time active terminal to which signal power is applied when the basic switch unit is in an off state;
Of the plurality of gate electrodes, the one that is closest to the active terminal when off in the order of electrical connection has a threshold voltage that is greater than the remaining one of the plurality of gate electrodes. High frequency switch circuit. In claim 7,
The basic switch unit is configured by a multi-gate field effect transistor having n (n is an integer of 2 or more) gate electrodes,
When the threshold voltage of the i-th gate electrode (i is an integer not less than 1 and not more than n) counted from the active terminal side in the off state is Vth (i),
Vth (i-1) ≧ Vth (i)
A high-frequency switch circuit characterized in that a relational expression expressed by: A plurality of input / output terminals for inputting or outputting a high-frequency signal;
A plurality of high-frequency switch circuits that are high-frequency switch circuits according to any one of claims 1 to 8,
A high-frequency switch circuit that switches a flow of a high-frequency signal between the plurality of input / output terminals.   A semiconductor device, wherein the high-frequency switch circuit according to claim 1 is integrated on a substrate.

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