JP2006339429A - Method for manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device capable of preventing the resistance to hot carriers from degrading. <P>SOLUTION: This method comprises the steps of forming a field oxide film 12, gate oxide films 13a, 13b, and gate electrodes 14a, 14b on a semiconductor substrate 11; forming a first diffusion layer n, in an element region of a normal transistor 2 and an element region of a high breakdown strength transistor 1; coating the surface of the semiconductor substrate 11 with an oxide film 16; coating the high-breakdown voltage transistor 1 with a photoresist R3 as a mask; thereafter, forming a side wall 16s in the gate electrode 14b on the normal transistor 2 side by carrying out RIE in the oxide film 16; forming openings R4a in a photoresist R3 on the high breakdown voltage transistor 1 side and on the oxide film 16; carrying out ion implantation in the semiconductor substrate 11; forming a second diffusion layer n<SP>+</SP>, in the element region of the normal transistor 2; and carrying out ion implantation, from the opening R4a on the high breakdown voltage transistor 1 side, to form the second diffusion layer n<SP>+</SP>. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a semiconductor device, and more specifically to a method for manufacturing a semiconductor device provided with a normal breakdown voltage transistor and a high breakdown voltage transistor on the same semiconductor substrate.

  2. Description of the Related Art Recent semiconductor integrated circuits using highly integrated transistors employ an LDD (Lightly Doped Drain) structure. In the LDD structure, a transistor driven at a low voltage is generally used. Then, a semiconductor device is manufactured in which a booster circuit including, for example, a high breakdown voltage transistor is mounted on the same chip on a semiconductor integrated circuit having the transistor as a basic configuration. A method for manufacturing such a semiconductor device will be described with reference to FIGS.

  First, as shown in FIG. 5A, a field oxide film 112 is formed on a surface of a semiconductor substrate 111 in a predetermined region by a LOCOS (Local Oxidation on Silicon) method. Next, a well layer of the high breakdown voltage transistor 101 and the normal transistor 102 is formed on the semiconductor substrate 111. Of the regions surrounded by the field oxide film 112, gate oxide films 113a and 113b having different thicknesses in an element region where the high breakdown voltage transistor 101 is formed and an element region where the normal breakdown voltage transistor 102 is formed. Is formed. Here, the gate oxide film 113a formed on the high breakdown voltage transistor 101 side is formed to be thicker than the gate oxide film 113b formed on the normal breakdown voltage transistor 102 side. Then, gate electrodes 114a and 114b made of a polysilicon film or the like are formed in the high breakdown voltage transistor 101 and the normal transistor 102, respectively. After that, patterning is performed so that the photoresist R11 remains only in the normal transistor 102, and ion implantation is performed using the photoresist R11, the field oxide film 112, and the gate electrode 114a as a mask, and the high breakdown voltage transistor 101 side is formed. An LDD diffusion layer (referred to as n layer in this figure) is formed by a low concentration impurity.

  Next, as shown in FIG. 5B, patterning is performed in which the photoresist R11 of the normal transistor 102 is removed and the photoresist R12 is left in the high breakdown voltage transistor 101. Then, ion implantation is performed using the photoresist R12, the field oxide film 112, and the gate electrode 114b as a mask, and an LDD diffusion layer (in this figure, n-layer) made of low-concentration impurities is added to the normal transistor 102. And the photoresist R12 is removed.

Thereafter, as shown in FIG. 5C, an oxide film 116 made of SiO ₂ is formed by HTO (High Temperature Oxide) or the like so as to cover the surface of the semiconductor substrate 111 including the high breakdown voltage transistor 101 and the normal transistor 102. To do. Next, as shown in FIG. 6A, the oxide film 116 is anisotropically etched by RIE (reactive ion etching), whereby side surfaces having predetermined widths on both side surfaces of the respective gate electrodes 114a and 114b. A wall 116s is formed. After forming the sidewall 116s, as shown in FIG. 6B, the high breakdown voltage transistor 101 is provided with a photoresist R13, an opening is formed between the field oxide film 112 and the gate electrode 114a, and Then, the patterning is performed so that the opening is appropriately separated from the gate electrode 114a. In the high breakdown voltage transistor, ion implantation is performed from the opening (in this figure, n ⁺ is used, but p ⁺ may be used), so that a source layer and a drain layer are formed at a position away from the gate electrode 114a. To do. On the other hand, the normal transistor 102 functions as a spacer by using the sidewall 116s as a mask, and ion implantation is performed at a position away from the gate electrode 114b according to the width dimension of the sidewall 116s (in this figure, n ⁺ is used). , P ⁺ .) To form a source layer and a drain layer.

JP-A-7-235675

Incidentally, as shown in FIG. 6A, in the conventional method for manufacturing a semiconductor device, the sidewall 116s has the same oxide film 116 (see FIG. 5C) for both the high breakdown voltage transistor and the normal transistor. It was formed by performing the same etching process. In a normal transistor, the subsequent n ⁺ (or p ⁺ ) is sufficiently implanted by ion implantation into the semiconductor substrate 111, so that the SiO ₂ film at the site for forming the source layer and drain layer after the sidewall formation is It is necessary to be within a predetermined thickness range. When SiO ₂ is too thick, there is a concern that the ion-implanted impurities cannot sufficiently enter the semiconductor substrate 111. On the other hand, in the high breakdown voltage transistor, when the SiO ₂ film is thinner than a predetermined thickness range, there is a problem that the hot carrier resistance life is shortened due to RIE charge damage.

  The present invention has been made in view of the above circumstances, and an object thereof is to provide a method of manufacturing a semiconductor device capable of preventing deterioration of hot carrier resistance.

  The object of the present invention is a method of manufacturing a semiconductor device in which a normal transistor driven at a low voltage and a high withstand voltage transistor are formed on the same semiconductor substrate, wherein a field oxide film and a gate oxide are formed on the semiconductor substrate. Forming a film and a gate electrode; forming a first diffusion layer in the element region of the normal transistor and the element region of the high breakdown voltage transistor; and forming an oxide film on the surface of the semiconductor substrate. Covering the high-breakdown-voltage transistor with a photoresist serving as a mask, and then performing RIE on the oxide film to form a sidewall on the gate electrode on the normal transistor side; and Forming an opening in the photoresist and oxide film on the transistor side of the withstand voltage; and performing ion implantation on the semiconductor substrate; Forming a second diffusion layer in an element region of a normal transistor, and forming a second diffusion layer by ion implantation from the opening on the high breakdown voltage transistor side, This is achieved by a method for manufacturing a semiconductor device, characterized in that the distance between the gate electrode on the transistor side and the opening is larger than the width of the sidewall.

  According to the method for manufacturing a semiconductor device of the present invention, a sidewall made of an oxide film is formed only on a normal transistor by RIE. In addition, when the sidewall is formed in a normal transistor, the high breakdown voltage transistor is covered with the photoresist, and the oxide film is formed so as to cover not only the side of the gate electrode on the high breakdown voltage transistor side but also the whole. Can remain, and plasma damage due to RIE can be prevented. In this way, it is possible to prevent the hot carrier resistance of the manufactured semiconductor device from deteriorating.

  Another object of the present invention is a method of manufacturing a semiconductor device in which a normal transistor driven at a low voltage and a high breakdown voltage transistor are formed on the same semiconductor substrate, the field oxide film on the semiconductor substrate, Forming a gate oxide film and a gate electrode; forming a first diffusion layer in the element region of the normal transistor and the element region of the high breakdown voltage transistor; and oxidizing the surface of the semiconductor substrate. A step of covering a film; a step of covering the high-breakdown-voltage transistor with a conductive material serving as a mask; and thereafter forming a sidewall on the gate electrode on the normal transistor side by performing RIE on the oxide film; Removing the conductive material and forming an opening in the oxide film covering the high breakdown voltage transistor; and implanting ions into the semiconductor substrate. A step of forming a second diffusion layer in an element region of a normal transistor, and forming a second diffusion layer by ion implantation from the opening on the high breakdown voltage transistor side. This is achieved by a method for manufacturing a semiconductor device.

  According to the method for manufacturing a semiconductor device of the present invention, when a sidewall is formed on a normal transistor, the high breakdown voltage transistor is covered with the conductive material, so that plasma by RIE is generated by the conductive material. It is possible to more reliably prevent the plasma from being damaged by being damaged by the plasma. In this way, it is possible to prevent the hot carrier resistance of the manufactured semiconductor device from deteriorating.

  In the method for manufacturing a semiconductor device, it is preferable that the distance between the gate electrode on the high breakdown voltage transistor side and the opening is larger than the width of the sidewall. In this way, the source / drain diffusion layer of the high breakdown voltage transistor can be formed farther from the gate electrode than the source / drain diffusion layer on the normal transistor side.

In the method for manufacturing a semiconductor device, the opening is preferably formed by removing the oxide film on the high voltage transistor side by etching with buffered hydrofluoric acid. In this way, when ions are implanted into the element region of the high breakdown voltage transistor, ions can be reliably implanted into the semiconductor substrate.
The semiconductor device manufacturing method of the present invention is suitable for a semiconductor device having an LDD structure. In this case, an LDD diffusion layer is formed as a first diffusion layer, and a source / drain diffusion layer is formed as the second diffusion layer. By forming, the plasma damage due to RIE can be prevented, and the effect of preventing deterioration of hot carrier resistance can be obtained.

  ADVANTAGE OF THE INVENTION According to this invention, the manufacturing method of the semiconductor device which can prevent deterioration of hot carrier tolerance can be provided.

A semiconductor device manufacturing method according to a first embodiment of the present invention will be described below in detail with reference to the drawings.
1, 2 and 3 are diagrams for explaining the procedure of the method of manufacturing the semiconductor device according to this embodiment.

  A semiconductor device 10 manufactured by the semiconductor device manufacturing method of the present embodiment employs an LDD structure, and a normal transistor 2 driven at a low voltage and a high breakdown voltage transistor 1 are configured on the same semiconductor substrate 11. Be done

  First, as shown in FIG. 1A, a field oxide film 12 is formed on a surface of a semiconductor substrate 11 in a predetermined region of the surface by a LOCOS method or the like. Thereafter, the well layer of the high breakdown voltage transistor 1 and the well layer of the normal transistor 2 are formed by ion implantation using a patterned photoresist (not shown) as a mask, and then diffusion by heat treatment.

  A channel stopper (not shown) is formed by ion implantation of p-type impurities (or n-type impurities) under the field oxide film 12 around the high breakdown voltage transistor 1.

  Next, in the region surrounded by the field oxide film 12, a gate oxide film having a different thickness is formed in an element region where the high breakdown voltage transistor 1 is formed and an element region where the normal breakdown voltage transistor 2 is formed. 13a and 13b are formed. In this embodiment, the gate oxide film 13b on the normal transistor 2 side is formed thinner than the gate oxide film 13a on the high breakdown voltage transistor 1 side, so that impurities are introduced during ion implantation. The semiconductor substrate 11 is sufficiently driven into the interior. The gate oxide film 13a on the high breakdown voltage transistor 1 side may have a thickness of about 30 nm, and the gate oxide film 13b on the normal transistor 2 side may have a thickness of about 9 nm.

  Gate electrodes 14a and 14b made of doped polysilicon films are formed on the element region on the high breakdown voltage transistor 1 side and on the element region on the normal transistor 2 side, respectively.

  Next, as shown in FIG. 1B, a photoresist R1 patterned so as to cover the element region of the normal transistor 2 is formed, and the photoresist R1, the field oxide film 12, and the gate electrode 14a are masked. As described above, ion implantation (in the present embodiment, n-type impurities are implanted) is performed in the element region of the high breakdown voltage transistor 1 to form the LDD diffusion layer n.

  Further, as shown in FIG. 1C, a photoresist R2 patterned so as to cover the element region of the high breakdown voltage transistor 1 is formed, and the photoresist R2, the field oxide film 12, and the gate electrode 14b are masked. As described above, ion implantation (in this embodiment, n-type impurities are implanted) is performed on the element region of the normal transistor 2 to form an LDD diffusion layer n as a first diffusion layer. The normal LDD diffusion layer n on the transistor 2 side may be formed before the LDD diffusion layer n on the high breakdown voltage transistor 1 side.

Next, as shown in FIG. 2A, an oxide film 16 made of SiO ₂ is formed by HTO (High Temperature Oxide) or the like so as to cover the surface of the semiconductor substrate 11 on which the LDD diffusion layer n is formed.

  Thereafter, as shown in FIG. 2B, a photoresist R3 patterned so as to cover the region on the oxide film 16 on the high breakdown voltage transistor 1 side is formed. Then, the oxide film 16 is etched by RIE in a region not covered with the photoresist R3 on the normal transistor 2 side. Thus, as shown in FIG. 2C, sidewalls 16s made of the remaining oxide film 16 are formed on both side surfaces (side surfaces on the left and right ends in the drawing) of the gate electrode 14b on the normal transistor 2 side. At this time, the gate oxide film 13b of the normal transistor 2 is removed except under the gate electrode 14b and the sidewall 16s. The operation and effect of this embodiment will be described later.

The procedure for forming the source layer and the drain diffusion layer will be described below.
As shown in FIG. 3A, the source diffusion layer and the drain layer (of the high breakdown voltage transistor 1 functioning as the second diffusion layer) are added to the high breakdown voltage transistor 1 and the normal transistor 2 covered with the oxide film 16. Hereinafter, the photoresist R4 patterned so as to open a portion where the source / drain layer is to be formed is formed as a mask.

As shown in FIG. 3B, the oxide film 16 exposed from the opening R4a of the photoresist R4 is removed by etching with buffered HF (buffered hydrofluoric acid). Thus, an opening 16a is formed in the oxide film 16 on the high breakdown voltage transistor 1 side. After removing the photoresist R4, a region surrounded by the surface of the semiconductor substrate 11 exposed from the oxide film 16 in the high breakdown voltage transistor 1 and the gate electrode 14b and the field oxide film 12 in the normal transistor 2 N ⁺ impurity (p ⁺ impurity may be used) is ion-implanted to form a source / drain layer n ⁺ . This makes it possible to reliably implant impurity ions into the semiconductor substrate 11 when ion implantation is performed in the element region of the high breakdown voltage transistor 1.

  In this way, the normal transistor 2 driven at a low voltage and the high breakdown voltage transistor 1 are formed on the same semiconductor substrate 11, and the semiconductor device 10 adopting the LDD structure can be obtained.

In the method for manufacturing a semiconductor device according to the present embodiment, the distance between the gate electrode 14a on the high breakdown voltage transistor 1 side and the opening 16a of the oxide film 16 is preferably larger than the width of the sidewall. This arrangement can be formed at a position a source drain diffusion layer n ⁺ of the transistor 1 of the high voltage, which releases the normal transistor 2 side of the source-drain diffusion layer n ⁺ gate electrode 14a than.

  According to the method for manufacturing a semiconductor device of this embodiment, as shown in FIG. 2C, the sidewall 16s made of the oxide film 16 is formed only on the normal transistor 2 by RIE. Further, when the sidewall 16s is formed on the gate electrode 14b on the normal transistor 2 side, the high breakdown voltage transistor 1 is covered with the photoresist R3, and covers not only the both side surfaces of the gate electrode 14a but also the whole. Thus, the state in which the oxide film 16 remains is maintained, and plasma damage due to RIE can be prevented. In this way, it is possible to prevent the hot carrier resistance of the manufactured semiconductor device 10 from deteriorating.

  Next, a second embodiment of a semiconductor device manufacturing method according to the present invention will be described in detail with reference to the drawings. FIG. 4 is a diagram for explaining the procedure of the method for manufacturing the semiconductor device of this embodiment. In the embodiments described below, members having the same configuration / action as those already described are denoted by the same or corresponding reference numerals in the drawings, and description thereof is simplified or omitted.

  In the present embodiment, the semiconductor device 10 has a configuration in which the normal transistor 2 and the high breakdown voltage transistor 1 are provided on the same semiconductor substrate 11, and the field oxide film 12, gate electrodes 14 a and 14 b, LDD are formed on the semiconductor substrate 11. Since the method and procedure for forming the diffusion layer n are the same as those in the above embodiment, a description thereof will be omitted.

As shown in FIG. 4A, an oxide film 16 made of SiO ₂ is formed on the surface of the semiconductor substrate 11 on which the LDD diffusion layer n is formed, using HTO (High Temperature Oxide) or the like. Then, the element region of the high breakdown voltage transistor 1 is covered with a conductive material 21 such as polysilicon through an oxide film 16. Thereafter, using the conductive material 21 as a mask, the oxide film 16 formed on the element region of the normal transistor 2 that is not covered with the conductive material 21 is etched and removed by RIE.

Thus, as shown in FIG. 4B, a part of the oxide film 16 is left on both side surfaces of the gate electrode 14b, thereby forming a sidewall 16s made of the oxide film 16. After forming the sidewall 16s, the conductive material 21 is removed. Then, similarly to the procedure shown in FIG. 3 of the above embodiment, the opening 16a is formed in the oxide film 16 on the high breakdown voltage transistor 1 side, and the source / drain diffusion layer n ⁺ is formed at a predetermined position. The device 10 can be manufactured.

  According to the semiconductor device manufacturing method, when the sidewall 16s is formed in the normal transistor 2, the high breakdown voltage transistor 1 is covered with the conductive material 21, so that the plasma by RIE is conductive. It is possible to more reliably prevent the plasma material from being shielded by the conductive material 21. In this way, it is possible to prevent the hot carrier resistance of the manufactured semiconductor device 10 from being deteriorated.

It is a figure explaining the procedure which forms a field oxide film, a gate oxide film, a gate electrode, and a LDD diffused film in a semiconductor substrate. It is a figure explaining the procedure which forms a side wall in the gate electrode by the side of a normal transistor. It is a figure explaining the procedure which forms a source-drain diffused layer in a high voltage | pressure-resistant transistor and a normal transistor. It is a figure explaining the procedure of other embodiment of the manufacturing method of the semiconductor device which concerns on this invention. It is a figure explaining the procedure of the manufacturing method of the conventional semiconductor device. It is a figure explaining the procedure of the manufacturing method of the conventional semiconductor device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 High breakdown voltage transistor 2 Normal transistor 10 Semiconductor device 11 Semiconductor substrate 12 Field oxide film 13a, 13b Gate oxide film 14a, 14b Gate electrode 16 Oxide film 21 Conductive material R1-R4 Photoresist n LDD diffusion layer (first Diffusion layer)
n ⁺ source / drain diffusion layer (second diffusion layer)

Claims (5)

A method of manufacturing a semiconductor device in which a normal transistor driven at a low voltage and a high breakdown voltage transistor are formed on the same semiconductor substrate,
Forming a field oxide film, a gate oxide film, and a gate electrode on the semiconductor substrate;
Forming a first diffusion layer in the element region of the normal transistor and the element region of the high breakdown voltage transistor;
Coating the surface of the semiconductor substrate with an oxide film;
Forming a sidewall on the gate electrode on the normal transistor side by covering the high breakdown voltage transistor with a photoresist serving as a mask and then performing RIE on the oxide film;
Forming an opening in the photoresist and the oxide film on the high breakdown voltage transistor side;
Performing ion implantation on the semiconductor substrate to form a second diffusion layer in an element region of a normal transistor, and forming a second diffusion layer by ion implantation from the opening on the high breakdown voltage transistor side; And a method of manufacturing a semiconductor device. A method of manufacturing a semiconductor device in which a normal transistor driven at a low voltage and a high breakdown voltage transistor are formed on the same semiconductor substrate,
Forming a field oxide film, a gate oxide film, and a gate electrode on the semiconductor substrate;
Forming a first diffusion layer in the element region of the normal transistor and the element region of the high breakdown voltage transistor;
Coating the surface of the semiconductor substrate with an oxide film;
Covering the high-breakdown-voltage transistor with a conductive material serving as a mask, and then performing RIE on the oxide film to form a sidewall on the gate electrode on the normal transistor side;
Removing the conductive material and forming an opening in the oxide film covering the high breakdown voltage transistor;
Performing ion implantation on the semiconductor substrate to form a second diffusion layer in an element region of a normal transistor, and forming a second diffusion layer by ion implantation from the opening on the high breakdown voltage transistor side; And a method of manufacturing a semiconductor device.   3. The method of manufacturing a semiconductor device according to claim 1, wherein a distance between the gate electrode on the high breakdown voltage transistor side and the opening is larger than a width of the sidewall.   The said opening part is formed by removing the said oxide film in the said high voltage | pressure-resistant transistor side by etching with buffered hydrofluoric acid, The any one of Claim 1 to 3 characterized by the above-mentioned. Semiconductor device manufacturing method.   5. An LDD structure is employed, an LDD diffusion layer is formed as the first diffusion layer, and a source / drain diffusion layer is formed as the second diffusion layer. Semiconductor device manufacturing method.

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