JP2006332628A - Semiconductor device and method of manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a technique by which a higher-performance and more highly reliable memory device and a semiconductor device provided with the memory device are manufactured at a low cost with high yield. <P>SOLUTION: The semiconductor device has an organic compound layer including an insulator on a first conductive layer and a second conductive layer on the organic compound layer including an insulator. The semiconductor device is manufactured by forming a first conductive layer, discharging a composition of an insulator and an organic compound on the first conductive layer to form an organic compound layer including an insulator, and by forming a second conductive layer on the organic compound layer including an insulator. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device.

  2. Description of the Related Art In recent years, attention has been focused on an individual recognition technique in which an ID (individual identification number) is given to an individual object to clarify information such as a history of the object and to be useful for production and management. Among them, development of semiconductor devices capable of transmitting and receiving data without contact is underway. As such a semiconductor device, RFID (Radio Frequency Identification) (ID tag, IC tag, IC chip, RF tag (Radio Frequency), wireless tag, electronic tag, wireless chip), etc. are especially used in the company, market, etc. Has begun to be introduced.

Many of these semiconductor devices have a circuit using a semiconductor substrate such as silicon (Si) (hereinafter also referred to as an IC (Integrated Circuit) chip) and an antenna, and the IC chip is a memory circuit (hereinafter also referred to as a memory). And a control circuit. In addition, organic thin film transistors (hereinafter also referred to as TFTs) using organic compounds for control circuits, memory circuits, and the like, organic memories, and the like have been actively developed (see, for example, Patent Document 1).
Japanese Unexamined Patent Publication No. 7-22669

However, in a memory circuit using an organic compound in which a memory element is formed by providing an organic compound between a pair of electrodes, depending on the size of the memory circuit, the write voltage increases when the organic compound layer is thick. On the other hand, when the element size is small and the organic compound layer is thin, it is easily affected by dust and irregularities on the surface of the electrode layer, resulting in variations in memory characteristics (such as write voltage). There is a problem that normal writing is not possible.

Therefore, an object of the present invention is to provide a technology capable of manufacturing a memory device with higher performance and higher reliability and a semiconductor device including the memory device at low cost with high yield.

    In the present invention, an organic compound layer provided between a pair of conductive layers constituting a memory element included in a semiconductor device is formed to include a plurality of insulators. The insulator in the organic compound layer exists inside the organic compound layer and at the interface with the conductive layer. The organic compound layer containing an insulator can control the concentration of the insulator in the layer depending on the material and the formation method. Therefore, the insulator may be uniformly distributed in the organic compound layer, or may be unevenly distributed so that the concentration is different in the organic compound layer. The insulator at the interface between the conductive layer and the organic compound layer enables tunnel injection and a tunnel current flows. Therefore, when a voltage is applied between the first conductive layer and the second conductive layer, a current flows through the organic compound layer and heat is generated. And when the temperature of an organic compound layer rises to a glass transition temperature, the material which forms an organic compound layer turns into a composition which has fluidity | liquidity. A composition having fluidity flows without maintaining a solid state shape. Therefore, the film thickness of the organic compound layer becomes non-uniform due to the influence of Joule heat or a high electric field, the organic compound layer is deformed, a part of the first conductive layer and the second conductive layer are in contact with each other, and the memory element is short-circuited. To do. Therefore, the conductivity of the memory element before and after voltage application changes.

    In addition, since the insulator does not transport carriers, the carrier transportability of the entire organic compound layer is lowered due to the inhibition of the insulator. Therefore, even in an organic compound material having a high carrier transport property, the current value required for short-circuiting (writing to the element) is lowered, and there are advantages such as low power consumption and expansion of material selection. Furthermore, the mixed layer mixed with an insulator is less likely to cause defects due to crystallization of the organic compound and the form (morphology) of the organic compound layer is more stable than the organic compound single layer. It is possible to prevent the production of a defective element that is short-circuited between layers, and the yield is improved.

  Note that in this specification, a semiconductor device refers to a device that can function by utilizing semiconductor characteristics. By using the present invention, an integrated circuit having a multilayer wiring layer and a semiconductor device such as a processor chip can be manufactured.

    One embodiment of the semiconductor device of the present invention includes a memory element including an organic compound layer including an insulator over a first conductive layer and a second conductive layer over the organic compound layer including an insulator.

    An insulator in an organic compound layer that includes a memory element including an organic compound layer including an insulator on the first conductive layer, and a second conductive layer on the organic compound layer including the insulator. Has a concentration gradient.

    The concentration gradient of the insulator in the organic compound layer can be controlled as follows depending on the material and the manufacturing method. Therefore, the concentration of the insulator in the organic compound layer is such that the interface between the organic compound layer containing the insulator and the first conductive layer is more than the interface between the organic compound layer containing the insulator and the second conductive layer. The concentration of the insulator in the organic compound layer including the semiconductor device and the insulator is higher in the interface between the organic compound layer including the insulator and the second conductive layer than the organic compound layer including the insulator and the first conductive layer. Semiconductor device higher than interface with conductive layer, concentration of insulator in organic compound layer including insulator is interface between organic compound layer including insulator and first conductive layer, and organic compound layer including insulator A semiconductor device or the like in which the interface between the first conductive layer and the second conductive layer is the highest among the organic compound layers including an insulator can be manufactured.

In this specification, a high concentration means that the existence probability of the insulator is high and the distribution is large. These concentrations can be represented by volume ratio, weight ratio, composition ratio, etc. depending on the physical properties of the substance.

    In one embodiment of the method for manufacturing a semiconductor device of the present invention, a first conductive layer is formed, an organic compound layer including an insulator is formed over the first conductive layer, and a second conductive compound is formed over the organic compound layer including the insulator. A conductive layer is formed to form a memory element.

    In one embodiment of the method for manufacturing a semiconductor device of the present invention, a first conductive layer is formed, a composition containing an insulator and an organic compound is discharged over the first conductive layer, and the organic compound containing an insulator is solidified. A layer is formed, a second conductive layer is formed over the organic compound layer including an insulator, and a memory element is formed.

    In one embodiment of the method for manufacturing a semiconductor device of the present invention, a first conductive layer is formed, an organic compound layer is formed over the first conductive layer, an insulator is added to the organic compound layer, and an organic material including the insulator is formed. A compound layer is formed, a second conductive layer is formed over the organic compound layer including an insulator, and a memory element is formed.

According to the present invention, a memory device and a semiconductor device with higher performance and higher reliability can be manufactured at low cost with high yield.

  Embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it is easily understood by those skilled in the art that modes and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments below. Note that in structures of the present invention described below, the same portions or portions having similar functions are denoted by the same reference numerals in different drawings, and description thereof is not repeated.

(Embodiment 1)
In this embodiment, an example of a structure of a memory element included in the memory device of the present invention will be described with reference to drawings.

    The memory element and its operation mechanism of the present invention will be described with reference to FIG. In this embodiment mode, an organic compound provided between a pair of conductive layers included in a memory element included in a memory device is formed so as to include a plurality of insulators, and the organic compound layer includes a plurality of insulators. And By using an organic compound layer including an insulator, the characteristics of the memory element are stabilized without variation and normal writing can be performed.

    The distribution of the insulator in the organic compound layer may be uniform or non-uniform so as to have a concentration gradient. The mixed state of the insulator in the organic compound layer varies depending on the material and the formation method, and the concentration can be controlled.

    The memory element illustrated in FIG. 1 is an example of the memory element of the present invention. An organic compound layer 52 including an insulator 51a and an insulator 51b is formed over the first conductive layer 50, and the organic compound layer 52 is formed over the organic compound layer 52. Two conductive layers 53 are formed.

    As a material for the first conductive layer 50 and the second conductive layer 53, an element or a compound having high conductivity is used. In the present embodiment, the material of the organic compound layer 52 is a substance whose crystal state, conductivity, and shape change due to electric action. Since the conductivity of the memory element having the above configuration changes before and after voltage application, two values corresponding to “initial state” and “after conductivity change” can be stored. A change in conductivity of the memory element before and after voltage application will be described.

    In this embodiment mode, the organic compound layer 52 included in the memory element included in the memory device is formed over the first conductive layer 50 including the insulator 51a and the insulator 51b. When a voltage is applied between the first conductive layer 50 and the second conductive layer 53, a current flows through the organic compound layer 52 to generate heat. And if the temperature of an organic compound layer rises to a glass transition temperature, the material which forms the organic compound layer 52 will become a composition which has fluidity | liquidity. A composition having fluidity flows without maintaining a solid state shape. Therefore, the film thickness of the organic compound layer becomes non-uniform due to the influence of Joule heat or a high electric field, the organic compound layer is deformed, and the first conductive layer 50 and the second conductive layer 53 are in contact with each other. The conductive layer 50 and the second conductive layer 53 are short-circuited. Therefore, the conductivity of the memory element before and after voltage application changes.

    The insulator 51a present at the interface between the organic compound layer 52 and the first conductive layer 50 enables tunnel injection of carriers from the first conductive layer 50 to the organic compound layer 52. Therefore, characteristics such as a writing voltage of the memory element are stabilized without variation, and normal writing can be performed in each element. Further, since a plurality of insulators are mixed in the organic compound layer, the morphology of the organic compound layer is stabilized, and further, the carrier injection property is improved by tunnel injection, so that the organic compound layer can be made thick. Therefore, it is possible to prevent a defect that the memory element is short-circuited (short-circuited) in an initial state before energization.

    In addition, since the insulator 51b present in the organic compound layer 52 does not perform carrier transport, the carrier transport property of the entire organic compound layer 52 is lowered by the inhibition of the insulator 51b. Therefore, even in an organic compound material having a high carrier transport property, the current value required for short-circuiting (writing to the element) is lowered, and there are advantages such as low power consumption and widening the range of material selection.

FIG. 1 shows an example in which the organic compound layer 52 includes an insulator 51b and an insulator 51a present at the interface with the first conductive layer 50. In the present invention, the insulator is included in the organic compound. It only has to be. Therefore, both the insulator 51a and the insulator 51b are not necessarily present, and either one may be used.

    Note that the voltage applied to the memory element of the present invention may be higher than the second conductive layer in the first conductive layer, or higher in the second conductive layer than in the first conductive layer. May be. Even when the memory element has a rectifying property, a potential difference may be provided between the first conductive layer and the second conductive layer so that the voltage is applied in the forward bias direction, or the voltage is applied in the reverse bias direction. A potential difference may be provided between the first conductive layer and the second conductive layer so that is applied.

    In the present invention, an organic compound layer including a plurality of insulators in which a plurality of insulators are mixed in an organic compound layer provided between a pair of conductive layers is used. The mixed state of a plurality of insulators in the organic compound layer varies depending on the material used, the formation method, and the like. The organic compound layer including the insulator shown in FIG. 1 is an example in which the insulator is dispersed almost uniformly in the organic compound layer, and the concentration thereof is uniform. As shown in FIG. 1, the insulators in the organic compound layer may be mixed uniformly or may be mixed non-uniformly so as to have a concentration gradient. An example of the mixed state of the insulator in the organic compound layer will be described with reference to FIG.

    The memory element illustrated in FIG. 16A is an example of the memory element of the present invention. An organic compound layer 62 including an insulator-containing region 61 is formed over the first conductive layer 60, and the organic compound layer 62 is formed over the organic compound layer 62. A second conductive layer 63 is formed. The insulator mixed in the organic compound layer 62 has a concentration gradient, and the insulator exists nonuniformly in the organic compound layer 62. The insulating material mixed region 61 is provided near the interface between the organic compound layer 62 and the first conductive layer 60. Therefore, the concentration of the insulator in the organic compound layer 62 is highest in the organic compound layer 62 at the interface between the organic compound layer 62 and the first conductive layer 60. The insulating mixed region does not have a clear interface with the non-insulating mixed region, and the organic compound layer can have a structure in which the concentration gradually changes as it approaches the second conductive layer 63 in the film thickness direction. .

    The memory element illustrated in FIG. 16B is an example of the memory element of the present invention. An organic compound layer 72 including an insulator-containing region 71 is formed over the first conductive layer 70, and the organic compound layer 72 is formed. A second conductive layer 73 is formed. The insulator mixed in the organic compound layer 72 has a concentration gradient, and the insulator exists nonuniformly in the organic compound layer 72. The insulating material mixed region 71 is provided near the interface between the organic compound layer 72 and the second conductive layer 73. Therefore, the concentration of the insulator in the organic compound layer 72 is highest in the organic compound layer 72 at the interface between the organic compound layer 72 and the second conductive layer 73. The insulating mixed region does not have a clear interface with the non-insulating mixed region, and can have a structure in which the concentration gradually changes as it approaches the second conductive layer 73 in the film thickness direction in the organic compound layer. .

    The memory element illustrated in FIG. 16C is an example of the memory element of the present invention, and the organic compound layer 82 including the insulator-containing region 81a and the insulator-containing region 81b is formed over the first conductive layer 80, A second conductive layer 83 is formed on the organic compound layer 82. The insulator mixed in the organic compound layer 82 has a concentration gradient, and the insulator exists in the organic compound layer 82 nonuniformly. In the organic compound layer 82, an insulator mixed region 81 a is provided near the interface with the first conductive layer 80, and an insulator mixed region 81 b is provided near the interface with the second conductive layer 83. Therefore, the concentration of the insulator in the organic compound layer 82 is such that the interface between the organic compound layer 82 and the first conductive layer 80 and the interface between the organic compound layer 82 and the second conductive layer 83 are in the organic compound layer 82. Is the highest. The insulating mixed region does not have a clear interface with the non-insulating mixed region, and the concentration gradually changes, and the first conductive layer 80 and the second conductive layer in the film thickness direction in the organic compound layer. As the temperature approaches 83, the concentration of the insulator increases, and the central portion of the organic compound layer 82 can have a structure in which the insulator is contained at a low concentration.

    An organic compound layer including a plurality of insulators may be formed by mixing a plurality of insulators and an organic compound to form an organic compound layer including a plurality of insulators in one step. However, the other one may be introduced (added) in a separate step. When formed in one step, it may be formed by a dry process such as a co-evaporation method or a sputtering method, or it is formed into a film by using a mixed material of a plurality of insulators and organic compounds by a wet method such as a coating method. You may do it. The distribution of the insulator in the organic compound layer can be controlled to a desired concentration using the above formation method.

    In the case of a wet process, the insulator and the organic compound may be dissolved in the solvent, or may be dispersed and mixed even if they are insoluble. Therefore, a colloidal solution in which a plurality of insulators are in the form of fine particles (also referred to as colloidal particles) of about 0.1 to 0.001 μm and dispersed in the liquid can be used. The shape of the insulator may be any shape such as granular, columnar, needle-like, or plate-like, and a plurality of insulators may be aggregated to form an aggregate as a single body. A layer having a concentration gradient can be obtained from the difference in specific gravity and solubility between the insulator and the organic compound. For example, the insulator concentration at which the tunnel injection can occur near the interface between the organic compound layer and the conductive layer, and the insulator concentration inside the organic compound layer at an insulator concentration sufficient to ensure the carrier transportability required for the memory element, respectively. Concentration can be controlled. Thus, when the organic compound layer containing an insulator is formed in one step, the number of steps can be simplified.

    The organic compound layer containing an insulator is formed by using an electron beam evaporation method, a vapor deposition method such as co-evaporation, a sputtering method, a CVD method, a coating method such as a spin coating method using a mixed solution, or a sol-gel method. Can do. An organic compound layer containing an insulator can be formed by depositing each material at the same time, by co-evaporation by resistance heating deposition, co-evaporation by electron beam deposition, resistance heating deposition and electron beam deposition It can be formed by combining the same type and different types of methods such as co-evaporation, film formation by resistance heating evaporation and sputtering, and film formation by electron beam evaporation and sputtering. In addition, a droplet discharge (ejection) method (an ink jet method depending on the method) that can selectively eject (eject) droplets of a composition prepared for a specific purpose to form a predetermined pattern. Also called dispenser method, a method that allows an object to be transferred or drawn into a desired pattern, such as various printing methods (screen (stencil) printing, offset (lithographic printing), relief printing or gravure printing (intaglio printing), etc. And the like) can also be used. In addition, instead of forming simultaneously, after forming an organic compound layer, an insulating material may be introduced by an ion implantation method, a doping method, or the like to form a mixed layer of the insulating material and the organic compound.

In the present invention, the insulator mixed in the organic compound layer is an inorganic insulator or organic compound that is thermally and chemically stable and does not inject carriers. Preferably, an insulator mixed in the organic compound layer can have an electric conductivity of 10 ⁻¹⁰ s / m or less, more preferably 10 ^{−10 to} 10 ⁻¹⁴ s / m. Specific examples of inorganic insulators and organic compounds that can be used for insulators are described below.

In the present invention, as an inorganic insulator that can be used for an insulator mixed in the organic compound layer, lithium oxide (Li ₂ O), sodium oxide (Na ₂ O), potassium oxide (K ₂ O), rubidium oxide (Rb) ₂ O), beryllium oxide (BeO), magnesium oxide (MgO), calcium oxide (CaO), strontium oxide (SrO), barium oxide (BaO), scandium oxide (Sc ₂ O ₃ ), zirconium oxide (ZrO ₂ ), Hafnium oxide (HfO ₂ ), Rutherfordium oxide (RfO ₂ ), tantalum oxide (TaO), technetium oxide (TcO), iron oxide (Fe ₂ O ₃ ), cobalt oxide (CoO), palladium oxide (PdO), silver oxide ( Ag ₂ O), aluminum oxide _{(Al 2 O} 3), gallium oxide _(Ga 2 _{O 3} It can be used an oxide such as bismuth oxide _(Bi 2 _{O 3).}

In the present invention, other inorganic insulators that can be used for the insulator mixed in the organic compound layer include lithium fluoride (LiF), sodium fluoride (NaF), potassium fluoride (KF), and rubidium fluoride (RbF). ), Beryllium fluoride (BeF ₂ ), magnesium fluoride (MgF ₂ ), calcium fluoride (CaF ₂ ), strontium fluoride (SrF ₂ ), barium fluoride (BaF ₂ ), aluminum fluoride (AlF ₃ ), Fluorides such as nitrogen trifluoride (NF ₃ ), sulfur hexafluoride (SF ₆ ), silver fluoride (AgF), and manganese fluoride (MnF ₃ ) can be used.

In the present invention, as other inorganic insulators that can be used for the insulator mixed in the organic compound layer, lithium chloride (LiCl), sodium chloride (NaCl), potassium chloride (KCl), beryllium chloride (BeCl ₂ ), chloride Calcium (CaCl ₂ ), Barium chloride (BaCl ₂ ), Aluminum chloride (AlCl ₃ ), Silicon chloride (SiCl ₄ ), Germanium chloride (GeCl ₄ ), Tin chloride (SnCl ₄ ), Silver chloride (AgCl), Zinc chloride ( ZnCl), titanium tetrachloride (TiCl ₄ ), titanium trichloride (TiCl ₃ ), zirconium chloride (ZrCl ₄ ), iron chloride (FeCl ₃ ), palladium chloride (PdCl ₂ ), antimony trichloride (SbCl ₃ ), dichloride antimony (SbCl _2), strontium chloride (SrCl _2), salts Thallium (TlCl), copper chloride (CuCl), manganese chloride (MnCl _2), can be used chlorides such as ruthenium chloride (RuCl _2).

In the present invention, other inorganic insulators that can be used for the insulator mixed in the organic compound layer include potassium bromide (KBr), cesium bromide (CsBr), silver bromide (AgBr), and barium bromide (BaBr). ₂ ), bromides such as silicon bromide (SiBr ₄ ) and lithium bromide (LiBr) can be used.

In the present invention, as other inorganic insulators that can be used for the insulator mixed in the organic compound layer, sodium iodide (NaI), potassium iodide (KI), barium iodide (BaI ₂ ), thallium iodide ( TlI), silver iodide (AgI), titanium iodide _(TiI 4), calcium iodide _(CaI 2), iodide silicon _(SiI 4), can be used an iodide such as cesium iodide (CsI).

In the present invention, as other inorganic insulators that can be used for the insulator mixed in the organic compound layer, lithium carbonate (Li ₂ CO ₃ ), potassium carbonate (K ₂ CO ₃ ), sodium carbonate (Na ₂ CO ₃ ) , Magnesium carbonate (MgCO ₃ ), calcium carbonate (CaCO ₃ ), strontium carbonate (SrCO ₃ ), barium carbonate (BaCO ₃ ), manganese carbonate (MnCO ₃ ), iron carbonate (FeCO ₃ ), cobalt carbonate (CoCO ₃ ), Carbonates such as nickel carbonate (NiCO ₃ ), copper carbonate (CuCO ₃ ), silver carbonate (Ag ₂ CO ₃ ), and zinc carbonate (ZnCO ₃ ) can be used.

In the present invention, as other inorganic insulators that can be used for the insulator mixed in the organic compound layer, lithium sulfate (Li ₂ SO ₄ ), potassium sulfate (K ₂ SO ₄ ), sodium sulfate (Na ₂ SO ₄ ) , Magnesium sulfate (MgSO ₄ ), calcium sulfate (CaSO ₄ ), strontium sulfate (SrSO ₄ ), barium sulfate (BaSO ₄ ), titanium sulfate (Ti ₂ (SO ₄ ) ₃ ), zirconium sulfate (Zr (SO ₄ ) ₂ ), Manganese sulfate (MnSO ₄ ), iron sulfate (FeSO ₄ ), diiron trisulfate (Fe ₂ (SO ₄ ) ₃ ), cobalt sulfate (CoSO ₄ ), cobalt sulfate (Co ₂ (SO ₄ ) ₃ ), sulfuric acid Nickel (NiSO ₄ ), copper sulfate (CuSO ₄ ), silver sulfate (Ag ₂ SO ₄ ), zinc sulfate (ZnSO ₄ ), aluminum sulfate Ni (Al ₂ (SO ₄ ) ₃ ), indium sulfate (In ₂ (SO ₄ ) ₃ ), tin sulfate (SnSO ₄ ), tin sulfate (Sn (SO ₄ ) ₂ ), antimony sulfate (Sb ₂ (SO ₄ )) ₃ ) and sulfates such as bismuth sulfate (Bi ₂ (SO ₄ ) ₃ ) can be used.

In the present invention, as other inorganic insulators that can be used for the insulator mixed in the organic compound layer, lithium nitrate (LiNO ₃ ), potassium nitrate (KNO ₃ ), sodium nitrate (NaNO ₃ ), magnesium nitrate (Mg (NO ₃ ) ₂ ), calcium nitrate (Ca (NO ₃ ) ₂ ), strontium nitrate (Sr (NO ₃ ) ₂ ), barium nitrate (Ba (NO ₃ ) ₂ ), titanium nitrate (Ti (NO ₃ ) ₄ ), nitric acid Strontium Sr (NO ₃ ) ₂ ), barium nitrate (Ba (NO ₃ ) ₂ ), zirconium nitrate (Zr (NO ₃ ) ₄ ), manganese nitrate (Mn (NO ₃ ) ₂ ), iron nitrate (Fe (NO ₃ )) ₂ ), iron nitrate (Fe (NO ₃ ) ₃ ), cobalt nitrate (Co (NO ₃ ) ₂ ), nickel nitrate (Ni (NO ₃ ) ₂ ), copper nitrate (C u (NO ₃ ) ₂ ), silver nitrate (AgNO ₃ ), zinc nitrate (Zn (NO ₃ ) ₂ ), aluminum nitrate (Al (NO ₃ ) ₃ ), indium nitrate (In (NO ₃ ) ₃ ), tin nitrate ( A nitrate such as Sn (NO ₃ ) ₂ ) or bismuth nitrate (Bi (NO ₃ ) ₃ ) can be used.

In the present invention, other inorganic insulators that can be used for the insulator mixed in the organic compound layer include nitrides such as aluminum nitride (AlN) and silicon nitride (SiN), lithium carboxylate (CH ₃ COOLi), acetic acid Potassium (CH ₃ COOK), sodium acetate (CH ₃ COONa), magnesium acetate (Mg (CH ₃ COO) ₂ ), calcium acetate (Ca (CH ₃ COO) ₂ ), strontium acetate (Sr (CH ₃ COO) ₂ ) , Carboxylates such as barium acetate (Ba (CH ₃ COO) ₂ ) can be used.

    In the present invention, one or more of the above inorganic insulators can be used as the inorganic insulator that can be used for the insulator mixed in the organic compound layer.

    In the present invention, as the organic compound that can be used for the insulator mixed in the organic compound layer, one in which carrier injection is difficult and a band gap of 3.5 eV or more, preferably 4 eV or more and 6 eV or less can be used. For example, polyimide, acrylic, polyamide, benzocyclobutene, polyester, novolac resin, melamine resin, phenol resin, epoxy resin, silicon resin, furan resin, diallyl phthalate resin, or siloxane resin can be used. Note that a siloxane resin corresponds to a resin including a Si—O—Si bond. Siloxane has a skeleton structure formed of a bond of silicon (Si) and oxygen (O).

    In the present invention, as the organic compound that can be used for the insulator mixed in the organic compound layer, one or more of the above organic compounds can be used.

    In the present invention, as the insulator mixed in the organic compound layer, one or more of the inorganic insulator and the organic compound can be used.

  The first conductive layer 50, the first conductive layer 60, the first conductive layer 70, the first conductive layer 80, the second conductive layer 53, the second conductive layer 63, and the second conductive layer 73. For the second conductive layer 83, a highly conductive element or compound is used. Typically, gold (Au), silver (Ag), platinum (Pt), nickel (Ni), tungsten (W), chromium (Cr), molybdenum (Mo), iron (Fe), cobalt (Co), From one element selected from copper (Cu), palladium (Pd), carbon (C), aluminum (Al), manganese (Mn), titanium (Ti), tantalum (Ta), etc. or an alloy containing a plurality of such elements A single layer or a laminated structure can be used. Examples of the alloy containing a plurality of the above elements include an alloy Al containing Al and Ti, an alloy containing Ti and C, an alloy containing Al and Ni, an alloy containing Al and C, and Al, Ni and C. An alloy containing Al or an alloy containing Al and Mo can be used.

  The first conductive layer 50, the first conductive layer 60, the first conductive layer 70, the first conductive layer 80, the second conductive layer 53, the second conductive layer 63, the second conductive layer 73, the first The second conductive layer 83 can be formed by vapor deposition, sputtering, CVD, printing, dispenser, or droplet discharge.

  The first conductive layer 50, the first conductive layer 60, the first conductive layer 70, the first conductive layer 80, the second conductive layer 53, the second conductive layer 63, and the second conductive layer 73. In addition, one or both of the second conductive layers 83 may be provided so as to have translucency. The light-transmitting conductive layer is formed using a transparent conductive material, or is formed with a thickness that allows light to pass even if it is not a transparent conductive material. Transparent conductive materials include indium tin oxide (ITO), zinc oxide (ZnO), indium zinc oxide (IZO), gallium-doped zinc oxide (GZO), indium oxide containing tungsten oxide, and tungsten oxide. Other light-transmitting oxide conductive materials such as indium zinc oxide, indium oxide containing titanium oxide, or indium tin oxide containing titanium oxide can be used. An oxide conductive material formed using a target in which indium tin oxide containing silicon oxide (hereinafter referred to as ITSO) or indium oxide containing silicon oxide is mixed with 2 to 20 wt% zinc oxide (ZnO) is used. It may be used.

    The organic compound layer 52, the organic compound layer 62, the organic compound layer 72, and the organic compound layer 82 are layers formed by mixing an organic compound, an organic compound whose conductivity is changed by an electric action, or a mixture of an organic compound and an inorganic compound. Form.

    As an inorganic insulator that can form the organic compound layer 52, the organic compound layer 62, the organic compound layer 72, and the organic compound layer 82, silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, or the like is used. it can.

    Examples of organic compounds that can constitute the organic compound layer 52, the organic compound layer 62, the organic compound layer 72, and the organic compound layer 82 include organic resins represented by polyimide, acrylic, polyamide, benzocyclobutene, epoxy, and the like. Can be used.

    Further, as an organic compound that can constitute the organic compound layer 52, the organic compound layer 62, the organic compound layer 72, and the organic compound layer 82 and whose conductivity is changed by an electric action, an organic compound having a hole transporting property is used. A compound material or an organic compound material having an electron transporting property can be used.

As an organic compound material having a hole-transport property, 4,4′-bis [N- (1-naphthyl) -N-phenyl-amino] -biphenyl (abbreviation: α-NPD), 4,4′-bis [ N- (3-methylphenyl) -N-phenyl-amino] -biphenyl (abbreviation: TPD) or 4,4 ′, 4 ″ -tris (N, N-diphenyl-amino) -triphenylamine (abbreviation: TDATA) ), 4,4 ′, 4 ″ -tris [N- (3-methylphenyl) -N-phenyl-amino] -triphenylamine (abbreviation: MTDATA) and 4,4′-bis (N- (4- (N, N-di-m-tolylamino) phenyl) -N-phenylamino) biphenyl (abbreviation: DNTPD) and other aromatic amine-based compounds (that is, having a benzene ring-nitrogen bond) and phthalocyanines (abbreviation: H ₂ Pc), copper lid Phthalocyanine compounds such as Russianine (abbreviation: CuPc) and vanadyl phthalocyanine (abbreviation: VOPc) can be used. The substances mentioned here are mainly substances having a hole mobility of 10 ⁻⁶ cm ² / Vs or higher, more preferably 10 ⁻⁶ cm ² / Vs or higher and 10 ⁻² cm ² / Vs or lower.

As an organic compound material having an electron transporting property, tris (8-quinolinolato) aluminum (abbreviation: Alq ₃ ), tris (4-methyl-8-quinolinolato) aluminum (abbreviation: Almq ₃ ), bis (10-hydroxybenzo [ h] -quinolinato) beryllium (abbreviation: BeBq ₂ ), bis (2-methyl-8-quinolinolato) -4-phenylphenolato-aluminum (abbreviation: BAlq), etc., and a metal complex having a quinoline skeleton or a benzoquinoline skeleton Materials can be used. In addition, bis [2- (2-hydroxyphenyl) benzoxazolate] zinc (abbreviation: Zn (BOX) ₂ ), bis [2- (2-hydroxyphenyl) benzothiazolate] zinc (abbreviation: Zn (BTZ) A material such as a metal complex having an oxazole-based or thiazole-based ligand such as ₂ ) can also be used. In addition to metal complexes, 2- (4-biphenylyl) -5- (4-tert-butylphenyl) -1,3,4-oxadiazole (abbreviation: PBD), 1,3-bis [5- (P-tert-butylphenyl) -1,3,4-oxadiazol-2-yl] benzene (abbreviation: OXD-7), 3- (4-tert-butylphenyl) -4-phenyl-5- ( 4-biphenylyl) -1,2,4-triazole (abbreviation: TAZ), 3- (4-tert-butylphenyl) -4- (4-ethylphenyl) -5- (4-biphenylyl) -1,2, 4-triazole (abbreviation: p-EtTAZ), bathophenanthroline (abbreviation: BPhen), bathocuproin (abbreviation: BCP), and the like can be used. The substances mentioned here are mainly substances having an electron mobility of 10 ⁻⁶ cm ² / Vs or higher, more preferably 10 ⁻⁶ cm ² / Vs or higher and 10 ⁻² cm ² / Vs or lower.

In the present invention, as the organic compound material that can be used for the organic compound layer, one or more of the above organic compound materials can be used.

  Note that the organic compound layer 52, the organic compound layer 62, the organic compound layer 72, and the organic compound layer 82 are formed to have thicknesses at which the conductivity of the memory element changes due to electrical action.

  In addition, the first conductive layer 50, the first conductive layer 60, the first conductive layer 70, the first conductive layer 80 and the organic compound layer 52, the organic compound layer 62, the organic compound layer 72, and the organic compound layer 82 An element having a rectifying property may be provided between them. The element having a rectifying property is a transistor or a diode in which a gate electrode and a drain electrode are connected. For example, a PN junction diode provided by stacking an N-type semiconductor layer and a P-type semiconductor layer can be used. Thus, by providing a diode having a rectifying property, current flows only in one direction, so that an error is reduced and a read margin is improved. Note that when a diode is provided, a diode having another structure such as a diode having a PIN junction or an avalanche diode may be used instead of a diode having a PN junction. Note that the rectifying element includes the organic compound layer 52, the organic compound layer 62, the organic compound layer 72, the organic compound layer 82, the second conductive layer 53, the second conductive layer 63, and the second conductive layer 73. , And may be provided between the second conductive layer 83.

    With the memory element of the present invention, characteristics such as a write voltage of the memory element are stabilized without variation, and normal writing can be performed in each element. Moreover, since the carrier injection property is improved by the tunnel current of the insulator, the organic compound layer can be made thicker, and since it is a mixed layer of the insulator and the organic compound, defects in the layer due to crystallization and the like are generated. Since it can prevent, the form of an organic compound layer is stabilized. Therefore, it is possible to prevent the memory element from being short-circuited in the initial state before energization. As a result, a highly reliable memory device and semiconductor device can be provided with high yield.

(Embodiment 2)
In this embodiment, an example of a structure of a memory element included in the memory device of the present invention will be described with reference to drawings.

    In the memory element described in Embodiment 1, an example in which a plurality of insulators are mixed in an organic compound layer provided between a pair of conductive layers is described. In this embodiment, an example in which a plurality of insulators are mixed not only in an organic compound layer but also in at least one of a pair of conductive layers provided as electrodes is described.

    The memory element illustrated in FIG. 17A is an example of the memory element of the present invention, and the organic compound layer 57 including the first insulator 56 is formed over the first conductive layer 55 including the second insulator 59. The second conductive layer 58 is formed on the organic compound layer 57.

    The memory element illustrated in FIG. 17B is an example of the memory element of the present invention. An organic compound layer 67 including a first insulator 66 is formed over the first conductive layer 65, and the organic compound layer 67 is formed. A second conductive layer 68 including a second insulator 69 is formed.

    The memory element illustrated in FIG. 17C is an example of the memory element of the present invention, and the organic compound layer 77 including the first insulator 76 is formed over the first conductive layer 75 including the second insulator 88. A second conductive layer 78 including a third insulator 79 is formed on the organic compound layer 77.

    FIG. 17 clearly shows that a plurality of insulators are mixed in the organic compound layer and the conductive layer, and a plurality of particulate insulators are mixed in the organic compound layer and the conductive layer. It is a schematic diagram which shows an example. Therefore, the size of the insulator and the mixed state in the layer do not necessarily have to be as shown in FIG. The concentration and the like of the insulator can be appropriately controlled as shown in FIG. 16 depending on the nature and size of the material used for the insulator, the organic compound, the material used for the conductive layer, and the formation method. The same can be said for other drawings in this specification.

    The materials and methods for forming the first conductive layer 55, the first conductive layer 65, the first conductive layer 75, the second conductive layer 58, the second conductive layer 68, and the second conductive layer 78 are as described above. This can be similarly performed using any of the materials and formation methods of the first conductive layer 50 and the second conductive layer 53 described in Embodiment 1.

  The first insulator 56, the first insulator 66, the first insulator 76, the second insulator 59, the second insulator 69, the second insulator 79, the third insulator 88, The organic compound layer 57, the organic compound layer 67, and the organic compound layer 77 can be provided using a material and a formation method similar to those of the insulator and the organic compound layer described in Embodiment 1. The first insulator, the second insulator, or the third insulator included in the organic compound layer and the conductive layer may be made of the same material or different materials.

    When an insulator is present at the interface between the organic compound layer and the conductive layer, carriers can be tunneled between the organic compound layer and the conductive layer. Therefore, characteristics such as a writing voltage of the memory element are stabilized without variation, and normal writing can be performed in each element. When a plurality of insulators are mixed not only in the organic compound layer but also in the first conductive layer and the second conductive layer as in the memory element shown in FIGS. 17A, 17B, and 17C. The possibility that an insulator exists at the interface between the organic compound layer and the first conductive layer or the second conductive layer becomes higher. Therefore, the effect of tunnel injection of the insulator can be sufficiently obtained. In addition, since a plurality of insulators are mixed in the organic compound layer, generation of defects in the layer due to crystallization of the organic compound or the like can be prevented, so that the form of the organic compound layer is stabilized. Furthermore, since the carrier injection property is improved by tunnel injection, the organic compound layer can be made thicker. Therefore, it is possible to prevent a defect that the memory element is short-circuited (short-circuited) in an initial state before energization.

    In addition, the first insulator 56, the first insulator 66, and the first insulator 76 present in the organic compound layer 57, the organic compound layer 67, and the organic compound layer 77 do not perform carrier transport. The entire carrier transport property of the compound layer 57, the organic compound layer 67, and the organic compound layer 77 is lowered by the inhibition of the first insulator 56, the first insulator 66, and the first insulator 76. Therefore, even in an organic compound material having a high carrier transport property, the current value required for short-circuiting (writing to the element) is lowered, and there are advantages such as low power consumption and widening the range of material selection.

    As described above, a highly reliable memory device and semiconductor device can be provided with high yield.

(Embodiment 3)
In this embodiment, an example of a structure of a memory element included in the memory device of the present invention will be described with reference to drawings. More specifically, the case where the structure of the memory device is a passive matrix type will be described.

  FIG. 3 shows a structural example of the memory device of the present invention, which is a bit line driver circuit including a memory cell array 722 in which memory cells 721 are provided in a matrix, a column decoder 726a, a read circuit 726b, and a selector 726c. 726, a word line driver circuit 724 having a row decoder 724a and a level shifter 724b, and an interface 723 having a writing circuit and the like for exchanging with the outside. Note that the structure of the memory device 716 shown here is merely an example, and other circuits such as a sense amplifier, an output circuit, and a buffer may be included, and a write circuit may be provided in the bit line driver circuit.

  The memory cell 721 includes a first conductive layer constituting the word line Wy (1 ≦ y ≦ n), a second conductive layer constituting the bit line Bx (1 ≦ x ≦ m), and an insulating layer. . The insulating layer is provided as a single layer or a stacked layer between the first conductive layer and the second conductive layer.

  2A is a top view of the memory cell array 722, and FIGS. 2B and 2C are cross-sectional views taken along line AB in FIG. 2A. In FIG. 2A, the insulating layer 754 is omitted and not shown, but is provided as shown in FIG. 2B.

  The memory cell array 722 includes a first conductive layer 751a, a first conductive layer 751b, a first conductive layer 751c, a first conductive layer 751a, a first conductive layer 751b, and a first layer extending in the first direction. An organic compound layer 752 including a plurality of insulators 756 provided to cover the conductive layer 751c; a second conductive layer 753a extending in a second direction perpendicular to the first direction; a second conductive layer 753b; A second conductive layer 753a (see FIG. 2A). A plurality of insulators 756 are provided between the first conductive layer 751a, the first conductive layer 751b, the first conductive layer 751c, the second conductive layer 753a, the second conductive layer 753b, and the second conductive layer 753a. An organic compound layer 752 containing is provided. Further, an insulating layer 754 serving as a protective film is provided so as to cover the second conductive layer 753a, the second conductive layer 753b, and the second conductive layer 753a (see FIG. 2B). Note that when there is a concern about the influence of a horizontal electric field between adjacent memory cells, the organic compound layer 752 including a plurality of insulators 756 provided in each memory cell may be separated.

  FIG. 2C is a modification example of FIG. 2B, in which a first conductive layer 791a, a first conductive layer 791b, a first conductive layer 791c, and a plurality of insulators 796 are provided over a substrate 790. It includes an organic compound layer 792, a second conductive layer 793b, and an insulating layer 794 which is a protective layer. As in the first conductive layer 791a, the first conductive layer 791b, and the first conductive layer 791c in FIG. 2C, the first conductive layer may have a tapered shape, and the curvature radius may be continuous. The shape may change. Shapes such as the first conductive layer 791a, the first conductive layer 791b, and the first conductive layer 791c can be formed by a droplet discharge method or the like. When the curved surface has such a curvature, the insulating layer and the conductive layer to be stacked have good coverage.

    The state of inclusion of the insulator in the organic compound layer in this embodiment is an example, as shown in FIG. 16 depending on the nature and size of the material used as the insulator, the material used as the organic compound and the conductive layer, and the formation method. The concentration of the insulator can be appropriately controlled. For example, the insulator concentration may be increased as it approaches the interface between the organic compound layer, the first conductive layer, and the second conductive layer. The change in the concentration may be continuous or discontinuous in the organic compound layer.

  In addition, a partition wall (insulating layer) may be formed so as to cover an end portion of the first conductive layer. The partition (insulating layer) functions like a wall separating other memory elements. 8A and 8B illustrate a structure in which the end portion of the first conductive layer is covered with a partition wall (insulating layer).

    In the example of the memory element illustrated in FIG. 8A, a partition wall (insulating layer) 775 serving as a partition wall covers end portions of the first conductive layer 771a, the first conductive layer 771b, and the first conductive layer 771c. It is formed in a shape having a taper. A partition (insulating layer) 775 is formed over the first conductive layer 771a, the first conductive layer 771b, and the first conductive layer 771c provided over the substrate 770, and an organic compound layer including a plurality of insulators 776 772, a second conductive layer 773b, and an insulating layer 774 are formed.

    An example of the memory element illustrated in FIG. 8B has a shape in which the partition wall (insulating layer) 765 has a curvature, and the radius of curvature continuously changes. A first conductive layer 761a, a first conductive layer 761b, a first conductive layer 761c, an organic compound layer 762 including a plurality of insulators 766, a second conductive layer 763b, and an insulating layer 764 provided over the substrate 760 Is formed.

    In the structure of the memory cell, as the substrate 750, the substrate 760, the substrate 770, and the substrate 790, a glass substrate, a flexible substrate, a quartz substrate, a silicon substrate, a metal substrate, a stainless steel substrate, or the like can be used. The flexible substrate is a substrate that can be bent (flexible), and examples thereof include a plastic substrate made of polycarbonate, polyarylate, polyethersulfone, or the like. In addition, a laminated film (made of polypropylene, polyester, vinyl, polyvinyl fluoride, vinyl chloride, etc.), paper made of a fibrous material, base film (polyester, polyamide, inorganic vapor deposition film, paper, etc.), etc. are used. You can also In addition, a memory cell array 722 may be provided above a field effect transistor (FET) formed on a semiconductor substrate such as Si or above a thin film transistor (TFT) formed on a substrate such as glass. it can.

  The first conductive layers 751a to 751c, the first conductive layers 761a to 761c, the first conductive layers 771a to 771c, the first conductive layers 791a to 791c, the second conductive layers 753a to 753a, which are described in this embodiment mode 753c, second conductive layers 763a to 763c, second conductive layers 773a to 773c, and materials and formation methods of the second conductive layers 793a to 793c are the same as those of the first conductive layer 50 described in Embodiment Mode 1. This can be similarly performed using any of the material and the formation method of the second conductive layer 53.

  The insulator 756, the insulator 766, the insulator 776, the insulator 796, the organic compound layer 752, the organic compound layer 762, the organic compound layer 772, and the organic compound layer 792 are formed using the insulator described in Embodiment 1 above, A material and a formation method similar to those for the organic compound layer can be used.

  In addition, the first conductive layers 751a to 751c, the first conductive layers 761a to 761c, the first conductive layers 771a to 771c, the first conductive layers 791a to 791c, the organic compound layer 752, the organic compound layer 762, and the organic compound An element having a rectifying property may be provided between the layer 772 and the organic compound layer 792. Note that the rectifying element includes the organic compound layer 752, the organic compound layer 762, the organic compound layer 772, the organic compound layer 792, the second conductive layers 753a to 753c, the second conductive layers 763a to 763c, the second The conductive layers 773a to 773c and the second conductive layers 793a to 793c may be provided.

    As the partition wall (insulating layer) 765 and the partition wall (insulating layer) 775, silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, aluminum nitride, aluminum oxynitride, and other inorganic insulating materials, acrylic acid, methacrylic acid, and the like Or a heat resistant polymer such as polyimide, aromatic polyamide, polybenzimidazole, or a siloxane resin. Further, a resin material such as a vinyl resin such as polyvinyl alcohol or polyvinyl butyral, an epoxy resin, a phenol resin, a novolac resin, an acrylic resin, a melamine resin, or a urethane resin is used. Further, an organic material such as benzocyclobutene, parylene, fluorinated arylene ether, polyimide, a composition material containing a water-soluble homopolymer and a water-soluble copolymer, or the like may be used. As a manufacturing method, a vapor deposition method such as a plasma CVD method or a thermal CVD method, or a sputtering method can be used. Alternatively, a droplet discharge method, a dispenser method, or a printing method (a method for forming a pattern such as screen printing or offset printing) can be used. A TOF film or an SOG film obtained by a coating method can also be used.

    Further, after a conductive layer, an insulating layer, or the like is formed by discharging a composition by a droplet discharge method, the surface may be flattened by pressing with a pressure in order to improve the flatness. As a pressing method, the surface of the roller-like object may be scanned to reduce unevenness, or the surface may be pressed vertically with a flat plate-like object. A heating step may be performed when pressing. Alternatively, the surface may be softened or melted with a solvent or the like, and the surface irregularities may be removed with an air knife. Further, polishing may be performed using a CMP method. This step can be applied when the surface is flattened when unevenness is generated by the droplet discharge method.

    With the memory element of the present invention, characteristics such as a write voltage of the memory element are stabilized without variation, and normal writing can be performed in each element. In addition, since the carrier injection property is improved by the tunnel current of the insulator, the organic compound layer can be thickened. Furthermore, since it is a mixed layer of an insulator and an organic compound, Since defects can be prevented, the form of the organic compound layer is stabilized. Therefore, it is possible to prevent the memory element from being short-circuited in the initial state before energization. As a result, a highly reliable memory device and semiconductor device can be provided with high yield.

(Embodiment 4)
In this embodiment, a memory device having a structure different from that in Embodiment 3 is described. Specifically, a case where the structure of the memory device is an active matrix type will be described.

  FIG. 5 shows an example of a structure of the memory device described in this embodiment. A bit line including a memory cell array 232 in which memory cells 231 are provided in a matrix, a column decoder 226a, a read circuit 226b, and a selector 226c. A driving circuit 226, a word line driving circuit 224 having a row decoder 224a and a level shifter 224b, and an interface 223 having a writing circuit and the like for performing exchange with the outside. Note that the structure of the memory device 217 shown here is merely an example, and other circuits such as a sense amplifier, an output circuit, and a buffer may be included, and a writing circuit may be provided in the bit line driver circuit.

  The memory cell array 232 includes a first wiring configuring the word line Wy (1 ≦ y ≦ n), a second wiring configuring the bit line Bx (1 ≦ x ≦ m), a transistor 210a, and a storage element 215b. And a memory cell 231. The memory element 215b has a structure in which an organic compound layer is sandwiched between a pair of conductive layers.

  4A is a top view of the memory cell array 232, and FIG. 4B is a cross-sectional view taken along line EF in FIG. 4A. In FIG. 4A, the organic compound layer 212 including the plurality of insulators 216, the second conductive layer 213, and the insulating layer 214 are omitted and not shown, but as shown in FIG. Each is provided.

  The memory cell array 232 includes a first wiring 205a and a first wiring 205b extending in a first direction and a second wiring 202 extending in a second direction perpendicular to the first direction in a matrix. It has been. The first wiring is connected to the source electrode or the drain electrode of the transistors 210a and 210b, and the second wiring is connected to the gate electrodes of the transistors 210a and 210b. Further, the first conductive layer 206a and the first conductive layer 206b are connected to the source or drain electrodes of the transistor 210a and the transistor 210b which are not connected to the first wiring, respectively. A memory element 215a and a memory element 215b are provided by a stacked structure of one conductive layer 206b, an organic compound layer 212 including a plurality of insulators 216, and a second conductive layer 213. A partition wall (insulating layer) 207 is provided between each adjacent memory cell 231, and the organic compound layer 212 including the plurality of insulators 216 and the second conductive layer are formed on the first conductive layer and the partition wall (insulating layer) 207. A layer 213 is stacked. An insulating layer 214 serving as a protective layer is provided over the second conductive layer 213. Thin film transistors are used as the transistors 210a and 210b (see FIG. 4B).

    The memory device in FIG. 4B is provided over a substrate 200, and includes an insulating layer 201a, an insulating layer 201b, an insulating layer 208, an insulating layer 209, an insulating layer 211, a semiconductor layer 204a included in the transistor 210a, and a gate electrode layer. 202a, a wiring 205a also serving as a source electrode layer or a drain electrode layer, a semiconductor layer 204b included in the transistor 210b, a gate electrode layer 202b, and a wiring 205b also serving as a source electrode layer or a drain electrode layer. An organic compound layer 212 including a plurality of insulators 216 and a second conductive layer 213 are formed over the first conductive layer 206 a, the first conductive layer 206 b, and the partition wall (insulating layer) 207. The state of inclusion of the insulator in the organic compound layer in this embodiment is an example, as shown in FIG. 16 depending on the nature and size of the material used as the insulator, the material used as the organic compound and the conductive layer, and the formation method. The concentration of the insulator can be appropriately controlled. For example, the insulator concentration may be increased as it approaches the interface between the organic compound layer, the first conductive layer, and the second conductive layer. The change in the concentration may be continuous or discontinuous in the organic compound layer.

    In this embodiment, the organic compound layer 212 included in the memory element included in the memory device includes the plurality of insulators 216 and is formed over the first conductive layer. When a voltage is applied between the first conductive layer and the second conductive layer, a current flows through the organic compound layer 212 to generate heat. When the temperature of the organic compound layer rises to the glass transition temperature due to Joule heat, the material forming the organic compound layer 212 becomes a fluid composition. A composition having fluidity flows without maintaining a solid state shape. Therefore, the film thickness of the organic compound layer becomes non-uniform, the organic compound layer is deformed, and the first conductive layer and the second conductive layer are in contact with each other. As a result, the first conductive layer and the second conductive layer Is short-circuited. Therefore, the conductivity of the memory element before and after voltage application changes.

    The insulator 216 present at the interface between the organic compound layer 212 and the first conductive layer enables carrier tunnel injection from the first conductive layer to the organic compound layer 212. Therefore, characteristics such as a writing voltage of the memory element are stabilized without variation, and normal writing can be performed in each element. In addition, since a plurality of insulators are mixed in the organic compound layer, generation of defects due to crystallization of the organic compound or the like can be prevented, so that the form of the organic compound layer is stabilized. Furthermore, since the carrier injection property is improved by tunnel injection, the organic compound layer can be made thicker. Therefore, it is possible to prevent a defect that the memory element is short-circuited (short-circuited) in an initial state before energization.

    In addition, since the insulator 216 present in the organic compound layer 212 does not perform carrier transport, the carrier transport property of the entire organic compound layer 212 is lowered by the inhibition of the insulator 216. Therefore, even in an organic compound material having a high carrier transport property, the current value required for short-circuiting (writing to the element) is lowered, and there are advantages such as low power consumption and widening the range of material selection.

  Further, as illustrated in FIG. 6, a memory element 265 a and a memory element 265 b may be connected to the field effect transistor 260 a and the field effect transistor 260 b provided over the single crystal semiconductor substrate 250. Here, an insulating layer 270 is provided so as to cover the source or drain electrode layers 255a to 255d of the field effect transistor 260a and the field effect transistor 260b, and the first conductive layer 256a and the first conductive layer are provided over the insulating layer 270. The memory element 265a and the memory element 265b are configured by 256b, a partition wall (insulating layer) 267, an organic compound layer 262a including a plurality of insulators 266a, an organic compound layer 262b including a plurality of insulators 266b, and a second conductive layer 263. . An organic compound layer including an insulator such as an organic compound layer 262a including a plurality of insulators 266a and an organic compound layer 262b including a plurality of insulators 266b is selectively provided only in each memory cell using a mask or the like. May be. In addition, the memory device illustrated in FIG. 6 also includes an element isolation region 268, an insulating layer 269, an insulating layer 261, and an insulating layer 264. The organic compound layer 262a including the insulator 266a and the organic compound layer 262b including the insulator 266b are formed over the first conductive layer 256a, the first conductive layer 256b, the partition 267, and the organic compound layer 262a including the insulator 266a. The second conductive layer 263 is formed over the organic compound layer 262b including the insulator 266b. The state of inclusion of the insulator in the organic compound layer in this embodiment is an example, as shown in FIG. 16 depending on the nature and size of the material used as the insulator, the organic compound, the material used as the conductive layer, and the formation method. The concentration of the insulator can be appropriately controlled. For example, the insulator concentration may be increased as it approaches the interface between the organic compound layer, the first conductive layer, and the second conductive layer. The change in the concentration may be continuous or discontinuous in the organic compound layer.

    In this embodiment, the organic compound layer 262a and the organic compound layer 262b included in the memory element included in the memory device are formed over the first conductive layer including the insulator 266a and the insulator 266b. When a voltage is applied between the first conductive layer and the second conductive layer, a current flows through the organic compound layer 262a and the organic compound layer 262b to generate heat. When the temperature of the organic compound layer rises to the glass transition temperature due to Joule heat, the material forming the organic compound layer 262a and the organic compound layer 262b becomes a fluid composition. A composition having fluidity flows without maintaining a solid state shape. Therefore, the film thickness of the organic compound layer becomes non-uniform, the organic compound layer is deformed, and the first conductive layer and the second conductive layer are in contact with each other. As a result, the first conductive layer and the second conductive layer Is short-circuited. Therefore, the conductivity of the memory element before and after voltage application changes.

    Carriers from the first conductive layer to the organic compound layer 262a and the organic compound layer 262b are formed by the insulator 266a and the insulator 266b respectively present at the interface between the organic compound layer 262a and the organic compound layer 262b and the first conductive layer. Tunnel injection becomes possible. Therefore, characteristics such as a writing voltage of the memory element are stabilized without variation, and normal writing can be performed in each element. In addition, since a plurality of insulators are mixed in the organic compound layer, generation of defects due to crystallization of the organic compound or the like can be prevented, so that the form of the organic compound layer is stabilized. Furthermore, since the carrier injection property is improved by tunnel injection, the organic compound layer can be made thicker. Therefore, it is possible to prevent a defect that the memory element is short-circuited (short-circuited) in an initial state before energization.

    In addition, since the insulator 266a and the insulator 266b respectively present in the organic compound layer 262a and the organic compound layer 262b do not perform carrier transport, the carrier transport property of the organic compound layer 262a and the organic compound layer 262b as a whole 266a and the insulator 266b are lowered. Therefore, even in an organic compound material having a high carrier transport property, the current value required for short-circuiting (writing to the element) is lowered, and there are advantages such as low power consumption and widening the range of material selection.

  In this manner, by providing the insulating layer 270 and forming the memory element, the first conductive layer can be freely arranged. In other words, in the structure in FIG. 4B, the memory element 215a and the memory element 215b need to be provided in a region where the source electrode layer or the drain electrode layer of the transistor 210a and the transistor 210b are avoided. For example, the memory element 215a and the memory element 215b can be formed above the transistors 210a and 210b. As a result, the storage device 217 can be more highly integrated.

  The transistors 210a and 210b may have any structure as long as they can function as switching elements. As the semiconductor layer, various semiconductors such as an amorphous semiconductor, a crystalline semiconductor, a polycrystalline semiconductor, and a microcrystalline semiconductor can be used, and an organic transistor may be formed using an organic compound. FIG. 4A illustrates an example in which a planar thin film transistor is provided over an insulating substrate; however, a transistor can be formed with a staggered structure, an inverted staggered structure, or the like.

    FIG. 7 shows an example using a thin film transistor having an inverted staggered structure. Over the substrate 280, transistors 290a and 290b which are thin film transistors having an inverted staggered structure are provided. The transistor 290a includes an insulating layer 288, a gate electrode layer 281, an amorphous semiconductor layer 282, a semiconductor layer 283a having one conductivity type, a semiconductor layer 283b having one conductivity type, a source or drain electrode layer 285, The source electrode layer or the drain electrode layer is a first conductive layer 286a and a first conductive layer 286b included in the memory element. A partition wall (insulating layer) 287 is stacked so as to cover end portions of the first conductive layer 286a and the first conductive layer 286b, and the first conductive layer 286a, the first conductive layer 286b, and the partition wall (insulating layer) 287 are stacked. An organic compound layer 292 including a plurality of insulators 296a, a plurality of insulators 296b, a second conductive layer 293, and an insulating layer 294 which is a protective layer are formed over the memory element 295a and the memory element 295b. . The insulator 296a and the insulator 296b are regions of the memory element 295a and the memory element 295b which are sandwiched between the first conductive layer 286a, the first conductive layer 286b, and the second conductive layer 293 in the organic compound layer 292. Is selectively added. As described above, the insulator may be selectively mixed in the organic compound layer. In the memory device in FIG. 7 of this embodiment, the insulator 296a and the insulator 296b are selectively added to the organic compound layer 292. It is manufactured by adding using a doping method, an ion implantation method, or the like. The state of inclusion of the insulator in the organic compound layer in this embodiment is an example, as shown in FIG. 16 depending on the nature and size of the material used as the insulator, the material used as the organic compound and the conductive layer, and the formation method. The concentration of the insulator can be appropriately controlled. For example, the insulator concentration may be increased as it approaches the interface between the organic compound layer, the first conductive layer, and the second conductive layer. The change in the concentration may be continuous or discontinuous in the organic compound layer.

    In the memory device in FIG. 7 of this embodiment, the organic compound layer 292 included in the memory element included in the memory device includes the insulator 296a and the insulator 296b and is formed over the first conductive layer. When a voltage is applied between the first conductive layer and the second conductive layer, a current flows through the organic compound layer 292 to generate heat. When the temperature of the organic compound layer rises to the glass transition temperature due to Joule heat, the material forming the organic compound layer 292 becomes a fluid composition. A composition having fluidity flows without maintaining a solid state shape. Therefore, the film thickness of the organic compound layer becomes non-uniform, the organic compound layer is deformed, and the first conductive layer and the second conductive layer are in contact with each other. As a result, the first conductive layer and the second conductive layer Is short-circuited. Therefore, the conductivity of the memory element before and after voltage application changes.

    The insulator 296a and the insulator 296b respectively present at the interface between the organic compound layer 292 and the first conductive layer allow tunnel injection of carriers from the first conductive layer to the organic compound layer 292. Therefore, characteristics such as a writing voltage of the memory element are stabilized without variation, and normal writing can be performed in each element. In addition, since a plurality of insulators are mixed in the organic compound layer, generation of defects due to crystallization of the organic compound or the like can be prevented, so that the form of the organic compound layer is stabilized. Furthermore, since the carrier injection property is improved by tunnel injection, the organic compound layer can be made thicker. Therefore, it is possible to prevent a defect that the memory element is short-circuited (short-circuited) in an initial state before energization.

    In addition, since the insulators 296a and 296b existing in the organic compound layer 292 do not transport carriers, the entire organic compound layer 292 has a low carrier transport property due to the inhibition of the insulators 296a and 296b. . Therefore, even in an organic compound material having a high carrier transport property, the current value required for short-circuiting (writing to the element) is lowered, and there are advantages such as low power consumption and widening the range of material selection.

  In the memory device illustrated in FIG. 7, the gate electrode layer 281, the source or drain electrode layer 285, the first conductive layer 286a, the first conductive layer 286b, and the partition wall (insulating layer) 287 are formed by a droplet discharge method. Form. The droplet discharge method is a method in which a composition containing a composition forming material that is a fluid is discharged (jetted) as droplets to form a desired pattern shape. A droplet containing a component forming material is discharged onto a region where the component is to be formed, and fixed by firing, drying, or the like to form a component having a desired pattern.

    One mode of a droplet discharge apparatus used for the droplet discharge method is shown in FIG. The individual heads 1405 and 1412 of the droplet discharge means 1403 are connected to the control means 1407, which can be drawn in a pre-programmed pattern under the control of the computer 1410. The drawing timing may be performed with reference to a marker 1411 formed on the substrate 1400, for example. Alternatively, the reference point may be determined based on the edge of the substrate 1400. This is detected by the imaging means 1404, converted into a digital signal by the image processing means 1409, is recognized by the computer 1410, a control signal is generated, and sent to the control means 1407. As the imaging unit 1404, an image sensor using a charge coupled device (CCD) or a complementary metal oxide semiconductor (CMOS) can be used. Of course, the information on the pattern shape to be formed on the substrate 1400 is stored in the storage medium 1408. Based on this information, a control signal is sent to the control means 1407, and each head of the droplet discharge means 1403 is sent. 1405, the head 1412 can be individually controlled. The material to be discharged is supplied from the material supply source 1413 and the material supply source 1414 to the head 1405 and the head 1412 through piping.

    The inside of the head 1405 has a structure having a space filled with a liquid material as indicated by a dotted line 1406 and a nozzle that is a discharge port. Although not shown, the head 1412 has the same internal structure as the head 1405. When the nozzles of the head 1405 and the head 1412 are provided in different sizes, different materials can be drawn simultaneously with different widths. With one head, conductive material, organic material, inorganic material, etc. can be discharged and drawn respectively. When drawing in a wide area like an interlayer film, the same material is used from multiple nozzles to improve throughput. It is possible to discharge and draw at the same time. In the case of using a large substrate, the head 1405 and the head 1412 can freely scan on the substrate in the direction of the arrow to freely set a drawing area, and a plurality of the same pattern can be drawn on a single substrate. it can.

    In the case of forming a conductive layer by using a droplet discharge method, a conductive layer is formed by discharging a composition containing a conductive material processed into a particulate form and fusing or fusion-bonding and solidifying by firing. In such a conductive layer (or insulating layer) formed by discharging and baking a composition containing a conductive material, the conductive layer (or insulating layer) formed by sputtering or the like is mostly a columnar structure. In many cases, a polycrystalline state having many grain boundaries is exhibited.

  Further, any structure of a semiconductor layer included in the transistor may be used. For example, an impurity region (including a source region, a drain region, and an LDD region) may be formed, or a p-channel type or an n-channel may be formed. You may form with either type | mold. Further, an insulating layer (side wall) may be formed so as to be in contact with the side surface of the gate electrode, or a silicide layer may be formed on one or both of the source and drain regions and the gate electrode. As a material for the silicide layer, nickel, tungsten, molybdenum, cobalt, platinum, or the like can be used.

  The materials and formation methods of the first conductive layers 206a, 206b, 256a, 256b, 286a, and 286b and the second conductive layers 213, 263, and 293 described in this embodiment are the same as those described in Embodiment 1. And any of the formation methods.

  The insulators 216, 266a, 266b, 296a, 296b, and the organic compound layers 212, 262a, 262b, and 292 are formed using the same materials and formation methods as those for the insulator and organic compound layers described in Embodiment 1. Can be provided.

  Further, a rectifying element may be provided between the first conductive layers 206a, 206b, 256a, 256b, 286a, and 286b and the organic compound layers 212, 262a, 262b, and 292. The element having a rectifying property is a transistor or a diode in which a gate electrode and a drain electrode are connected. For example, a PN junction diode provided by stacking an N-type semiconductor layer and a P-type semiconductor layer can be used. Thus, by providing a diode having a rectifying property, current flows only in one direction, so that an error is reduced and a read margin is improved. Note that when a diode is provided, a diode having another structure such as a diode having a PIN junction or an avalanche diode may be used instead of a diode having a PN junction. Note that the element having the rectifying property may be provided between the organic compound layers 212, 262 a, 262 b, and 292 and the second conductive layers 213, 263, and 293.

    With the memory element of the present invention, characteristics such as a write voltage of the memory element are stabilized without variation, and normal writing can be performed in each element. In addition, since the carrier injection property is improved by the tunnel current of the insulator, the organic compound layer can be thickened. Furthermore, since it is a mixed layer of an insulator and an organic compound, Since defects can be prevented, the form of the organic compound layer is stabilized. Therefore, it is possible to prevent the memory element from being short-circuited in the initial state before energization. As a result, a highly reliable memory device and semiconductor device can be provided with high yield.

(Embodiment 5)
In this embodiment, an example of a semiconductor device including the memory device described in the above embodiment will be described with reference to drawings.

  The semiconductor device described in this embodiment is characterized in that data can be read and written in a non-contact manner. A data transmission format is an electromagnetic which performs communication by mutual induction with a pair of coils arranged opposite to each other. There are roughly divided into a coupling system, an electromagnetic induction system that communicates using an induction electromagnetic field, and a radio system that communicates using radio waves, but any system may be used. In addition, there are two types of antennas used for data transmission. When one antenna is provided on a substrate on which a plurality of elements and memory elements are provided, the other is provided with a plurality of elements and memory elements. In some cases, a terminal portion is provided over the substrate, and an antenna provided over another substrate is connected to the terminal portion.

  First, a structure example of a semiconductor device in the case where an antenna is provided over a substrate provided with a plurality of elements and memory elements will be described with reference to FIGS.

  FIG. 10 illustrates a semiconductor device having a memory device formed of an active matrix type. A transistor portion 330 including transistors 310a and 310b over a substrate 300, a transistor portion 340 including transistors 320a and 320b, an insulating layer 301a, An element formation layer 335 including 301b, 308, 311, 316, and 314 is provided, and a storage element portion 325 and a conductive layer 343 functioning as an antenna are provided above the element formation layer 335.

  Note that here, the case where the memory element portion 325 or the conductive layer 343 functioning as an antenna is provided above the element formation layer 335 is shown; however, the structure is not limited thereto, and the memory element portion 325 or the conductive layer 343 functioning as an antenna is provided. Can be provided below the element formation layer 335 or in the same layer.

  The memory element portion 325 includes memory elements 315a and 315b. The memory element 315a is an organic material including a partition wall (insulating layer) 307a, a partition wall (insulating layer) 307b, and a plurality of insulators 326 over the first conductive layer 306a. The compound layer 312 and the second conductive layer 313 are stacked, and the memory element 315b includes a partition wall (insulating layer) 307b, a partition wall (insulating layer) 307c, and an insulator 326 over the first conductive layer 306b. An organic compound layer 312 and a second conductive layer 313 are stacked. In addition, an insulating layer 314 that covers the second conductive layer 313 and functions as a protective film is formed. The first conductive layer 306a and the first conductive layer 306b in which the plurality of memory elements 315a and 315b are formed are connected to the source electrode layer or the drain electrode layer of each of the transistors 310a and 310b. That is, each memory element is connected to one transistor. An organic compound layer 312 including an insulator 326 is formed over the entire surface so as to cover the first conductive layers 306a and 306b and the partition walls (insulating layers) 307a, 307b, and 307c. It may be formed. Note that the memory elements 315a and 315b can be formed using any of the materials and manufacturing methods described in the above embodiment modes.

    The mixed state of the insulator in the organic compound layer in this embodiment is an example, as shown in FIG. 16 depending on the property and size of the material used as the insulator, the material used as the organic compound and the conductive layer, and the formation method The concentration of the insulator can be appropriately controlled. For example, the insulator concentration may be increased as it approaches the interface between the organic compound layer, the first conductive layer, and the second conductive layer. The change in the concentration may be continuous or discontinuous in the organic compound layer.

    In the memory device in FIG. 10 of this embodiment mode, the organic compound layer 312 included in the memory element included in the memory device includes the insulator 326 and is formed over the first conductive layer. When a voltage is applied between the first conductive layer and the second conductive layer, a current flows through the organic compound layer 312 to generate heat. When the temperature of the organic compound layer rises to the glass transition temperature due to Joule heat, the material forming the organic compound layer 312 becomes a fluid composition. A composition having fluidity flows without maintaining a solid state shape. Therefore, the film thickness of the organic compound layer becomes non-uniform, the organic compound layer is deformed, and the first conductive layer and the second conductive layer are in contact with each other. As a result, the first conductive layer and the second conductive layer Is short-circuited. Therefore, the conductivity of the memory element before and after voltage application changes.

    With the insulators 326 present at the interface between the organic compound layer 312 and the first conductive layer, carriers can be tunneled from the first conductive layer to the organic compound layer 312. Therefore, characteristics such as a writing voltage of the memory element are stabilized without variation, and normal writing can be performed in each element. In addition, since a plurality of insulators are mixed in the organic compound layer, generation of defects due to crystallization of the organic compound or the like can be prevented, so that the form of the organic compound layer is stabilized. Furthermore, since the carrier injection property is improved by tunnel injection, the organic compound layer can be made thicker. Therefore, it is possible to prevent a defect that the memory element is short-circuited (short-circuited) in an initial state before energization.

    In addition, since the insulators 326 present in the organic compound layer 312 do not perform carrier transport, the carrier transport property of the entire organic compound layer 312 is lowered due to the inhibition of the insulator 326. Therefore, even in an organic compound material having a high carrier transport property, the current value required for short-circuiting (writing to the element) is lowered, and there are advantages such as low power consumption and widening the range of material selection.

  Further, in the memory element 315a, as described in the above embodiment mode, between the first conductive layer 306a and the organic compound layer 312 including the insulator 326, or between the organic compound layer 312 including the insulator 326 and the second An element having a rectifying property may be provided between the conductive layer 313 and the conductive layer 313. The above-described elements having a rectifying property can also be used. The same applies to the memory element 315b.

  Here, the conductive layer 343 functioning as an antenna is provided over the conductive layer 342 formed using the same layer as the second conductive layer 313. Note that a conductive layer functioning as an antenna may be formed using the same layer as the second conductive layer 313.

  As a material of the conductive layer 343 functioning as an antenna, gold (Au), platinum (Pt), nickel (Ni), tungsten (W), molybdenum (Mo), cobalt (Co), copper (Cu), aluminum (Al ), Manganese (Mn), titanium (Ti), or the like, or an alloy containing a plurality of such elements can be used. As a method for forming the conductive layer 343 functioning as an antenna, vapor deposition, sputtering, a CVD method, a dispenser method, various printing methods such as screen printing and gravure printing, a droplet discharge method, and the like can be used.

  The transistors 310a, 310b, 310c, and 310d included in the element formation layer 335 can be provided using a p-channel TFT, an n-channel TFT, or a combination of these. Further, any structure of the semiconductor layer included in the transistors 310a, 310b, 310c, and 310d may be used. For example, an impurity region (including a source region, a drain region, and an LDD region) may be formed. The p channel type or the n channel type may be used. Further, an insulating layer (side wall) may be formed so as to be in contact with the side surface of the gate electrode, or a silicide layer may be formed on one or both of the source and drain regions and the gate electrode. As a material for the silicide layer, nickel, tungsten, molybdenum, cobalt, platinum, or the like can be used.

  Alternatively, the transistors 310a, 310b, 310c, and 310d included in the element formation layer 335 may be organic transistors in which a semiconductor layer included in the transistor is formed using an organic compound. In this case, the element formation layer 335 including an organic transistor can be formed using a direct printing method, a droplet discharge method, or the like on a flexible substrate such as plastic as the substrate 300. By using a printing method, a droplet discharge method, or the like, a semiconductor device can be manufactured at lower cost.

  Further, as described above, the element formation layer 335, the memory elements 315a and 315b, and the conductive layer 343 functioning as an antenna can be formed by evaporation, sputtering, CVD, dispenser, droplet discharge, or the like. it can. Note that a different method may be used depending on each place. For example, a transistor that requires high-speed operation is provided by forming a semiconductor layer made of Si or the like on a substrate and then crystallizing it by heat treatment, and then forming a transistor that functions as a switching element above the element formation layer by a printing method or An organic transistor can be provided by a droplet discharge method.

    Note that a sensor connected to the transistor may be provided. Examples of the sensor include an element that detects temperature, humidity, illuminance, gas (gas), gravity, pressure, sound (vibration), acceleration, and other characteristics by physical or chemical means. The sensor is typically formed of a semiconductor element such as a resistance element, a capacitive coupling element, an inductive coupling element, a photovoltaic element, a photoelectric conversion element, a thermoelectric element, a transistor, a thermistor, or a diode.

    Next, a structure example of a semiconductor device in the case where a terminal portion is provided over a substrate provided with a plurality of elements and memory elements and an antenna provided over another terminal is connected to the terminal portion is described with reference to FIG. I will explain.

  FIG. 11 illustrates a semiconductor device having a passive matrix memory device, in which an element formation layer 385 is provided over a substrate 350, a memory element portion 375 is provided above the element formation layer 385, and the substrate 396 is provided. A conductive layer 393 functioning as an antenna is provided so as to be connected to the element formation layer 385. Note that here, the case where the memory element portion 375 or the conductive layer 393 functioning as an antenna is provided above the element formation layer 385 is shown; however, the present invention is not limited to this structure, and the memory element portion 375 is provided below the element formation layer 385. A conductive layer 393 functioning as an antenna can be provided below the element formation layer 385 in the same layer.

  The memory element portion 375 includes memory elements 365a and 365b. The memory element 365a includes a partition (insulating layer) 357a, a partition (insulating layer) 357b, and a plurality of insulators 376a over the first conductive layer 356. The compound layer 362a and the second conductive layer 363a are stacked, and the memory element 365b includes a partition wall (insulating layer) 357b, a partition wall (insulating layer) 357c, and a plurality of insulators 376b over the first conductive layer 356. An organic compound layer 362b containing the second conductive layer 363b is stacked. In addition, an insulating layer 364 that functions as a protective film is formed so as to cover the second conductive layers 363a and 363b. In addition, the first conductive layer 356 in which the plurality of memory elements 365a and 365b are formed is connected to one source electrode layer or drain electrode layer of the transistor 360b. That is, the memory element is connected to the same single transistor. In addition, the organic compound layer 362a including the insulator 376a and the organic compound layer 362b including the insulator 376b are provided with partition walls (insulating layers) 357a, 357b, and 357c for separating the organic compound layer for each memory cell. In the case where there is no concern about the influence of the electric field in the lateral direction in adjacent memory cells, it may be formed on the entire surface. Note that the memory elements 365a and 365b can be formed using the material or the manufacturing method described in the above embodiment modes.

    The mixed state of the insulator in the organic compound layer in this embodiment is an example, as shown in FIG. 16 depending on the property and size of the material used as the insulator, the material used as the organic compound and the conductive layer, and the formation method The concentration of the insulator can be appropriately controlled. For example, the insulator concentration may be increased as it approaches the interface between the organic compound layer, the first conductive layer, and the second conductive layer. The change in the concentration may be continuous or discontinuous in the organic compound layer.

    In the memory device in FIG. 11 of this embodiment, the organic compound layer 362a included in the memory element included in the memory device includes the insulator 376a, and the organic compound layer 362b includes the insulator 376b. To form. When a voltage is applied between the first conductive layer and the second conductive layer, a current flows through the organic compound layer 362a and the organic compound layer 362b to generate heat. When the temperature of the organic compound layer is increased to the glass transition temperature by Joule heat, the material forming the organic compound layer 362a and the organic compound layer 362b becomes a fluid composition. A composition having fluidity flows without maintaining a solid state shape. Therefore, the film thickness of the organic compound layer becomes non-uniform, the organic compound layer is deformed, and the first conductive layer and the second conductive layer are in contact with each other. As a result, the first conductive layer and the second conductive layer Is short-circuited. Therefore, the conductivity of the memory element before and after voltage application changes.

    Carriers from the first conductive layer to the organic compound layer 362a and the organic compound layer 362b are formed by the insulator 376a and the insulator 376b respectively present at the interface between the organic compound layer 362a and the organic compound layer 362b and the first conductive layer. Tunnel injection becomes possible. Therefore, characteristics such as a writing voltage of the memory element are stabilized without variation, and normal writing can be performed in each element. In addition, since a plurality of insulators are mixed in the organic compound layer, generation of defects due to crystallization of the organic compound or the like can be prevented, so that the form of the organic compound layer is stabilized. Furthermore, since the carrier injection property is improved by tunnel injection, the organic compound layer can be made thicker. Therefore, it is possible to prevent a defect that the memory element is short-circuited (short-circuited) in an initial state before energization.

    In addition, since the insulator 376a and the insulator 376b existing in the organic compound layer 362a and the organic compound layer 362b do not perform carrier transport, the carrier transportability of the organic compound layer 362a and the organic compound layer 362b as a whole It becomes low by inhibition of 376a and the insulator 376b. Therefore, even in an organic compound material having a high carrier transport property, the current value required for short-circuiting (writing to the element) is lowered, and there are advantages such as low power consumption and widening the range of material selection.

  A substrate including the element formation layer 385 and the memory element portion 375 and a substrate 396 provided with a conductive layer 393 functioning as an antenna are attached to each other with a resin 395 having adhesiveness. The element formation layer 385 and the conductive layer 393 are electrically connected through conductive fine particles 394 contained in the resin 395. In addition, a conductive layer such as a silver paste, a copper paste, or a carbon paste or a method of performing solder bonding is used to provide a substrate including the element formation layer 385 and the memory element portion 375, and a conductive layer 393 that functions as an antenna. The substrate 396 may be attached.

  In this manner, a semiconductor device including a memory device and an antenna can be formed. In this embodiment mode, an element formation layer can be provided by forming a thin film transistor over a substrate, or by forming a field effect transistor over a substrate using a semiconductor substrate such as Si as the substrate. A layer may be provided. Alternatively, an SOI substrate may be used as a substrate, and an element formation layer may be provided thereover. In this case, the SOI substrate may be formed by using a method of bonding wafers or a method called SIMOX in which an insulating layer is formed inside by implanting oxygen ions into the Si substrate.

    Further, the memory element portion may be provided on a substrate provided with a conductive layer functioning as an antenna. A sensor connected to the transistor may be provided.

    Note that this embodiment can be freely combined with the above embodiment. In addition, the semiconductor device manufactured in this embodiment mode can be provided over a flexible substrate by peeling off the semiconductor device from a substrate by a known peeling process and bonding the semiconductor device to a flexible substrate. Obtainable. Flexible substrate means film made of polypropylene, polyester, vinyl, polyvinyl fluoride, vinyl chloride, paper made of fibrous material, substrate film (polyester, polyamide, inorganic vapor deposition film, paper, etc.) and adhesiveness It corresponds to a laminated film with a synthetic resin film (acrylic synthetic resin, epoxy synthetic resin, etc.). The film is subjected to heat treatment and pressure treatment, and when the heat treatment and pressure treatment are performed, the film is provided on the adhesive layer provided on the outermost surface of the film or on the outermost layer. The layer (not the adhesive layer) is melted by heat treatment and bonded by pressure. Further, an adhesive layer may be provided on the substrate, or an adhesive layer may not be provided. The adhesive layer corresponds to a layer containing an adhesive such as a thermosetting resin, an ultraviolet curable resin, an epoxy resin adhesive, or a resin additive.

    With the memory element of the present invention, characteristics such as a write voltage of the memory element are stabilized without variation, and normal writing can be performed in each element. In addition, since the carrier injection property is improved by the tunnel current of the mixed layer of the inorganic insulator and the organic compound, the organic compound layer can be thickened. Therefore, it is possible to prevent the memory element from being short-circuited in the initial state before energization. As a result, a highly reliable memory device and semiconductor device can be provided with high yield.

(Embodiment 6)
In this embodiment mode, reading or writing of data in the semiconductor device having the above structure is described.

  Data writing to the semiconductor device having the above structure can be performed by applying an electrical action. A case where data is written by applying an electrical action will be described (FIG. 3).

  In the case where data is written by applying an electrical action, one memory cell 721 is selected by the row decoder 724a, the column decoder 726a, and the selector 726c, and then data is stored in the memory cell 721 using a writing circuit. Write. Specifically, a large voltage is selectively applied to a desired portion of the organic compound layer 752 to flow a large current, thereby short-circuiting the first conductive layer 751b and the second conductive layer 753b.

  The shorted portion has a significantly lower electrical resistance than the other portions. In this manner, data is written by utilizing the change in the electrical resistance between the two conductive layers by applying an electrical action. For example, when an organic compound layer to which no electrical action is applied is set to “0” data, when writing “1” data, a large voltage is selectively applied to a desired portion of the organic compound layer to increase the data. By passing a current, the electrical resistance is reduced by short-circuiting.

  Next, an operation for reading data from the memory element will be described (see FIG. 9). Here, the reading circuit 726 b includes a resistance element 746 and a sense amplifier 747. Note that the structure of the reading circuit 726b is not limited to the above structure, and may have any structure.

  Data is read by applying a voltage between the first conductive layer 751b and the second conductive layer 753b and reading the electrical resistance of the organic compound layer 752. For example, as described above, when data is written by applying an electrical action, the resistance value Ra1 when no electrical action is applied, and when the two conductive films are short-circuited by applying an electrical action. The resistance value Rb1 satisfies Ra1> Rb1. Data is read by electrically reading such a difference in resistance value.

  For example, when data is read from a plurality of memory cells 721 included in the memory cell array 722 to the memory cell 721 arranged in the xth column and the yth row, first, the row decoder 724a, the column decoder 726a, and the selector 726c The bit line Bx in the column and the word line Wy in the y row are selected. Then, the organic compound layer included in the memory cell 721 and the resistance element 746 are connected in series. As described above, when a voltage is applied across the two resistance elements connected in series, the potential of the node α becomes a resistance-divided potential according to the resistance value Ra or Rb of the organic compound layer 752. The potential of the node α is supplied to the sense amplifier 747, and the sense amplifier 747 determines whether it has information “0” or “1”. Thereafter, a signal including information of “0” and “1” determined by the sense amplifier 747 is supplied to the outside.

  According to the above method, the state of the electrical resistance of the organic compound layer is read as a voltage value using the difference in resistance value and resistance division. However, a method of comparing current values may be used. This is because, for example, the current value Ia1 when no electrical action is applied to the organic compound layer and the resistance value Ib1 when the electrical action is applied to short-circuit the two conductive films satisfy Ia1 <Ib1. Is to be used. In this way, data may be read by electrically reading the difference in current value.

  Since a memory element having the above structure and a semiconductor device including the memory element are nonvolatile memories, a small, thin, and lightweight semiconductor device is provided without the need to incorporate a battery for holding data. Can do. In addition, data can be written (added) by using the insulating material used in the above embodiment as an organic compound layer, but data cannot be rewritten. Therefore, it is possible to provide a semiconductor device that prevents forgery and ensures security.

  Note that in this embodiment, a passive matrix memory element with a simple structure of a memory circuit and a semiconductor device including the memory element are described as examples; however, an active matrix memory circuit is provided. Even in this case, data can be written or read in the same manner.

  Here, in the case of the active matrix type, a case where data in the memory element portion is read by an electrical action will be described with reference to FIG.

  FIG. 14 shows a current-voltage characteristic 951 of a memory element unit in which data “0” is written to the memory element unit, a current-voltage characteristic 952 of memory element unit in which data “1” is written, and a resistance element 246. In this example, a transistor is used as the resistance element 246. Further, a case where 3 V is applied between the first conductive layer 243 and the second conductive layer 245 as an operation voltage when reading data will be described.

  In FIG. 14, in a memory cell having a memory element portion in which data of “0” is written, an intersection 954 between the current-voltage characteristic 951 of the memory element part and the current-voltage characteristic 953 of the transistor serves as an operating point. The potential of the node α is V1 (V). The potential of the node α is supplied to the sense amplifier 247. In the sense amplifier 247, the data stored in the memory cell is determined as “0”.

  On the other hand, in a memory cell having a memory element portion in which data of “1” is written, an intersection 955 between the current-voltage characteristic 952 of the memory element part and the current-voltage characteristic 953 of the transistor serves as an operating point. The potential of α is V2 (V) (V1> V2). The potential of the node α is supplied to the sense amplifier 247. In the sense amplifier 247, the data stored in the memory cell is determined as “1”.

  As described above, the data stored in the memory cell can be determined by reading the resistance-divided potential in accordance with the resistance value of the memory element portion 241.

  Note that this embodiment can be freely combined with the structures of the memory element and the semiconductor device including the memory element described in the above embodiment.

(Embodiment 7)
The configuration of the semiconductor device of this embodiment will be described with reference to FIG. As shown in FIG. 12, the semiconductor device 20 of the present invention has a function of communicating data without contact, and controls the power supply circuit 11, the clock generation circuit 12, the data demodulation / modulation circuit 13, and other circuits. A circuit 14, an interface circuit 15, a memory circuit 16, a data bus 17, an antenna (antenna coil) 18, a sensor 21, and a sensor circuit 22 are included.

The power supply circuit 11 is a circuit that generates various power supplies to be supplied to each circuit inside the semiconductor device 20 based on the AC signal input from the antenna 18. The clock generation circuit 12 is a circuit that generates various clock signals to be supplied to each circuit inside the semiconductor device 20 based on the AC signal input from the antenna 18. The data demodulation / modulation circuit 13 has a function of demodulating / modulating data communicated with the reader / writer 19. The control circuit 14 has a function of controlling the memory circuit 16. The antenna 18 has a function of transmitting / receiving electromagnetic waves or radio waves. The reader / writer 19 controls communication and control with the semiconductor device and processing related to the data. The semiconductor device is not limited to the above-described configuration, and may be a configuration in which other elements such as a power supply voltage limiter circuit and hardware dedicated to cryptographic processing are added.

The memory circuit 16 includes a memory element in which an organic compound layer or a phase change layer is sandwiched between a pair of conductive layers. Note that the memory circuit 16 may include only a memory element in which an organic compound layer or a phase change layer is sandwiched between a pair of conductive layers, or may include a memory circuit having another structure. The memory circuit having another configuration corresponds to, for example, one or more selected from DRAM, SRAM, FeRAM, mask ROM, PROM, EPROM, EEPROM, and flash memory.

The sensor 21 is formed of a semiconductor element such as a resistance element, a capacitive coupling element, an inductive coupling element, a photovoltaic element, a photoelectric conversion element, a thermoelectric element, a transistor, a thermistor, or a diode. The sensor circuit 22 detects a change in impedance, reactance, inductance, voltage or current, performs analog / digital conversion (A / D conversion), and outputs a signal to the control circuit 14.

(Embodiment 8)
According to the present invention, a semiconductor device that functions as a processor chip (also referred to as a wireless chip, a wireless processor, a wireless memory, or a wireless tag) can be formed. The semiconductor device of the present invention has a wide range of uses. For example, banknotes, coins, securities, certificates, bearer bonds, packaging containers, books, recording media, personal items, vehicles, foods, clothing It can be used in health supplies, daily necessities, medicines and electronic devices.

Banknotes and coins are money that circulates in the market, and include those that are used in the same way as money in a specific area (cash vouchers), commemorative coins, and the like. Securities refer to checks, securities, promissory notes, and the like, and can be provided with a processor chip 90 (see FIG. 13A). The certificate refers to a driver's license, a resident's card, and the like, and can be provided with a processor chip 91 (see FIG. 13B). Personal belongings refer to bags, glasses, and the like, and can be provided with a processor chip 96 (see FIG. 13C). Bearer bonds refer to stamps, gift cards, and various gift certificates. Packaging containers refer to wrapping paper such as lunch boxes, plastic bottles, and the like, and can be provided with a processor chip 93 (see FIG. 13D). Books refer to books, books, and the like, and can be provided with a processor chip 94 (see FIG. 13E). The recording medium refers to DVD software, a video tape, or the like, and can be provided with a processor chip 95 (see FIG. 13F). The vehicles refer to vehicles such as bicycles, ships, and the like, and can be provided with a processor chip 97 (see FIG. 13G). Foods refer to food products, beverages, and the like. Clothing refers to clothing, footwear, and the like. Health supplies refer to medical equipment, health equipment, and the like. Livingware refers to furniture, lighting equipment, and the like. Chemicals refer to pharmaceuticals, agricultural chemicals, and the like. Electronic devices refer to liquid crystal display devices, EL display devices, television devices (TV receivers, flat-screen TV receivers), mobile phones, and the like.

The semiconductor device of the present invention is fixed to an article by being mounted on a printed board, pasted on a surface, or embedded. For example, a book is embedded in paper, and a package made of an organic resin is embedded in the organic resin, and is fixed to each article. Since the semiconductor device of the present invention realizes a small size, a thin shape, and a light weight, the design of the article itself is not impaired even after being fixed to the article. In addition, by providing the semiconductor device of the present invention in bills, coins, securities, bearer bonds, certificates, etc., an authentication function can be provided, and if this authentication function is utilized, counterfeiting can be prevented. it can. In addition, by providing the semiconductor device of the present invention in packaging containers, recording media, personal items, foods, clothing, daily necessities, electronic devices, etc., the efficiency of a system such as an inspection system can be improved.

Next, one mode of an electronic device in which the semiconductor device of the present invention is mounted will be described with reference to the drawings. An electronic device illustrated here is a mobile phone, which includes housings 2700 and 2706, a panel 2701, a housing 2702, a printed wiring board 2703, operation buttons 2704, and a battery 2705 (see FIG. 12B). The panel 2701 is detachably incorporated in the housing 2702, and the housing 2702 is fitted on the printed wiring board 2703. The shape and dimensions of the housing 2702 are changed as appropriate in accordance with the electronic device in which the panel 2701 is incorporated. A plurality of packaged semiconductor devices are mounted on the printed wiring board 2703, and the semiconductor device of the present invention can be used as one of them. The plurality of semiconductor devices mounted on the printed wiring board 2703 have any one function of a controller, a central processing unit (CPU), a memory, a power supply circuit, a sound processing circuit, a transmission / reception circuit, and the like.

The panel 2701 is combined with the printed wiring board 2703 through the connection film 2708. The panel 2701, the housing 2702, and the printed wiring board 2703 are housed in the housings 2700 and 2706 together with the operation buttons 2704 and the battery 2705. A pixel region 2709 included in the panel 2701 is arranged so as to be visible from an opening window provided in the housing 2700.

As described above, the semiconductor device of the present invention is characterized in that it is small, thin, and lightweight, and the limited space inside the housings 2700 and 2706 of the electronic device can be effectively used due to the above characteristics. .

In addition, since the semiconductor device of the present invention includes a memory element having a simple structure in which an organic compound layer is sandwiched between a pair of conductive layers, an electronic device using an inexpensive semiconductor device can be provided. In addition, since the semiconductor device of the present invention can be easily integrated, an electronic device using the semiconductor device including a large-capacity memory circuit can be provided.

Further, a memory device included in the semiconductor device of the present invention writes data by an electric action, is nonvolatile, and can additionally write data. With the above feature, forgery due to rewriting can be prevented, and new data can be added and written. Therefore, an electronic device using a semiconductor device that achieves high functionality and high added value can be provided.

Note that the housings 2700 and 2706 are examples of the appearance of a mobile phone, and the electronic device according to this embodiment can be changed into various modes depending on functions and uses.

(Embodiment 9)
In this embodiment mode, reading or writing of data in the semiconductor device having the above structure is described.

  FIG. 18 shows a structural example of the semiconductor device of the present invention. A memory cell array 1722 in which memory cells 1721 are provided in a matrix, a circuit 1726 having a reading circuit and a writing circuit, a decoder 1724, and a decoder 1723 are provided. Have. Note that the structure of the memory device 1716 shown here is just an example, and other circuits such as a sense amplifier, an output circuit, a buffer, and an interface for exchanging with the outside may be included.

  The memory cell 1721 includes a first conductive layer connected to the bit line Bx (1 ≦ x ≦ m), a second conductive layer connected to the word line Wy (1 ≦ y ≦ n), and an organic compound layer And have. The organic compound layer is provided as a single layer or a stacked layer between the first conductive layer and the second conductive layer.

  First, operation performed when data is written to a memory element in a passive matrix memory device will be described with reference to FIGS. Data writing is performed by electrical action. First, a case of writing data by electrical action will be described. Writing is performed by changing the electrical characteristics of the memory cell. The initial state of the memory cell (the state where no electrical action is applied) is data “0”, and the state where the electrical characteristic is changed is “1”. To do.

  When writing data “1” to the memory cell 1721, first, the memory cell 1721 is selected by the decoders 1723 and 1724 and the selector 1725. Specifically, the decoder 1724 applies a predetermined voltage V2 to the word line W3 connected to the memory cell 1721. In addition, the bit line B 3 connected to the memory cell 1721 is connected to the circuit 1726 by the decoder 1723 and the selector 1725. Then, the write voltage V1 is output from the circuit 1726 to the bit line B3. Thus, the potential (voltage) Vw = V1−V2 is applied between the first conductive layer and the second conductive layer included in the memory cell 1721. By appropriately selecting the potential Vw, the organic compound layer provided between the conductive layers is changed physically or electrically, and data “1” is written. Specifically, at the read operation voltage, the electrical resistance between the first conductive layer and the second conductive layer in the data “1” state is significantly smaller than that in the data “0” state. It is good to change as follows. For example, it may be appropriately selected from the range of (V1, V2) = (0V, 5-15V), or (3-5V, -12--2V). The potential Vw may be 5 to 15 V, or −5 to −15 V.

  Note that data “1” is controlled not to be written in the memory cell connected to the non-selected word line and the non-selected bit line. For example, unselected word lines and unselected bit lines may be set in a floating state. The first conductive layer and the second conductive layer constituting the memory cell must have characteristics such as diode characteristics that can ensure selectivity.

  On the other hand, when data “0” is written to the memory cell 1721, it is not necessary to apply an electrical action to the memory cell 1721. In the circuit operation, for example, as in the case of writing “1”, the memory cells 1721 are selected by the decoders 1723 and 1724 and the selector 1725, but the output potential from the circuit 1726 to the bit line B3 is changed to the selected word line. The voltage is set to the same level as the potential of W3 or the potential of the non-selected word line and does not change the electrical characteristics of the memory cell 1721 between the first conductive layer and the second conductive layer constituting the memory cell 1721 (for example, −5 to 5 V) may be applied.

  Next, an operation of reading data from a memory element in a passive matrix memory device will be described (see FIG. 18). In reading data, the electrical characteristics between the first conductive layer and the second conductive layer constituting the memory cell are different between the memory cell having data “0” and the memory cell having data “1”. Use it. For example, the effective electrical resistance between the first conductive layer and the second conductive layer constituting the memory cell having data “0” (hereinafter simply referred to as the electrical resistance of the memory cell) is R0 at the read voltage. A method of reading data by using the difference in electric resistance when the electric resistance of the memory cell having data “1” is R1 in the read voltage will be described. Note that R1 << R0. As the structure of the reading / writing circuit, for example, a circuit 1726 using a resistance element 1746 and a differential amplifier 1747 shown in FIG. 18B can be considered. The resistance element 1746 has a resistance value Rr, and R1 <Rr <R0. A transistor 1748 may be used instead of the resistance element 1746, and a clocked inverter 1749 may be used instead of the differential amplifier (FIG. 18C). The clocked inverter 1749 receives a signal φ or an inverted signal φ that becomes Hi when reading is performed and becomes Lo when it is not performed. Of course, the circuit configuration is not limited to FIG.

  When data is read from the memory cell 1721, first, the memory cell 1721 is selected by the decoders 1723 and 1724 and the selector 1725. Specifically, a predetermined voltage Vy is applied to the word line Wy connected to the memory cell 1721 by the decoder 1724. In addition, the bit line Bx connected to the memory cell 1721 is connected to the terminal P of the circuit 1726 by the decoder 1723 and the selector 1725. As a result, the potential Vp of the terminal P becomes a value determined by resistance division by the resistance element 1746 (resistance value Rr) and the memory cell 1721 (resistance value R0 or R1). Therefore, when the memory cell 1721 has data “0”, Vp0 = Vy + (V0−Vy) × R0 / (R0 + Rr). When the memory cell 1721 has data “1”, Vp1 = Vy + (V0−Vy) × R1 / (R1 + Rr). As a result, in FIG. 18B, Vref is selected to be between Vp0 and Vp1, and in FIG. 18C, the change point of the clocked inverter is selected to be between Vp0 and Vp1. Thus, Lo / Hi (or Hi / Lo) is output as the output potential Vout according to the data “0” / “1”, and reading can be performed.

  For example, the differential amplifier is operated at Vdd = 3V, and Vy = 0V, V0 = 3V, and Vref = 1.5V. Assuming that R0 / Rr = Rr / R1 = 9, when the memory cell data is “0”, Vp0 = 2.7 V and Vout is Hi, and when the memory cell data is “1”, Vp1 = 0.3V and Lo is output as Vout. Thus, the memory cell can be read.

  According to the above method, the state of the electrical resistance of the organic compound layer is read as a voltage value using the difference in resistance value and resistance division. Of course, the reading method is not limited to this method. For example, in addition to using the difference in electrical resistance, reading may be performed using the difference in current value. In addition, when the electrical characteristics of the memory cell have data “0” and “1” and diode characteristics with different threshold voltages, reading may be performed using the threshold voltage difference.

  Next, an operation when data is written to the memory element in the active matrix memory device is described (see FIG. 19).

  FIG. 19 illustrates an example of a structure of the memory device described in this embodiment. The memory cell array 1232 includes memory cells 1231, circuits 1226, a decoder 1224, and a decoder 1223 provided in a matrix. The circuit 1226 includes a reading circuit and a writing circuit. Note that the structure of the memory device 1217 shown here is merely an example, and may include other circuits such as a sense amplifier, an output circuit, a buffer, and an interface for external communication.

  The memory cell array 1232 includes a first wiring connected to the bit line Bx (1 ≦ x ≦ m), a second wiring connected to the word line Wy (1 ≦ y ≦ n), a transistor 1210a, and a memory element 1215b. And a memory cell 1231. The memory element 1215b has a structure in which an organic compound layer is sandwiched between a pair of conductive layers. The gate electrode of the transistor is connected to the word line, either the source electrode or the drain electrode is connected to the bit line, and the other is connected to one of the two terminals of the memory element. The remaining one terminal of the memory element is connected to a common electrode (potential Vcom).

  First, an operation when data is written by electrical action will be described. Writing is performed by changing the electrical characteristics of the memory cell. The initial state of the memory cell (the state where no electrical action is applied) is data “0”, and the state where the electrical characteristic is changed is “1”. To do.

  Here, a case where data is written to the memory cell 1231 in the nth row and the mth column will be described. When data “1” is written to the memory cell 1231, first, the memory cell 1231 is selected by the decoders 1223 and 1224 and the selector 1225. Specifically, the decoder 1224 applies a predetermined voltage V22 to the word line Wn connected to the memory cell 1231. In addition, the bit line Bm connected to the memory cell 1231 is connected to the circuit 1226 having a reading circuit and a writing circuit by the decoder 1223 and the selector 1225. Then, the write voltage V21 is output from the circuit 1226 to the bit line B3.

  Thus, the transistor 1210a included in the memory cell is turned on, the bit line is electrically connected to the memory element 1215b, and a potential (voltage) of approximately Vw = Vcom−V21 is applied. Note that one electrode of the memory element 1215b is connected to a common electrode of the potential Vcom. By appropriately selecting the potential Vw, the organic compound layer provided between the conductive layers is changed physically or electrically, and data “1” is written. Specifically, at the read operation voltage, the electrical resistance between the first conductive layer and the second conductive layer in the data “1” state is significantly smaller than that in the data “0” state. It may be changed as described above, or it may be simply short-circuited. The potential may be appropriately selected from the range of (V21, V22, Vcom) = (5-15V, 5-15V, 0V), or (-12 to 0V, -12 to 0V, 3 to 5V). The potential Vw may be 5 to 15 V, or −5 to −15 V.

  Note that data “1” is controlled not to be written in the memory cell connected to the non-selected word line and the non-selected bit line. Specifically, a potential (for example, 0 V) for turning off the transistor of the memory cell to be connected is applied to the non-selected word line, and the non-selected bit line is in a floating state or approximately equal to Vcom. A potential may be applied.

  On the other hand, when data “0” is written in the memory cell 1231, it is not necessary to apply an electrical action to the memory cell 1231. In the circuit operation, for example, as in the case of writing “1”, the memory cells 1231 are selected by the decoders 1223 and 1224 and the selector 1225, but the output potential from the circuit 1226 to the bit line B3 is set to the same level as Vcom. Alternatively, the bit line B3 is brought into a floating state. As a result, a small potential (for example, −5 to 5 V) or a voltage (potential) is not applied to the memory element 1215b, so that electrical characteristics do not change and data “0” writing is realized.

  Next, an operation when data is read by electrical action will be described. Here, the circuit 1226 includes a resistance element 1246 and a differential amplifier 1247. Note that the structure of the circuit 1226 is not limited to the above structure, and may have any structure.

  Next, an operation when data is read by an electrical action in an active matrix memory device will be described. Data is read by utilizing the fact that the electrical characteristics of the memory element 1215b are different between the memory cell having the data “0” and the memory cell having the data “1”. For example, the electrical resistance of the memory element constituting the memory cell having data “0” is R0 at the read voltage, and the electrical resistance of the memory element constituting the memory cell having data “1” is R1 at the read voltage. A method of reading using the difference will be described. Note that R1 << R0. As the reading / writing circuit, for example, a circuit 1226 using a resistance element 1246 and a differential amplifier 1247 shown in FIG. The resistance element has a resistance value Rr, and R1 <Rr <R0. A transistor 1249 may be used instead of the resistance element 1246, and a clocked inverter 1248 may be used instead of the differential amplifier (FIG. 19C). Of course, the circuit configuration is not limited to FIG.

  When data is read from the memory cell 1231 in the xth row and the yth column, first, the memory cell 1231 is selected by the decoders 1223 and 1224 and the selector 1225. Specifically, the decoder 1224 applies a predetermined voltage V24 to the word line Wy connected to the memory cell 1231 to turn on the transistor 1210a. In addition, the bit line Bx connected to the memory cell 1231 is connected to the terminal P of the circuit 1226 by the decoder 1223 and the selector 1225. As a result, the potential Vp of the terminal P becomes a value determined by resistance division by the resistance element 1246 (resistance value Rr) and the memory element 1215b (resistance value R0 or R1) of Vcom and V0. Therefore, when the memory cell 1231 has data “0”, Vp0 = Vcom + (V0−Vcom) × R0 / (R0 + Rr). When the memory cell 1231 has data “1”, Vp1 = Vcom + (V0−Vcom) × R1 / (R1 + Rr). As a result, in FIG. 19B, Vref is selected to be between Vp0 and Vp1, and in FIG. 19C, the change point of the clocked inverter is selected to be between Vp0 and Vp1. Thus, Lo / Hi (or Hi / Lo) is output as the output potential Vout according to the data “0” / “1”, and reading can be performed.

  For example, the differential amplifier is operated at Vdd = 3V, and Vcom = 0V, V0 = 3V, and Vref = 1.5V. Assuming that R0 / Rr = Rr / R1 = 9 and the on-resistance of the transistor 1210a can be ignored, when the data in the memory cell is “0”, Vp0 = 2.7V and Vout is output as Hi. When the data of “1” is “1”, Vp1 = 0.3 V and Lo is output as Vout. Thus, the memory cell can be read.

  According to the above method, the voltage value is read by utilizing the difference in resistance value of the memory element 1215b and the resistance division. Of course, the reading method is not limited to this method. For example, in addition to using the difference in electrical resistance, reading may be performed using the difference in current value. In addition, when the electrical characteristics of the memory cell have data “0” and “1” and diode characteristics with different threshold voltages, reading may be performed using the threshold voltage difference.

  Since the memory element having the above structure and the memory device including the memory element are nonvolatile memories, there is no need to incorporate a battery for holding data, and a small, thin, lightweight memory device and semiconductor device Can be provided. In addition, data can be written (added) by using the insulating material used in the above embodiment as an organic compound layer, but data cannot be rewritten. Therefore, it is possible to provide a storage device and a semiconductor device that prevent forgery and ensure security.

  Note that this embodiment can be freely combined with the structures of the memory element, the memory device including the memory element, and the semiconductor device described in the above embodiment.

In this embodiment, an example in which a memory element using the present invention is manufactured and its characteristics are evaluated is shown.

First, memory elements (samples 1 to 3) having no insulator were manufactured as comparative examples, and a writing voltage and a current value immediately before writing were measured. The memory elements of Samples 1 to 3 have a stacked structure of a first conductive layer, an organic compound layer, and a second conductive layer, a titanium film having a thickness of 100 nm as the first conductive layer, and an organic compound layer. An NPB film having a thickness of 8 nm was stacked, and an aluminum film having a thickness of 200 nm was formed as the second conductive layer. Samples 1 to 3 have a square memory element shape, sample 1 and sample 2 are memory elements with a side length of 10 μm, and sample 3 is a memory element with a side length of 20 μm. . In this specification, a memory element is a stacked region including at least a first conductive layer, an organic compound layer, and a second conductive layer, and the shape of the memory element is the shape of the stacked body. FIG. 20A shows the writing voltage and current of Sample 1, FIG. 20B shows Sample 2 and FIG. 20C shows Sample 3 writing voltage and current. As a writing method at this time, sweep measurement was performed in which the current value of the sample at each voltage was measured while increasing the voltage from 0V to 0.1V.

Although the memory elements of Sample 1 and Sample 2 in FIGS. 20A and 20B have the same structure and the same size, write voltage and current characteristics (also referred to as IV characteristics) are obtained. They are different and are not consistent. Therefore, the writing behavior varies among similar storage elements. Further, even if the memory element is compared with FIG. 20C which is the IV characteristic of the sample 3 having a size different from 20 μm × 20 μm, the writing of the sample 1 and the sample 2 shown in FIGS. The behavior is not consistent and varies.

FIG. 21 shows a cross-sectional view (a STEM photograph observed by a transmission electron microscope (TEM) method) of the memory element (sample 4) after writing. The memory element of Sample 4 shown in FIG. 21 is composed of a laminate of a titanium film 30 that is a lower electrode layer, an NPB film 31 that is an organic compound layer, and an aluminum film 32 that is an upper electrode layer. An aluminum film 33 is present.

As shown in FIG. 21, the aluminum film as the upper electrode layer is broken by the concentration of electric power. There is a possibility that a short circuit between the upper electrode and the lower electrode occurs around the broken aluminum film. The shape of the partition wall 34 and the shape of the titanium film 30 which is the lower electrode layer are also affected by heat and charge generated when the upper electrode layer is broken, and the shape is changed.

On the other hand, a memory element having an insulator was manufactured as in the present invention, and writing voltage and current were measured. The sample includes a first conductive layer (titanium film) in which an insulator is provided as a thin-film buffer layer, an insulating layer (lithium fluoride film having a thickness of 1 nm), and an organic compound layer (NPB film having a thickness of 10 nm). , And a sample (sample 5 and sample 6) having a laminated structure of the second conductive layer (aluminum film), and a first conductive layer in which an insulator is mixed in an organic compound as in the present invention ( Titanium film), organic compound (NPB) layer (thickness 20 nm) containing an insulator (lithium fluoride) (volume ratio of lithium fluoride and NPB is 1: 1), and second conductive layer (aluminum film) Samples (Sample 7 and Sample 8) having the laminated structure were prepared. Sample 5 and sample 7 had a memory element size of 2 μm × 2 μm, and sample 6 and sample 8 had a memory element size of 3 μm × 3 μm. FIG. 22 shows the writing voltage and current value immediately before writing of Samples 5 to 8. In FIG. 22, each sample 5 to 8 is manufactured by measuring a plurality of elements under the same conditions, and the elements manufactured under the same conditions are indicated by the same dots in the drawing. In FIG. 22, the measurement data of samples 5 to 8 are represented by black dots, sample 6 by white dots, sample 7 by black triangle dots, and sample 8 by white triangle dots.

As shown in FIG. 22, the memory elements (Sample 7 and Sample 8) having an organic compound layer containing an insulator using the present invention have little variation in writing voltage and current. Some memory elements (Sample 5 and Sample 6) having a thin insulating buffer layer between the first conductive layer and the organic compound layer had a high writing voltage.

In manufacturing a memory element, abnormal element characteristics may be exhibited when film forming conditions are poor. By forming the film by including an insulator in the organic compound layer as in the present invention, the form (morphology) of the organic compound layer can be stabilized, and the uniformity of the film thickness can be improved. Therefore, the element characteristics are also stabilized without variation. Furthermore, since it is not necessary to form the insulator and the organic compound layer in separate steps, the steps can be simplified.

Next, memory elements (samples 9 to 11) each having an organic compound layer containing an insulator of the present invention were manufactured, and a writing voltage and a current value immediately before writing were measured. As a sample, a first conductive layer (titanium film), an organic compound (NPB) layer including an insulator (lithium fluoride) (film thickness 20 nm) (volume ratio of lithium fluoride to NPB is 1: 1), and second Sample 9 having a laminated structure of a conductive layer (aluminum film), a first conductive layer (titanium film), an insulating layer (calcium fluoride film having a thickness of 1 nm), and an organic compound (NPB) containing an insulator (calcium fluoride) ) Layer (film thickness 20 nm) (volume ratio of calcium fluoride and NPB is 1: 1), and sample 10 having a laminated structure of the second conductive layer (aluminum film), the first conductive layer (titanium film), Sample of laminated structure of organic compound (TPAQn) layer (thickness 12 nm) containing insulator (lithium fluoride) (volume ratio of lithium fluoride and TPAQn is 1: 1) and second conductive layer (aluminum film) 11 was produced. The sample 10 is an example in which a thin-film insulating layer and an organic compound layer containing an insulator are stacked and have a concentration gradient of the insulator in the memory element.

FIG. 23A shows the writing voltage and current of Sample 9, FIG. 23B shows Sample 10 and FIG. 24 shows Sample 11 writing voltage and current. As a writing method at this time, sweep measurement was performed in which the current value of the sample at each voltage was measured while increasing the voltage from 0V to 0.1V. As shown in FIGS. 23A, 23B, and 24, in each of the samples 9 to 11, the writing current and voltage characteristics (IV characteristics) of the elements are stable without variation, and the behavior can be stabilized. You can see that Further, no resistance remains in the memory element after writing, and the resistance is almost lost.

First conductive layer (titanium film) using the present invention having the same structure as sample 11, organic compound (TPAQn) layer (thickness 12 nm) containing an insulator (lithium fluoride) (of lithium fluoride and TPAQn The volume ratio is 1: 1), and the result of writing in the memory element (sample 12) having a laminated structure of the second conductive layer (aluminum film) is shown. Note that as a writing method at this time, writing to the memory element was performed by applying a pulse voltage of 10 ms ⁻¹ . FIG. 25 shows the number of write elements for each write voltage. It can be seen that the memory element is written in a range of a certain write voltage. Therefore, it was confirmed that the element using the present invention can be sufficiently used as a memory element.

As described above, the memory element of the present invention can stabilize the characteristics such as the write voltage of the memory element without variation, and can perform normal writing in each element. In addition, since the carrier injection property is improved by the tunnel current of the mixed layer of the inorganic insulator and the organic compound, the organic compound layer can be thickened. Therefore, it is possible to prevent the memory element from being short-circuited in the initial state before energization. As a result, a highly reliable memory device and semiconductor device can be provided with high yield.

The conceptual diagram explaining this invention. 3A and 3B illustrate a memory device of the present invention. 3A and 3B illustrate a memory device of the present invention. 3A and 3B illustrate a memory device of the present invention. 3A and 3B illustrate a memory device of the present invention. 3A and 3B illustrate a memory device of the present invention. 3A and 3B illustrate a memory device of the present invention. 3A and 3B illustrate a memory device of the present invention. 3A and 3B illustrate a memory device of the present invention. 6A and 6B illustrate a semiconductor device of the present invention. 6A and 6B illustrate a semiconductor device of the present invention. 6A and 6B illustrate a semiconductor device of the present invention. 8A and 8B illustrate an application example of a semiconductor device of the invention. 3A and 3B illustrate a memory device of the present invention. FIG. 6 illustrates a droplet discharge device that can be applied to the present invention. 3A and 3B illustrate a memory device of the present invention. 3A and 3B illustrate a memory device of the present invention. 3A and 3B illustrate a memory device of the present invention. 3A and 3B illustrate a memory device of the present invention. Experimental data for comparative examples Sectional photograph of the memory element of a comparative example. 3 is a characteristic graph of a memory element in Example 1. 3 is a characteristic graph of a memory element in Example 1. 3 is a characteristic graph of a memory element in Example 1. 3 is a characteristic graph of a memory element in Example 1.

Claims (12)

    A semiconductor device comprising: a memory element including an organic compound layer including an insulator over a first conductive layer; and a second conductive layer over the organic compound layer including the insulator. A storage element including an organic compound layer including an insulator on the first conductive layer; and a second conductive layer on the organic compound layer including the insulator;
The semiconductor device according to claim 1, wherein the insulator in the organic compound layer including the insulator has a concentration gradient.     3. The organic compound layer according to claim 2, wherein the concentration of the insulator in the organic compound layer including the insulator is such that the interface between the organic compound layer including the insulator and the first conductive layer includes the insulator. A semiconductor device characterized by being higher than an interface between the layer and the second conductive layer.     3. The organic compound layer according to claim 2, wherein the concentration of the insulator in the organic compound layer including the insulator is such that the interface between the organic compound layer including the insulator and the second conductive layer includes the insulator. A semiconductor device characterized by being higher than an interface between the layer and the first conductive layer.     3. The concentration of the insulator in the organic compound layer containing the insulator according to claim 2 is set such that an interface between the organic compound layer containing the insulator and the first conductive layer, and an organic compound layer containing the insulator The semiconductor device is characterized in that the interface with the second conductive layer is the highest in the organic compound layer containing the insulator.     6. The semiconductor device according to claim 1, wherein the insulator has a particle shape.     7. The first conductive layer and the second conductive layer are in partial contact with each other after writing by applying an electrical action to the memory element. 8. Semiconductor device.     7. The semiconductor device according to claim 1, wherein the thickness of the organic compound layer including the insulator is changed after writing by applying an electrical action to the memory element. Forming a first conductive layer;
Forming an organic compound layer containing an insulator on the first conductive layer;
A manufacturing method of a semiconductor device, wherein a memory element is formed by forming a second conductive layer over an organic compound layer containing the insulator. Forming a first conductive layer;
Discharging a composition containing an insulator and an organic compound on the first conductive layer, solidifying to form an organic compound layer containing an insulator;
A manufacturing method of a semiconductor device, wherein a memory element is formed by forming a second conductive layer over an organic compound layer containing the insulator. Forming a first conductive layer;
Forming an organic compound layer on the first conductive layer;
Forming an organic compound layer containing an insulator by adding an insulator to the organic compound layer;
A manufacturing method of a semiconductor device, wherein a memory element is formed by forming a second conductive layer over an organic compound layer containing the insulator. In any one of Claims 9 thru | or 11,
The method for manufacturing a semiconductor device, wherein the insulator in the organic compound layer including the insulator is formed with a concentration gradient.