JP2006319211A - Packaging structure of semiconductor chip - Google Patents

Packaging structure of semiconductor chip Download PDF

Info

Publication number
JP2006319211A
JP2006319211A JP2005141764A JP2005141764A JP2006319211A JP 2006319211 A JP2006319211 A JP 2006319211A JP 2005141764 A JP2005141764 A JP 2005141764A JP 2005141764 A JP2005141764 A JP 2005141764A JP 2006319211 A JP2006319211 A JP 2006319211A
Authority
JP
Japan
Prior art keywords
connection pad
semiconductor chip
vibration direction
side connection
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2005141764A
Other languages
Japanese (ja)
Inventor
Naoki Sakota
直樹 迫田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP2005141764A priority Critical patent/JP2006319211A/en
Publication of JP2006319211A publication Critical patent/JP2006319211A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

Abstract

<P>PROBLEM TO BE SOLVED: To provide a packaging structure of a semiconductor chip which can prevent lowering of yield caused by damage of the semiconductor chip in supersonic flip chip junction without changing design of the semiconductor chip, and can improve junction strength between each connection pad located in both ends of a vibration direction and each projection electrode facing each connection pad. <P>SOLUTION: Supersonic vibration is applied to a semiconductor chip 31 with a projection electrode 33 of the semiconductor chip 31 pressed to a substrate side connection pad 34 of a circuit substrate 32, and the projection electrode 33 and the substrate side connection pad 34 are joined. A plurality of projection electrodes 33 and a plurality of substrate side connection pads 34 are arranged along a vibration direction A, and each projection electrode 33 and each substrate side connection pad 34 are opposed. An extension 47 extending from each substrate side connection pad 34 along the vibration direction A to directions far from each other continues to each substrate side connection pad 34 at both ends. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、半導体チップが回路基板に実装されて構成される半導体チップの実装構造に関し、詳しくは、超音波フリップチップ接合によって半導体チップと回路基板とが接合されて構成される半導体チップの実装構造に関する。   TECHNICAL FIELD The present invention relates to a semiconductor chip mounting structure in which a semiconductor chip is mounted on a circuit board, and more specifically, a semiconductor chip mounting structure in which a semiconductor chip and a circuit board are bonded by ultrasonic flip chip bonding. About.

近年、携帯電話機に代表される携帯機器などの電子機器は、急速に普及している。電子機器の普及の原動力として、1つには、電子機器の飛躍的な小型化、軽量化および薄型化がある。このような電子機器の小型化、軽量化および薄型化に伴って、電子機器に使用される半導体装置は、小型化および薄型化が要求されている。   In recent years, electronic devices such as mobile devices typified by mobile phones are rapidly spreading. One of the driving forces for the spread of electronic devices is the dramatic reduction in size, weight and thickness of electronic devices. With the reduction in size, weight, and thickness of electronic devices, semiconductor devices used in electronic devices are required to be reduced in size and thickness.

半導体装置は、半導体チップが回路基板に実装されて構成される。半導体チップと回路基板とは、たとえばフリップチップ接合によって接合される。フリップチップ接合では、半導体チップの能動素子面が回路基板に向けられて、半導体チップの接続パッドと回路基板の接続パッドとが、導電性を有する接続部材である突起電極を介して接合される。このようなフリップチップ接合によれば、半導体装置に対する小型化および薄型化の要求に応えることができ、しかも生産効率を高くすることができる。   A semiconductor device is configured by mounting a semiconductor chip on a circuit board. The semiconductor chip and the circuit board are bonded by, for example, flip chip bonding. In flip-chip bonding, the active element surface of a semiconductor chip is directed to a circuit board, and the connection pads of the semiconductor chip and the connection pads of the circuit board are bonded via protruding electrodes that are conductive connection members. According to such flip chip bonding, it is possible to meet the demands for miniaturization and thinning of the semiconductor device, and to increase the production efficiency.

フリップチップ接合の1つとして、超音波振動を併用した超音波フリップチップ接合がある。超音波フリップチップ接合は、接合に要する時間を短縮することができるという利点を有する。このような超音波フリップチップ接合は、昨今、多用されるようになっている。   As one of flip chip bonding, there is an ultrasonic flip chip bonding using ultrasonic vibration together. Ultrasonic flip chip bonding has the advantage that the time required for bonding can be shortened. Such ultrasonic flip chip bonding has been frequently used nowadays.

図14は、従来の技術の半導体チップの実装構造を示す断面図である。図15は、回路基板1を示す正面図である。従来の技術の実装構造を有する半導体装置2は、半導体チップ3と回路基板1とを含む。半導体チップ3は、突起電極4を有する。回路基板1は、接続パッド5が絶縁基材6に設けられて構成される。半導体装置2は、半導体チップ3が回路基板1に対して図15において仮想線7で示される位置に配置され、半導体チップ3の突起電極4と回路基板1の接続パッド5とが接合されて、構成される。   FIG. 14 is a cross-sectional view showing a conventional semiconductor chip mounting structure. FIG. 15 is a front view showing the circuit board 1. A semiconductor device 2 having a conventional mounting structure includes a semiconductor chip 3 and a circuit board 1. The semiconductor chip 3 has a protruding electrode 4. The circuit board 1 is configured by providing connection pads 5 on an insulating base 6. In the semiconductor device 2, the semiconductor chip 3 is disposed at a position indicated by a virtual line 7 in FIG. 15 with respect to the circuit board 1, and the protruding electrode 4 of the semiconductor chip 3 and the connection pad 5 of the circuit board 1 are joined. Composed.

絶縁基材6は、セラミック基板、あるいは有機基板である。有機基板は、樹脂材料から成り、セラミック基板よりも低価格である。回路基板1のコストを低下させるために、絶縁基材6として、有機基板が使用される傾向がある。   The insulating base 6 is a ceramic substrate or an organic substrate. The organic substrate is made of a resin material and is less expensive than a ceramic substrate. In order to reduce the cost of the circuit board 1, an organic substrate tends to be used as the insulating base 6.

図16は、半導体チップ3に押圧力および超音波振動が印加されている状態を示す断面図である。半導体チップ3の突起電極4と回路基板1の接続パッド5とは、超音波フリップチップ接合によって接合される。   FIG. 16 is a cross-sectional view showing a state in which a pressing force and ultrasonic vibration are applied to the semiconductor chip 3. The protruding electrodes 4 of the semiconductor chip 3 and the connection pads 5 of the circuit board 1 are bonded by ultrasonic flip chip bonding.

詳細に述べると、まず、半導体チップ3を接合ツール8に装着し、半導体チップ3の突起電極4と回路基板1の接続パッド5とが対向するように、半導体チップ3と回路基板1とを位置合せする。次に、半導体チップ3を回路基板1に載置して、半導体チップ3の突起電極4と回路基板1の接続パッド5とを当接させる。この後、接合ツール8を介して半導体チップ3に、半導体チップ3から回路基板1に向かう方向9の押圧力を印加するとともに、回路基板1に平行な方向10に振動する超音波振動を印加する。これによって、突起電極4と接続パッド5とが擦れ合い、突起電極4と接続パッド5との間の汚染層が除去されて、突起電極4と接続パッド5とが接合される。   More specifically, first, the semiconductor chip 3 is mounted on the bonding tool 8, and the semiconductor chip 3 and the circuit board 1 are positioned so that the protruding electrode 4 of the semiconductor chip 3 and the connection pad 5 of the circuit board 1 face each other. Match. Next, the semiconductor chip 3 is placed on the circuit board 1, and the protruding electrodes 4 of the semiconductor chip 3 and the connection pads 5 of the circuit board 1 are brought into contact with each other. Thereafter, a pressing force in a direction 9 from the semiconductor chip 3 toward the circuit board 1 is applied to the semiconductor chip 3 via the bonding tool 8 and an ultrasonic vibration that vibrates in a direction 10 parallel to the circuit board 1 is applied. . As a result, the protruding electrode 4 and the connection pad 5 are rubbed with each other, the contamination layer between the protruding electrode 4 and the connection pad 5 is removed, and the protruding electrode 4 and the connection pad 5 are joined.

図17は、超音波フリップチップ接合時の絶縁基材6の状態を示す断面図である。超音波フリップチップ接合時、半導体チップ3への押圧力および超音波振動に起因して、絶縁基材6が変形して、図17に示すように、接続パッド5が絶縁基材6に食い込んでしまうことがある。この場合、突起電極4と接続パッド5との相対振動が小さくなり、突起電極4と接続パッド5とを接合することが困難になるという問題がある。有機基板は、セラミック基板に比べて変形しやすいので、有機基板が絶縁基材6として使用される場合は、セラミック基板が絶縁基材6として使用される場合に比べて、前記問題が顕著になる。   FIG. 17 is a cross-sectional view showing a state of the insulating substrate 6 at the time of ultrasonic flip-chip bonding. At the time of ultrasonic flip chip bonding, the insulating base 6 is deformed due to the pressing force and ultrasonic vibration on the semiconductor chip 3, and the connection pad 5 bites into the insulating base 6 as shown in FIG. May end up. In this case, there is a problem that relative vibration between the protruding electrode 4 and the connection pad 5 is reduced, and it becomes difficult to join the protruding electrode 4 and the connection pad 5. Since the organic substrate is more easily deformed than the ceramic substrate, the above problem becomes more pronounced when the organic substrate is used as the insulating base 6 than when the ceramic substrate is used as the insulating base 6. .

このような問題を解決するためには、半導体チップに印加する超音波振動を強くすればよいけれども、この場合、半導体チップの入出力電極にクラックが生じる可能性が高くなる。   In order to solve such a problem, the ultrasonic vibration applied to the semiconductor chip may be strengthened. However, in this case, there is a high possibility that cracks will occur in the input / output electrodes of the semiconductor chip.

この点を考慮して、特許文献1に開示される技術では、半導体チップには、入出力電極からみて外周部寄りにダミー電極が形成され、ダミー電極にも、突起電極であるバンプが設けられる。この技術では、超音波フリップチップ接合時に、ダミー電極でクラックを生じさせて、入出力電極のクラックを防止する。したがって超音波振動を強くしても、半導体チップの破損に起因する歩留まりの低下を防ぐことができる。このような技術を用いることによって、半導体装置2の歩留まりの低下を防いで、突起電極4と接続パッド5との接合強度を向上させることができる。   In consideration of this point, in the technique disclosed in Patent Document 1, a dummy electrode is formed near the outer periphery of the semiconductor chip as viewed from the input / output electrodes, and bumps that are protruding electrodes are also provided on the dummy electrode. . With this technique, cracks are generated in the dummy electrodes during ultrasonic flip chip bonding, thereby preventing cracks in the input / output electrodes. Therefore, even if the ultrasonic vibration is increased, it is possible to prevent the yield from being reduced due to the damage of the semiconductor chip. By using such a technique, it is possible to prevent the yield of the semiconductor device 2 from being lowered and to improve the bonding strength between the protruding electrode 4 and the connection pad 5.

特開平8−330880号公報JP-A-8-330880

前記特許文献1に開示される技術では、接合強度を向上させるためにダミー電極が設けられるので、半導体チップの寸法が必然的に大きくなり、半導体チップを含む半導体装置が大型化してしまうという問題がある。また、新たに半導体チップを設計し直す必要があり、コストが増大してしまうという問題がある。   In the technique disclosed in Patent Document 1, since a dummy electrode is provided in order to improve the bonding strength, the size of the semiconductor chip is inevitably increased, and the semiconductor device including the semiconductor chip is increased in size. is there. Moreover, it is necessary to redesign a semiconductor chip, and there is a problem that the cost increases.

本願発明者が検討した結果、複数の突起電極が超音波振動の振動方向に沿って並ぶとともに、複数の接続パッドが振動方向に沿って並び、各突起電極と各接続パッドとが対向する場合、振動方向に関する位置によって、突起電極と接続パッドとの接合強度がばらつく傾向があることが判明した。   As a result of examination by the inventors of the present application, a plurality of protruding electrodes are arranged along the vibration direction of ultrasonic vibration, and a plurality of connection pads are arranged along the vibration direction, and each protruding electrode and each connection pad face each other. It was found that the bonding strength between the protruding electrode and the connection pad tends to vary depending on the position in the vibration direction.

図18は、超音波振動の振動方向に沿って並ぶ各突起電極と各接続パッドとの接合強度を示す図である。図18において、横軸は、接続パッドの位置を示し、縦軸は、接合強度を示す。ここでは、説明の便宜上、振動方向に沿って4つの接続パッドが並ぶ場合を想定する。図18では、振動方向の両端P1,P4に位置する各接続パッドとこれらの各接続パッドに対向する各突起電極との接合強度を示すとともに、振動方向の両端P1,P4間の中間P2,P3に位置する各接続パッドとこれらの各接続パッドに対向する各突起電極との接合強度を示す。   FIG. 18 is a diagram showing the bonding strength between each protruding electrode and each connection pad arranged along the vibration direction of ultrasonic vibration. In FIG. 18, the horizontal axis indicates the position of the connection pad, and the vertical axis indicates the bonding strength. Here, for convenience of explanation, it is assumed that four connection pads are arranged along the vibration direction. FIG. 18 shows the bonding strength between each connection pad located at both ends P1 and P4 in the vibration direction and each protruding electrode facing each connection pad, and intermediate P2 and P3 between both ends P1 and P4 in the vibration direction. The bonding strength between each connection pad located at と and each protruding electrode facing each connection pad is shown.

この図18に示すように、従来の技術では、振動方向に関する位置によって、接合強度にばらつきがある。具体的には、前記両端P1,P4の各接続パッドは、前記中間P2,P3の各接続パッドに比べて、突起電極との接合強度が低くなる。すなわち前記両端P1,P4の各接続パッドは、前記中間P2,P3の各接続パッドに比べて、突起電極との接合性が劣り、その結果、電気的な接続に対する信頼性が低下する。   As shown in FIG. 18, in the conventional technique, the bonding strength varies depending on the position in the vibration direction. Specifically, each connection pad at both ends P1, P4 has a lower bonding strength with the protruding electrode than each connection pad at the intermediate P2, P3. That is, the connection pads at both ends P1, P4 are inferior in bonding property to the protruding electrodes as compared with the connection pads at the intermediate points P2, P3, and as a result, the reliability of electrical connection is lowered.

このような点を考慮すると、前記両端P1,P4の各接続パッドとこれらの各接続パッドに対向する各突起電極との接合強度を向上させることが望まれる。   In consideration of such points, it is desired to improve the bonding strength between the connection pads at both ends P1 and P4 and the protruding electrodes facing the connection pads.

図19は、超音波フリップチップ接合時における接続パッド5の挙動を示す模式図である。この図19を参照して、接合強度のばらつきの理由を説明する。ここでは、説明の便宜上、超音波振動の振動方向Aに沿って4つの接続パッド5が並ぶ場合を想定する。以下、4つの接続パッド5を、振動方向一方A1側から順に、第1〜第4接続パッド11〜14と称する場合がある。第1および第4接続パッド11,14は、前記両端P1,P4の各接続パッドに相当し、第2および第3接続パッド12,13は、前記中間P2,P3の各接続パッドに相当する。各接続パッド11〜14は剛体とみなし、絶縁基材6は弾性体とみなす。   FIG. 19 is a schematic diagram showing the behavior of the connection pad 5 at the time of ultrasonic flip-chip bonding. The reason for the variation in bonding strength will be described with reference to FIG. Here, for convenience of explanation, it is assumed that four connection pads 5 are arranged along the vibration direction A of ultrasonic vibration. Hereinafter, the four connection pads 5 may be referred to as first to fourth connection pads 11 to 14 in order from the vibration direction one A1 side. The first and fourth connection pads 11 and 14 correspond to the connection pads at both ends P1 and P4, and the second and third connection pads 12 and 13 correspond to the connection pads at the intermediate points P2 and P3. Each connection pad 11-14 is regarded as a rigid body, and the insulating base 6 is regarded as an elastic body.

超音波フリップチップ接合時、接続パッド5は、突起電極4から押圧力および摩擦力を受ける。これによって接続パッド5には、予め定める軸線まわりの回転モーメントが働く。前記予め定める軸線は、接続パッド5の絶縁基材6に対向する面内で、振動方向Aに垂直な方向に延び、接続パッド5の振動方向A中央に位置する軸線である。   At the time of ultrasonic flip chip bonding, the connection pad 5 receives a pressing force and a frictional force from the protruding electrode 4. As a result, a rotational moment around a predetermined axis acts on the connection pad 5. The predetermined axis is an axis that extends in a direction perpendicular to the vibration direction A and is located at the center of the vibration direction A of the connection pad 5 within the surface of the connection pad 5 that faces the insulating substrate 6.

たとえば第2接続パッド12に着目する。回路基板1に対して半導体チップ3が振動方向他方A2に変位するとき、第2接続パッド12には、この第2接続パッド12の振動方向他方A2側の端部を絶縁基材6に近接させる方向に回転モーメント16が働く。これによって、第2接続パッド12の振動方向一方A1側の端部が絶縁基材6から浮き上がろうとし、第2接続パッド12の振動方向他方A2側の端部が絶縁基材6に沈み込もうとする。   For example, attention is focused on the second connection pad 12. When the semiconductor chip 3 is displaced in the other vibration direction A <b> 2 with respect to the circuit board 1, the end of the second connection pad 12 on the other vibration direction A <b> 2 side is brought close to the insulating base 6. A rotational moment 16 acts in the direction. As a result, the end of the second connection pad 12 on the one side in the vibration direction A1 side tends to float from the insulating base material 6, and the end of the second connection pad 12 on the other side in the vibration direction A2 side sinks into the insulating base material 6. Try to include.

このとき、第1接続パッド11にも同様に、回転モーメント17が働く。これによって第1接続パッド11の振動方向他方A2側の端部は、絶縁基材6に沈み込もうとする。また第3接続パッド13にも同様に、回転モーメント18が働く。これによって第3接続パッド13の振動方向一方A1側の端部が絶縁基材6から浮き上がろうとする。   At this time, the rotational moment 17 similarly acts on the first connection pad 11. As a result, the end of the first connection pad 11 on the other vibration direction A2 side tends to sink into the insulating substrate 6. Similarly, the rotational moment 18 acts on the third connection pad 13. As a result, the end of the third connection pad 13 on the one vibration direction side A <b> 1 side tends to float up from the insulating base material 6.

したがって第2接続パッド12では、両隣の第1および第3接続パッド11,13の存在によって、この第2接続パッド12に働く回転モーメント16が相殺される。これによって、見掛け上、前記回転モーメント16は小さくなり、第2接続パッド12の変位が抑えられる。   Therefore, in the second connection pad 12, the rotational moment 16 acting on the second connection pad 12 is canceled by the presence of the first and third connection pads 11 and 13 adjacent to each other. Thereby, the rotational moment 16 is apparently reduced, and the displacement of the second connection pad 12 is suppressed.

第3接続パッド13に関しても、第2接続パッド12の場合と同様に、回転モーメント18が働くけれども、両隣の第2および第4接続パッド12,14の存在によって、この第3接続パッド13に働く回転モーメント18は相殺される。これによって、見掛け上、前記回転モーメント18は小さくなり、第3接続パッド13の変位が抑えられる。   As for the third connection pad 13, as in the case of the second connection pad 12, although the rotational moment 18 works, the third connection pad 13 works due to the presence of the adjacent second and fourth connection pads 12 and 14. The rotational moment 18 is canceled out. Thereby, the rotational moment 18 is apparently reduced, and the displacement of the third connection pad 13 is suppressed.

第1接続パッド11に関しては、振動方向他方A2側に第2接続パッド12が存在するけれども、振動方向一方A1側には接続パッドが存在しないので、この第1接続パッド11に働く回転モーメント17の相殺はできない。したがって第1接続パッド11は変位する。具体的には、第1接続パッド11の振動方向一方A1側の端部が絶縁基材6から浮き上がる。   Regarding the first connection pad 11, the second connection pad 12 exists on the other side A <b> 2 in the vibration direction, but there is no connection pad on the one side A <b> 1 in the vibration direction, and therefore the rotational moment 17 acting on the first connection pad 11 is not present. It cannot be offset. Accordingly, the first connection pad 11 is displaced. Specifically, the end portion on the one side A <b> 1 side in the vibration direction of the first connection pad 11 is lifted from the insulating base material 6.

第4接続パッド14に関しては、振動方向一方A1側に第3接続パッド13が存在するけれども、振動方向他方A2側には接続パッドが存在しないので、この第4接続パッド14に働く回転モーメント19の相殺はできない。したがって第4接続パッド14は変位する。具体的には、第4接続パッド14の振動方向他方A2側の端部が絶縁基材6に沈み込む。   Regarding the fourth connection pad 14, the third connection pad 13 exists on the one side A <b> 1 in the vibration direction, but there is no connection pad on the other side A <b> 2 in the vibration direction. It cannot be offset. Accordingly, the fourth connection pad 14 is displaced. Specifically, the end of the fourth connection pad 14 on the other vibration direction A2 side sinks into the insulating substrate 6.

このように、回路基板1に対して半導体チップ3が振動方向他方A2に変位するとき、第2および第3接続パッド12,13の変位は抑えられるけれども、第1および第4接続パッド11,14は変位する。また振動方向一方A1に変位する場合も、振動方向他方A2に変位する場合と同様に、第2および第3接続パッド12,13の変位は抑えられるけれども、第1および第4接続パッド11,14は変位する。   Thus, when the semiconductor chip 3 is displaced in the other vibration direction A2 with respect to the circuit board 1, the displacement of the second and third connection pads 12, 13 is suppressed, but the first and fourth connection pads 11, 14 are suppressed. Is displaced. Further, when the displacement is made in one vibration direction A1, the displacement of the second and third connection pads 12, 13 is suppressed as in the case of displacement in the other vibration direction A2, but the first and fourth connection pads 11, 14 are suppressed. Is displaced.

半導体チップ3に超音波振動が印加されるとき、回路基板1に対して半導体チップ3は振動方向一方A1および他方A2に交互に変位する。このとき、前述のように、第2および第3接続パッド12,13の変位は抑えられるけれども、第1および第4接続パッド11,14は、絶えず変位する。   When ultrasonic vibration is applied to the semiconductor chip 3, the semiconductor chip 3 is alternately displaced in the vibration direction one A1 and the other A2 with respect to the circuit board 1. At this time, as described above, the displacement of the second and third connection pads 12 and 13 is suppressed, but the first and fourth connection pads 11 and 14 are constantly displaced.

したがって第1および第4接続パッド11,14は、第2および第3接続パッド12,13に比べて、突起電極4との相対振動が小さくなる。この結果、第1および第4接続パッド11,14では、突起電極4との間の汚染層の除去が不十分となり、突起電極4との接合強度が低くなる。   Therefore, relative vibration between the first and fourth connection pads 11 and 14 and the protruding electrode 4 is smaller than that of the second and third connection pads 12 and 13. As a result, in the first and fourth connection pads 11 and 14, the contamination layer between the protruding electrodes 4 is not sufficiently removed, and the bonding strength with the protruding electrodes 4 is lowered.

本発明の目的は、半導体チップの設計を変更することなく、超音波フリップチップ接合時の半導体チップの破損に起因する歩留まりの低下を防ぎ、かつ振動方向の両端に位置する各接続パッドとこれらの各接続パッドに対向する各突起電極との接合強度を向上させることができる半導体チップの実装構造を提供することである。   An object of the present invention is to prevent a decrease in yield due to breakage of a semiconductor chip at the time of ultrasonic flip chip bonding without changing the design of the semiconductor chip, and to connect each of the connection pads positioned at both ends in the vibration direction. It is an object to provide a semiconductor chip mounting structure capable of improving the bonding strength with each protruding electrode facing each connection pad.

本発明は、突起電極を有する半導体チップと、接続パッドが絶縁基材に設けられて構成される回路基板とを含み、半導体チップが回路基板に載置されて、突起電極が接続パッドに押圧された状態で、超音波振動が半導体チップに印加されて、突起電極と接続パッドとが接合される半導体チップの実装構造であって、
複数の突起電極が、超音波振動の振動方向に沿って予め定める間隔で並ぶとともに、複数の接続パッドが、振動方向に沿って並び、各突起電極と各接続パッドとが対向し、
振動方向に沿って並ぶ各接続パッドのうち、振動方向の両端に位置する各接続パッドには、前記両端に位置する各接続パッドから振動方向に沿って互いに離反する方向に延びる延在部分がそれぞれ連なり、各延在部分は絶縁基材に設けられることを特徴とする半導体チップの実装構造である。
The present invention includes a semiconductor chip having a protruding electrode and a circuit board configured with a connection pad provided on an insulating base material. The semiconductor chip is placed on the circuit board, and the protruding electrode is pressed against the connection pad. In this state, ultrasonic vibration is applied to the semiconductor chip, and the protruding structure and the connection pad are bonded to each other.
A plurality of protruding electrodes are arranged at predetermined intervals along the vibration direction of ultrasonic vibration, and a plurality of connection pads are arranged along the vibration direction, and each protruding electrode and each connection pad face each other.
Of the connection pads arranged along the vibration direction, each connection pad located at both ends in the vibration direction has an extending portion extending in a direction away from each other along the vibration direction from each connection pad located at both ends. The semiconductor chip mounting structure is characterized in that each extending portion is provided on an insulating substrate.

また本発明は、振動方向の一端に位置する接続パッドとこの接続パッドに連なる延在部分とを合わせた振動方向寸法および振動方向の他端に位置する接続パッドとこの接続パッドに連なる延在部分とを合わせた振動方向寸法は、接続パッドの振動方向寸法の2倍以上3倍以下に選ばれることを特徴とする。
また本発明は、前記絶縁基材は、樹脂材料から成ることを特徴とする。
Further, the present invention provides a vibration direction dimension combining a connection pad located at one end of the vibration direction and an extension portion connected to the connection pad, a connection pad located at the other end of the vibration direction, and an extension portion connected to the connection pad. And the vibration direction dimension is selected from 2 times to 3 times the vibration direction dimension of the connection pad.
In the invention, it is preferable that the insulating base material is made of a resin material.

また本発明は、第1接続パッドを有する半導体チップと、第2接続パッドが絶縁基材に設けられ、第2接続パッドに突起電極が設けられて構成される回路基板とを含み、半導体チップが回路基板に載置されて、突起電極が第1接続パッドに押圧された状態で、超音波振動が半導体チップに印加されて、突起電極と第1接続パッドとが接合される半導体チップの実装構造であって、
複数の突起電極が、超音波振動の振動方向に沿って予め定める間隔で並ぶとともに、複数の第1接続パッドおよび複数の第2接続パッドが、振動方向に沿って並び、各突起電極と各第1接続パッドとが対向し、
振動方向に沿って並ぶ各第2接続パッドのうち、振動方向の両端に位置する各第2接続パッドには、前記両端に位置する各第2接続パッドから振動方向に沿って互いに離反する方向に延びる延在部分がそれぞれ連なり、各延在部分は絶縁基材に設けられることを特徴とする半導体チップの実装構造である。
The present invention also includes a semiconductor chip having a first connection pad, and a circuit board configured such that the second connection pad is provided on the insulating base and the protruding electrode is provided on the second connection pad. A mounting structure of a semiconductor chip that is placed on a circuit board and in which ultrasonic waves are applied to the semiconductor chip in a state where the protruding electrodes are pressed against the first connection pads, and the protruding electrodes and the first connection pads are bonded to each other. Because
The plurality of protruding electrodes are arranged at predetermined intervals along the vibration direction of the ultrasonic vibration, and the plurality of first connection pads and the plurality of second connection pads are arranged along the vibration direction. 1 connection pad is facing,
Among the second connection pads arranged along the vibration direction, the second connection pads located at both ends in the vibration direction are separated from each other along the vibration direction from the second connection pads located at both ends. Each of the extending portions extends continuously, and each extending portion is provided on an insulating base material.

本発明によれば、半導体チップが回路基板に載置されて、半導体チップの突起電極が回路基板の接続パッドに押圧された状態で、超音波振動が半導体チップに印加される。これによって突起電極と接続パッドとが擦れ合い、突起電極と接続パッドとの間の汚染層が除去されて、突起電極と接続パッドとが接合される。このような超音波フリップチップ接合によって、半導体チップが回路基板に実装されて、半導体チップの実装構造が実現される。   According to the present invention, the ultrasonic vibration is applied to the semiconductor chip in a state where the semiconductor chip is placed on the circuit board and the protruding electrode of the semiconductor chip is pressed against the connection pad of the circuit board. As a result, the bump electrode and the connection pad rub against each other, the contamination layer between the bump electrode and the connection pad is removed, and the bump electrode and the connection pad are joined. By such ultrasonic flip-chip bonding, the semiconductor chip is mounted on the circuit board, and the semiconductor chip mounting structure is realized.

超音波フリップチップ接合時、接続パッドは、突起電極から押圧力および摩擦力を受ける。これによって接続パッドには、回転モーメントが働く。このように接続パッドには、回転モーメントが働くので、接続パッドは、絶縁基材を押し下げる押下げ力および絶縁基材を引き上げる引上げ力を、絶縁基材に与える。   At the time of ultrasonic flip chip bonding, the connection pad receives a pressing force and a frictional force from the protruding electrode. As a result, a rotational moment acts on the connection pad. As described above, since the rotational moment acts on the connection pad, the connection pad gives the insulating base material a pressing force for pushing down the insulating base material and a pulling force for pulling up the insulating base material.

回路基板に対して半導体チップが振動方向一方に変位するとき、接続パッドの振動方向一方側の端部は、絶縁基材に押下げ力を与え、接続パッドの振動方向他方側の端部は、絶縁基材に引上げ力を与える。回路基板に対して半導体チップが振動方向他方に変位するとき、接続パッドの振動方向一方側の端部は、絶縁基材に引上げ力を与え、接続パッドの振動方向他方側の端部は、絶縁基材に押下げ力を与える。   When the semiconductor chip is displaced in one direction of vibration with respect to the circuit board, the end on one side of the connection pad in the direction of vibration gives a pressing force to the insulating base material, and the end of the connection pad in the direction of vibration on the other side is A pulling force is applied to the insulating substrate. When the semiconductor chip is displaced in the other vibration direction with respect to the circuit board, the end on one side of the connection pad in the vibration direction gives a pulling force to the insulating base, and the end on the other side of the connection pad in the vibration direction is insulated. A pressing force is applied to the substrate.

本発明の実装構造では、複数の突起電極が、超音波振動の振動方向に沿って予め定める間隔で並ぶとともに、複数の接続パッドが、振動方向に沿って並ぶ。これらの各突起電極と各接続パッドとが対向する。   In the mounting structure of the present invention, the plurality of protruding electrodes are arranged at predetermined intervals along the vibration direction of the ultrasonic vibration, and the plurality of connection pads are arranged along the vibration direction. Each of these protruding electrodes and each connection pad face each other.

このように各突起電極と各接続パッドとが配置されるので、振動方向に隣り合う各接続パッドにおける振動方向の各端部のうち、内側の2つの端部が絶縁基材に与える押下げ力および引上げ力は、相殺される。したがって、前記内側の2つの端部からの押下げ力および引上げ力による絶縁基材の変形が抑えられ、これによって前記内側の2つの端部の変位が抑えられる。   Since each protruding electrode and each connection pad are arranged in this way, the pressing force exerted on the insulating base material by the two inner ends among the ends in the vibration direction of each connection pad adjacent in the vibration direction And the pulling force is offset. Therefore, the deformation of the insulating base material due to the pressing force and the pulling force from the two inner ends is suppressed, and thereby the displacement of the two inner ends is suppressed.

また本発明の実装構造では、振動方向に沿って並ぶ各接続パッドのうち、振動方向の両端に位置する各接続パッドには、前記両端に位置する各接続パッドから振動方向に沿って互いに離反する方向に延びる延在部分がそれぞれ連なる。これらの各延在部分が絶縁基材に設けられる。   In the mounting structure of the present invention, among the connection pads arranged along the vibration direction, the connection pads positioned at both ends of the vibration direction are separated from each other along the vibration direction from the connection pads positioned at both ends. The extending portions extending in the direction are continuous. Each of these extending portions is provided on the insulating base material.

このように各延在部分が設けられるので、前記両端に位置する各接続パッドにおける振動方向の各端部のうち、外側の2つの端部の変位が抑えられる。詳細に述べると、前記外側の2つの端部には、延在部分がそれぞれ連なるので、前記外側の2つの端部からの押下げ力および引上げ力は、分散されて絶縁基材に与えられる。したがって前記外側の2つの端部からの押下げ力および引上げ力による絶縁基材の変形が抑えられ、これによって前記外側の2つの端部の変位が抑えられる。   Thus, since each extension part is provided, the displacement of two outer edge parts is suppressed among each edge part of the vibration direction in each connection pad located in the said both ends. More specifically, since the extending portions are connected to the two outer ends, the pressing force and the pulling force from the two outer ends are distributed and given to the insulating base material. Therefore, deformation of the insulating base material due to the pressing force and pulling force from the two outer ends is suppressed, and thereby the displacement of the two outer ends is suppressed.

以上のように、振動方向に沿って並ぶ各接続パッドにおける振動方向の各端部の変位が抑えられるので、超音波フリップチップ接合時に、前記両端に位置する各接続パッドとこれらの各接続パッドに対向する各突起電極との相対振動を大きくすることができる。これによって前記両端に位置する各接続パッドと各突起電極との間の汚染層を確実に除去することができる。したがって前記両端に位置する各接続パッドと各突起電極との接合強度を向上させることができる。   As described above, since displacement of each end portion in the vibration direction in each connection pad arranged along the vibration direction is suppressed, each connection pad located at both ends and each of these connection pads are connected to each other at the time of ultrasonic flip chip bonding. Relative vibration with each protruding electrode facing each other can be increased. As a result, the contamination layer between the connection pads located at both ends and the protruding electrodes can be reliably removed. Therefore, it is possible to improve the bonding strength between the connection pads located at both ends and the protruding electrodes.

このような本発明では、接合強度を向上させるにあたって、超音波振動を強くする必要がないので、前記特許文献1に開示される技術のように、超音波フリップチップ接合時の半導体チップの破損に起因する歩留まりの低下を防ぐために、半導体チップの設計を変更する必要がない。したがって、半導体チップの設計を変更することなく、超音波フリップチップ接合時の半導体チップの破損に起因する歩留まりの低下を防ぎ、かつ前記両端に位置する各接続パッドと各突起電極との接合強度を向上させることができる。   In the present invention, since it is not necessary to increase the ultrasonic vibration in order to improve the bonding strength, the semiconductor chip is damaged during the ultrasonic flip chip bonding as in the technique disclosed in Patent Document 1. There is no need to change the design of the semiconductor chip in order to prevent the resulting yield loss. Therefore, without changing the design of the semiconductor chip, it is possible to prevent the yield from being reduced due to breakage of the semiconductor chip at the time of ultrasonic flip chip bonding, and to increase the bonding strength between each connection pad and each protruding electrode located at both ends. Can be improved.

また本発明によれば、振動方向の一端に位置する接続パッドとこの接続パッドに連なる延在部分とを合わせた振動方向寸法および振動方向の他端に位置する接続パッドとこの接続パッドに連なる延在部分とを合わせた振動方向寸法は、接続パッドの振動方向寸法の2倍以上3倍以下に選ばれる。2倍以上3倍以下に選ばれることによって、前記両端に位置する各接続パッドと各突起電極との接合強度を確実に向上させることができる。2倍未満では、接合強度を充分に向上させることができない。3倍を超えると、接合強度の向上という効果は飽和する。   Further, according to the present invention, the vibration pad dimension located at one end in the vibration direction and the extension portion connected to the connection pad are combined, and the connection pad located at the other end in the vibration direction is connected to the connection pad. The vibration direction dimension combined with the existing portion is selected to be two to three times the vibration direction dimension of the connection pad. By selecting 2 times or more and 3 times or less, it is possible to reliably improve the bonding strength between the connection pads located at both ends and the protruding electrodes. If it is less than 2 times, the bonding strength cannot be sufficiently improved. If it exceeds 3 times, the effect of improving the bonding strength is saturated.

また本発明によれば、樹脂材料から成る絶縁基材が用いられる。樹脂材料から成る絶縁基材は、セラミック基板に比べて、安価である。したがって回路基板のコストを低減することができる。樹脂材料から成る絶縁基材は、セラミック基板に比べて変形しやすいので、このような絶縁基材が使用される場合、前記両端に位置する各接続パッドと各突起電極との接合強度が低下しやすいけれども、前述のように延在部分が設けられることによって、接合強度の低下を防ぐことができる。   According to the present invention, an insulating substrate made of a resin material is used. An insulating base made of a resin material is less expensive than a ceramic substrate. Therefore, the cost of the circuit board can be reduced. Since an insulating base made of a resin material is more easily deformed than a ceramic substrate, when such an insulating base is used, the bonding strength between each connection pad and each protruding electrode located at both ends is reduced. Although it is easy, it is possible to prevent a decrease in bonding strength by providing the extending portion as described above.

本発明によれば、半導体チップが回路基板に載置されて、半導体チップの第1接続パッドが回路基板の突起電極に押圧された状態で、超音波振動が半導体チップに印加される。これによって第1接続パッドと突起電極とが擦れ合い、第1接続パッドと突起電極との間の汚染層が除去されて、第1接続パッドと突起電極とが接合される。このような超音波フリップチップ接合によって、半導体チップが回路基板に実装されて、半導体チップの実装構造が実現される。   According to the present invention, the ultrasonic vibration is applied to the semiconductor chip in a state where the semiconductor chip is placed on the circuit board and the first connection pads of the semiconductor chip are pressed against the protruding electrodes of the circuit board. As a result, the first connection pad and the protruding electrode rub against each other, the contamination layer between the first connection pad and the protruding electrode is removed, and the first connection pad and the protruding electrode are joined. By such ultrasonic flip-chip bonding, the semiconductor chip is mounted on the circuit board, and the semiconductor chip mounting structure is realized.

超音波フリップチップ接合時、第2接続パッドは、突起電極から押圧力および摩擦力を受ける。これによって第2接続パッドには、回転モーメントが働く。このように第2接続パッドには、回転モーメントが働くので、第2接続パッドは、絶縁基材を押し下げる押下げ力および絶縁基材を引き上げる引上げ力を、絶縁基材に与える。   At the time of ultrasonic flip chip bonding, the second connection pad receives a pressing force and a frictional force from the protruding electrode. As a result, a rotational moment acts on the second connection pad. As described above, since the rotational moment acts on the second connection pad, the second connection pad gives the insulating base material a pressing force for pushing down the insulating base material and a pulling force for pulling up the insulating base material.

回路基板に対して半導体チップが振動方向一方に変位するとき、第2接続パッドの振動方向一方側の端部は、絶縁基材に押下げ力を与え、第2接続パッドの振動方向他方側の端部は、絶縁基材に引上げ力を与える。回路基板に対して半導体チップが振動方向他方に変位するとき、第2接続パッドの振動方向一方側の端部は、絶縁基材に引上げ力を与え、第2接続パッドの振動方向他方側の端部は、絶縁基材に押下げ力を与える。   When the semiconductor chip is displaced in one direction of vibration with respect to the circuit board, the end of one side of the second connection pad in the direction of vibration gives a pressing force to the insulating base, and the other side of the second connection pad in the direction of vibration The end portion provides a pulling force to the insulating base material. When the semiconductor chip is displaced in the other vibration direction with respect to the circuit board, the end on the one side in the vibration direction of the second connection pad gives a pulling force to the insulating base, and the end on the other side in the vibration direction of the second connection pad. The portion gives a pressing force to the insulating base material.

本発明の実装構造では、複数の突起電極が、超音波振動の振動方向に沿って予め定める間隔で並ぶとともに、複数の第1接続パッドおよび複数の第2接続パッドが、振動方向に沿って並び、各突起電極と各第1接続パッドとが対向する。   In the mounting structure of the present invention, the plurality of protruding electrodes are arranged at predetermined intervals along the vibration direction of the ultrasonic vibration, and the plurality of first connection pads and the plurality of second connection pads are arranged along the vibration direction. The protruding electrodes and the first connection pads face each other.

このように各突起電極と各第1接続パッドと各第2接続パッドとが配置されるので、振動方向に隣り合う各第2接続パッドにおける振動方向の各端部のうち、内側の2つの端部が絶縁基材に与える押下げ力および引上げ力は、相殺される。したがって、前記内側の2つの端部からの押下げ力および引上げ力による絶縁基材の変形が防がれ、これによって前記内側の2つの端部の変位が防がれる。   Since each protruding electrode, each first connection pad, and each second connection pad are arranged in this way, two inner ends of each end in the vibration direction of each second connection pad adjacent to each other in the vibration direction The pressing force and the pulling force applied to the insulating substrate by the part are canceled out. Accordingly, deformation of the insulating base material due to the pressing force and pulling force from the two inner end portions is prevented, thereby preventing displacement of the two inner end portions.

また本発明の実装構造では、振動方向に沿って並ぶ各第2接続パッドのうち、振動方向の両端に位置する各第2接続パッドには、前記両端に位置する各第2接続パッドから振動方向に沿って互いに離反する方向に延びる延在部分がそれぞれ連なる。これらの各延在部分が絶縁基材に設けられる。   In the mounting structure of the present invention, among the second connection pads arranged along the vibration direction, the second connection pads positioned at both ends of the vibration direction are connected to the vibration direction from the second connection pads positioned at the both ends. The extending portions extending in the direction away from each other along are connected. Each of these extending portions is provided on the insulating base material.

このように各延在部分が設けられるので、前記両端に位置する各第2接続パッドにおける振動方向の各端部のうち、外側の2つの端部の変位が防がれる。詳細に述べると、前記外側の2つの端部には、延在部分がそれぞれ連なるので、前記外側の2つの端部からの押下げ力および引上げ力は、分散されて絶縁基材に与えられる。したがって前記外側の2つの端部からの押下げ力および引上げ力による絶縁基材の変形が防がれ、これによって前記外側の2つの端部の変位が防がれる。   Thus, since each extension part is provided, the displacement of two outer edge parts is prevented among each edge part of the vibration direction in each 2nd connection pad located in the said both ends. More specifically, since the extending portions are connected to the two outer ends, the pressing force and the pulling force from the two outer ends are distributed and given to the insulating base material. Therefore, deformation of the insulating base material due to the pressing force and pulling force from the two outer ends is prevented, thereby preventing displacement of the two outer ends.

以上のように、振動方向に沿って並ぶ各第2接続パッドにおける振動方向の各端部の変位が防がれるので、両端に位置する各第2接続パッドに設けられる各突起電極の変位が防がれる。このように各突起電極の変位が防がれるので、超音波フリップチップ接合時に、両端に位置する各突起電極とこれらの各突起電極に対向する第1接続パッドとの相対振動を大きくすることができる。これによって両端に位置する各突起電極と各第1接続パッドとの間の汚染層を確実に除去することができる。したがって両端に位置する各突起電極と各第1接続パッドとの接合強度を向上させることができる。   As described above, since the displacement of the end portions in the vibration direction of the second connection pads arranged along the vibration direction is prevented, the displacement of the protruding electrodes provided in the second connection pads located at both ends is prevented. Can be removed. As described above, since the displacement of each protruding electrode is prevented, relative vibration between each protruding electrode located at both ends and the first connection pad facing each protruding electrode can be increased during ultrasonic flip chip bonding. it can. As a result, the contamination layer between each protruding electrode and each first connection pad located at both ends can be reliably removed. Therefore, it is possible to improve the bonding strength between the protruding electrodes located at both ends and the first connection pads.

このような本発明では、接合強度を向上させるにあたって、超音波振動を強くする必要がないので、前記特許文献1に開示される技術のように、超音波フリップチップ接合時の半導体チップの破損に起因する歩留まりの低下を防ぐために、半導体チップの設計を変更する必要がない。したがって、半導体チップの設計を変更することなく、超音波フリップチップ接合時の半導体チップの破損に起因する歩留まりの低下を防ぎ、かつ両端に位置する各突起電極と各第1接続パッドとの接合強度を向上させることができる。   In the present invention, since it is not necessary to increase the ultrasonic vibration in order to improve the bonding strength, the semiconductor chip is damaged during the ultrasonic flip chip bonding as in the technique disclosed in Patent Document 1. There is no need to change the design of the semiconductor chip in order to prevent the resulting yield loss. Therefore, without changing the design of the semiconductor chip, it is possible to prevent the yield from being reduced due to breakage of the semiconductor chip at the time of ultrasonic flip chip bonding, and the bonding strength between each protruding electrode and each first connection pad located at both ends. Can be improved.

図1は、本発明の実施の一形態の半導体チップの実装構造を簡略化して示す断面図である。本実施の形態の実装構造を有する半導体装置30は、携帯電話機などの電子機器に使用される半導体装置である。半導体装置30は、半導体チップ31と回路基板32とを含む。半導体装置30は、半導体チップ31が回路基板32に実装されて構成される。   FIG. 1 is a cross-sectional view schematically showing a semiconductor chip mounting structure according to an embodiment of the present invention. The semiconductor device 30 having the mounting structure of the present embodiment is a semiconductor device used for electronic equipment such as a mobile phone. The semiconductor device 30 includes a semiconductor chip 31 and a circuit board 32. The semiconductor device 30 is configured by mounting a semiconductor chip 31 on a circuit board 32.

半導体チップ31は、突起電極33を有する。回路基板32は、接続パッド34を有する。本実施の形態では、半導体チップ31が回路基板32に載置されて、半導体チップ31の突起電極33が回路基板32の接続パッド34に押圧された状態で、超音波振動が半導体チップ31に印加される。これによって突起電極33と接続パッド34とが接合される。このような超音波フリップチップ接合によって、半導体チップ31が回路基板32に実装されて、本実施の形態の実装構造が実現される。   The semiconductor chip 31 has a protruding electrode 33. The circuit board 32 has connection pads 34. In the present embodiment, the ultrasonic vibration is applied to the semiconductor chip 31 in a state where the semiconductor chip 31 is placed on the circuit board 32 and the protruding electrode 33 of the semiconductor chip 31 is pressed against the connection pad 34 of the circuit board 32. Is done. As a result, the protruding electrode 33 and the connection pad 34 are joined. By such ultrasonic flip chip bonding, the semiconductor chip 31 is mounted on the circuit board 32, and the mounting structure of the present embodiment is realized.

図2は、半導体チップ31を簡略化して示す正面図である。この図2と前記図1とを参照して、半導体チップ31を説明する。半導体チップ31は、チップ本体36と、接続パッド(以下「チップ側接続パッド」という)37と、突起電極33とを有する。   FIG. 2 is a front view showing the semiconductor chip 31 in a simplified manner. The semiconductor chip 31 will be described with reference to FIG. 2 and FIG. The semiconductor chip 31 includes a chip body 36, connection pads (hereinafter referred to as “chip-side connection pads”) 37, and protruding electrodes 33.

チップ本体36には、半導体素子が形成される。半導体チップ31は、シリコン(Si)などから成る。半導体チップ31は、板状であり、厚み方向から見た形状が、たとえば四角形状、具体的には正方形状である。半導体チップ31は、たとえば10mm角であり、厚みが0.1mmである。   A semiconductor element is formed on the chip body 36. The semiconductor chip 31 is made of silicon (Si) or the like. The semiconductor chip 31 has a plate shape, and the shape viewed from the thickness direction is, for example, a quadrangular shape, specifically a square shape. The semiconductor chip 31 is, for example, 10 mm square and has a thickness of 0.1 mm.

チップ側接続パッド37は、チップ本体36、具体的にはチップ本体36の厚み方向一方側の表面38に設けられる。チップ側接続パッド37は、導電性を有し、チップ本体36の半導体素子に電気的に接続される。チップ側接続パッド37は、アルミニウム(Al)−シリコン(Si)から成る。チップ側接続パッド37は、たとえば45μm角であり、厚みが1μmである。チップ側接続パッド37は、スパッタリングによって形成される。   The chip-side connection pad 37 is provided on the chip body 36, specifically, the surface 38 on one side in the thickness direction of the chip body 36. The chip side connection pad 37 has conductivity and is electrically connected to the semiconductor element of the chip body 36. The chip-side connection pad 37 is made of aluminum (Al) -silicon (Si). The chip-side connection pad 37 is, for example, 45 μm square and has a thickness of 1 μm. The chip-side connection pad 37 is formed by sputtering.

突起電極33は、チップ側接続パッド37に設けられる。突起電極33は、チップ側接続パッド37から、チップ本体36の厚み方向に突出する。突起電極33は、導電性を有し、チップ側接続パッド37に電気的に接続される。突起電極33は、金(Au)から成る。突起電極33は、たとえば50μm角であり、高さが20μmである。突起電極33は、電解めっきによって形成される。突起電極33は、いわゆるめっきバンプである。   The protruding electrode 33 is provided on the chip-side connection pad 37. The protruding electrode 33 protrudes from the chip-side connection pad 37 in the thickness direction of the chip body 36. The protruding electrode 33 has conductivity and is electrically connected to the chip-side connection pad 37. The protruding electrode 33 is made of gold (Au). The protruding electrode 33 is, for example, 50 μm square and 20 μm in height. The protruding electrode 33 is formed by electrolytic plating. The protruding electrode 33 is a so-called plated bump.

本実施の形態では、超音波フリップチップ接合時に半導体チップ31に印加される超音波振動の振動方向Aに沿って予め定める間隔(以下「突起電極間隔」という)L1で、複数の突起電極33が並ぶ。突起電極間隔L1は、隣り合う突起電極33間の距離である。突起電極間隔L1は、突起電極33の振動方向寸法W11の2倍未満に選ばれる。突起電極間隔L1は、たとえば50μmである。この場合、隣り合う突起電極33の中心間の距離L3は、100μmである。   In the present embodiment, the plurality of protruding electrodes 33 are formed at a predetermined interval (hereinafter referred to as “protruding electrode interval”) L1 along the vibration direction A of ultrasonic vibration applied to the semiconductor chip 31 during ultrasonic flip chip bonding. line up. The protruding electrode interval L1 is a distance between adjacent protruding electrodes 33. The protruding electrode interval L1 is selected to be less than twice the vibration direction dimension W11 of the protruding electrode 33. The protruding electrode interval L1 is, for example, 50 μm. In this case, the distance L3 between the centers of the adjacent protruding electrodes 33 is 100 μm.

詳細に述べると、チップ側接続パッド37は、チップ本体36の厚み方向一方側の表面(以下「チップ側パッド形成面」という)38の各縁辺部分39a〜39dに、各縁辺40a〜40dに沿って並ぶように配置される。各チップ側接続パッド37には、突起電極33がそれぞれ設けられる。各突起電極33は、チップ側パッド形成面38の各縁辺40a〜40dに沿って、たとえば50μm間隔で並ぶように配置される。   More specifically, the chip-side connection pad 37 is provided along each edge 40a-40d along each edge 39a-39d of the surface (hereinafter referred to as "chip-side pad forming surface") 38 on one side in the thickness direction of the chip body 36. Are arranged in a line. Each chip-side connection pad 37 is provided with a protruding electrode 33. The protruding electrodes 33 are arranged along the respective edges 40a to 40d of the chip-side pad forming surface 38 so as to be arranged at intervals of 50 μm, for example.

前記各縁辺40a〜40dのうち1組の対向する縁辺40a,40cの延びる方向は、超音波振動の振動方向Aと平行である。換言すれば、超音波フリップチップ接合時は、前記1組の対向する縁辺40a,40cの延びる方向と振動方向Aとが平行になるように、超音波振動が印加される。   The extending direction of the pair of opposing edges 40a and 40c among the edges 40a to 40d is parallel to the vibration direction A of the ultrasonic vibration. In other words, at the time of ultrasonic flip chip bonding, ultrasonic vibration is applied so that the extending direction of the pair of opposing edges 40a and 40c and the vibration direction A are parallel.

図3は、回路基板32の一部を簡略化して示す正面図である。この図3と前記図1とを参照して、回路基板32を説明する。回路基板32は、絶縁基材45と、接続パッド(以下「基板側接続パッド」という)34と、配線部分46と、延在部分47とを有する。   FIG. 3 is a front view showing a part of the circuit board 32 in a simplified manner. The circuit board 32 will be described with reference to FIG. 3 and FIG. The circuit board 32 includes an insulating base material 45, connection pads (hereinafter referred to as “board-side connection pads”) 34, wiring portions 46, and extending portions 47.

絶縁基材45は、電気絶縁性を有する絶縁材料から成る。具体的には、絶縁基材45は、絶縁材料となる樹脂材料から成る有機基板である。前記樹脂材料は、たとえばガラス布エポキシ樹脂、アラミド繊維不織布エポキシ樹脂、液晶ポリマー樹脂である。絶縁基材45は、板状であり、厚み方向から見た形状が、たとえば四角形状、具体的には正方形状である。絶縁基材45は、たとえば15mm角であり、厚みが0.1mmである。   The insulating base material 45 is made of an insulating material having electrical insulating properties. Specifically, the insulating base material 45 is an organic substrate made of a resin material serving as an insulating material. Examples of the resin material include glass cloth epoxy resin, aramid fiber nonwoven fabric epoxy resin, and liquid crystal polymer resin. The insulating base material 45 is plate-shaped, and the shape seen from the thickness direction is, for example, a quadrangular shape, specifically a square shape. The insulating base 45 is, for example, 15 mm square and has a thickness of 0.1 mm.

基板側接続パッド34は、絶縁基材45、具体的には絶縁基材45の厚み方向一方側の表面48に設けられる。基板側接続パッド34は、導電性を有する。基板側接続パッド34は、銅(Cu)から成る。基板側接続パッド34は、たとえば60μm角であり、厚みが18μmである。   The board-side connection pads 34 are provided on the insulating base 45, specifically, the surface 48 on one side in the thickness direction of the insulating base 45. The board-side connection pad 34 has conductivity. The board-side connection pad 34 is made of copper (Cu). The substrate-side connection pad 34 is, for example, 60 μm square and has a thickness of 18 μm.

基板側接続パッド34には、たとえば、ニッケル(Ni)から成る層と、金(Au)から成る層とが順次、積層されてもよい。この場合、基板側接続パッド34と、ニッケル(Ni)から成る層と、金(Au)から成る層とを含んで構成される部分を、基板側接続パッド34と称することにする。ニッケル(Ni)から成る層の厚みは、たとえば約2μmであり、金(Au)から成る層の厚みはたとえば約0.5μmである。   For example, a layer made of nickel (Ni) and a layer made of gold (Au) may be sequentially stacked on the substrate-side connection pad 34. In this case, a portion including the substrate-side connection pad 34, a layer made of nickel (Ni), and a layer made of gold (Au) will be referred to as a substrate-side connection pad 34. The thickness of the layer made of nickel (Ni) is, for example, about 2 μm, and the thickness of the layer made of gold (Au) is, for example, about 0.5 μm.

配線部分46は、基板側接続パッド34に連なる。配線部分46は、絶縁基材45、具体的には絶縁基材45の厚み方向一方側の表面(以下「基板側パッド形成面」という)48に設けられる。配線部分46は、導電性を有し、基板側接続パッド34に電気的に接続される。配線部分46は、銅(Cu)から成る。配線部分46の厚みは、たとえば約18μmである。また配線部分46上にソルダレジストを施してもよい。   The wiring portion 46 continues to the board-side connection pad 34. The wiring portion 46 is provided on the insulating base material 45, specifically, a surface 48 on one side in the thickness direction of the insulating base material 45 (hereinafter referred to as “substrate-side pad forming surface”). The wiring portion 46 has conductivity and is electrically connected to the board-side connection pad 34. The wiring portion 46 is made of copper (Cu). The thickness of the wiring portion 46 is, for example, about 18 μm. A solder resist may be applied on the wiring portion 46.

本実施の形態では、超音波フリップチップ接合時に半導体チップ31に印加される超音波振動の振動方向Aに沿って予め定める間隔(以下「パッド間隔」という)L2で、複数の基板側接続パッド34が並ぶ。パッド間隔L2は、隣り合う基板側接続パッド34間の距離である。パッド間隔L2は、たとえば40μmである。各基板側接続パッド34は、半導体チップ31の各突起電極33にそれぞれ対向する。   In the present embodiment, a plurality of substrate-side connection pads 34 at a predetermined interval (hereinafter referred to as “pad interval”) L2 along the vibration direction A of ultrasonic vibration applied to the semiconductor chip 31 during ultrasonic flip-chip bonding. Lined up. The pad interval L2 is a distance between adjacent substrate side connection pads 34. The pad interval L2 is 40 μm, for example. Each substrate-side connection pad 34 faces each protruding electrode 33 of the semiconductor chip 31.

また本実施の形態では、振動方向Aに沿って並ぶ各基板側接続パッド34のうち、振動方向Aの両端に位置する各基板側接続パッド34には、前記両端に位置する各基板側接続パッド34から振動方向Aに沿って互いに離反する方向に延びる延在部分47がそれぞれ連なる。すなわち、振動方向Aに沿って並ぶ各基板側接続パッド34のうち、最も振動方向一方A1に位置する基板側接続パッド(以下「一端の基板側接続パッド」という)34には、振動方向一方A1に延びる延在部分47が連なり、最も振動方向他方A2に位置する基板側接続パッド(以下「他端の基板側接続パッド」という)34には、振動方向他方A2に延びる延在部分47が連なる。   In the present embodiment, among the board-side connection pads 34 arranged along the vibration direction A, the board-side connection pads 34 located at both ends of the vibration direction A include the board-side connection pads located at both ends. Extending portions 47 extending in a direction away from each other along the vibration direction A from 34 are connected. In other words, among the board-side connection pads 34 arranged along the vibration direction A, the board-side connection pad (hereinafter referred to as “one-side board-side connection pad”) 34 that is located closest to the vibration direction one A1 includes the vibration direction one A1. An extended portion 47 extending in the vibration direction is connected to a board-side connection pad (hereinafter referred to as “substrate-side connection pad at the other end”) 34 that is located most in the other vibration direction A 2. .

延在部分47は、絶縁基材45、具体的には絶縁基材45の基板側パッド形成面48に設けられる。延在部分47は、銅(Cu)から成る。延在部分47の厚みは、たとえば約18μmである。   The extending portion 47 is provided on the insulating base material 45, specifically, the substrate-side pad forming surface 48 of the insulating base material 45. The extending portion 47 is made of copper (Cu). The extension portion 47 has a thickness of about 18 μm, for example.

延在部分47には、たとえば、ニッケル(Ni)から成る層と、金(Au)から成る層とが順次、積層されてもよい。この場合、基板側接続パッド34と、ニッケル(Ni)から成る層と、金(Au)から成る層とを含んで構成される部分を、延在部分47と称することにする。ニッケル(Ni)から成る層の厚みは、たとえば約2μmであり、金(Au)から成る層の厚みはたとえば約0.5μmである。   For example, a layer made of nickel (Ni) and a layer made of gold (Au) may be sequentially stacked on the extended portion 47. In this case, a portion including the substrate side connection pad 34, a layer made of nickel (Ni), and a layer made of gold (Au) will be referred to as an extending portion 47. The thickness of the layer made of nickel (Ni) is, for example, about 2 μm, and the thickness of the layer made of gold (Au) is, for example, about 0.5 μm.

さらに本実施の形態では、一端の基板側接続パッド34とこの基板側接続パッド34に連なる延在部分47とを合わせた振動方向寸法(以下「一端のパッド部分寸法」という)W1は、基板側接続パッド34の振動方向寸法(以下「パッド寸法」という)Wの2倍以上3倍以下に選ばれる。他端の基板側接続パッド34とこの基板側接続パッド34に連なる延在部分47とを合わせた振動方向寸法(以下「他端のパッド部分寸法」という)W2は、パッド寸法Wの2倍以上3倍以下に選ばれる。   Further, in the present embodiment, the vibration direction dimension (hereinafter referred to as “one-part pad part dimension”) W1 of the substrate-side connection pad 34 at one end and the extending portion 47 connected to the substrate-side connection pad 34 is the substrate side. The vibration pad dimension of the connection pad 34 (hereinafter referred to as “pad dimension”) W is selected to be 2 to 3 times. The vibration direction dimension (hereinafter referred to as “pad part dimension at the other end”) W2 of the other end board-side connection pad 34 and the extended portion 47 connected to the board-side connection pad 34 is at least twice the pad dimension W. 3 times or less is selected.

詳細に述べると、絶縁基材45の基板側パッド形成面48に、前記チップ側パッド形成面38に対応する正方形49を描いたとき、基板側接続パッド34は、前記正方形49の各縁辺部分50a〜50dに、各縁辺51a〜51dに沿って並ぶように配置される。各基板側接続パッド34は、前記正方形49の各縁辺51a〜51dに沿って、たとえば40μm間隔で並ぶように配置される。   More specifically, when a square 49 corresponding to the chip-side pad formation surface 38 is drawn on the substrate-side pad formation surface 48 of the insulating base material 45, the substrate-side connection pad 34 is connected to each edge portion 50a of the square 49. ˜50d so as to be aligned along the respective edges 51a to 51d. The board-side connection pads 34 are arranged along the respective edges 51a to 51d of the square 49, for example, at intervals of 40 μm.

前記各縁辺51a〜51dのうち1組の対向する縁辺51a,51cの延びる方向は、超音波振動の振動方向Aと平行である。換言すれば、超音波フリップチップ接合時は、前記1組の対向する縁辺51a,51cの延びる方向と振動方向Aとが平行になるように、超音波振動が印加される。   The extending direction of a pair of opposing edges 51a and 51c among the edges 51a to 51d is parallel to the vibration direction A of ultrasonic vibration. In other words, at the time of ultrasonic flip chip bonding, ultrasonic vibration is applied so that the extending direction of the pair of opposing edges 51a and 51c and the vibration direction A are parallel.

前記1組の対向する縁辺51a,51cの一方の縁辺51aに沿って並ぶ各基板側接続パッド34のうち、両端の基板側接続パッド34には、延在部分47がそれぞれ連なる。前記1組の対向する縁辺51a,51cの他方の縁辺51cに沿って並ぶ各基板側接続パッド34のうち、両端の基板側接続パッド34には、延在部分47がそれぞれ連なる。   Of the board-side connection pads 34 arranged along one edge 51a of the pair of opposing edges 51a and 51c, the extended portions 47 are connected to the board-side connection pads 34 at both ends. Of the board-side connection pads 34 arranged along the other edge 51c of the pair of opposing edges 51a and 51c, the extended portions 47 are connected to the board-side connection pads 34 at both ends.

各基板側接続パッド34には、配線部分46がそれぞれ連なる。各配線部分46は、各基板側接続パッド34から、前記正方形49の外方に向かってそれぞれ延びる。   Each substrate-side connection pad 34 is connected to a wiring portion 46. Each wiring portion 46 extends from each board-side connection pad 34 toward the outside of the square 49.

一端の基板側接続パッド34に連なる配線部分46の振動方向寸法W31は、一端のパッド部分寸法W1と同一である。他端の基板側接続パッド34に連なる配線部分46の振動方向寸法W32は、他端のパッド部分寸法W2と同一である。   The vibration direction dimension W31 of the wiring part 46 connected to the board-side connection pad 34 at one end is the same as the pad part dimension W1 at one end. The vibration direction dimension W32 of the wiring part 46 connected to the board-side connection pad 34 at the other end is the same as the pad part dimension W2 at the other end.

このような回路基板32を製造するにあたっては、まず、たとえば両面銅張基板を準備する。両面銅張基板は、絶縁基材45の厚み方向両側の表面に全体にわたって銅箔が設けられた基板である。次に、絶縁基材45の厚み方向一方側の表面に設けられる銅箔を、所定の配線パターンにエッチングする。これによって、基板側接続パッド34、配線部分46および延在部分47が同時に形成される。この後、めっき処理によって、基板側接続パッド34に、ニッケル(Ni)から成る層および金(Au)から成る層を順次、積層する。前記金(Au)から成る層は、無電解めっきによって形成される。このようにして、回路基板32を製造することができる。   In manufacturing such a circuit board 32, first, for example, a double-sided copper-clad board is prepared. The double-sided copper-clad substrate is a substrate in which copper foil is provided over the entire surface of both sides in the thickness direction of the insulating base material 45. Next, the copper foil provided on the surface on one side in the thickness direction of the insulating substrate 45 is etched into a predetermined wiring pattern. As a result, the substrate-side connection pads 34, the wiring portions 46, and the extending portions 47 are formed at the same time. Thereafter, a layer made of nickel (Ni) and a layer made of gold (Au) are sequentially stacked on the substrate-side connection pad 34 by plating. The layer made of gold (Au) is formed by electroless plating. In this way, the circuit board 32 can be manufactured.

基板側接続パッド34、配線部分46および延在部分47は、同一の材質から成り、同一の方法で、同時に形成される。したがって、工程数を増加させることなく、延在部分47を形成することができる。   The board-side connection pad 34, the wiring part 46, and the extending part 47 are made of the same material and are simultaneously formed by the same method. Therefore, the extended portion 47 can be formed without increasing the number of steps.

図4は、半導体チップ31を回路基板32に実装する実装手順を説明するための図であり、図4(1)は半導体チップ31を回路基板32に近接させている状態を示し、図4(2)は半導体チップ31に押圧力および超音波振動を印加している状態を示し、図4(3)は接合ツール56を半導体チップ31から離反させている状態を示す。   4 is a diagram for explaining a mounting procedure for mounting the semiconductor chip 31 on the circuit board 32. FIG. 4A shows a state in which the semiconductor chip 31 is brought close to the circuit board 32, and FIG. 2) shows a state in which a pressing force and ultrasonic vibration are applied to the semiconductor chip 31, and FIG. 4 (3) shows a state in which the bonding tool 56 is separated from the semiconductor chip 31.

この実装手順は、たとえば接合装置によって実行される。大略的には、接合装置は、ステージと、接合ツール56と、ツール駆動手段と、超音波振動印加手段とを含む。ステージは、回路基板32を水平に保持し、この回路基板32を移動させる。接合ツール56は、ステージの上方に設けられ、半導体チップ31を負圧で真空吸着して保持する。接合ツール56は、たとえば鉄(Fe)から成り、半導体チップ31を吸着するための吸着孔が形成される。ツール駆動手段は、接合ツール56を上下方向に移動させるとともに、接合ツール56を介して半導体チップ31に押圧力を印加する。超音波振動印加手段は、接合ツール56を介して半導体チップ31に超音波振動を印加する。   This mounting procedure is executed by, for example, a joining apparatus. In general, the joining apparatus includes a stage, a joining tool 56, tool driving means, and ultrasonic vibration applying means. The stage holds the circuit board 32 horizontally and moves the circuit board 32. The bonding tool 56 is provided above the stage and holds the semiconductor chip 31 by vacuum suction with a negative pressure. The joining tool 56 is made of, for example, iron (Fe), and an adsorption hole for adsorbing the semiconductor chip 31 is formed. The tool driving means moves the bonding tool 56 in the vertical direction and applies a pressing force to the semiconductor chip 31 via the bonding tool 56. The ultrasonic vibration applying unit applies ultrasonic vibration to the semiconductor chip 31 via the bonding tool 56.

図2に示す半導体チップ31と図3に示す回路基板32とが準備され、半導体チップ31が接合ツール56に装着され、回路基板32がステージに載置されると、実装作業が開始される。実装作業が開始されると、ステージによって、半導体チップ31の各突起電極33と回路基板32の各基板側接続パッド34とが対向するように、回路基板32が半導体チップ31に対して位置合わせされる。   When the semiconductor chip 31 shown in FIG. 2 and the circuit board 32 shown in FIG. 3 are prepared, the semiconductor chip 31 is mounted on the bonding tool 56, and the circuit board 32 is placed on the stage, the mounting operation is started. When the mounting operation is started, the circuit board 32 is aligned with the semiconductor chip 31 by the stage so that the protruding electrodes 33 of the semiconductor chip 31 and the board-side connection pads 34 of the circuit board 32 face each other. The

次に、ツール駆動手段によって、図4(1)に示すように、接合ツール56が降下される。ツール駆動手段は、接合ツール56を所定位置まで降下させる。これによって半導体チップ31が回路基板32に載置されて、半導体チップ31の各突起電極33と回路基板32の各基板側接続パッド34とが当接される。   Next, as shown in FIG. 4A, the welding tool 56 is lowered by the tool driving means. The tool driving means lowers the joining tool 56 to a predetermined position. As a result, the semiconductor chip 31 is placed on the circuit board 32, and the protruding electrodes 33 of the semiconductor chip 31 and the board-side connection pads 34 of the circuit board 32 come into contact with each other.

次に、図4(2)に示すように、ツール駆動手段による半導体チップ31への押圧力の印加が開始され、また超音波振動印加手段による半導体チップ31への超音波振動の印加が開始される。   Next, as shown in FIG. 4B, the application of the pressing force to the semiconductor chip 31 by the tool driving means is started, and the application of the ultrasonic vibration to the semiconductor chip 31 by the ultrasonic vibration applying means is started. The

半導体チップ31には、半導体チップ31から回路基板32に向かう方向Bに、全体にわたって均一に押圧力が印加される。また半導体チップ31には、この半導体チップ31の前記1組の対向する縁辺40a,40cの延びる方向に平行な振動方向Aに振動する超音波振動が印加される。   A pressing force is uniformly applied to the semiconductor chip 31 in the direction B from the semiconductor chip 31 toward the circuit board 32 throughout. The semiconductor chip 31 is applied with ultrasonic vibration that vibrates in a vibration direction A parallel to the extending direction of the pair of opposing edges 40 a and 40 c of the semiconductor chip 31.

半導体チップ31への押圧力は、たとえば70〜90MPaに選ばれる。超音波振動の振幅は、たとえば2〜5μmに選ばれる。超音波振動の周波数は、たとえば60kHzに選ばれる。   The pressing force to the semiconductor chip 31 is selected from 70 to 90 MPa, for example. The amplitude of the ultrasonic vibration is selected from 2 to 5 μm, for example. The frequency of the ultrasonic vibration is selected to be 60 kHz, for example.

超音波振動の印加を開始してから所定時間を経過すると、超音波振動印加手段による半導体チップ31への超音波振動の印加が終了され、またツール駆動手段による半導体チップ31への押圧力の印加が終了される。超音波振動を印加する印加時間は、たとえば0.2〜1.0秒に選ばれる。この後、半導体チップ31が接合ツール56から離脱され、ツール駆動手段によって、図4(3)に示すように、接合ツール56が上昇され、実装作業が終了される。   When a predetermined time has elapsed since the start of application of ultrasonic vibration, the application of ultrasonic vibration to the semiconductor chip 31 by the ultrasonic vibration application means is terminated, and the application of the pressing force to the semiconductor chip 31 by the tool driving means. Is terminated. The application time for applying the ultrasonic vibration is selected from 0.2 to 1.0 seconds, for example. Thereafter, the semiconductor chip 31 is detached from the joining tool 56, and the joining tool 56 is raised by the tool driving means as shown in FIG.

前述のように、半導体チップ31に押圧力が印加された状態、したがって半導体チップ31の各突起電極33が回路基板32の各基板側接続パッド34に押圧された状態で、超音波振動が半導体チップ31に印加される。これによって各突起電極33と各基板側接続パッド34とが擦れ合い、各突起電極33と各基板側接続パッド34との間の汚染層が除去される。汚染層は、各突起電極33の表面および各基板側接続パッド34の表面に形成される層であって、酸化膜などを含む層である。   As described above, in a state where a pressing force is applied to the semiconductor chip 31, that is, in a state where each protruding electrode 33 of the semiconductor chip 31 is pressed against each board-side connection pad 34 of the circuit board 32, ultrasonic vibration is generated in the semiconductor chip. 31 is applied. As a result, the protruding electrodes 33 and the substrate-side connection pads 34 rub against each other, and the contamination layer between the protruding electrodes 33 and the substrate-side connection pads 34 is removed. The contamination layer is a layer formed on the surface of each protruding electrode 33 and the surface of each substrate-side connection pad 34 and includes an oxide film or the like.

汚染層が除去された状態で、さらに各突起電極33が各基板側接続パッド34に押圧されることによって、各突起電極33および各基板側接続パッド34の凹凸部が完全に潰され、各突起電極33の各基板側接続パッド34に対向する各対向面が全体にわたって、各基板側接続パッド34に接合される。このような超音波フリップチップ接合によって、半導体チップ31が回路基板32に実装されて、本実施の形態の実装構造が実現される。   In the state where the contamination layer is removed, each projection electrode 33 is further pressed against each substrate-side connection pad 34, whereby the projections and depressions of each projection electrode 33 and each substrate-side connection pad 34 are completely crushed. The opposing surfaces of the electrode 33 facing the substrate-side connection pads 34 are bonded to the substrate-side connection pads 34 throughout. By such ultrasonic flip chip bonding, the semiconductor chip 31 is mounted on the circuit board 32, and the mounting structure of the present embodiment is realized.

図5は、振動方向Aに沿って並ぶ各突起電極33と各基板側接続パッド34との接合強度を示す図である。図5において、横軸は、基板側接続パッド34の位置を示し、縦軸は、接合強度を示す。   FIG. 5 is a diagram showing the bonding strength between the protruding electrodes 33 and the substrate-side connection pads 34 arranged along the vibration direction A. As shown in FIG. In FIG. 5, the horizontal axis indicates the position of the board-side connection pad 34, and the vertical axis indicates the bonding strength.

各突起電極33と各基板側接続パッド34とを、超音波フリップチップ接合によって接合した後、半導体チップ31を、各突起電極33を残して除去した。この後、振動方向Aに沿って並ぶ各基板側接続パッド34とこれらの各基板側接続パッド34上に残存した各突起電極33との接合部のせん断強度を、シェアツールを用いて測定した。前記接合部のせん断強度は、接合強度に相当する。   After each protruding electrode 33 and each substrate side connection pad 34 were joined by ultrasonic flip chip bonding, the semiconductor chip 31 was removed leaving each protruding electrode 33. Thereafter, the shear strength of the joint portion between each substrate side connection pad 34 arranged along the vibration direction A and each projection electrode 33 remaining on each substrate side connection pad 34 was measured using a shear tool. The shear strength of the joint corresponds to the joint strength.

ここでは、説明の便宜上、振動方向Aに沿って4つの基板側接続パッド34が並ぶ場合を想定する。図5では、振動方向Aの両端P1,P4に位置する各基板側接続パッド34とこれらの各基板側接続パッド34に対向する各突起電極33との接合強度を示すとともに、振動方向Aの両端P1,P4間の中間P2,P3に位置する各基板側接続パッド34とこれらの各接続パッド34に対向する各突起電極33との接合強度を示す。   Here, for convenience of explanation, it is assumed that four substrate-side connection pads 34 are arranged along the vibration direction A. FIG. 5 shows the bonding strength between the board-side connection pads 34 positioned at both ends P1 and P4 in the vibration direction A and the protruding electrodes 33 facing the board-side connection pads 34, and the both ends in the vibration direction A. The bonding strength between each board-side connection pad 34 located in the middle P2, P3 between P1 and P4 and each protruding electrode 33 facing each connection pad 34 is shown.

この図5に示すように、本実施の形態では、振動方向Aに関する位置による接合強度のばらつきが抑制されている。具体的には、前記両端P1,P4の各基板側接続パッド34は、前記中間P2,P3の各基板側接続パッド34に比べて、各突起電極33との接合強度が同じ程度である。また図18と比較すると、前記両端P1,P4の各基板側接続パッド34と各突起電極33との接合強度が向上されている。   As shown in FIG. 5, in this embodiment, variation in bonding strength due to the position in the vibration direction A is suppressed. Specifically, the bonding strengths of the substrate-side connection pads 34 at both ends P1, P4 are the same as the bonding strengths of the protruding electrodes 33 compared to the substrate-side connection pads 34 of the intermediate P2, P3. Compared with FIG. 18, the bonding strength between the board-side connection pads 34 and the protruding electrodes 33 at both ends P1 and P4 is improved.

図6は、超音波フリップチップ接合時における各基板側接続パッド34の挙動を示す模式図である。この図6を参照して、接合強度のばらつきが抑制される理由を説明する。各基板側接続パッド34は剛体とみなし、絶縁基材45は弾性体とみなす。   FIG. 6 is a schematic diagram showing the behavior of each substrate-side connection pad 34 during ultrasonic flip-chip bonding. With reference to FIG. 6, the reason why the variation in bonding strength is suppressed will be described. Each board-side connection pad 34 is regarded as a rigid body, and the insulating base material 45 is regarded as an elastic body.

超音波フリップチップ接合時、基板側接続パッド34は、突起電極33から押圧力および摩擦力を受ける。これによって基板側接続パッド34には、予め定める軸線L31まわりの回転モーメントが働く。前記予め定める軸線L31は、基板側接続パッド34の絶縁基材45に対向する面内で、振動方向Aに垂直な方向に延び、基板側接続パッド34の振動方向A中央に位置する軸線L31である。   At the time of ultrasonic flip chip bonding, the substrate side connection pad 34 receives a pressing force and a frictional force from the protruding electrode 33. As a result, a predetermined rotational moment around the axis L31 acts on the board-side connection pad 34. The predetermined axis L31 is an axis L31 that extends in a direction perpendicular to the vibration direction A in a plane facing the insulating base 45 of the board side connection pad 34 and is located at the center of the vibration direction A of the board side connection pad 34. is there.

このように基板側接続パッド34には、回転モーメントが働くので、基板側接続パッド34は、絶縁基材45を押し下げる押下げ力および絶縁基材45を引き上げる引上げ力を、絶縁基材45に与える。押下げ力は、基板側接続パッド34から絶縁基材45に向かう方向の力であり、絶縁基材45を圧縮する圧縮力である。引上げ力は、絶縁基材45から基板側接続パッド34に向かう方向の力であり、絶縁基材45を引っ張る引張力である。この引上げ力は、押下げ力とは反対方向の力である。   As described above, since the rotational moment acts on the board-side connection pad 34, the board-side connection pad 34 gives the insulating base material 45 a pressing force that pushes down the insulating base material 45 and a pulling force that pulls up the insulating base material 45. . The pressing force is a force in a direction from the board-side connection pad 34 toward the insulating base material 45 and is a compressive force that compresses the insulating base material 45. The pulling force is a force in a direction from the insulating base material 45 toward the board-side connection pad 34 and is a pulling force that pulls the insulating base material 45. This pulling force is a force in the direction opposite to the pressing force.

回路基板32に対して半導体チップ31が振動方向一方A1に変位するとき、基板側接続パッド34には、この基板側接続パッド34の振動方向一方A1側の端部を絶縁基材45に近接させる方向に回転モーメントが働く。このとき、基板側接続パッド34の振動方向一方A1側の端部は、絶縁基材45に押下げ力を与え、基板側接続パッド34の振動方向他方A2側の端部は、絶縁基材45に引上げ力を与える。   When the semiconductor chip 31 is displaced in the vibration direction one A1 with respect to the circuit board 32, the substrate side connection pad 34 is brought close to the insulating base material 45 at the end on the vibration direction one A1 side of the substrate side connection pad 34. A rotational moment works in the direction. At this time, the end on the one side A1 in the vibration direction of the board-side connection pad 34 gives a pressing force to the insulating base 45, and the end on the other side A2 in the vibration direction of the board-side connection pad 34 is the insulating base 45. Gives a pulling force.

回路基板32に対して半導体チップ31が振動方向他方A2に変位するとき、基板側接続パッド34には、この基板側接続パッド34の振動方向一方A1側の端部を絶縁基材45から離反させる方向に回転モーメントが働く。このとき、基板側接続パッド34の振動方向一方A1側の端部は、絶縁基材45に引上げ力を与え、基板側接続パッド34の振動方向他方A2側の端部は、絶縁基材45に押下げ力を与える。   When the semiconductor chip 31 is displaced in the other vibration direction A <b> 2 with respect to the circuit board 32, the substrate side connection pad 34 is separated from the insulating base material 45 at the end of the substrate side connection pad 34 on the one vibration direction A <b> 1 side. A rotational moment works in the direction. At this time, the end on the one side A1 in the vibration direction of the board-side connection pad 34 gives a pulling force to the insulating base 45, and the end on the other side A2 in the vibration direction of the board-side connection pad 34 applies to the insulating base 45. Give a pressing force.

本実施の形態の実装構造では、複数の突起電極33が、超音波振動の振動方向Aに沿って突起電極間隔L1で並ぶとともに、複数の基板側接続パッド34が、振動方向Aに沿って並ぶ。これらの各突起電極33と各基板側接続パッド34とが対向する。   In the mounting structure of the present embodiment, the plurality of protruding electrodes 33 are arranged at the protruding electrode interval L1 along the vibration direction A of ultrasonic vibration, and the plurality of substrate-side connection pads 34 are arranged along the vibration direction A. . Each of these protruding electrodes 33 and each board-side connection pad 34 face each other.

このように各突起電極33と各基板側接続パッド34とが配置されるので、振動方向Aに隣り合う各基板側接続パッド34における振動方向Aの各端部のうち、内側の2つの端部が絶縁基材45に与える押下げ力および引上げ力は、相殺される。したがって、前記内側の2つの端部からの押下げ力および引上げ力による絶縁基材45の変形が抑えられ、これによって前記内側の2つの端部の変位が抑えられる。   Since each protruding electrode 33 and each board-side connection pad 34 are arranged in this way, two inner ends of each end in the vibration direction A of each board-side connection pad 34 adjacent to the vibration direction A. The pressing force and the pulling force applied to the insulating base material 45 are canceled out. Therefore, the deformation of the insulating base material 45 due to the pressing force and the pulling force from the two inner ends is suppressed, and thereby the displacement of the two inner ends is suppressed.

前記内側の2つの端部とは、振動方向Aに隣り合う各基板側接続パッド34のうち、振動方向一方A1側の基板側接続パッド34における振動方向他方A2側の端部と、振動方向他方A2側の基板側接続パッド34における振動方向一方A1側の端部とを意味する。   The two inner end portions are the end portions on the other vibration direction A2 side of the board-side connection pads 34 on the one side in the vibration direction among the board-side connection pads 34 adjacent in the vibration direction A, and the other side in the vibration direction. The vibration direction of the board-side connection pad 34 on the A2 side means one end on the A1 side.

また本実施の形態の実装構造では、両端の各基板側接続パッド34には、これらの両端の各基板側接続パッド34から振動方向Aに沿って互いに離反する方向に延びる延在部分47がそれぞれ連なり、各延在部分47は、絶縁基材45に設けられる。   Further, in the mounting structure of the present embodiment, each of the board-side connection pads 34 at both ends has extended portions 47 that extend from the board-side connection pads 34 at both ends in directions away from each other along the vibration direction A, respectively. The extended portions 47 are continuously provided on the insulating base material 45.

このように各延在部分47が設けられるので、両端の各基板側接続パッド34における振動方向Aの各端部のうち、外側の2つの端部の変位が抑えられる。詳細に述べると、前記外側の2つの端部には、延在部分47がそれぞれ連なるので、前記外側の2つの端部からの押下げ力および引上げ力は、分散されて絶縁基材45に与えられる。したがって前記外側の2つの端部からの押下げ力および引上げ力による絶縁基材45の変形が抑えられ、これによって前記外側の2つの端部の変位が抑えられる。   Thus, since each extended part 47 is provided, the displacement of two outer edge parts is suppressed among each edge part of the vibration direction A in each board | substrate side connection pad 34 of both ends. More specifically, since the extending portions 47 are connected to the two outer ends, the pressing force and the pulling force from the two outer ends are distributed and applied to the insulating base material 45. It is done. Therefore, the deformation of the insulating base material 45 due to the pressing force and the pulling force from the two outer ends is suppressed, and thereby the displacement of the two outer ends is suppressed.

前記外側の2つの端部とは、両端の各基板側接続パッド34のうち、振動方向一方A1側の基板側接続パッド34における振動方向一方A1側の端部と、振動方向他方A2側の基板側接続パッド34における振動方向他方A2側の端部とを意味する。   The two outer ends are the one on the vibration direction side A1 of the board-side connection pads 34 on the one side A1 in the vibration direction and the board on the other side A2 on the vibration direction side. It means the vibration direction in the side connection pad 34 and the other end portion on the A2 side.

以上のように、振動方向Aに沿って並ぶ各基板側接続パッド34における振動方向Aの各端部の変位が抑えられるので、超音波フリップチップ接合時に、両端の各基板側接続パッド34とこれらの各基板側接続パッド34に対向する各突起電極33との相対振動を大きくすることができる。これによって両端の各基板側接続パッド34と各突起電極33との間の汚染層を確実に除去することができる。したがって両端の各基板側接続パッド34と各突起電極33との接合強度を向上させることができる。   As described above, since the displacement of each end portion in the vibration direction A in each substrate side connection pad 34 arranged along the vibration direction A can be suppressed, each of the substrate side connection pads 34 at both ends and these at the time of ultrasonic flip chip bonding. The relative vibration with each protruding electrode 33 facing each substrate-side connection pad 34 can be increased. As a result, the contamination layer between the board-side connection pads 34 and the protruding electrodes 33 at both ends can be reliably removed. Accordingly, the bonding strength between the board-side connection pads 34 and the bump electrodes 33 at both ends can be improved.

このような本実施の形態では、接合強度を向上させるにあたって、超音波振動を強くする必要がないので、前記特許文献1に開示される技術のように、超音波フリップチップ接合時の半導体チップ31の破損に起因する歩留まりの低下を防ぐために、半導体チップ31の設計を変更する必要がない。したがって、半導体チップ31の設計を変更することなく、超音波フリップチップ接合時の半導体チップ31の破損に起因する歩留まりの低下を防ぎ、かつ両端の各基板側接続パッド34と各突起電極33との接合強度を向上させることができる。   In this embodiment, since it is not necessary to increase the ultrasonic vibration in order to improve the bonding strength, the semiconductor chip 31 at the time of ultrasonic flip-chip bonding as in the technique disclosed in Patent Document 1 above. It is not necessary to change the design of the semiconductor chip 31 in order to prevent a decrease in yield due to the damage of the semiconductor chip 31. Therefore, without changing the design of the semiconductor chip 31, it is possible to prevent the yield from being reduced due to the damage of the semiconductor chip 31 during the ultrasonic flip chip bonding, and to connect the substrate-side connection pads 34 and the protruding electrodes 33 at both ends. Bonding strength can be improved.

ここで、振動方向Aに沿って4つの基板側接続パッド34が並ぶ場合を想定する。以下、4つの基板側接続パッド34を、振動方向一方A1側から順に、第1〜第4基板側接続パッド61〜64と称する場合がある。第1および第4基板側接続パッド61,64は、両端P1,P4の各基板側接続パッドに相当し、第2および第3基板側接続パッド62,63は、中間P2,P3の各基板側接続パッドに相当する。   Here, it is assumed that four substrate-side connection pads 34 are arranged along the vibration direction A. Hereinafter, the four board-side connection pads 34 may be referred to as first to fourth board-side connection pads 61 to 64 in order from the vibration direction one A1 side. The first and fourth board-side connection pads 61 and 64 correspond to the board-side connection pads at both ends P1 and P4, and the second and third board-side connection pads 62 and 63 are the board sides of the intermediate P2 and P3. Corresponds to the connection pad.

たとえば、第2基板側接続パッド62に着目する。回路基板32に対して半導体チップ31が振動方向他方A2に変位するとき、第2基板側接続パッド62には、この第2基板側接続パッド62の振動方向他方A2側の端部を絶縁基材45に近接させる方向に回転モーメント66が働く。これによって、第2基板側接続パッド62の振動方向一方A1側の端部が絶縁基材45から浮き上がろうとし、第2基板側接続パッド62の振動方向他方A2側の端部が絶縁基材45に沈み込もうとする。   For example, focus on the second substrate-side connection pads 62. When the semiconductor chip 31 is displaced in the vibration direction other side A2 with respect to the circuit board 32, the second substrate side connection pad 62 has an end on the vibration direction other side A2 side of the second substrate side connection pad 62 as an insulating base material. Rotational moment 66 acts in the direction of approaching 45. As a result, the end on the one side A1 in the vibration direction of the second board side connection pad 62 tries to float up from the insulating base material 45, and the end on the other side in the vibration direction of the second board side connection pad 62 is on the insulating base. Trying to sink into the material 45.

このとき、第1基板側接続パッド61にも同様に、回転モーメント67が働く。これによって第1基板側接続パッド61の振動方向他方A2側の端部は、絶縁基材45に沈み込もうとする。また第3基板側接続パッド63にも同様に、回転モーメント68が働く。これによって第3基板側接続パッド63の振動方向一方A1側の端部は、絶縁基材45から浮き上がろうとする。   At this time, the rotational moment 67 similarly acts on the first substrate-side connection pad 61. As a result, the end on the other side A <b> 2 of the vibration direction of the first substrate side connection pad 61 tends to sink into the insulating base material 45. Similarly, the rotational moment 68 acts on the third substrate-side connection pad 63. As a result, the end of the third substrate side connection pad 63 on the one vibration direction side A <b> 1 side tends to float up from the insulating base material 45.

したがって第2基板側接続パッド62では、両隣の第1および第3基板側接続パッド61,63の存在によって、この第2基板側接続パッド62に働く回転モーメント66が相殺される。これによって、見掛け上、前記回転モーメント66は小さくなり、第2基板側接続パッド62の変位が抑えられる。   Therefore, in the second substrate side connection pad 62, the rotational moment 66 acting on the second substrate side connection pad 62 is canceled by the presence of the first and third substrate side connection pads 61 and 63 adjacent to each other. As a result, the rotational moment 66 is apparently reduced, and the displacement of the second substrate side connection pad 62 is suppressed.

第3基板側接続パッド63に関しても、第2基板側接続パッド62の場合と同様に、回転モーメント68が働くけれども、両隣の第2および第4基板側接続パッド62,64の存在によって、この第3基板側接続パッド63に働く回転モーメント68は相殺される。これによって、見掛け上、前記回転モーメント68は小さくなり、第3基板側接続パッド63の変位が抑えられる。   As with the second substrate-side connection pad 62, the third substrate-side connection pad 63 also has a rotational moment 68, but the second and fourth substrate-side connection pads 62 and 64 are adjacent to each other. The rotational moment 68 acting on the three board side connection pads 63 is canceled out. As a result, the rotational moment 68 is apparently reduced, and the displacement of the third substrate side connection pad 63 is suppressed.

第1基板側接続パッド61に関しては、振動方向他方A2側に第2接続パッド62が存在するけれども、振動方向一方A1側には基板側接続パッドが存在しないので、この第1基板側接続パッド61に働く回転モーメント67の相殺はできない。このような第1基板側接続パッド61であっても、振動方向一方A1側の端部に延在部分47が連なるので、この延在部分47によって回転モーメント67による変位が抑えられる。   With respect to the first board side connection pad 61, the second connection pad 62 exists on the other side A2 in the vibration direction, but there is no board side connection pad on the one side A1 in the vibration direction. It is not possible to cancel the rotational moment 67 acting on the. Even in such a first substrate side connection pad 61, since the extended portion 47 is connected to the end portion on the one side A1 in the vibration direction, the extended portion 47 suppresses the displacement due to the rotational moment 67.

第4基板側接続パッド64に関しては、振動方向一方A1側に第3接続パッド63が存在するけれども、振動方向他方A2側には基板側接続パッドが存在しないので、この第4基板側接続パッド64に働く回転モーメント69の相殺はできない。このような第4基板側接続パッド64であっても、振動方向他方A2側の端部に延在部分47が連なるので、この延在部分47によって回転モーメント69による変位が抑えられる。   Regarding the fourth substrate side connection pad 64, the third connection pad 63 exists on the one side A1 in the vibration direction, but there is no substrate side connection pad on the other side A2 in the vibration direction. It is not possible to cancel the rotational moment 69 acting on the. Even in such a fourth substrate side connection pad 64, the extended portion 47 is connected to the end portion on the other side A <b> 2 in the vibration direction, so that the displacement due to the rotational moment 69 is suppressed by the extended portion 47.

このように、回路基板32に対して半導体チップ31が振動方向他方A2に変位するとき、第1〜第4基板側接続パッド61〜64の変位が抑えられる。また振動方向一方A1に変位する場合も、振動方向他方A2に変位する場合と同様に、第1〜第4基板側接続パッド61〜64の変位が抑えられる。   Thus, when the semiconductor chip 31 is displaced in the other vibration direction A2 with respect to the circuit board 32, the displacement of the first to fourth board-side connection pads 61 to 64 is suppressed. Further, when the displacement is made in the vibration direction one A1, the displacement of the first to fourth substrate side connection pads 61 to 64 is suppressed as in the case of the displacement in the other vibration direction A2.

半導体チップ31に超音波振動が印加されるとき、回路基板32に対して半導体チップ31は振動方向一方A1および他方A2に交互に変位する。このとき、前述のように、第1〜第4基板側接続パッド61〜64の変位が抑えられ、これによって第1〜第4基板側接続パッド61〜64は同等の挙動をすることができる。換言すれば、両端の第1および第4基板側接続パッド61,64が、中間の第2および第3基板側接続パッド62,63と同等の挙動をすることができる。   When ultrasonic vibration is applied to the semiconductor chip 31, the semiconductor chip 31 is displaced alternately with respect to the circuit board 32 in one vibration direction A1 and the other A2. At this time, as described above, the displacement of the first to fourth substrate side connection pads 61 to 64 is suppressed, and thereby the first to fourth substrate side connection pads 61 to 64 can behave in the same manner. In other words, the first and fourth substrate side connection pads 61 and 64 at both ends can behave in the same manner as the intermediate second and third substrate side connection pads 62 and 63.

したがって両端の第1および第4基板側接続パッド61,64と各突起電極33との相対振動の大きさを、中間の第2および第3基板側接続パッド62,63と各突起電極33との相対振動の大きさと、同じ程度にすることができる。これによって、両端の第1および第4基板側接続パッド61,64と各突起電極33との接合強度を、中間の第2および第3基板側接続パッド62,63と各突起電極33との接合強度と同じ程度にすることができる。したがって全ての基板側接続パッド61〜64において、突起電極33との間で良好な接合が達成され、電気的な接続に対する信頼性の高い半導体装置30を実現することができる。   Accordingly, the magnitude of relative vibration between the first and fourth substrate-side connection pads 61 and 64 at both ends and the respective projection electrodes 33 is set to be equal to that between the second and third substrate-side connection pads 62 and 63 and the respective projection electrodes 33. The magnitude of the relative vibration can be set to the same level. As a result, the bonding strength between the first and fourth substrate-side connection pads 61 and 64 at both ends and the protruding electrodes 33 is set so that the bonding between the intermediate second and third substrate-side connecting pads 62 and 63 and the protruding electrodes 33 is performed. It can be as strong as the strength. Therefore, in all the substrate-side connection pads 61 to 64, good bonding with the protruding electrode 33 is achieved, and the semiconductor device 30 with high reliability for electrical connection can be realized.

図7は、一端のパッド部分寸法W1と接合強度との関係を示す図である。他端のパッド部分寸法W2と接合強度との関係は、一端のパッド部分寸法W1と接合強度との関係と同様であるので、説明を省略する。図7において、横軸は、一端のパッド部分寸法W1を示し、縦軸は、一端の基板側接続パッド34と突起電極33との接合強度を示す。また図7において、接合強度の値Sは、中間の基板側接続パッド34と突起電極33との接合強度を示す。   FIG. 7 is a diagram showing the relationship between the pad part dimension W1 at one end and the bonding strength. Since the relationship between the pad part dimension W2 at the other end and the bonding strength is the same as the relationship between the pad part dimension W1 at one end and the bonding strength, the description thereof is omitted. In FIG. 7, the horizontal axis indicates the pad part dimension W <b> 1 at one end, and the vertical axis indicates the bonding strength between the substrate-side connection pad 34 and the protruding electrode 33 at one end. In FIG. 7, the bonding strength value S indicates the bonding strength between the intermediate substrate-side connection pad 34 and the protruding electrode 33.

図7では、パッド寸法Wを60μmとし、これに対して、一端のパッド部分寸法W1を、60μm、120μm、180μm、240μm、300μmと変えた場合の接合強度を示す。すなわち、一端のパッド部分寸法W1を、パッド寸法Wの1倍、2倍、3倍、4倍、5倍と変えた場合の接合強度を示す。測定方法は、前記図5に示す接合強度の測定方法と同様である。   FIG. 7 shows the bonding strength when the pad dimension W is 60 μm and the pad part dimension W1 at one end is changed to 60 μm, 120 μm, 180 μm, 240 μm, and 300 μm. That is, the bonding strength when the pad part dimension W1 at one end is changed to 1, 2, 3, 4, and 5 times the pad dimension W is shown. The measuring method is the same as the measuring method of the bonding strength shown in FIG.

この図7に示すように、一端のパッド部分寸法W1がパッド寸法Wの2倍以上3倍以下に選ばれることによって、一端の基板側接続パッド34と突起電極33との接合強度が確実に向上され、この接合強度が、中間の基板側接続パッド34と突起電極33との接合強度と同等となる。また2倍未満では、一端の基板側接続パッド34と突起電極33との接合強度を充分に向上させることができず、この接合強度が、中間の基板側接続パッド34と突起電極33との接合強度よりも小さくなってしまう。また3倍を超えると、一端の基板側接続パッド34と突起電極33との接合強度の向上という効果は飽和する。   As shown in FIG. 7, when the pad part dimension W1 at one end is selected to be not less than 2 times and not more than 3 times the pad dimension W, the bonding strength between the substrate-side connection pad 34 at one end and the protruding electrode 33 is reliably improved. This bonding strength is equal to the bonding strength between the intermediate substrate-side connection pad 34 and the protruding electrode 33. If it is less than twice, the bonding strength between the substrate-side connection pad 34 at one end and the protruding electrode 33 cannot be sufficiently improved, and this bonding strength is the bonding between the intermediate substrate-side connecting pad 34 and the protruding electrode 33. It will be smaller than the strength. If it exceeds three times, the effect of improving the bonding strength between the substrate-side connection pad 34 at one end and the protruding electrode 33 is saturated.

前記接合強度は、超音波接合の条件パラメータ、たとえば半導体チップ31への押圧力ならびに超音波振動の振幅および周波数などによって異なる。本実施の形態では、前記超音波接合の条件パラメータの全てに基づいて、各パット部分寸法W1,W2が決定される。   The bonding strength varies depending on the ultrasonic bonding condition parameters such as the pressing force to the semiconductor chip 31 and the amplitude and frequency of ultrasonic vibration. In the present embodiment, the pad part dimensions W1 and W2 are determined based on all the ultrasonic welding condition parameters.

本実施の形態によれば、樹脂材料から成る絶縁基材45が用いられる。樹脂材料から成る絶縁基材45は、セラミック基板に比べて、安価である。したがって回路基板32のコストを低減することができる。樹脂材料から成る絶縁基材45は、セラミック基板に比べて変形しやすいので、このような絶縁基材45が使用される場合、両端の各基板側接続パッド34と各突起電極33との接合強度が低下しやすいけれども、前述のように延在部分47が設けられることによって、接合強度の低下を防ぐことができる。   According to the present embodiment, the insulating base material 45 made of a resin material is used. The insulating base material 45 made of a resin material is less expensive than a ceramic substrate. Therefore, the cost of the circuit board 32 can be reduced. Since the insulating base material 45 made of a resin material is more easily deformed than a ceramic substrate, when such an insulating base material 45 is used, the bonding strength between the board-side connection pads 34 at both ends and the protruding electrodes 33 is used. However, it is possible to prevent the bonding strength from being lowered by providing the extending portion 47 as described above.

また本実施の形態によれば、前述のように延在部分47が設けられるだけで、振動方向Aに沿って並ぶ全ての基板側接続パッド34において、突起電極33との良好な接合を得ることができる。その結果、現状の回路基板の作製コストを維持しつつ、半導体装置30の歩留まりを向上させることができる。また各基板側接続パッド34の中心間の距離を変更をすることなく、半導体装置30の歩留まりを向上させることができる。さらに、回路基板32は、超音波フリップチップ接合に好適に用いられるだけでなく、他のフリップチップ接合用の回路基板としても適用することができ、汎用性を高くすることができる。   Further, according to the present embodiment, it is possible to obtain good bonding with the protruding electrodes 33 in all the substrate side connection pads 34 arranged along the vibration direction A only by providing the extending portion 47 as described above. Can do. As a result, the yield of the semiconductor device 30 can be improved while maintaining the current manufacturing cost of the circuit board. In addition, the yield of the semiconductor device 30 can be improved without changing the distance between the centers of the substrate-side connection pads 34. Furthermore, the circuit board 32 is not only suitably used for ultrasonic flip chip bonding, but can also be applied as a circuit board for other flip chip bonding, so that versatility can be enhanced.

図8は、本発明の実施の他の形態の半導体チップの実装構造を簡略化して示す断面図である。本実施の形態の実装構造を有する半導体装置70は、前述の実施の形態の半導体装置30に類似するので、対応する部分には同一の符号を付し、共通する点は説明を省略する。半導体装置70は、半導体チップ71と回路基板72とを含む。   FIG. 8 is a cross-sectional view schematically showing a semiconductor chip mounting structure according to another embodiment of the present invention. Since the semiconductor device 70 having the mounting structure of the present embodiment is similar to the semiconductor device 30 of the above-described embodiment, the corresponding parts are denoted by the same reference numerals, and the description of common points is omitted. The semiconductor device 70 includes a semiconductor chip 71 and a circuit board 72.

図9は、半導体チップ71を簡略化して示す正面図である。この図9と前記図8とを参照して、半導体チップ71を説明する。本実施の形態では、振動方向Aに沿って突起電極間隔L1で並ぶ複数の突起電極33によって構成される突起電極群73,74が2つ、振動方向Aに沿って予め定める間隔(以下「電極群間隔」という)L11をあけて並ぶ。   FIG. 9 is a front view showing the semiconductor chip 71 in a simplified manner. The semiconductor chip 71 will be described with reference to FIG. 9 and FIG. In the present embodiment, there are two protruding electrode groups 73 and 74 constituted by a plurality of protruding electrodes 33 arranged at the protruding electrode interval L1 along the vibration direction A, and a predetermined interval along the vibrating direction A (hereinafter referred to as “electrode”). L11) (referred to as “group spacing”).

以下、振動方向Aに沿って並ぶ各突起電極群73,74のうち、振動方向一方A1側の突起電極群73を、第1の突起電極群73といい、振動方向他方A2側の突起電極群74を、第2の突起電極群74という。   Hereinafter, among the protruding electrode groups 73 and 74 arranged along the vibration direction A, the protruding electrode group 73 on the one side A1 in the vibration direction is referred to as a first protruding electrode group 73, and the protruding electrode group on the other side A2 in the vibration direction. 74 is referred to as a second protruding electrode group 74.

電極群間隔L11は、振動方向Aに沿って並ぶ各突起電極群73,74における各突起電極33のうち、内側の2つの突起電極33間の距離である。前記内側の2つの突起電極33とは、第1の突起電極群73における最も振動方向他方A2に位置する突起電極33と、第2の突起電極群74における最も振動方向一方A1に位置する突起電極33とを意味する。電極群間隔L11は、突起電極間隔L1の2倍以上である。電極群間隔L11は、たとえば400μmである。   The electrode group interval L11 is the distance between the inner two protruding electrodes 33 among the protruding electrodes 33 in the protruding electrode groups 73 and 74 arranged along the vibration direction A. The inner two protruding electrodes 33 are the protruding electrode 33 located in the other vibration direction A2 in the first protruding electrode group 73 and the protruding electrode located in the most vibration direction one A1 in the second protruding electrode group 74. 33. The electrode group interval L11 is at least twice the protruding electrode interval L1. The electrode group interval L11 is, for example, 400 μm.

図10は、回路基板72の一部を簡略化して示す正面図である。この図10と前記図8とを参照して、回路基板72を説明する。本実施の形態では、振動方向Aに沿ってパッド間隔L2で並ぶ複数の基板側接続パッド34によって構成される基板側接続パッド群75,76が2つ、振動方向Aに沿って並ぶ。各基板側接続パッド34は、半導体チップ71の各突起電極33にそれぞれ対向する。   FIG. 10 is a front view showing a part of the circuit board 72 in a simplified manner. The circuit board 72 will be described with reference to FIG. 10 and FIG. In the present embodiment, two substrate-side connection pad groups 75 and 76 constituted by a plurality of substrate-side connection pads 34 arranged at the pad interval L2 along the vibration direction A are arranged along the vibration direction A. Each substrate-side connection pad 34 faces each protruding electrode 33 of the semiconductor chip 71.

以下、振動方向Aに沿って並ぶ各基板側接続パッド群75,76のうち、振動方向一方A1側の基板側接続パッド群75を、第1の基板側接続パッド群75といい、振動方向他方A2側の基板側接続パッド群76を、第2の基板側接続パッド群76という。   Hereinafter, among the board-side connection pad groups 75 and 76 arranged along the vibration direction A, the board-side connection pad group 75 on the one side A1 in the vibration direction is referred to as a first board-side connection pad group 75, and the other vibration direction is on the other side. The board-side connection pad group 76 on the A2 side is referred to as a second board-side connection pad group 76.

第1の基板側接続パッド群75の各基板側接続パッド34のうち、振動方向Aの両端の各基板側接続パッド34には、両端の各基板側接続パッド34から振動方向Aに沿って互いに離反する方向に延びる延在部分47がそれぞれ連なる。すなわち、第1の基板側接続パッド群75の各基板側接続パッド34のうち、最も振動方向一方A1に位置する基板側接続パッド(以下「第1の基板側接続パッド群75における一端の基板側接続パッド」という)34には、振動方向一方A1に延びる延在部分47が連なり、最も振動方向他方A2に位置する基板側接続パッド(以下「第1の基板側接続パッド群75における他端の基板側接続パッド」という)34には、振動方向他方A2に延びる延在部分47が連なる。   Among the board-side connection pads 34 of the first board-side connection pad group 75, the board-side connection pads 34 at both ends in the vibration direction A are mutually connected along the vibration direction A from the board-side connection pads 34 at both ends. The extending portions 47 extending in the separating direction are connected to each other. That is, among the board-side connection pads 34 of the first board-side connection pad group 75, the board-side connection pad located in the most vibration direction A1 (hereinafter referred to as “the board side of one end in the first board-side connection pad group 75”). An extension portion 47 extending in one direction A1 in the vibration direction is connected to the connection pad 34), and is connected to the board-side connection pad (hereinafter referred to as "the first board-side connection pad group 75" in the other vibration direction other side A2). An extended portion 47 extending in the vibration direction other side A2 is connected to the board 34).

第2の基板側接続パッド群76の各基板側接続パッド34のうち、振動方向Aの両端の各基板側接続パッド34には、両端の各基板側接続パッド34から振動方向Aに沿って互いに離反する方向に延びる延在部分47がそれぞれ連なる。すなわち、第2の基板側接続パッド群76の各基板側接続パッド34のうち、最も振動方向一方A1に位置する基板側接続パッド(以下「第2の基板側接続パッド群76における一端の基板側接続パッド」という)34には、振動方向一方A1に延びる延在部分47が連なり、最も振動方向他方A2に位置する基板側接続パッド(以下「第2の基板側接続パッド群76における他端の基板側接続パッド」という)34には、振動方向他方A2に延びる延在部分47が連なる。   Of the board-side connection pads 34 of the second board-side connection pad group 76, the board-side connection pads 34 at both ends in the vibration direction A are mutually connected along the vibration direction A from the board-side connection pads 34 at both ends. The extending portions 47 extending in the separating direction are connected to each other. That is, among the board-side connection pads 34 of the second board-side connection pad group 76, the board-side connection pad located in the most vibration direction A1 (hereinafter referred to as “the board side of one end in the second board-side connection pad group 76”). An extension portion 47 extending in one direction A1 in the vibration direction is connected to the connection pad 34), and is connected to a board-side connection pad (hereinafter referred to as “the second board-side connection pad group 76” in the other direction A2). An extended portion 47 extending in the vibration direction other side A2 is connected to the board 34).

第1の基板側接続パッド群75における一端の基板側接続パッド34とこの基板側接続パッド34に連なる延在部分47とを合わせた振動方向寸法W21は、パッド寸法Wの2倍以上3倍以下に選ばれる。第2の基板側接続パッド群76における他端の基板側接続パッド34とこの基板側接続パッド34に連なる延在部分47とを合わせた振動方向寸法W22は、パッド寸法Wの2倍以上3倍以下に選ばれる。   The vibration direction dimension W21 of the first board-side connection pad group 75 including the board-side connection pad 34 at one end and the extending portion 47 connected to the board-side connection pad 34 is two to three times the pad dimension W. Chosen. The vibration direction dimension W22 of the second board-side connection pad group 76 including the board-side connection pad 34 at the other end and the extending portion 47 connected to the board-side connection pad 34 is two to three times the pad dimension W. Selected below.

第1の基板側接続パッド群75における他端の基板側接続パッド34とこの基板側接続パッド34に連なる延在部分47とを合わせた振動方向寸法W23は、たとえば235μmである。第2の基板側接続パッド群76における一端の基板側接続パッド34とこの基板側接続パッド34に連なる延在部分47とを合わせた振動方向寸法W24は、たとえば235μmである。第1の基板側接続パッド群75における他端の基板側接続パッド34に連なる延在部分47と、第2の基板側接続パッド群76における一端の基板側接続パッド34に連なる延在部分47との間の距離L41は、たとえば40μmである。   The vibration direction dimension W23 of the first substrate-side connection pad group 75 including the substrate-side connection pad 34 at the other end and the extending portion 47 connected to the substrate-side connection pad 34 is, for example, 235 μm. A vibration direction dimension W24 of the second substrate-side connection pad group 76 including the substrate-side connection pad 34 at one end and the extending portion 47 connected to the substrate-side connection pad 34 is, for example, 235 μm. In the first substrate-side connection pad group 75, an extended portion 47 that is continuous with the substrate-side connection pad 34 at the other end, and in the second substrate-side connection pad group 76, an extended portion 47 that is continuous with the substrate-side connection pad 34 is provided. The distance L41 between is, for example, 40 μm.

図11は、振動方向Aに沿って並ぶ各突起電極33と各基板側接続パッド34との接合強度の比較例を示す図である。図12は、振動方向Aに沿って並ぶ各突起電極33と各基板側接続パッド34との接合強度を示す図である。図11および図12において、横軸は、基板側接続パッド34の位置を示し、縦軸は、接合強度を示す。本実施の形態では、前述のように延在部分47が設けられるけれども、比較例では、延在部分47が設けられない。測定方法は、前記図5に示す接合強度の測定方法と同様である。   FIG. 11 is a diagram showing a comparative example of the bonding strength between the protruding electrodes 33 and the substrate side connection pads 34 arranged along the vibration direction A. FIG. FIG. 12 is a diagram showing the bonding strength between the protruding electrodes 33 and the substrate-side connection pads 34 arranged along the vibration direction A. 11 and 12, the horizontal axis indicates the position of the board-side connection pad 34, and the vertical axis indicates the bonding strength. In the present embodiment, the extended portion 47 is provided as described above, but in the comparative example, the extended portion 47 is not provided. The measuring method is the same as the measuring method of the bonding strength shown in FIG.

ここでは、説明の便宜上、振動方向Aに沿ってパッド間隔L2で並ぶ3つの基板側接続パッド34によって構成される基板側接続パッド群75,76が2つ、振動方向Aに沿って並ぶ場合を想定する。   Here, for convenience of explanation, a case where two board-side connection pad groups 75 and 76 constituted by three board-side connection pads 34 arranged at the pad interval L2 along the vibration direction A are arranged along the vibration direction A is shown. Suppose.

図11および図12では、第1の基板側接続パッド群75の両端P1,P3に位置する各基板側接続パッド34とこれらの各基板側接続パッド34に対向する各突起電極33との接合強度を示し、第1の基板側接続パッド群75の中間P2に位置する基板側接続パッド34とこの基板側接続パッド34に対向する突起電極33との接合強度を示す。また第2の基板側接続パッド群76の両端P4,P6に位置する各基板側接続パッド34とこれらの各基板側接続パッド34に対向する各突起電極33との接合強度を示し、第2の基板側接続パッド群76の中間P5に位置する基板側接続パッド34とこの基板側接続パッド34に対向する突起電極33との接合強度を示す。   In FIG. 11 and FIG. 12, the bonding strength between each substrate-side connection pad 34 located at both ends P <b> 1 and P <b> 3 of the first substrate-side connection pad group 75 and each protruding electrode 33 facing each of these substrate-side connection pads 34. And shows the bonding strength between the substrate-side connection pad 34 located in the middle P2 of the first substrate-side connection pad group 75 and the protruding electrode 33 facing the substrate-side connection pad 34. In addition, the bonding strength between each board-side connection pad 34 located at both ends P4 and P6 of the second board-side connection pad group 76 and each protruding electrode 33 facing each board-side connection pad 34 is shown. The bonding strength between the board-side connection pad 34 located in the middle P5 of the board-side connection pad group 76 and the protruding electrode 33 facing the board-side connection pad 34 is shown.

比較例では、図11に示すように、振動方向Aに関する位置によって、接合強度のばらつきが生じる。具体的には、第1の基板側接続パッド群75において、両端P1,P3の各基板側接続パッド34は、中間P2の基板側接続パッド34に比べて、突起電極33との接合強度が低い。第2の基板側接続パッド群76において、両端P4,P6の各基板側接続パッド34は、中間P5の基板側接続パッド34に比べて、突起電極33との接合強度が低い。   In the comparative example, as shown in FIG. 11, the bonding strength varies depending on the position in the vibration direction A. Specifically, in the first board-side connection pad group 75, each board-side connection pad 34 at both ends P1, P3 has a lower bonding strength with the protruding electrode 33 than the board-side connection pad 34 at the intermediate P2. . In the second substrate-side connection pad group 76, each substrate-side connection pad 34 at both ends P4 and P6 has a lower bonding strength with the protruding electrode 33 than the substrate-side connection pad 34 at the intermediate P5.

これに対して本実施の形態では、図12に示すように、振動方向Aに関する位置による接合強度のばらつきを抑制することができる。具体的には、第1の基板側接続パッド群75において、両端P1,P3の各基板側接続パッド34は、中間P2の基板側接続パッド34に比べて、突起電極33との接合強度が同じ程度である。第2の基板側接続パッド群76において、両端P4,P6の各基板側接続パッド34は、中間P5の基板側接続パッド34に比べて、突起電極33との接合強度が同じ程度である。   On the other hand, in this Embodiment, as shown in FIG. 12, the dispersion | variation in joining strength by the position regarding the vibration direction A can be suppressed. Specifically, in the first board-side connection pad group 75, each board-side connection pad 34 at both ends P1, P3 has the same bonding strength with the protruding electrode 33 as compared with the board-side connection pad 34 at the intermediate P2. Degree. In the second substrate-side connection pad group 76, the substrate-side connection pads 34 at both ends P4 and P6 have the same bonding strength with the protruding electrode 33 as compared with the substrate-side connection pad 34 at the intermediate P5.

このような本実施の形態によれば、前述の実施の形態と同様の効果を達成することができる。   According to this embodiment, it is possible to achieve the same effect as the above-described embodiment.

前述の実施の各形態は、本発明の例示に過ぎず、本発明の範囲内において構成を変更することができる。本発明は、突起電極を有する半導体チップの回路基板への実装に、広く適用できる。   Each of the embodiments described above is merely an example of the present invention, and the configuration can be changed within the scope of the present invention. The present invention can be widely applied to mounting a semiconductor chip having protruding electrodes on a circuit board.

図13は、一端の基板側接続パッド34とこの基板側接続パッド34に連なる延在部分100とを示す斜視図である。一端の基板側接続パッド34に連なる延在部分100は、振動方向一方A1に延びる第1延在部101と、配線部分46とは反対方向に延びる第2延在部102とを含んでいてもよい。この場合、一端の基板側接続パッド34の変位をさらに確実に防ぐことができ、一端の基板側接続パッド34と突起電極33との接合強度を向上させることができる。他端の基板側接続パッド34に関しても、同様である。   FIG. 13 is a perspective view showing the board-side connection pad 34 at one end and the extending portion 100 connected to the board-side connection pad 34. The extending portion 100 connected to the board-side connection pad 34 at one end may include a first extending portion 101 extending in one vibration direction A1 and a second extending portion 102 extending in the direction opposite to the wiring portion 46. Good. In this case, the displacement of the substrate-side connection pad 34 at one end can be further reliably prevented, and the bonding strength between the substrate-side connection pad 34 at one end and the protruding electrode 33 can be improved. The same applies to the board-side connection pad 34 at the other end.

半導体チップ31のチップ側接続パッド37には、めっきバンプに代えて、ボールバンプが設けられてもよい。また絶縁基材45の構成は、単層、両面および多層のいずれであってもよい。絶縁基材45は、樹脂材料から成る有機基板に限らず、たとえばセラミック基板であってもよい。   Instead of the plating bumps, ball bumps may be provided on the chip-side connection pads 37 of the semiconductor chip 31. Moreover, the structure of the insulating base material 45 may be any of a single layer, both surfaces, and multiple layers. The insulating base 45 is not limited to an organic substrate made of a resin material, and may be a ceramic substrate, for example.

さらに、突起電極がチップ側接続パッドに設けられる場合について説明してきたけれども、本発明の実施のさらに他の形態では、突起電極は、第1接続パッドであるチップ側接続パッドではなく、第2接続パッドである基板側接続パッドに設けられてもよい。   Furthermore, although the case where the protruding electrode is provided on the chip-side connection pad has been described, in still another embodiment of the present invention, the protruding electrode is not the chip-side connection pad that is the first connection pad, but the second connection. You may provide in the board | substrate side connection pad which is a pad.

この場合でも、振動方向に沿って並ぶ各基板側接続パッドにおける振動方向の各端部の変位が防がれるので、両端に位置する各基板側接続パッドに設けられる各突起電極の変位が防がれる。このように各突起電極の変位が防がれるので、超音波フリップチップ接合時に、両端に位置する各突起電極とこれらの各突起電極に対向するチップ側接続パッドとの相対振動を大きくすることができる。これによって両端に位置する各突起電極と各チップ側接続パッドとの間の汚染層を確実に除去することができる。したがって両端に位置する各突起電極と各第1接続パッドとの接合強度を向上させることができる。   Even in this case, the displacement of the end portions in the vibration direction of the substrate-side connection pads arranged along the vibration direction is prevented, so that the displacement of the protruding electrodes provided on the substrate-side connection pads located at both ends is prevented. It is. As described above, since the displacement of each protruding electrode is prevented, it is possible to increase the relative vibration between each protruding electrode located at both ends and the chip-side connection pad facing each protruding electrode at the time of ultrasonic flip chip bonding. it can. As a result, the contamination layer between the protruding electrodes located at both ends and the chip-side connection pads can be reliably removed. Therefore, it is possible to improve the bonding strength between the protruding electrodes located at both ends and the first connection pads.

このような本実施の形態では、接合強度を向上させるにあたって、超音波振動を強くする必要がないので、前記特許文献1に開示される技術のように、超音波フリップチップ接合時の半導体チップの破損に起因する歩留まりの低下を防ぐために、半導体チップの設計を変更する必要がない。したがって、半導体チップの設計を変更することなく、超音波フリップチップ接合時の半導体チップの破損に起因する歩留まりの低下を防ぎ、かつ両端に位置する各突起電極と各チップ側接続パッドとの接合強度を向上させることができる。   In this embodiment, since it is not necessary to increase the ultrasonic vibration to improve the bonding strength, the semiconductor chip at the time of ultrasonic flip-chip bonding as in the technique disclosed in Patent Document 1 is not required. There is no need to change the design of the semiconductor chip in order to prevent a decrease in yield due to breakage. Therefore, without changing the design of the semiconductor chip, it is possible to prevent a decrease in yield due to breakage of the semiconductor chip during ultrasonic flip chip bonding, and the bonding strength between each protruding electrode and each chip side connection pad located at both ends. Can be improved.

本発明の実施の一形態の半導体チップの実装構造を簡略化して示す断面図である。It is sectional drawing which simplifies and shows the mounting structure of the semiconductor chip of one Embodiment of this invention. 半導体チップ31を簡略化して示す正面図である。3 is a front view showing a simplified semiconductor chip 31. FIG. 回路基板32の一部を簡略化して示す正面図である。FIG. 3 is a front view showing a part of a circuit board 32 in a simplified manner. 半導体チップ31を回路基板32に実装する実装手順を説明するための図である。5 is a diagram for explaining a mounting procedure for mounting a semiconductor chip 31 on a circuit board 32. FIG. 振動方向Aに沿って並ぶ各突起電極33と各基板側接続パッド34との接合強度を示す図である。It is a figure which shows the joint strength of each projection electrode 33 and each board | substrate side connection pad 34 which are located in a line along the vibration direction A. 超音波フリップチップ接合時における各基板側接続パッド34の挙動を示す模式図である。It is a schematic diagram which shows the behavior of each board | substrate side connection pad 34 at the time of ultrasonic flip chip joining. 一端のパッド部分寸法W1と接合強度との関係を示す図である。It is a figure which shows the relationship between the pad part dimension W1 of one end, and joining strength. 本発明の実施の他の形態の半導体チップの実装構造を簡略化して示す断面図である。It is sectional drawing which simplifies and shows the mounting structure of the semiconductor chip of the other form of implementation of this invention. 半導体チップ71を簡略化して示す正面図である。It is a front view which simplifies and shows the semiconductor chip 71. 回路基板72の一部を簡略化して示す正面図である。It is a front view which simplifies and shows a part of circuit board 72. 振動方向Aに沿って並ぶ各突起電極33と各基板側接続パッド34との接合強度の比較例を示す図である。It is a figure which shows the comparative example of the joint strength of each projection electrode 33 and each board | substrate side connection pad 34 which are located in a line with the vibration direction A. 振動方向Aに沿って並ぶ各突起電極33と各基板側接続パッド34との接合強度を示す図である。It is a figure which shows the joint strength of each projection electrode 33 and each board | substrate side connection pad 34 which are located in a line along the vibration direction A. 一端の基板側接続パッド34とこの基板側接続パッド34に連なる延在部分100とを示す斜視図である。FIG. 3 is a perspective view showing a substrate-side connection pad 34 at one end and an extending portion 100 connected to the substrate-side connection pad 34. 従来の技術の半導体チップの実装構造を示す断面図である。It is sectional drawing which shows the mounting structure of the semiconductor chip of a prior art. 回路基板1を示す正面図である。1 is a front view showing a circuit board 1. FIG. 半導体チップ3に押圧力および超音波振動が印加されている状態を示す断面図である。3 is a cross-sectional view showing a state in which a pressing force and ultrasonic vibration are applied to the semiconductor chip 3. FIG. 超音波フリップチップ接合時の絶縁基材6の状態を示す断面図である。It is sectional drawing which shows the state of the insulating base material 6 at the time of ultrasonic flip chip joining. 超音波振動の振動方向に沿って並ぶ各突起電極と各接続パッドとの接合強度を示す図である。It is a figure which shows the joining strength of each projection electrode and each connection pad which are located in a line along the vibration direction of ultrasonic vibration. 超音波フリップチップ接合時における接続パッド5の挙動を示す模式図である。It is a schematic diagram which shows the behavior of the connection pad 5 at the time of ultrasonic flip chip joining.

符号の説明Explanation of symbols

30,70 半導体装置
31,71 半導体チップ
32,72 回路基板
33 突起電極
34 基板側接続パッド
45 絶縁基材
47 延在部分
30, 70 Semiconductor device 31, 71 Semiconductor chip 32, 72 Circuit board 33 Projection electrode 34 Substrate side connection pad 45 Insulating base material 47 Extending part

Claims (4)

突起電極を有する半導体チップと、接続パッドが絶縁基材に設けられて構成される回路基板とを含み、半導体チップが回路基板に載置されて、突起電極が接続パッドに押圧された状態で、超音波振動が半導体チップに印加されて、突起電極と接続パッドとが接合される半導体チップの実装構造であって、
複数の突起電極が、超音波振動の振動方向に沿って予め定める間隔で並ぶとともに、複数の接続パッドが、振動方向に沿って並び、各突起電極と各接続パッドとが対向し、
振動方向に沿って並ぶ各接続パッドのうち、振動方向の両端に位置する各接続パッドには、前記両端に位置する各接続パッドから振動方向に沿って互いに離反する方向に延びる延在部分がそれぞれ連なり、各延在部分は絶縁基材に設けられることを特徴とする半導体チップの実装構造。
Including a semiconductor chip having a protruding electrode and a circuit board configured with a connection pad provided on an insulating base, the semiconductor chip being placed on the circuit board, and the protruding electrode being pressed against the connection pad, A mounting structure of a semiconductor chip in which ultrasonic vibration is applied to the semiconductor chip and the protruding electrode and the connection pad are joined,
A plurality of protruding electrodes are arranged at predetermined intervals along the vibration direction of ultrasonic vibration, and a plurality of connection pads are arranged along the vibration direction, and each protruding electrode and each connection pad face each other.
Of the connection pads arranged along the vibration direction, each connection pad located at both ends in the vibration direction has an extending portion extending in a direction away from each other along the vibration direction from each connection pad located at both ends. A mounting structure of a semiconductor chip, characterized in that each extending portion is provided on an insulating substrate.
振動方向の一端に位置する接続パッドとこの接続パッドに連なる延在部分とを合わせた振動方向寸法および振動方向の他端に位置する接続パッドとこの接続パッドに連なる延在部分とを合わせた振動方向寸法は、接続パッドの振動方向寸法の2倍以上3倍以下に選ばれることを特徴とする請求項1記載の半導体チップの実装構造。   Vibration direction dimension combining the connection pad located at one end of the vibration direction and the extension part connected to the connection pad, and vibration combining the connection pad located at the other end of the vibration direction and the extension part connected to the connection pad 2. The semiconductor chip mounting structure according to claim 1, wherein the direction dimension is selected to be not less than 2 times and not more than 3 times the vibration direction dimension of the connection pad. 前記絶縁基材は、樹脂材料から成ることを特徴とする請求項1または2記載の半導体チップの実装構造。   3. The semiconductor chip mounting structure according to claim 1, wherein the insulating base is made of a resin material. 第1接続パッドを有する半導体チップと、第2接続パッドが絶縁基材に設けられ、第2接続パッドに突起電極が設けられて構成される回路基板とを含み、半導体チップが回路基板に載置されて、突起電極が第1接続パッドに押圧された状態で、超音波振動が半導体チップに印加されて、突起電極と第1接続パッドとが接合される半導体チップの実装構造であって、
複数の突起電極が、超音波振動の振動方向に沿って予め定める間隔で並ぶとともに、複数の第1接続パッドおよび複数の第2接続パッドが、振動方向に沿って並び、各突起電極と各第1接続パッドとが対向し、
振動方向に沿って並ぶ各第2接続パッドのうち、振動方向の両端に位置する各第2接続パッドには、前記両端に位置する各第2接続パッドから振動方向に沿って互いに離反する方向に延びる延在部分がそれぞれ連なり、各延在部分は絶縁基材に設けられることを特徴とする半導体チップの実装構造。
A semiconductor chip having a first connection pad; and a circuit board configured such that the second connection pad is provided on the insulating base and the protruding electrode is provided on the second connection pad, and the semiconductor chip is mounted on the circuit board. The semiconductor chip mounting structure in which the ultrasonic vibration is applied to the semiconductor chip in a state where the protruding electrode is pressed against the first connection pad, and the protruding electrode and the first connection pad are joined.
The plurality of protruding electrodes are arranged at predetermined intervals along the vibration direction of the ultrasonic vibration, and the plurality of first connection pads and the plurality of second connection pads are arranged along the vibration direction. 1 connection pad is facing,
Among the second connection pads arranged along the vibration direction, the second connection pads located at both ends in the vibration direction are separated from each other along the vibration direction from the second connection pads located at both ends. A mounting structure of a semiconductor chip, wherein extending portions are connected to each other, and each extending portion is provided on an insulating substrate.
JP2005141764A 2005-05-13 2005-05-13 Packaging structure of semiconductor chip Pending JP2006319211A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2005141764A JP2006319211A (en) 2005-05-13 2005-05-13 Packaging structure of semiconductor chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005141764A JP2006319211A (en) 2005-05-13 2005-05-13 Packaging structure of semiconductor chip

Publications (1)

Publication Number Publication Date
JP2006319211A true JP2006319211A (en) 2006-11-24

Family

ID=37539595

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005141764A Pending JP2006319211A (en) 2005-05-13 2005-05-13 Packaging structure of semiconductor chip

Country Status (1)

Country Link
JP (1) JP2006319211A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11271542B2 (en) 2016-09-06 2022-03-08 Taiyo Yuden Co., Ltd. Acoustic wave device and method of fabricating the same

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000340611A (en) * 1999-05-31 2000-12-08 Nec Kansai Ltd Semiconductor device and its manufacture
JP2001291742A (en) * 2000-04-06 2001-10-19 Nippon Dempa Kogyo Co Ltd Bonding method of ic chip and quartz oscillator using this bonding method
JP2001308141A (en) * 2000-02-18 2001-11-02 Sony Corp Method of manufacturing electronic circuit device
JP2004095629A (en) * 2002-08-29 2004-03-25 Optrex Corp Circuit board
JP2004311637A (en) * 2003-04-04 2004-11-04 Sharp Corp Circuit board for ultrasonic flip chip bonding, and method for manufacturing semiconductor device using the same
JP2005045092A (en) * 2003-07-24 2005-02-17 Konica Minolta Opto Inc Semiconductor device and manufacturing method thereof
JP2005166960A (en) * 2003-12-03 2005-06-23 Matsushita Electric Ind Co Ltd Semiconductor device and manufacturing method thereof

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000340611A (en) * 1999-05-31 2000-12-08 Nec Kansai Ltd Semiconductor device and its manufacture
JP2001308141A (en) * 2000-02-18 2001-11-02 Sony Corp Method of manufacturing electronic circuit device
JP2001291742A (en) * 2000-04-06 2001-10-19 Nippon Dempa Kogyo Co Ltd Bonding method of ic chip and quartz oscillator using this bonding method
JP2004095629A (en) * 2002-08-29 2004-03-25 Optrex Corp Circuit board
JP2004311637A (en) * 2003-04-04 2004-11-04 Sharp Corp Circuit board for ultrasonic flip chip bonding, and method for manufacturing semiconductor device using the same
JP2005045092A (en) * 2003-07-24 2005-02-17 Konica Minolta Opto Inc Semiconductor device and manufacturing method thereof
JP2005166960A (en) * 2003-12-03 2005-06-23 Matsushita Electric Ind Co Ltd Semiconductor device and manufacturing method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11271542B2 (en) 2016-09-06 2022-03-08 Taiyo Yuden Co., Ltd. Acoustic wave device and method of fabricating the same

Similar Documents

Publication Publication Date Title
CN107546135B (en) Electronic component device, method for mounting electronic component device on circuit board, and mounting structure
JP3565319B2 (en) Semiconductor device and manufacturing method thereof
US7638876B2 (en) Bumpless semiconductor device
KR100686315B1 (en) Manufacturing method for electronic circuit device
US7408257B2 (en) Packaging chip and packaging method thereof
KR20090018852A (en) Semiconductor package, its manufacturing method, semiconductor device, and electronic device
JP2003100803A (en) Semiconductor device and manufacturing method thereof
JP6197980B1 (en) Multilayer substrate, component mounting substrate, and method for manufacturing component mounting substrate
KR20160128536A (en) Anisotropic Conductive Film including Anchoring Polymer Layer with Conductive Particles and Manufacturing Method thereof
WO2014077044A1 (en) Flip-chip bonding method and solid-state image pickup device manufacturing method characterized in including flip-chip bonding method
JP6242665B2 (en) Semiconductor device
KR20170082135A (en) Anisotropic Conductive Film including Anchoring Polymer Layer with Conductive Particles and Manufacturing Method thereof
JP2006319211A (en) Packaging structure of semiconductor chip
JP4687290B2 (en) Semiconductor chip bonding apparatus and bonding method
JP6150030B1 (en) Multilayer substrate, component mounting substrate, and method for manufacturing component mounting substrate
JP2002222901A (en) Method of mounting semiconductor device, mounting structure thereof, semiconductor device and manufacturing method thereof
JP2010258302A (en) Method for mounting ultrasonic flip-chip, and substrate used therein
JP5477372B2 (en) Functional element-embedded substrate, manufacturing method thereof, and electronic apparatus
JP2004006705A (en) Mounting structure of semiconductor device and circuit board
JP4491321B2 (en) Ultrasonic mounting method and ultrasonic mounting apparatus used therefor
KR102520768B1 (en) Method for ultrasonic bonding for circuit device using anisotropic conductive film
CN113764292B (en) Semiconductor device and method for manufacturing the same
TWI394247B (en) Metal post chip connecting device and method free to use soldering material
JP2006066689A (en) Semiconductor device, and flattening method of bump electrode
JP2005093600A (en) Method of manufacturing circuit board having bump electrode and method of connecting circuit board and semiconductor element

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20070822

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20080117

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20100518

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20101019