JP2006302920A - Chip type solid electrolytic capacitor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a chip type solid electrolytic capacitor that reduces ESR and has high welding connection reliability between a positive electrode lead wire and a positive electrode terminal. <P>SOLUTION: In the chip type solid electrolytic capacitor, the positive electrode lead wires 12a, 12b are extracted from one end, capacitor elements 11a, 11b in which a negative electrode layer is formed on an outer surface that is different from extraction sections of the positive electrode lead wires 12a, 12b are placed side by side in a direction in parallel with a packaging surface, a planar positive electrode terminal 14 is welded and connected to the positive electrode lead wires 12a, 12b, and a planar negative electrode terminal is connected to the negative electrode layer. In the chip type solid electrolytic capacitor, the tip at the side of the positive electrode lead wire in the positive electrode terminal 14 has welded surfaces 17a, 17b separated by a cutout 16, the cutout 16 enters a position that is deeper than the tip of the positive electrode lead wires 12a, 12b, and the positive electrode lead wires 12a, 12b are welded and connected to the welded surfaces 17a, 17b, respectively. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a chip-type solid electrolytic capacitor containing a plurality of capacitor elements.

  Conventionally, a solid electrolytic capacitor using a valve metal is small, has a large capacitance, is excellent in frequency characteristics, and is widely used in a power supply circuit of a CPU. In addition, in order to further improve the frequency characteristics, the equivalent series resistance (hereinafter also referred to as ESR) is reduced by using a conductive polymer for the cathode layer compared to the one using manganese dioxide for the cathode layer. It is used. However, as the operating frequency of the CPU is increased, the demand for improving the noise characteristics of the power supply circuit and the demand for increasing the allowable current of the ripple current increase, so that a capacitor having a lower ESR characteristic is required. Became. At the same time, capacitors that satisfy the requirements for small size, large capacity, and thinness have become necessary.

  In order to cope with this, when a plurality of capacitor elements are accommodated in one package and connected in parallel, the total electrostatic capacity is multiplied by the number, and the ESR is reduced by one. In such a structure in which a plurality of capacitor elements are accommodated in one package, it may be advantageous to place the capacitor elements in a direction parallel to the board mounting surface depending on the characteristic value and outer shape required at the time of use. is there.

  The technique disclosed in Patent Document 1 is an example in which two capacitor elements are accommodated in one package and each capacitor element has a terminal independently. FIG. 8 is a perspective view showing the chip-type solid electrolytic capacitor of Conventional Example 1, and is drawn with a part of the exterior resin removed. 101 is a prismatic capacitor element, 102 is an anode lead wire, 103 is a cathode lead member, 104 is an anode lead member, 105 is an exterior resin, and 108 is an insulating resin interposed between the capacitor elements.

  Another example will be described with reference to FIG. FIG. 9 is a perspective view showing the chip-type solid electrolytic capacitor of Conventional Example 2 with the exterior resin omitted, wherein 201 is a capacitor element, 202 is an anode lead wire, 203 is a cathode terminal, and 204 is an anode terminal. This example is already manufactured and sold, and is an example in which three capacitor elements are juxtaposed in a direction parallel to the board mounting surface and connected in parallel inside the package.

JP-A-10-172865

  The chip-type solid electrolytic capacitor of Conventional Example 1 is useful in that it is possible to select whether to use two capacitor elements connected in parallel or independently. Has a problem in reducing ESR. For example, if the size of the land on the substrate does not cover two terminals on each of the anode side and the cathode side, the ESR will not be lowered.

  On the other hand, in the case of Conventional Example 2, in actual production, it is necessary to weld two anode lead wires at a close distance, and the welding strength tends to vary. That is, when the two welding positions are close, the second welding for welding the other anode lead wire is affected by the welding mark (nugget) generated by the first welding for welding one anode lead wire. Because it receives. This is because the deformation and twisting of the anode terminal caused by the first welding affects the second welding.

  In this situation, an object of the present invention is to provide a chip-type solid electrolytic capacitor with reduced ESR and high reliability in welding connection between an anode lead wire and an anode terminal.

  In the chip-type solid electrolytic capacitor of the present invention, an anode lead wire is drawn from one end, and a plurality of capacitor elements having a cathode layer formed on the outer surface different from the lead portion of the anode lead wire are parallel to the mounting surface. In a chip-type solid electrolytic capacitor in which a plate-like anode terminal is connected to the anode lead wire by welding and a plate-like cathode terminal is connected to the cathode layer, the anode lead wire side at the anode terminal The front end of each has a weld surface separated by a notch, the notch enters a position deeper than the front end position of the anode lead wire, and one anode lead wire is placed on each of the weld surfaces. It is connected.

  The chip-type solid electrolytic capacitor of the present invention includes two capacitor elements each having an anode lead wire drawn out from one end, and the anode lead wire side tip of the anode terminal is the same as the anode lead wire. One notch extending in the direction is formed, and both sides of the notch are preferably formed symmetrically.

  The chip-type solid electrolytic capacitor according to the present invention includes three capacitor elements from which an anode lead wire is drawn out from one end, and the tip of the anode terminal on the anode lead wire side is the same as the anode lead wire. Three weld surfaces separated by two notches extending in the direction are formed, and the widths of the three weld surfaces may be substantially equal.

  Further, the chip-type solid electrolytic capacitor of the present invention has a plurality of capacitor elements in which anode lead wires are drawn out in both directions and a cathode layer is formed on the outer surface different from the lead-out portion of the anode lead wires. In a chip-type solid electrolytic capacitor that is juxtaposed in parallel and connected in parallel, the anode lead wire drawn out in the same direction among the anode lead wires is welded to one plate-like anode terminal, and the anode at the anode terminal The leading end on the lead wire side has a weld surface separated by a notch, and the notch enters a position deeper than the tip position of the anode lead wire, and each welding surface has one anode. A lead wire is connected.

  The chip-type solid electrolytic capacitor of the present invention includes two capacitor elements with anode lead wires drawn out in both directions, and the anode lead wire side tip portion of the anode terminal is the same as the anode lead wire. One notch extending in the direction is formed, and both sides of the notch are preferably formed symmetrically.

  The chip-type solid electrolytic capacitor of the present invention includes three capacitor elements with anode lead wires drawn out in both directions, and the anode lead wire side tip portion of the anode terminal is the same as the anode lead wire. Three weld surfaces separated by two notches extending in the direction are formed, and the widths of the three weld surfaces may be substantially equal.

  In this invention, the welding surface isolate | separated by the notch | incision part was provided in the front-end | tip part of the anode terminal, and the welding part which adjoined was suppressed by welding one anode lead wire to each welding surface. That is, even when two anode lead wires are welded at close distances, the penetration portion at the time of welding is prevented from affecting each other, and the deformation, twist, etc. of the anode terminal tip caused by the previous welding are adjacent to each other. Avoid reaching the weld surface. As a result, the ESR can be reduced, and the reliability of the weld connection can be improved.

  That is, according to the present invention, it is possible to provide a chip-type solid electrolytic capacitor with reduced ESR and high reliability in welding connection between the anode lead wire and the anode terminal.

  Next, embodiments of the present invention will be described with reference to the drawings. 1 is a perspective view showing a terminal welding structure of a chip-type solid electrolytic capacitor according to Embodiment 1 of the present invention. 11a and 11b are rectangular capacitor elements juxtaposed in a direction parallel to the substrate mounting surface, 12a and 12b are anode lead wires, 14 is a molded plate-like anode terminal, 16 is a notch, and 17a and 17b are welded. The surface 18 is an upright portion, and 19 is a mounting surface portion. As shown in the figure, the anode terminal 14 according to the first embodiment includes a tip portion having welding surfaces 17 a and 17 b separated by a notch portion 16, an upright portion 18, and a mounting surface portion 19. The welded surface 17a and the welded surface 17b are symmetrical on both sides of the notch 16 so that variations in ESR between capacitor elements do not easily occur.

  At this time, it is necessary to make the cut portion 16 enter a position deeper than the tip position of the anode lead wire. By doing so, it is possible to prevent welding marks generated by melting during resistance welding from affecting each other. Moreover, although the deformation | transformation and twist generate | occur | produce in the anode terminal of the welding part vicinity by the 1st welding, it can be made not to exert the influence on the adjacent welding surface.

  Further, the anode terminal shown in a perspective view in FIG. 2 has a shape in which the notch portion 26 is inserted into the upright portion 28. Considering the influence between adjacent welds, it can be presumed that the mutual interference is due to the generation of welding marks and the difference in thermal expansion coefficient between the anode lead wire and the anode terminal. Therefore, a deep cut as shown in FIG. 2 is effective in dealing with deformation and twist due to a difference in thermal expansion coefficient.

  FIG. 3 is a perspective view showing a connection structure between the anode terminal and the cathode terminal capacitor element in the chip-type solid electrolytic capacitor of Embodiment 1, and the cathode terminal 13 formed by bending the lead frame is electrically conductively bonded. It connects with the cathode layer of capacitor | condenser element 11a, 11b through an agent.

  Here, it supplements about the manufacturing method of the chip-type solid electrolytic capacitor of this Embodiment 1. FIG. Capacitor elements 11a and 11b are prepared by embedding a tantalum anode lead wire in a tantalum powder leaving a lead portion, followed by pressure molding, firing, forming an oxide film by anodic oxidation, and forming a cathode layer thereon. To do. Next, the capacitor elements 11a and 11b are placed on the lead frame on which the terminal forming portions corresponding to the anode and the negative terminal shown in FIG. 3 are manufactured, the cathode side is connected by a conductive adhesive, and the anode side is a resistance. Weld by welding. Thereafter, it is molded with an exterior resin and cut and separated from the lead frame to obtain the chip-type solid electrolytic capacitor of the present invention.

  Next, an embodiment in which three capacitor elements are juxtaposed and connected in parallel will be described. 4 shows a chip-type solid electrolytic capacitor according to a second embodiment of the present invention, FIG. 4 (a) is a perspective view of an anode terminal used therein, and FIG. 4 (b) is a perspective view showing the overall appearance from below. It is. In FIG. 4A, 49 is a mounting surface portion, 48 is an upright portion, 47a, 47b, and 47c are welding surfaces, and 46a and 46b are notched portions. Here, the widths of the welding surfaces 47a, 47b, and 47c are substantially equal, and the notches 46a and 46b enter the upright portion 48.

  The manufacturing method is the same as that of the first embodiment, and the cathode terminal 43 having the same shape as the cathode terminal 13 (see FIG. 3) of the first embodiment is used. The external shape of the chip-type solid electrolytic capacitor thus obtained is as shown in FIG. 4B, and is mold-coated with the exterior resin 45 while leaving part of the upright portion 48, the mounting surface portion 49, and the cathode terminal 43 of the anode terminal. ing.

  In the second embodiment, since there are three adjacent welds, interference between welds and deformation of the tip of the anode terminal are likely to occur. Therefore, it is necessary to devise such as increasing the cut depth of the notches 46a and 46b. In particular, since the welding surface 47b is affected from both sides, the conditions are stricter than those of the other welding surfaces 47a and 47c. However, from the viewpoint of ESR, the widths of the welding surfaces 47a, 47b, and 47c are preferably substantially equal.

  Next, the chip-type solid electrolytic capacitor of Embodiment 3 will be described. The chip-type solid electrolytic capacitor according to the present embodiment is a three-terminal chip-type solid electrolytic capacitor that uses a capacitor element with an anode lead wire drawn out in both directions in parallel. As a transmission line type noise filter, a CPU and a power source are used. Used for decoupling circuits between circuits.

  FIG. 5 is a perspective view showing a terminal welding structure of a chip-type solid electrolytic capacitor according to Embodiment 3 of the present invention. Here, the capacitor element 51a from which the anode lead wire 52a is drawn out in both directions and the capacitor element 51b from which the anode lead wire 52b is drawn out in both directions are juxtaposed in a direction parallel to the substrate mounting surface and connected in parallel. Further, the anode terminal 14 on the left side of the drawing is welded and connected to a portion drawn to the left side of the anode lead wires 52a and 52b, and the right side anode terminal 14 is drawn out to the right side of the anode lead wires 52a and 52b in symmetry with the connection structure. Welded connection to the part. The anode terminal 14 used at this time is the same as that of the first embodiment, and the welding surfaces 17 a and 17 b are separated by the notch 16.

  FIG. 6 is a perspective view showing a connection structure between the anode terminal and the cathode terminal capacitor element in the chip-type solid electrolytic capacitor of Embodiment 3, and the cathode terminal 63 is a plate-like terminal that is bent. Yes, and connected to the capacitor elements 51a and 51b via a conductive adhesive.

  FIG. 7 is a perspective view showing the external shape of the chip-type solid electrolytic capacitor according to Embodiment 3 of the present invention from below. Two anode terminals 14 are symmetrically arranged on both sides of the cathode terminal 63 and molded with an exterior resin 75. Molded.

  Next, the chip-type solid electrolytic capacitor of Embodiment 4 will be described. Although not shown in the drawing, the anode terminal having the shape of the second embodiment (see FIG. 4A) is used, and three capacitor elements with anode lead wires drawn out in both directions are juxtaposed to form two anodes. The terminals are arranged symmetrically, the anode lead wires drawn in the same direction are welded to one anode terminal, and the cathode terminal having the same shape as the cathode terminal 63 (see FIG. 6) of the third embodiment is used. This is a chip-type solid electrolytic capacitor. Thus, a transmission line type noise filter can be obtained by connecting three capacitor elements in parallel.

  In the above embodiment, the case where there are two or three capacitor elements has been described. However, the present invention can also be applied to a case where four or more capacitor elements are juxtaposed in a direction parallel to the mounting surface and connected in parallel. It is clear that it can be applied.

The perspective view which shows the terminal welding structure of the chip type solid electrolytic capacitor in Embodiment 1 of this invention. FIG. 6 is a perspective view showing another shape of the cathode terminal in the first embodiment. The perspective view which shows the connection structure with the capacitor | condenser element of the anode terminal and cathode terminal in the chip-type solid electrolytic capacitor of Embodiment 1. FIG. FIG. 4A is a perspective view of an anode terminal, and FIG. 4B is a perspective view showing an overall appearance from below, showing a chip-type solid electrolytic capacitor according to a second embodiment. The perspective view which shows the terminal welding structure of the chip type solid electrolytic capacitor of Embodiment 3. FIG. The perspective view which shows the connection structure with the capacitor | condenser element of the anode terminal and cathode terminal in the chip-type solid electrolytic capacitor of Embodiment 3. FIG. The perspective view which shows the external appearance of the chip-type solid electrolytic capacitor of Embodiment 3 from the downward direction. The perspective view which shows the chip-type solid electrolytic capacitor of the prior art example 1. FIG. The perspective view which abbreviate | omits exterior resin and shows the chip-type solid electrolytic capacitor of the prior art example 2. FIG.

Explanation of symbols

11a, 11b, 51a, 51b Capacitor elements 12a, 12b, 52a, 52b Anode lead wires 13, 43, 63 Cathode terminals 14, 44 Anode terminals 16, 26, 46a, 46b Notches 17a, 17b, 47a, 47b, 47c Welding surface 18, 28, 48 Upright portion 19, 49 Mounting surface portion 45, 75 Exterior resin

Claims (6)

  An anode lead wire is drawn from one end, and a plurality of capacitor elements each having a cathode layer formed on the outer surface different from the lead portion of the anode lead wire are arranged in a direction parallel to the mounting surface. In a chip-type solid electrolytic capacitor in which a plate-like anode terminal is connected by welding and a plate-like cathode terminal is connected to the cathode layer, the tip of the anode lead wire side at the anode terminal is separated by a notch A chip type in which the cut-out portion enters a position deeper than a tip position of the anode lead wire, and one anode lead wire is connected to each of the weld surfaces. Solid electrolytic capacitor.   Two capacitor elements from which an anode lead wire is drawn out from one end are provided, and one notch portion extending in the same direction as the anode lead wire is formed at the tip of the anode lead wire side at the anode terminal, 2. The chip-type solid electrolytic capacitor according to claim 1, wherein both sides of the notch are formed symmetrically.   Three capacitor elements from which one end of the anode lead wire is drawn out are provided, and the tip of the anode terminal on the anode lead wire side is separated by two notches extending in the same direction as the anode lead wire. The chip-type solid electrolytic capacitor according to claim 1, wherein three welding surfaces are formed, and the widths of the three welding surfaces are substantially equal.   A chip type in which anode lead wires are drawn out in both directions, and a plurality of capacitor elements each having a cathode layer formed on the outer surface different from the lead portion of the anode lead wires are juxtaposed in a direction parallel to the mounting surface. In the solid electrolytic capacitor, the anode lead wire drawn out in the same direction among the anode lead wires is welded to one plate-like anode terminal, and a tip portion on the anode lead wire side of the anode terminal is a notch portion. And the notch is inserted into a position deeper than the tip position of the anode lead wire, and one anode lead wire is connected to each of the weld surfaces. Chip type solid electrolytic capacitor.   Two capacitor elements with anode lead wires drawn out in both directions are provided, and one notch portion extending in the same direction as the anode lead wire is formed at the tip of the anode lead wire side at the anode terminal, 5. The chip-type solid electrolytic capacitor according to claim 4, wherein both sides of the notch are formed symmetrically.   Three capacitor elements with anode lead wires drawn out in both directions are provided, and the anode lead wire side tip of the anode terminal is separated by two notches extending in the same direction as the anode lead wire. The chip-type solid electrolytic capacitor according to claim 4, wherein three welding surfaces are formed, and the widths of the three welding surfaces are substantially equal.

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