JP2006296011A - Switching power unit, and el panel driving device mounting the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a switching power unit for suppressing the fluctuations of the difference between a positive and a negative DC voltages which are generated simultaneously, resulting from ripples superposed on each DC voltage in particular. <P>SOLUTION: In this switching power unit (10), a boosting converter (1P) applies a positive DC voltage (+VP) to the anode (PP) of the EL panel (P), while a reverse converter (1N) applies a negative DC voltage (-VN) to the cathode (PN). A feedback part (2) generates error signals EP, EN based on the positive and negative DC voltages (+VP, -VN) and positive and negative reference voltages (+VrP, -VrN). A PWM control unit (3) converts two error signals (EP, EN) to two control signals (SP, SN), allowing one active period to be stored in the other inactive period or one inactive period to be stored in the other active period between the two control signals (SP, SN) in particular. The two converters (1P, 1N) receive the negative feedback by the two control signals (SP, SN). <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a switching power supply device, and more particularly to a switching power supply device that is mounted on a drive device of, for example, a CCD, a liquid crystal panel, or an EL (Electroluminescence) panel and generates both positive and negative DC voltages simultaneously.

EL is an image display technique using a substance that emits light when a voltage is applied (hereinafter referred to as a luminescent substance). In particular, a light-emitting substance that is an organic substance is called an organic EL.
An EL display is an image display device using EL, and the display panel is called an EL panel. In each of the pixels juxtaposed on the EL panel, a luminescent material is sandwiched between electrodes. When a high voltage is applied between the electrodes, the luminescent material emits visible light.
Thus, the EL panel is a self-luminous type, and (especially, the organic EL panel) is superior to the liquid crystal panel in terms of high brightness, high contrast, wide viewing angle, high response speed, extremely thin shape, and low power consumption. . Due to these advantages, the EL panel is regarded as promising as a next-generation display panel that replaces the liquid crystal panel.

In particular, EL displays are mounted on mobile electronic devices (for example, mobile phones, digital still cameras, digital video cameras, personal digital assistants (PDAs), notebook computers, portable game machines, etc.), and also as lighting and large displays. Use is expected.
In particular, in mobile electronic devices, it is desired to extend the usage time by saving power and to improve portability by downsizing. Therefore, especially when the EL display is mounted on a mobile electronic device, the EL panel drive device is required to save power and be miniaturized.

On the other hand, the EL panel generally has a higher driving voltage than other modules in the mobile electronic device, for example, like a CCD or a liquid crystal panel. Therefore, a switching power supply device that generates both positive and negative DC voltages at the same time is usually mounted on the EL panel driving device, as in the case of, for example, a CCD or liquid crystal panel driving device.
As such a switching power supply device, for example, the one shown in FIG. 7 is known (see, for example, Patent Document 1). This switching power supply device 100 uses a boost converter 1P and an inverting converter 1N together. Boost converter 1P boosts power supply voltage VI applied from, for example, battery B and generates positive DC voltage + VP (VP> 0). The inverting converter 1N boosts the power supply voltage VI while inverting its polarity, and generates a negative DC voltage −VN (VN> 0) (see FIG. 8). A positive DC voltage + VP is applied to the anode PP of the EL panel P, and a negative DC voltage −VN is applied to the cathode PN. Thereby, a difference between positive and negative DC voltages + VP − (− VN) = VP + VN is applied to the luminescent material sandwiched between the electrodes PP and PN (see FIG. 8).

  In the boost converter 1P, the withstand voltage is about the positive DC voltage VP, and in the inverting converter 1N, the withstand voltage is about the absolute value VN of the negative DC voltage. Therefore, the breakdown voltage is sufficiently lower than the drive voltage VP + VN of the EL panel P in each of the boost converter 1P and the inverting converter 1N: VP, VN << VP + VN (see FIG. 8). Therefore, the switching power supply device 100 is advantageous for fine design rules, miniaturization of circuit elements, and power saving.

  Further, in this switching power supply device 100, both the boost converter 1P and the inverting converter 1N stabilize the output voltages VP and VN by using pulse width modulation (PWM) control for on / off of the switch elements QP and QN (FIG. 7). , 8). In PWM control, the switching frequency, that is, the frequency of the carrier wave W is fixed, so that the boost converter 1P and the inverting converter 1N can also use the same oscillator 31 for generating the carrier wave W. Thereby, the circuit configuration of the entire switching power supply device is simplified.

JP 2004-144856 JP

When the switching power supply device 100 is mounted on a drive device for a CCD, liquid crystal panel, or EL panel, in order to further stabilize the drive, the output voltage VP is applied to both the boost converter 1P and the inverting converter 1N. VN and output current must be further stabilized. Particularly in the EL panel P, fluctuations in the driving voltage and driving current greatly change the luminance of the pixel. Therefore, further stabilization of the driving voltage and driving current is indispensable for further improvement in image quality.
However, in the switching power supply device 100 described above, PWM control is used to stabilize the positive and negative DC voltages + VP and −VN. Accordingly, a ripple is superimposed on each of the positive and negative DC voltages + VP and −VN in synchronization with the carrier wave W (see FIG. 8).

In the switching power supply device 100 described above, when the positive and negative DC voltages + VP and −VN are stationary, the on / off of the switch elements QP and QN is substantially synchronized between the boost converter 1P and the inverting converter 1N. Accordingly, the two switch elements QP and QN are maintained in the same on / off state for a long time (see regions I and II shown in FIG. 8). During those periods, ripples superimposed on the positive and negative DC voltages + VP and −VN respectively change the driving voltage VP + VN of the EL panel P in the same direction. In the example shown in FIG. 8, since the carrier wave W is a sawtooth wave in particular, at the peak WT, the two switch elements QP and QN always transition from the off state to the on state at the same time. As a result, the maximum value RP of the positive DC voltage + VP is substantially always synchronized with the minimum value RN of the negative DC voltage −VN. Therefore, the maximum value of the difference between the positive and negative DC voltages + VP and −VN forms the peak R of the drive voltage VP + VN of the EL panel P.
As described above, since the positive and negative DC voltages + VP and −VN ripple cooperate to increase the fluctuation of the driving voltage VP + VN of the EL panel P, it is difficult to further stabilize the driving voltage VP + VN.

  An object of the present invention is to provide a switching power supply device that generates both positive and negative DC voltages at the same time, and suppresses fluctuations in the difference between those DC voltages caused by ripples superimposed on each DC voltage.

The switching power supply device according to the present invention includes:
A first switch element that is on during an active period of the first control signal and is off during an inactive period; and
A first inductor that accumulates energy by applying a power supply voltage between both ends in the on-period of the first switch element, and releases energy in the off-period of the first switch element;
A step-up converter that converts the power supply voltage into a positive DC voltage;
A second switch element that is turned on in the active period of the second control signal and turned off in the inactive period; and
A second inductor that accumulates energy by applying a power supply voltage between both ends in the ON period of the second switch element, and releases energy in the OFF period of the second switch element;
An inverting converter for converting a power supply voltage into a negative DC voltage;
Generate a first error signal indicating the difference between the first reference voltage and the positive DC voltage, and a second error signal indicating the difference between the second reference voltage and the negative DC voltage The return part;
And
By PWM, the first error signal is converted into a first control signal, and the second error signal is converted into a second control signal. A PWM control unit that keeps an active period within the other inactive period, or places one inactive period within the other active period;
Have

  This switching power supply is preferably mounted on a drive device for a CCD, liquid crystal panel, or EL panel. Particularly preferably, the EL panel drive unit mounted on the EL display together with the EL panel is used as a switching power supply device. In the EL panel, pixels each having a light emitting layer containing a light emitting substance and electrodes sandwiching the light emitting layer are juxtaposed. Further, the EL panel drive unit applies positive and negative DC voltages to each electrode of the EL panel pixel in accordance with a video signal received from the outside. That is, the difference between the positive and negative DC voltages is applied as a drive voltage to the EL panel.

  In the switching power supply device according to the present invention, at least one of the active period and the inactive period does not overlap between the first and second control signals. As a result, when the positive and negative DC voltages are steady, the switch element of the boost converter and the switch element of the inverting converter are maintained in different on / off states for a long time. During these periods, the difference between the positive and negative DC voltages cancels out the ripple superimposed on each DC voltage. Thus, the difference between the positive and negative DC voltages is stabilized with high accuracy.

In the above switching power supply device according to the present invention, preferably,
An oscillator that generates a constant carrier at a constant frequency;
A first comparator that activates the first control signal in response to the polarity of the first error signal relative to the carrier; and
A second comparator that activates the second control signal in response to the polarity of the second error signal relative to the carrier;
Includes a PWM control unit,
The polarity of the first error signal relative to the carrier during the active period of the first control signal, and the polarity of the second error signal relative to the carrier during the active period of the second control signal; Is the opposite.

The carrier wave is preferably a sawtooth wave or a triangular wave.
Nearly the maximum value of the carrier wave, the first and second error signals are both lower than the carrier wave. That is, the polarity of the error signal with respect to the carrier wave is negative. Similarly, the polarity of the error signal is always positive in the vicinity of the minimum value of the carrier wave. Thus, since the polarity of the error signal is substantially the same in the vicinity of the peak of the carrier wave, if one of the first and second control signals is active, the other is always inactive. Thereby, the switch element of the boost converter and the switch element of the inverting converter are maintained in different on / off states. As a result, the phase is substantially different between the vicinity of the maximum value of the positive DC voltage and the vicinity of the minimum value of the negative DC voltage. In this way, the variation in the difference between the positive and negative DC voltages is reliably reduced.

In the above switching power supply device according to the present invention, instead of using the same carrier wave for both the boost converter and the inverting converter as described above, the PWM control unit may use a different carrier wave for each converter as follows. good.
Preferably,
A first oscillation unit for generating a first carrier wave having a constant waveform at a constant frequency;
A second oscillating unit that generates a second carrier having a waveform obtained by inverting the top and bottom of the first carrier at the same frequency as the frequency of the first carrier;
A first comparator that activates the first control signal in response to the polarity of the first error signal relative to the first carrier; and
A second comparator that activates the second control signal in response to the polarity of the second error signal relative to the second carrier;
Includes a PWM control unit,
The phase between the first and second carriers is substantially equal, the polarity of the first error signal relative to the first carrier during the active period of the first control signal, and the second control signal The polarity of the second error signal with respect to the second carrier in the active period is equal.

  The first carrier wave is preferably a sawtooth wave or a triangular wave. At that time, the second carrier wave is a sawtooth wave or a triangular wave obtained by inverting the first carrier wave. Further, if the first carrier wave has a vertically symmetrical waveform, the second carrier wave coincides with the first carrier wave whose phase is shifted by 180 °.

Between the first and second carrier waves, the vicinity of one maximum value is substantially always synchronized with the vicinity of the other minimum value.
For example, since the vicinity of the maximum value of the first carrier is synchronized with the vicinity of the minimum value of the second carrier, the first error signal is virtually always lower than the first carrier and the second error signal is Higher than the second carrier. Similarly, near the minimum value of the first carrier, the first error signal is substantially higher than the first carrier and the second error signal is lower than the second carrier. (If the carrier wave is a sawtooth wave, the vicinity is limited to just before or after the maximum value and the minimum value.)
As described above, since the polarity is almost always reversed between the first and second error signals near the peak of the first and second carrier waves, one of the first and second control signals is If active, the other is always inactive. Thereby, the switch element of the boost converter and the switch element of the inverting converter are maintained in different on / off states. As a result, the phase is substantially different between the vicinity of the maximum value of the positive DC voltage and the vicinity of the minimum value of the negative DC voltage. In this way, the variation in the difference between the positive and negative DC voltages is reliably reduced.

The switching power supply according to the present invention generates two positive and negative DC voltages simultaneously by using two converters in combination, and applies a difference between them to a load. Thereby, the breakdown voltage inside each converter can be set sufficiently lower than the voltage applied to the load. Therefore, this switching power supply device is advantageous for fine design rules, miniaturization of circuit elements, and power saving while maintaining a high output voltage.
In this switching power supply device, unlike a conventional device, a ripple superimposed on each DC voltage cancels out, so that a difference between positive and negative DC voltages is stabilized with high accuracy.
Therefore, the switching power supply device according to the present invention is particularly suitable for use in a drive device for a high drive voltage module (for example, CCD, liquid crystal panel, EL panel) mounted on a mobile electronic device. In particular, when mounted on an EL display, the voltage applied to the EL panel is excellent in stability, which is advantageous for high image quality.

DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, exemplary embodiments of the invention will be described with reference to the drawings.
Embodiment 1

  The switching power supply according to Embodiment 1 of the present invention is preferably mounted on a drive device for an EL panel. The EL panel to be driven is preferably used as a display panel of a mobile electronic device.

A switching power supply device 10 according to Embodiment 1 of the present invention includes a boost converter 1P, an inverting converter 1N, a feedback unit 2, and a PWM control unit 3 (see FIG. 1).
Boost converter 1P is preferably a switching type DC-DC converter. Boost converter 1P boosts a DC voltage VI (hereinafter referred to as a power supply voltage) applied from an external power source, such as battery B, to generate a positive DC voltage + VP. A positive DC voltage + VP is applied to the anode PP of the EL panel P: + VP> VI.
The inverting converter 1N is preferably a switching type DC-DC converter. The inverting converter 1N boosts the power supply voltage VI after inverting its polarity, and generates a negative DC voltage -VN. A negative DC voltage -VN is applied to the cathode PN of the EL panel P: VN> VI.

The feedback unit 2 compares the positive and negative DC voltages + VP and −VN with the positive and negative reference voltages + VrP and −VrN, respectively, and indicates voltage signals EP and EN (hereinafter referred to as first and second error signals) indicating the respective errors. Generated).
The PWM control unit 3 converts the first and second error signals EP and EN into first and second control signals SP and SN, respectively, by PWM. The control signals SP and SN are logic signals, and preferably represent the levels of positive and negative DC voltages + VP and −VN at a time ratio between the active period and the inactive period. The PWM control unit 3 uses the two control signals SP and SN to apply negative feedback to the boost converter 1P and the inverting converter 1N.
In this way, the switching power supply 10 stabilizes the positive and negative DC voltages + VP and −VN. A positive / negative DC voltage + VP and a difference VP + VN between −VN are stably applied between the electrodes PP and PN of the EL panel P.

Boost converter 1P preferably includes a first inductor LP, a first switch element QP, a first diode DP, and a first capacitor CP.
The anode of the first diode DP is connected to the positive electrode of the battery B through the first inductor LP, and the cathode is connected to the anode PP of the EL panel P. Only a current IP (hereinafter referred to as a first current) that flows from the positive electrode of the battery B to the first diode DP flows through the first inductor LP.
The first switch element QP is preferably a MOSFET. In addition, an IGBT or a bipolar transistor may be used. The first switch element QP is connected between the anode of the first diode DP and the ground terminal. The control terminal (preferably gate or base) of the first switch element QP receives the first control signal SP. When the first control signal SP is active, the first switch element QP is maintained in the on state, and when the first control signal SP is inactive, the first switch element QP is maintained in the off state. The
The first capacitor CP is connected between the cathode of the first diode DP and the ground terminal.

Since the power supply voltage VI (> 0) is applied between both ends of the first inductor LP during the ON period of the first switch element QP, the first current IP increases and energy is supplied to the first inductor LP. Accumulated. In the first diode DP, the anode is grounded, and the cathode receives the voltage across the first capacitor CP, that is, the positive DC voltage + VP, so that a reverse bias is applied and the forward current is cut off. Electric power is supplied from the first capacitor CP to the anode PP of the EL panel P.
During the OFF period of the first switch element QP, the first diode DP is forward-biased by the voltage induced in the first inductor LP, so that a forward current, that is, the first current IP flows. At that time, since the difference VI−VP (<0) between the power supply voltage VI and the positive DC voltage + VP is applied between both ends of the first inductor LP, the first current IP is reduced and the first inductor is decreased. Energy is released from LP. On the other hand, the positive DC voltage + VP is maintained higher than the power supply voltage VI by the voltage induced in the first inductor LP.
The fluctuation of the positive DC voltage + VP accompanying the on / off of the first switch element QP is smoothed by the first capacitor CP.

  The ratio of the positive DC voltage + VP to the power supply voltage VI, that is, the voltage conversion rate VP / VI is substantially the reciprocal of the off-time ratio (= off time / (on time + off time)) of the first switch element QP. be equivalent to. Therefore, the positive DC voltage + VP is controlled by adjusting the time ratio of the first switch element QP using the time ratio between the active period and the inactive period of the first control signal SP.

The inverting converter 1N preferably includes a second inductor LN, a second switch element QN, a second diode DN, and a second capacitor CN.
The cathode of the second diode DN is connected to the positive electrode of the battery B through the second switch element QN, and the anode is connected to the cathode PN of the EL panel P.
The second switch element QN is preferably a MOSFET. In addition, an IGBT or a bipolar transistor may be used. The control terminal (preferably gate or base) of the second switch element QN receives the second control signal SN. When the second control signal SN is active, the second switch element QN is kept on, and when the second control signal SN is inactive, the second switch element QN is kept off. The
The second inductor LN is connected between the cathode of the second diode DN and the ground terminal. Only the current IN (hereinafter referred to as the second current) flowing from the cathode of the second diode DN to the ground terminal flows through the second inductor LN. Preferably, the inductance of the second inductor LN is equal to the inductance of the first inductor LP.
The second capacitor CN is connected between the anode of the second diode DN and the ground terminal.

Since the power supply voltage VI (> 0) is applied across the second inductor LN during the ON period of the second switch element QN, the second current IN increases and energy is supplied to the second inductor LN. Accumulated. In the second diode DN, the cathode receives the power supply voltage VI and the anode receives the voltage across the second capacitor CN, that is, the negative DC voltage −VN, so that a reverse bias is applied and the forward current is cut off. Electric power is supplied from the second capacitor CN to the cathode PN of the EL panel P.
During the OFF period of the second switch element QN, the second diode DN is forward biased by the voltage induced in the second inductor LN, so that a forward current, that is, the second current IN flows. At that time, since the negative DC voltage −VN (<0) is applied between both ends of the second inductor LN, the second current IN decreases and energy is released from the second inductor LN. On the other hand, the negative DC voltage −VN is maintained lower than the ground potential by the voltage induced in the second inductor LN.
The fluctuation of the negative DC voltage −VN accompanying the on / off of the second switch element QN is smoothed by the second capacitor CN.

  The ratio of the negative DC voltage level VN to the power supply voltage VI, that is, the voltage conversion rate VN / VI is substantially equal to the ratio of the ON time to the OFF time of the second switch element QN (= ON time / OFF time). Therefore, the negative DC voltage −VN is controlled by adjusting the time ratio of the second switch element QN using the time ratio between the active period and the inactive period of the second control signal SN. .

  Inside each of boost converter 1P and inverting converter 1N, inductor LP, LN, switching elements QP, QN, diodes DP, DN, and capacitors CP, CN are all about DC voltage VP, VN, EL Applied voltage to panel P can be kept sufficiently lower than VP + VN: VP, VN << VP + VN. Therefore, the two converters 1P and 1N can be easily downsized while the applied voltage VP + VN applied to the EL panel P is kept sufficiently high.

The feedback unit 2 includes two reference voltage sources 21P and 21N and two differential amplifiers 22P and 22N.
The first reference voltage source 21P maintains the positive electrode potential higher than the negative electrode potential by a constant voltage VrP. The second reference voltage source 21N maintains the positive electrode potential higher than the negative electrode potential by a constant voltage VrN.

The first differential amplifier 22P amplifies the potential difference between the two input terminals based on the potential of the inverting input terminal, and sends it as a first error signal EP. In the first differential amplifier 22P, the inverting input terminal is connected to the anode PP of the EL panel P, and the non-inverting input terminal is connected to the positive electrode of the first reference voltage source 21P. The negative electrode of the first reference voltage source 21P is grounded.
In this case, the level of the first error signal EP is proportional to the level of the positive reference voltage + VrP with the positive DC voltage + VP as a reference. That is, if the positive DC voltage + VP is shifted upward with respect to the positive reference voltage + VrP, the level of the first error signal EP is lowered. Conversely, the positive DC voltage + VP is lower than the positive reference voltage + VrP. If it shifts to, the level of the first error signal EP increases.

  The second differential amplifier 22N amplifies the potential difference between the two input terminals with the potential of the inverting input terminal as a reference, and sends it as a second error signal EN. In the second differential amplifier 22N, the inverting input terminal is connected to the cathode PN of the EL panel P, and the non-inverting input terminal is connected to the negative electrode of the second reference voltage source 21N. The positive electrode of the second reference voltage source 21N is grounded. Thereby, the level of the second error signal EN is proportional to the level of the negative reference voltage −VrN with respect to the negative DC voltage −VN. That is, if the negative DC voltage −VN shifts upward with respect to the negative reference voltage −VrN, the level of the second error signal EN decreases, and conversely, the negative DC voltage −VN becomes a negative reference voltage −VrN. If it deviates below, the level of the second error signal EN increases.

The PWM control unit 3 includes an oscillation unit 31 and two comparators 32P and 32N.
The oscillation unit 31 generates a constant carrier wave W at a constant frequency. The carrier wave W is preferably a sawtooth wave or a triangular wave (see (a) of FIGS. 2 and 3).

  The first comparator 32P activates the first control signal SP according to the polarity of the potential of the non-inverting input terminal with respect to the potential of the inverting input terminal. In the first comparator 32P, in particular, the carrier wave W is applied to the inverting input terminal, and the first error signal EP is applied to the non-inverting input terminal (see FIG. 1). In this case, if the first error signal EP is higher than the carrier wave W, the first control signal SP is activated. Conversely, if the first error signal EP is lower than the carrier wave W, the first control signal SP is inactive. (See FIGS. 2 and 3 (a) and (b)). For example, in (b) of FIGS. 2 and 3, the first control signal SP is maintained at the H level during the active period T1P and is maintained at the L level during the inactive period T2P.

In the active period T1P of the first control signal SP, the first switch element QP is maintained in the ON state. Accordingly, the first current IP flowing through the first inductor LP increases (see (d) of FIGS. 2 and 3). On the other hand, since the first capacitor CP is discharged, the positive DC voltage + VP drops (see the thin solid line shown in (f) of FIGS. 2 and 3).
In the inactive period T2P of the first control signal SP, the first switch element QP is maintained in the off state. Accordingly, the first current IP decreases (see (d) of FIGS. 2 and 3). On the other hand, since the first capacitor CP is charged, the positive DC voltage + VP increases (see the thin solid line shown in (f) of FIGS. 2 and 3).
Thus, the positive DC voltage + VP repeatedly fluctuates up and down as the first switch element QP is turned on / off. That is, a ripple appears.

When the positive DC voltage + VP fluctuates upward, the level of the first error signal EP decreases, so the active period T1P of the first control signal SP is shortened ((a) and (b) in FIGS. 2 and 3). See), the ON time of the first switch element QP is shortened. Thereby, the energy stored in the first inductor LP is reduced. As a result, an increase in positive DC voltage + VP can be suppressed. Similarly, downward fluctuation due to the positive DC voltage + VP is also suppressed.
Thus, boost converter 1P receives negative feedback by cooperation of feedback unit 2 and PWM control unit 3. As a result, the positive DC voltage + VP is stabilized.

  The second comparator 32N activates the second control signal SN according to the polarity of the potential of the non-inverting input terminal with respect to the potential of the inverting input terminal. In the second comparator 32N, in particular, the carrier wave W is applied to the non-inverting input terminal, and the second error signal EN is applied to the inverting input terminal (see FIG. 1). In this case, if the second error signal EN is higher than the carrier wave W, the second control signal SN is made inactive. Conversely, if the second error signal EN is lower than the carrier wave W, the second control signal SN is active. (See FIGS. 2 and 3 (a) and (c)). For example, in (c) of FIGS. 2 and 3, the second control signal SN is maintained at the H level during the active period T1N and is maintained at the L level during the inactive period T2N.

In the active period T1N of the second control signal SN, the second switch element QN is maintained in the ON state. Therefore, the second current IN flowing through the second inductor LN increases (see (e) in FIGS. 2 and 3). On the other hand, since the second capacitor CN is discharged, the negative DC voltage −VN rises (see the broken line shown in (f) of FIGS. 2 and 3).
In the inactive period T2N of the second control signal SN, the second switch element QN is maintained in the off state. Therefore, the second current IN decreases (see (e) of FIGS. 2 and 3). On the other hand, since the second capacitor CN is charged, the negative DC voltage −VN drops (see the broken line shown in (f) of FIGS. 2 and 3).
As described above, the negative DC voltage −VN repeatedly fluctuates up and down as the second switch element QN is turned on / off. That is, a ripple appears.

When the negative DC voltage −VN fluctuates downward, the level of the second error signal EN increases, so the active period T1N of the second control signal SN is shortened (FIGS. 2 and 3 (a), (b )), The ON time of the second switch element QN is shortened. Thereby, the energy stored in the second inductor LN is reduced. As a result, a drop in negative DC voltage −VN can be suppressed. Similarly, upward fluctuation due to the negative DC voltage -VN is also suppressed.
Thus, the inverting converter 1N receives negative feedback by the cooperation of the feedback unit 2 and the PWM control unit 3. As a result, the negative DC voltage −VN is stabilized.

Unlike the conventional device, the PWM controller 3 is different from the conventional device in particular in the active period T1P of the first control signal SP and the polarity of the first error signal EP with respect to the carrier wave W and the active of the second control signal SN. The polarity of the second error signal EN with respect to the carrier wave W in the period T1N is opposite (see FIGS. 2 and 3 (a) to (c)). As a result, between the first and second control signals SP and SN, one active period falls within the other inactive period, or one inactive period falls within the other active period. For example, in FIGS. 2 and 3, (b) and (c), the inactive period T2P of the first control signal SP is within the active period T1N of the second control signal SN, and the inactive period of the second control signal SN is The period T2N falls within the active period T1P of the first control signal SP.
In this way, at least one of the active period and the inactive period does not overlap between the first and second control signals SP and SN. That is, no matter how the control targets for each level of the two error signals EP and EN are set (within the fluctuation range of the carrier wave W), that is, the control targets for the respective ratios of the two switch elements QP and QN are It does not change no matter how it is set. Therefore, the time during which the on / off state differs between the two switch elements QP and QN is sufficiently long (see inactive periods T2P and T2N shown in FIGS. 2 and 3). During those periods, the positive and negative DC voltages + VP and −VN fluctuate in the same direction (see (f) in FIGS. 2 and 3). Therefore, the ripple superimposed on each DC voltage + VP, −VN cancels out in the applied voltage to the EL panel P, that is, the difference VP + VN between the positive and negative DC voltages.
Thus, the applied voltage VP + VN to the EL panel P is stabilized with high accuracy.

For example, in FIG. 2A, immediately before the carrier wave W reaches the maximum value WT, the first and second error signals EP and EN are both lower than the carrier wave W and immediately after the minimum value WB of the carrier wave W. In practice, the two error signals EP and EN are both higher than the carrier wave W.
For example, in (a) of FIG. 3, the two error signals EP and EN are substantially lower than the carrier wave W in the vicinity of the maximum value WT of the carrier wave W, and are substantially always in the vicinity of the maximum value WB of the carrier wave W. The error signals EP and EN are both higher than the carrier wave W.
As described above, the polarities of the two error signals EP and EN with respect to the carrier wave W are substantially the same in the vicinity of the peaks WT and WB of the carrier wave W. Therefore, if one of the two control signals SP and SN is active, the other is always inactive, that is, the two switch elements QP and QN are maintained in different on / off states (shown in FIGS. 2 and 3). Inactive period T2P, see T2N). As a result, the phase is almost always different between the vicinity of the maximum value RP of the positive DC voltage + VP and the vicinity of the minimum value RN of the negative DC voltage −VN (see (f) in FIGS. 2 and 3).

In particular, when the carrier wave W is a sawtooth wave as shown in FIG. 2A, the vicinity of the maximum value RP of the positive DC voltage + VP is substantially always the vicinity of the maximum value RM of the negative DC voltage −VN. Synchronize.
On the other hand, when the carrier wave W is a triangular wave as shown in FIG. 3 (a), the phase is near the minimum value RQ of the positive DC voltage + VP and the maximum value RM of the negative DC voltage −VN. Virtually always different.
Thus, in the applied voltage to the EL panel P, that is, the difference VP + VN between the positive and negative DC voltage + VP and −VN, the vicinity of the ripple peak superimposed on each DC voltage + VP and −VN is particularly effectively canceled (FIG. 2, (See 3 (f)). Therefore, the ripple superimposed on the applied voltage VP + VN for the EL panel P is reliably reduced.

The two differential amplifiers 22P and 22N and the two comparators 32P and 32N may be connected with a polarity opposite to the polarity shown in FIG. In that case, it is only necessary that one active period falls within the other inactive period between the first and second control signals SP and SN, or vice versa. Such design changes will be apparent to those skilled in the art from the foregoing description.
In FIG. 1, the boost converter 1P and the inverting converter 1N are both non-insulated. In addition, each of the two converters 1P and 1N may be an insulating type.

<< Embodiment 2 >>
The switching power supply device according to the second embodiment of the present invention is preferably mounted on an EL panel driving device, similarly to the device according to the first embodiment, and the EL panel that is the driving target is used as a display panel of a mobile electronic device.
The switching power supply device 10 according to the second embodiment of the present invention has the same components as the device according to the first embodiment except for the feedback unit 2A and the PWM control unit 3A (see FIG. 4). In FIG. 4, the same reference numerals as those shown in FIG. 1 are given to the same constituent elements as those shown in FIG. Furthermore, the description of Embodiment 1 is used for details of similar components.

The feedback unit 2A compares the positive and negative DC voltages + VP and −VN with the positive and negative reference voltages + VrP and −VrN, respectively, and generates error signals EP and EN indicating the respective errors.
The PWM control unit 3A converts the first and second error signals EP and EN into first and second control signals SP and SN, respectively, by PWM. The PWM control unit 3 further adjusts the time ratio between the active period and the inactive period for the control signals SP and SN, and applies negative feedback to the boost converter 1P and the inverting converter 1N.
In this way, the switching power supply 10 stabilizes the positive and negative DC voltages + VP and −VN. A positive / negative DC voltage + VP and a difference VP + VN between −VN are stably applied between the electrodes PP and PN of the EL panel P.

The feedback unit 2A differs from the feedback unit 2 according to the first embodiment (see FIG. 1) only in that the polarity of the second differential amplifier 22NA is reversed (see FIG. 4).
The second differential amplifier 22NA amplifies the potential difference between the two input terminals with the potential of the inverting input terminal as a reference, and sends it as a second error signal EN. In the second differential amplifier 22NA, the non-inverting input terminal is connected to the cathode PN of the EL panel P, and the inverting input terminal is connected to the negative electrode of the second reference voltage source 21N. Thereby, the level of the second error signal EN is proportional to the level of the negative DC voltage −VN with respect to the negative reference voltage −VrN. That is, if the negative DC voltage −VN shifts upward with respect to the negative reference voltage −VrN, the level of the second error signal EN increases, and conversely, the negative DC voltage −VN becomes a negative reference voltage −VrN. If the level is shifted downward, the level of the second error signal EN decreases.

The PWM control unit 3A is different from the PWM control unit 3 according to the first embodiment (see FIG. 1) in that the polarity of the second comparator 32NA is reversed, and the oscillation unit 31P is different from each of the two comparators 32P and 32NA. , 31N is different (see Fig. 4).
The first oscillating unit 31P generates the first carrier wave WP at a constant frequency. The first carrier wave WP is preferably a sawtooth wave or a triangular wave (see FIGS. 5 and 6 (a)).
The second oscillating unit 31N generates the second carrier wave WN at the same frequency as the frequency of the first carrier wave WP. The second carrier wave WN has a waveform obtained by inverting the top and bottom of the first carrier wave WP (see (b) of FIGS. 5 and 6).
The two carrier waves WP and WN are substantially synchronized between the two oscillation units 31P and 31N. The oscillation units 31P and 31N preferably generate the carrier waves WP and WN based on a common clock (not shown).
As shown in (a) and (b) of FIG. 5, when the two carriers WP and WN are substantially discontinuous waveforms between the maximum value WT and the minimum value WB, such as a sawtooth wave, The local maximum value WT immediately before (or immediately after) is substantially always synchronized with the other local minimum value WB immediately before (or immediately after).
As shown in (a) and (b) of FIG. 6, when the two carriers WP and WN are continuous waveforms such as a triangular wave, the vicinity of one maximum value WT is substantially always the other minimum value WB. Synchronize with the neighborhood.

  The first comparator 32P activates the first control signal SP according to the polarity of the potential of the non-inverting input terminal with respect to the potential of the inverting input terminal. In the first comparator 32P, in particular, the first carrier wave WP is applied to the inverting input terminal, and the first error signal EP is applied to the non-inverting input terminal (see FIG. 4). In this case, the first control signal SP is activated if the first error signal EP is higher than the first carrier wave WP, and conversely, if the first error signal EP is lower than the first carrier wave WP, the first control signal SP is activated. The control signal SP is made inactive (see FIGS. 5 and 6 (a) and (c)). For example, in (c) of FIGS. 5 and 6, the first control signal SP is maintained at the H level during the active period T1P and is maintained at the L level during the inactive period T2P.

In the active period T1P of the first control signal SP, the first switch element QP is maintained in the ON state. Therefore, the first current IP flowing through the first inductor LP increases (see (e) of FIGS. 5 and 6). On the other hand, since the first capacitor CP is discharged, the positive DC voltage + VP drops (see the thin solid line shown in (g) of FIGS. 5 and 6).
In the inactive period T2P of the first control signal SP, the first switch element QP is maintained in the off state. Accordingly, the first current IP decreases (see (e) of FIGS. 5 and 6). On the other hand, since the first capacitor CP is charged, the positive DC voltage + VP increases (see the thin solid line shown in FIGS. 5 and 6 (g)).
Thus, the positive DC voltage + VP repeatedly fluctuates up and down as the first switch element QP is turned on / off. That is, a ripple appears.

When the positive DC voltage + VP fluctuates upward, the level of the first error signal EP decreases, so the active period T1P of the first control signal SP is shortened ((a) and (c) in FIGS. 5 and 6). See), the ON time of the first switch element QP is shortened. Thereby, the energy stored in the first inductor LP is reduced. As a result, an increase in positive DC voltage + VP can be suppressed. Similarly, downward fluctuation due to the positive DC voltage + VP is also suppressed.
Thus, boost converter 1P receives negative feedback by cooperation of feedback unit 2A and PWM control unit 3A. As a result, the positive DC voltage + VP is stabilized.

  The second comparator 32NA activates the second control signal SN according to the polarity of the potential of the non-inverting input terminal with reference to the potential of the inverting input terminal. In the second comparator 32NA, in particular, the second carrier wave WN is applied to the inverting input terminal, and the second error signal EN is applied to the non-inverting input terminal (see FIG. 4). In this case, the second control signal SN is activated if the second error signal EN is higher than the second carrier WN, and conversely if the second error signal EN is lower than the second carrier WN, the second control signal SN is activated. The control signal SN is made inactive (see FIGS. 5 and 6 (b) and (d)). For example, in (d) of FIGS. 5 and 6, the second control signal SN is maintained at the H level during the active period T1N and is maintained at the L level during the inactive period T2N.

In the active period T1N of the second control signal SN, the second switch element QN is maintained in the ON state. Accordingly, the second current IN flowing through the second inductor LN increases (see (f) in FIGS. 5 and 6). On the other hand, since the second capacitor CN is discharged, the negative DC voltage −VN rises (see the broken line shown in (g) of FIGS. 5 and 6).
In the inactive period T2N of the second control signal SN, the second switch element QN is maintained in the off state. Therefore, the second current IN decreases (see (f) in FIGS. 5 and 6). On the other hand, since the second capacitor CN is charged, the negative DC voltage −VN drops (see the broken line shown in (g) of FIGS. 5 and 6).
As described above, the negative DC voltage −VN repeatedly fluctuates up and down as the second switch element QN is turned on / off. That is, a ripple appears.

When the negative DC voltage −VN fluctuates downward, the level of the second error signal EN decreases, so the active period T1N of the second control signal SN is shortened ((b) and (d in FIGS. 5 and 6). )), The ON time of the second switch element QN is shortened. Thereby, the energy stored in the second inductor LN is reduced. As a result, a drop in negative DC voltage −VN can be suppressed. Similarly, upward fluctuation due to the negative DC voltage -VN is also suppressed.
Thus, the inverting converter 1N receives negative feedback by the cooperation of the feedback unit 2A and the PWM control unit 3A. As a result, the negative DC voltage −VN is stabilized.

Unlike the conventional device, the PWM control unit 3A uses different carrier waves WP and WN to generate the first and second control signals SP and SN, and inverts their waveforms in particular upside down (FIG. 5). 6 (a) and (b)). Thereby, between the two control signals SP and SN, one active period falls within the other inactive period, or one inactive period falls within the other active period. For example, in FIGS. 5 and 6 (c) and (d), the inactive period T2P of the first control signal SP falls within the active period T1N of the second control signal SN, and the inactive period of the second control signal SN The period T2N falls within the active period T1P of the first control signal SP.
In this way, at least one of the active period and the inactive period does not overlap between the first and second control signals SP and SN. That is, no matter how the control target of each level of the two error signals EP, EN is set (within the fluctuation range of each carrier wave WP, WN), that is, the ratio of each ratio of the two switch elements QP, QN It does not change no matter how the control target is set. Therefore, the time during which the on / off state differs between the two switch elements QP and QN is sufficiently long (see inactive periods T2P and T2N shown in FIGS. 5 and 6). In those periods, the positive and negative DC voltages + VP and −VN fluctuate in the same direction (see (g) of FIGS. 5 and 6). Therefore, the ripple superimposed on each DC voltage + VP, −VN cancels out in the applied voltage to the EL panel P, that is, the difference VP + VN between the positive and negative DC voltages.
Thus, the applied voltage VP + VN to the EL panel P is stabilized with high accuracy.

For example, in FIGS. 5A and 5B, the first error signal is substantially always immediately before the first carrier wave WP reaches the maximum value WT (= just before the second carrier wave WN reaches the minimum value WB). EP is lower than the first carrier wave WP, and the second error signal EN is higher than the second carrier wave WN. On the other hand, immediately after the first carrier wave WP reaches the minimum value WB (= immediately after the second carrier wave WN reaches the maximum value WT), the first error signal EP is substantially higher than the first carrier wave WP. The second error signal EN is lower than the second carrier wave WN.
For example, in FIGS. 6A and 6B, the first error signal EP is substantially always in the vicinity of the maximum value WT of the first carrier wave WP (= in the vicinity of the minimum value WB of the second carrier wave WN). And the second error signal EN is higher than the second carrier wave WN. On the other hand, in the vicinity of the minimum value WB of the first carrier wave WP (= in the vicinity of the maximum value WT of the second carrier wave WN), the first error signal EP is always higher than the first carrier wave WP, and the second error signal. EN is lower than the second carrier WN.
As described above, the polarities of the error signals EP and EN with respect to the respective carriers WP and WN are substantially reversed in the vicinity of the peaks WT and WB of the two carriers WP and WN. Therefore, if one of the two control signals SP and SN is active, the other is always inactive, that is, the two switch elements QP and QN are maintained in different on / off states (shown in FIGS. 5 and 6). Inactive period T2P, see T2N). As a result, the phase is almost always different between the vicinity of the maximum value RP of the positive DC voltage + VP and the vicinity of the minimum value RN of the negative DC voltage −VN (see (g) of FIGS. 5 and 6).

In particular, when the two carrier waves WP and WN are sawtooth waves as shown in FIGS. 5A and 5B, the maximum value RP of the positive DC voltage + VP is near the negative DC voltage −VN. It is virtually always synchronized with the local maximum RM.
On the other hand, when the two carrier waves WP and WN are triangular waves as shown in FIGS. 6 (a) and 6 (b), the local maximum value RQ of the positive DC voltage + VP and the maximum of the negative DC voltage −VN are obtained. In the vicinity of the value RM, the phase is always substantially different.
Thus, in the applied voltage to the EL panel P, that is, the difference VP + VN between the positive and negative DC voltages + VP and −VN, the vicinity of the ripple peak superimposed on each DC voltage + VP and −VN cancels out particularly effectively (FIG. 5, (See 6 (g)). Therefore, the ripple superimposed on the applied voltage VP + VN for the EL panel P is reliably reduced.

The two differential amplifiers 22P and 22NA and the two comparators 32P and 32NA may be connected with a polarity opposite to the polarity shown in FIG. In this case, one active period may be within the other inactive period between the first and second control signals SP and SN, or vice versa. Such design changes will be apparent to those skilled in the art from the foregoing description.
In FIG. 4, the boost converter 1P and the inverting converter 1N are both non-insulated. In addition, each of the two converters 1P and 1N may be an insulating type.

  As described above, the switching power supply according to the present invention reduces the ripple superimposed on the difference between both positive and negative output voltages by adjusting the timing of the two control signals. Thus, the present invention is clearly industrially applicable.

1 is a block diagram showing a switching power supply device 10 according to Embodiment 1 of the present invention. For the switching power supply 10 according to Embodiment 1 of the present invention, (a) a sawtooth carrier wave W (thick solid line), two error signals EP (thin solid line), EN (dashed line), (b) first control signal SP , (C) second control signal SN, (d) current IP flowing through first inductor LP, (e) current IN flowing through second inductor LN, (f) positive DC output from boost converter 1P 6 is a timing chart showing a voltage + VP (thin solid line), a negative DC voltage −VN (broken line) output from the inverting converter 1N, and a difference VP + VN (thick solid line) between the positive and negative DC voltages + VP and −VN. For the switching power supply 10 according to Embodiment 1 of the present invention, (a) a triangular wave carrier W (thick solid line) and two error signals EP (thin solid line), EN (dashed line), (b) first control signal SP , (C) second control signal SN, (d) current IP flowing through first inductor LP, (e) current IN flowing through second inductor LN, (f) positive DC output from boost converter 1P 6 is a timing chart showing a voltage + VP (thin solid line), a negative DC voltage −VN (broken line) output from the inverting converter 1N, and a difference VP + VN (thick solid line) between the positive and negative DC voltages + VP and −VN. It is a block diagram which shows the switching power supply device 10 by Embodiment 2 of this invention. Regarding the switching power supply 10 according to Embodiment 2 of the present invention, (a) a sawtooth-shaped first carrier wave WP (thick solid line) and a first error signal EP (thin solid line), (b) a sawtooth-shaped second carrier wave WN (thick broken line) and second error signal EN (thin broken line), (c) first control signal SP, (d) second control signal SN, (e) current IP flowing through first inductor LP, (F) Current IN flowing through second inductor LN, (g) Positive DC voltage + VP (thin solid line) output from boost converter 1P, Negative DC voltage −VN (dashed line) output from inverting converter 1N, 4 is a timing chart showing a positive / negative DC voltage + VP and a difference VP + VN (thick solid line) between −VN. Regarding the switching power supply 10 according to the second embodiment of the present invention, (a) a triangular wave-shaped first carrier wave WP (thick solid line) and a first error signal EP (thin solid line), (b) a triangular wave-shaped second carrier wave WN (thick broken line) and second error signal EN (thin broken line), (c) first control signal SP, (d) second control signal SN, (e) current IP flowing through first inductor LP, (F) Current IN flowing through second inductor LN, (g) Positive DC voltage + VP (thin solid line) output from boost converter 1P, Negative DC voltage −VN (dashed line) output from inverting converter 1N, 4 is a timing chart showing a positive / negative DC voltage + VP and a difference VP + VN (thick solid line) between −VN. 1 is a block diagram showing a conventional switching power supply device 100. FIG. For the conventional switching power supply device 100, (a) a sawtooth carrier wave W (thick solid line) and two error signals EP (thin solid line), EN (dashed line), (b) first control signal SP, (c) first Second control signal SN, (d) current IP flowing through first inductor LP, (e) current IN flowing through second inductor LN, (f) positive DC voltage + VP output from boost converter 1P (thin solid line) ), A negative DC voltage −VN (broken line) output from the inverting converter 1N, and a difference VP + VN (bold solid line) between the positive and negative DC voltages + VP and −VN.

Explanation of symbols

B battery
VI Supply voltage
10 Switching power supply
1P boost converter
LP first inductor
DP first diode
QP first switch element
CP first capacitor
IP first current + VP positive DC voltage
1N inverting converter
LN second inductor
DN second diode
QN Second switch element
CN second capacitor
IN Second current −VN Negative DC voltage
2 Return section
21P First reference voltage source + VrP Positive reference voltage
22P first differential amplifier
EP first error signal
21N Second reference voltage source −VrN Positive reference voltage
22N second differential amplifier
EN Second error signal
3 PWM controller
31 Oscillator
W carrier
32P first comparator
SP 1st control signal
32N second comparator
SN Second control signal
P EL panel
PP EL panel P anode
PN EL panel P cathode

Claims (7)

A first switch element that is on during an active period of the first control signal and is off during an inactive period; and
A first inductor that accumulates energy by applying a power supply voltage between both ends in an on period of the first switch element, and releases the energy in an off period of the first switch element;
A boost converter that converts the power supply voltage to a positive DC voltage;
A second switch element that is turned on in the active period of the second control signal and turned off in the inactive period; and
A second inductor that stores energy by applying the power supply voltage between both ends in an on period of the second switch element, and releases energy in an off period of the second switch element;
An inverting converter for converting the power supply voltage into a negative DC voltage;
A first error signal indicating a difference between a first reference voltage and the positive DC voltage; a second error signal indicating a difference between a second reference voltage and the negative DC voltage; Generating a feedback part;
And
By pulse width modulation (PWM), converting the first error signal to the first control signal and converting the second error signal to the second control signal,
Between the first and second control signals, one active period falls within the other inactive period, or one inactive period falls within the other active period,
PWM controller;
A switching power supply device. An oscillator that generates a constant carrier at a constant frequency;
A first comparator that activates the first control signal in response to the polarity of the first error signal relative to the carrier; and
A second comparator that activates the second control signal in response to the polarity of the second error signal relative to the carrier;
Including the PWM control unit,
The polarity of the first error signal relative to the carrier during the active period of the first control signal;
The polarity of the second error signal relative to the carrier in the active period of the second control signal is opposite;
The switching power supply device according to claim 1.   The switching power supply device according to claim 2, wherein the carrier wave is a sawtooth wave or a triangular wave. A first oscillation unit for generating a first carrier wave having a constant waveform at a constant frequency;
A second oscillating unit that generates a second carrier wave having a waveform obtained by inverting the top and bottom of the waveform at the frequency;
A first comparator that activates the first control signal in response to the polarity of the first error signal relative to the first carrier; and
A second comparator that activates the second control signal in response to the polarity of the second error signal relative to the second carrier;
Including the PWM control unit,
The phase between the first and second carriers is substantially equal,
The polarity of the first error signal relative to the first carrier in the active period of the first control signal;
The polarity of the second error signal relative to the second carrier in the active period of the second control signal is equal,
The switching power supply device according to claim 1.   The switching power supply device according to claim 4, wherein the first carrier wave is a sawtooth wave or a triangular wave.   An EL panel driving device comprising the switching power supply device according to claim 1, wherein the positive voltage and the negative voltage are applied to each electrode of a pixel included in the EL panel. An EL panel in which pixels having a light-emitting layer containing a light-emitting substance and an electrode sandwiching the light-emitting layer are juxtaposed; and
2. An EL panel driving unit comprising the switching power supply device according to claim 1, wherein the positive and negative DC voltages are applied to each electrode of the pixel in accordance with a video signal received from outside.
An EL display comprising:

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