JP2006287209A - Thermally protective circuit and semiconductor integrated circuit device provided with the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a thermally protective circuit capable of obviating an abnormal heating which is an object of overheating monitoring and that is capable of conducting a safer thermally protective operation and a semiconductor integrated circuit device provided with the same. <P>SOLUTION: The thermally protective circuit is configured by having a means that continuously or gradually suppresses the load driving (for example, the upper limit value of driving current), according to a monitoring objective temperature, after the monitoring objective temperature exceeds a predetermined threshold temperature Tlmt. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a semiconductor integrated circuit device provided with a thermal protection circuit, and more particularly to an improvement in accuracy of the thermal protection function.

  Conventionally, many of the semiconductor integrated circuit devices (hereinafter referred to as IC [Integrated Circuit]) that drive power transistors such as a power supply device and a motor drive device have destroyed IC (particularly a heat source) due to abnormal heat generation. As a means for preventing the destruction of a certain power transistor, a thermal protection circuit (so-called thermal shutdown circuit) is mounted (see, for example, Patent Documents 1 and 2 by the present applicant).

  The conventional thermal protection circuit is generally configured to generate a thermal protection signal by utilizing the characteristic that Vf (forward voltage drop) of a bipolar transistor or a diode varies depending on the ambient temperature. .

  Further, the conventional thermal protection circuit is generally an automatic return type having a hysteresis at a threshold temperature.

Other conventional technologies related to the present invention include a protection circuit (see Patent Document 3) in which a reference voltage generation unit and an output unit are shared by a thermal protection circuit and an overcurrent protection circuit, and a drive current capability when detecting a low temperature. A semiconductor integrated circuit to be enhanced (see Patent Document 4) has been disclosed and proposed.
JP 2004-253936 A Japanese Patent Publication No. 6-16540 Japanese Patent Laid-Open No. 9-246876 JP-A-7-161920

  Certainly, with the above-described conventional thermal protection circuit, it is possible to detect and shut off abnormal heat generation of the IC due to malfunction or overload, thereby preventing destruction of the IC.

  However, the above conventional thermal protection circuit is merely configured to stop driving the main part of the IC for the first time when the chip temperature reaches the threshold temperature, that is, when abnormal heat generation is detected. No special consideration was given to the previous preliminary thermal protection operation. For example, in a motor driver IC equipped with a conventional thermal protection circuit, even if there is an indication of an abnormal temperature rise, torque control that is the same as normal is continued as long as the chip temperature does not reach the threshold temperature It had been. For this reason, the conventional thermal protection circuit has a problem that although it can finally block abnormal heat generation of the IC, it cannot prevent it, and the chip temperature tends to rise.

  Further, in the IC equipped with the conventional thermal protection circuit, the output is sharply turned off by the shutdown operation at the time of abnormal heat generation, so that there is a problem that various problems (generation of noise and surge) are likely to be caused. For example, when an IC drive target is an L load (such as a motor coil) having an inductance component, the back electromotive voltage generated in the L load jumps up when the IC is shut down and destroys the IC exceeding the IC withstand voltage. There was a fear that it would lead to.

  In addition, the conventional thermal protection circuit is often provided in the vicinity of the overheat monitoring target in order to improve the detection sensitivity of abnormal heat generation.On the other hand, as an alternative, the automatic return operation after the shutdown is activated is the threshold temperature. Even if the above-mentioned hysteresis is provided, the logic state (high level / low level) of the thermal protection signal is frequently repeated, and there is a possibility of falling into a state where it cannot escape (logic oscillation state).

  In view of the above-described problems, the present invention suppresses abnormal heat generation of an overheat monitoring target, and can perform a safer thermal protection operation, and a semiconductor integrated circuit including the same An object is to provide an apparatus.

  In order to achieve the above object, the thermal protection circuit according to the present invention is a means for continuously or stepwise suppressing the drive of the load in accordance with the monitored temperature after the monitored temperature exceeds the first threshold temperature. It is set as the structure (1st structure) which has. With such a configuration, it is possible to suppress abnormal heat generation of the overheat monitoring target and perform a safer heat protection operation.

  The thermal protection circuit having the first configuration includes means for cutting off the driving of the load when the monitored temperature reaches a second threshold temperature higher than the first threshold temperature. A configuration (second configuration) is preferable. By adopting such a configuration, if the abnormal temperature rise continues even if the drive of the load is suppressed, the drive of the load is completely cut off to destroy the protection target due to abnormal heat generation. It becomes possible to prevent.

  In addition, the thermal protection circuit having the second configuration includes a plurality of heat generation detection units, and blocks the drive of the load when each monitoring target temperature reaches the second threshold temperature ( The third configuration may be used. By adopting such a configuration, it is possible to eliminate a malfunction of the temperature detecting means and realize a more accurate thermal protection operation.

  Further, the thermal protection circuit having the second and third configurations, when the monitoring target temperature reaches a third threshold temperature lower than the second threshold temperature after the drive of the load is cut off, A configuration (fourth configuration) may be provided that includes means for returning the driving of the load. By adopting such a configuration, when the temperature to be monitored is lowered, it becomes possible to quickly return the drive of the load spontaneously without waiting for a return signal from the outside.

  Further, the thermal protection circuit having the fourth configuration includes means for continuously or stepwise returning the driving of the load in accordance with the monitoring target temperature after the monitoring target temperature falls below a third threshold temperature. It is preferable to have a configuration (fifth configuration). By adopting such a configuration, it is possible to suppress reheating after the drive is restored and to perform a safer thermal protection operation.

  The thermal protection circuit having any one of the first to fifth configurations includes a unit that applies feedback to the drive control of the load so that the monitoring target temperature maintains the first threshold temperature. (Sixth configuration) is preferable. By adopting such a configuration, it is possible to realize an appropriate preliminary thermal protection operation before reaching a situation where the driving of the load must be completely cut off.

  A semiconductor integrated circuit device according to the present invention is a semiconductor integrated circuit device including a power transistor that is controlled to be switched and a thermal protection circuit that detects and blocks abnormal heat generation of the power transistor, The thermal protection circuit may have a configuration (seventh configuration) including the thermal protection circuit having any one of the first to sixth configurations.

  In the semiconductor integrated circuit device having the seventh configuration, the power transistor may have a configuration (eighth configuration) in which the drive current or the PWM duty is controlled based on the output of the thermal protection circuit.

  In the semiconductor integrated circuit device having the seventh or eighth configuration, the power transistor forms a motor drive circuit or a switching power supply circuit.

  As described above, with the thermal protection circuit according to the present invention, it is possible to suppress the abnormal heat generation of the overheat monitoring target and perform a safer thermal protection operation. In addition, the reliability of the semiconductor integrated circuit device can be improved.

  Hereinafter, a motor driver IC will be exemplified and described in detail as a semiconductor integrated circuit device according to the present invention.

  FIG. 1 is a block diagram showing a schematic configuration of a motor driver IC according to the present invention. As shown in this figure, the motor driver IC1 detects and shuts off the abnormal heat generation to prevent destruction of the IC, and the motor driver IC1 controls the opening and closing of the power transistor constituting the output stage. And a motor drive circuit 20 for driving the motor.

  The thermal protection circuit 10 is a means for generating a cutoff signal Stsd for stopping the driving of the motor driver IC1 when abnormal heat generation occurs as its basic function. The cutoff signal Stsd is a binary signal that is asserted (for example, high level transition) when abnormal heat generation occurs and negated (for example, low level transition) when no abnormal heat generation occurs.

  The shut-off signal Stsd is sent to an internal circuit (not shown) or the motor drive circuit 20 and used for shutdown control when abnormal heat is generated. In other words, the post-stage circuit that has received the cutoff signal Stsd from the thermal protection circuit 10 can recognize whether or not abnormal heat generation has occurred according to the assert / negate and control the prohibition / permission of the internal operation. It becomes.

  By providing such a thermal protection circuit 10, it is possible to prevent the destruction of the motor driver IC1 (particularly, the destruction of the power transistor constituting the motor drive circuit 20) due to abnormal heat generation.

  Further, the thermal protection circuit 10 is provided in the vicinity of the motor drive circuit 20 (particularly, its power transistor) that is an overheat monitoring target. By adopting such a configuration, it is possible to directly detect the junction temperature of the power transistor serving as a heat generation source and realize a highly accurate thermal protection operation.

  The thermal protection circuit 10 is an automatic return type having a hysteresis in the threshold temperature. By adopting such a configuration, when the chip temperature is lowered, the driving of the main part of the IC (such as driving of the motor 2 by the motor driving circuit 20) can be quickly and spontaneously resumed without waiting for a return signal from the outside. It becomes possible. Further, if the threshold temperature has a hysteresis, the logic oscillation of the cutoff signal Stsd can be suppressed to some extent.

  Here, as described above, the cut-off signal Stsd is merely a signal for stopping the driving of the main part of the IC for the first time when the chip temperature reaches the threshold temperature, that is, when abnormal heat generation is detected. It is not responsible for the thermal protection operation before detecting abnormal heat generation. Therefore, the abnormal heat generation of the IC cannot be prevented only by using the cutoff signal Stsd.

  In addition, since the motor driver IC1 is driven by an L load (motor coil) having an inductance component, using only the cut-off signal Stsd, the reverse generated in the motor coil due to a sharp IC output shutdown during abnormal heat generation. There is a possibility that the electromotive voltage will jump up and cause the motor driver IC1 to be destroyed.

  In addition, by providing the thermal protection circuit 10 in the vicinity of the motor drive circuit 20, it is possible to increase the detection sensitivity of abnormal heat generation. On the other hand, in the automatic recovery operation of the thermal protection circuit 10, the threshold temperature has hysteresis. However, the cutoff signal Stsd is likely to fall into the logic oscillation state.

  Therefore, the thermal protection circuit 10 according to the present embodiment includes the heat generation detection unit 11 and the cutoff signal generation unit 12, and suppresses abnormal heat generation of the overheat monitoring target in advance and performs a safer thermal protection operation. It has a suppression signal generation unit 13 that generates a suppression signal Slmt for suppressing the drive of the IC main part (especially the motor drive circuit 20) continuously (or stepwise) according to the temperature rise of the overheat monitoring target. It is configured.

  Hereinafter, the preliminary thermal protection operation using the suppression signal Slmt will be described specifically and in detail.

  FIG. 2 is a diagram illustrating an example of the preliminary thermal protection operation. As shown in this figure, the thermal protection circuit 10 of this example uses the suppression signal Slmt, so that the temperature to be monitored by the heat generation detection unit 11 is the first threshold temperature Tth1 (for example, the absolute maximum rated temperature or lower). After that, the driving of the motor drive circuit 20 is continuously (or stepwise) suppressed according to the monitored temperature.

  More specifically, the thermal protection circuit 10 of the present example is a drive that is supplied to the motor drive circuit 20 as the monitored temperature rises after the monitored temperature exceeds the first threshold temperature Tth1. The upper limit value of the current is gradually suppressed. By adopting such a configuration, it is possible to suppress abnormal heat generation of the overheat monitoring target and to perform a safer thermal protection operation. Also, a shutdown operation during abnormal heat generation, which will be described later, prevents the output from being turned off sharply, thereby avoiding various problems (generation of noise and surge) and safely stopping the driving of the main part of the IC. It becomes possible.

  In addition, the thermal protection circuit 10 of the present example uses the cutoff signal Stsd so that the monitoring target temperature reaches a second threshold temperature Tth2 (for example, 175 ° C.) higher than the first threshold temperature Tth1. The driving circuit 20 is completely cut off. With such a configuration, if the abnormal temperature rise continues even with the suppression control of the drive current by the suppression signal Slmt, the drive of the motor drive circuit 20 is completely shut off, resulting in abnormal heat generation. It is possible to prevent destruction of the IC.

  FIG. 3 is a diagram illustrating another example of the preliminary thermal protection operation. As shown in the figure, the thermal protection circuit 10 of the present example is configured so that the monitoring target temperature exceeds the first threshold temperature Tth1, and then the torque level ( In other words, the drive duty of PWM [Pulse Width Modulation] control is gradually suppressed. By adopting such a configuration, similarly to the configuration in which the upper limit of the drive current is suppressed, abnormal heat generation of the overheat monitoring target can be suppressed in advance, and a safer thermal protection operation can be performed.

  Also in the thermal protection circuit 10 of this example, when the monitoring target temperature reaches the second threshold temperature Tth2, the driving of the motor drive circuit 20 is completely cut off as in the previous example. Therefore, if the abnormal temperature rise continues even if the torque level is suppressed, it is possible to completely interrupt the drive of the motor drive circuit 20 and prevent the IC from being destroyed due to abnormal heat generation. .

  Further, in the thermal protection circuit 10 of the present example, the monitored temperature reaches a third threshold temperature Tth3 (for example, 150 ° C.) lower than the second threshold temperature Tth2 after the drive of the motor drive circuit 20 is cut off. Sometimes, the drive of the motor drive circuit 20 is restored. By adopting such a configuration, when the temperature to be monitored falls, it becomes possible to quickly return the driving of the main part of the IC spontaneously without waiting for a return signal from the outside.

  Furthermore, the thermal protection circuit 10 of this example returns the torque level of the motor drive circuit 20 continuously (or stepwise) according to the monitored temperature after the monitored temperature falls below the third threshold temperature Tth3. It is supposed to be configured. In the thermal protection circuit 10 of this example, the torque level is gradually restored so that the torque level at the time of monitoring reaches the fourth threshold temperature (for example, 100 ° C.) so that the torque level at the steady state is reached. . By adopting such a configuration, it is possible to suppress reheating after the drive is restored and to perform a safer thermal protection operation. It is also possible to prevent the logic oscillation of the cutoff signal Stsd. In this example, the case where the first threshold temperature Tth1 and the third threshold temperature Tth3 coincide with each other is shown. However, such setting of the threshold temperature is merely an example and can be changed as appropriate. It doesn't matter.

  FIG. 4 is a diagram showing still another example of the preliminary thermal protection operation. As shown in this figure, the thermal protection circuit 10 of this example sets the first threshold temperature Tth1 lower than the third threshold temperature Tth3, and then the monitored temperature reaches the first threshold temperature Tth1. Thereafter, feedback is applied to drive control of the motor drive circuit 20 (that is, drive current suppression control and torque level suppression control described above) so as to maintain the temperature. By adopting such a configuration, it is possible to suppress the self-heating of the motor driver IC 1 and realize an appropriate preliminary thermal protection operation before reaching a situation where the driving of the motor driving circuit 20 must be completely shut off. This is possible (see the solid line in the figure). On the other hand, if abnormal heat generation occurs in the motor driver IC1 even with the preliminary thermal protection operation described above, the motor drive circuit is reached when the monitored temperature reaches the second threshold temperature Tth2, as in the previous example. It is possible to completely shut off the drive 20 and prevent destruction of the IC due to abnormal heat generation (see the broken line in the figure).

  Next, a specific and detailed description will be given of a configuration example and operation of the thermal protection circuit 10.

  FIG. 5 is a circuit diagram showing an embodiment of the thermal protection circuit 10. As described above, the thermal protection circuit 10 includes the heat generation detection unit 11, the cutoff signal generation unit 12, and the suppression signal generation unit 13 as its circuit blocks.

  The heat generation detection unit 11 includes a constant current source I1 and diodes D1 to D3.

  One end of the constant current source I1 is connected to the power supply voltage application end, and the other end is connected to the anode of the diode D1 (corresponding to the output end of the heat generation detector 11 that extracts the voltage signal Va). The cathode of the diode D1 is connected to the anode of the diode D2, and the cathode of the diode D2 is connected to the anode of the diode D3. The cathode of the diode D3 is grounded.

  That is, the heat generation detection unit 11 utilizes the characteristic that the Vf (forward voltage drop) of the diodes D1 to D3 varies depending on the ambient temperature (a negative temperature characteristic of about −2 [mV / ° C.]). The voltage signal Va for detecting heat generation (a voltage signal whose voltage level decreases as the monitoring target temperature increases) is extracted.

  The cutoff signal generation unit 12 includes comparators 121 and 122, DC voltage sources 123 and 124, an inverter 125, and an RS latch 126. The DC voltage source 123 is means for generating a second threshold voltage Vth2 corresponding to the second threshold temperature Tth2, and the DC voltage source 124 is a third threshold voltage corresponding to the third threshold temperature Tth3 (<Tth2). This is a means for generating Vth3 (> Vth2).

  The non-inverting input terminal (+) of the comparator 121 is connected to the output terminal of the heat generation detection unit 11, and the inverting input terminal (−) is connected to the positive terminal of the DC voltage source 123. The negative terminal of the DC voltage source 123 is grounded. The output terminal of the comparator 121 is connected to the set terminal (S) of the RS latch 126. The non-inverting input terminal (+) of the comparator 122 is connected to the output terminal of the heat generation detector 11, and the inverting input terminal (−) is connected to the positive terminal of the DC voltage source 124. The negative terminal of the DC voltage source 124 is grounded. The output terminal of the comparator 122 is connected to the reset terminal (R) of the RS latch 126 via the inverter 125.

  The RS latch 126 includes NANDs 126a and 126b. One input terminal of the NAND 126a corresponding to the set terminal (S) of the RS latch 126 is connected to the output terminal of the comparator 121 as described above. The other input terminal of the NAND 126a is connected to the output terminal of the NAND 126b. The output terminal of the NAND 126a corresponding to the output terminal of the RS latch 126 is connected to the cutoff signal input terminal of the subsequent circuit (the motor drive circuit 20 or other internal circuit) as the output terminal of the cutoff signal generation unit 12, while the NAND 126b Is also connected to one input terminal. The other input terminal of the NAND 126 b corresponding to the reset terminal (R) of the RS latch 126 is connected to the output terminal of the comparator 122 via the inverter 125 as described above.

  The suppression signal generator 13 includes npn-type bipolar transistors N1 and N2, pnp-type bipolar transistors P1 to P4, constant current sources I2 and I3, resistors R1 and R2, and a DC voltage source E1. . The DC voltage source E1 is a means for generating the first threshold voltage Vth1 corresponding to the first threshold temperature Tth1.

  The base of the transistor N1 is connected to the output terminal of the heat generation detection unit 11. The collector of the transistor N1 is connected to the collector of the transistor P1. The emitter of the transistor N1 is grounded via the constant current source I2, and is also connected to one end of the resistor R1. The base of the transistor N2 is connected to the positive terminal of the DC voltage source E1. The negative terminal of the DC voltage source E1 is grounded. The collector of the transistor N2 is connected to the collector of the transistor P2. The emitter of the transistor N2 is grounded via the constant current source I3, and is also connected to the other end of the resistor R1. The emitters of the transistors P1 and P2 are both connected to the power supply voltage application terminal. The bases of the transistors P1 and P2 are connected to each other, and the connection node is connected to the collector of the transistor P1. The emitters of the transistors P3 and P4 are both connected to the power supply voltage application terminal. The collector of the transistor P3 is connected to a connection node between the collector of the transistor P2 and the collector of the transistor P3. The bases of the transistors P3 and P4 are connected to each other, and the connection node is connected to the collector of the transistor P3. The collector of the transistor P4 is grounded via the resistor R2, and is connected to the suppression signal input terminal of the subsequent circuit (motor drive circuit 20) as the output terminal of the suppression signal generator 13.

  The operation of the blocking signal limiting unit 12 having the above configuration will be described in detail. When the monitoring target temperature does not even reach the third threshold temperature Tth3, the voltage signal Va becomes higher than any of the second and third threshold voltages Vth2 and Vth3. Accordingly, the outputs of the comparators 121 and 122 are both at a high level, a high level is input to the set end (S) of the RS latch 126, and a low level is input to the reset end (R). As a result, the logic of the cutoff signal Stsd sent from the output terminal (Q) of the RS latch 126 becomes a low level (negate state).

  When the monitoring target temperature rises and reaches the third threshold temperature Tth3, the voltage signal Va becomes lower than the third threshold voltage Vth3. Therefore, the output of the comparator 122 is changed to a low level, and a high level is input to the reset terminal (R) of the RS latch 126. On the other hand, the voltage signal Va remains higher than the second threshold voltage Vth2 unless the monitoring target temperature reaches the second threshold temperature Tth2. Accordingly, the output of the comparator 121 is maintained at a high level, and the low level is continuously input to the set end (S) of the RS latch 126. As a result, the logic of the cutoff signal Stsd is maintained at the previous low level (negate state).

  When the monitored temperature further rises and reaches the second threshold temperature Tth2, the voltage signal Va reaches the second threshold voltage Vth2. Accordingly, the output of the comparator 121 is changed to the low level, and the low level is input to the set end (S) of the RS latch 126. As a result, the logic of the cutoff signal Stsd is changed to a high level (asserted state).

  As a result of shutting down the driving of the main part of the IC by asserting the cutoff signal tsd, the voltage signal Va becomes higher than the second threshold voltage Vth2 when the monitored temperature falls below the second threshold temperature Tth2. Accordingly, the output of the comparator 121 is changed to a high level, and the high level is input to the set end (S) of the RS latch 126. On the other hand, the voltage signal Va remains lower than the third threshold voltage Vth3 unless the monitored temperature reaches the third threshold temperature Tth3. Therefore, the output of the comparator 122 is maintained at a low level, and a high level continues to be input to the reset terminal (R) of the RS latch 126. As a result, the logic of the cutoff signal Stsd is maintained at the previous high level (asserted state).

  When the monitored temperature further decreases and falls below the third threshold temperature Tth3, the voltage signal Va becomes higher than the third threshold voltage Vth3. Accordingly, the outputs of the comparators 121 and 122 are both at a high level, a high level is input to the set end (S) of the RS latch 126, and a low level is input to the reset end (R). As a result, the logic of the cutoff signal Stsd returns to the low level (negate state).

  Next, the operation of the suppression signal limiting unit 13 having the above configuration will be described. Until the monitored temperature reaches the first threshold temperature Tth1, since the voltage signal Va is higher than the first threshold voltage Vth1, the output current i hardly flows through the collector of the transistor P4. On the other hand, after the monitored temperature rises and reaches the first threshold temperature Tth1, the voltage signal Va gradually becomes lower than the first threshold voltage Vth1 as the temperature rises. Therefore, the output current i gradually increases as the monitoring target temperature increases.

  That is, the suppression signal limiting unit 13 configured as described above functions as a gm amplifier that outputs the output current i (or a voltage signal obtained by converting the output current i with the resistor R2) as the above-described suppression signal Slmt. To do. By using the suppression signal Slmt obtained by the suppression signal generation unit 13 as described above, the drive current control and torque control (PWM duty control) of the motor drive circuit 20 are performed, as shown in FIGS. 2 and 4 above. The preliminary thermal protection operation can be easily realized. When the preliminary thermal protection operation shown in FIG. 3 is realized, the configuration shown in FIG. 7 may be used instead of the configuration shown in FIG.

  More specifically, the cutoff signal limiting unit 12 is configured to generate a fourth threshold voltage Vth4 corresponding to the fourth threshold temperature Tth4 with the DC voltage source 124, with respect to the configuration of FIG. The suppression signal limiting unit 13 is connected between the constant current source Ia connected between the base of the transistor N2 and the power supply voltage application terminal, and between the base of the transistor N2 and the positive terminal of the DC voltage source E1. The resistor Ra is configured to switch on / off of the constant current source Ia based on the cutoff signal Stsd.

  In the above embodiment, the case where the present invention is applied to the motor driver IC has been described as an example. However, the application target of the present invention is not limited to this, and other switching power supply ICs, etc. The present invention can be widely applied to semiconductor integrated circuit devices.

  The configuration of the present invention can be variously modified within the scope of the present invention in addition to the above embodiment.

  For example, in the above-described embodiment, the configuration in which the single heat generation detection unit 11 is shared by the cutoff signal generation unit 12 and the suppression signal generation unit 13 has been described as an example, but the configuration of the present invention is limited to this. Instead of this, a plurality of heat generation detection units may be provided, and the driving of the motor drive circuit 20 may be shut off when each monitoring target temperature reaches the second threshold temperature Tth2.

  More specifically, as shown in FIG. 6, the first and second heat generation detection units 11a and 11b arranged at different locations on the chip and the monitoring target temperature of the first heat generation detection unit 11a. Similarly to the first cutoff signal generation unit 12a that generates the first cutoff signal Stsd1, and the second cutoff signal generation unit 12b that generates the second cutoff signal Stsd2 based on the monitoring target temperature of the second heat generation detection unit 11b, (2) The circuit of the suppression signal generator 13b that generates the suppression signal Slmt based on the monitoring target temperature of the heat generation detector 11b and the logical product of the first and second cutoff signals Stsd1 and Stsd2 as the cutoff signal Stsd. And an AND 14 to be sent out to other internal circuits). By adopting such a configuration, it is possible to eliminate a malfunction of the temperature detecting means and realize a more accurate thermal protection operation.

  The present invention is a technique useful for enhancing the safety of a semiconductor integrated circuit device against abnormal heat generation. For example, a switching power supply device or a motor driving device (in particular, a washing machine or a fan) in which a power transistor is built in an IC. The application can be suitably used for applications in which there is no problem even if the rotational speed of the motor is somewhat reduced.

These are block diagrams which show the outline of the motor driver IC based on this invention. These are figures which show an example of preliminary | backup heat protection operation | movement. These are figures which show another example of preliminary | backup heat protection operation | movement. These are figures which show another example of preliminary | backup heat protection operation | movement. FIG. 2 is a circuit diagram showing an embodiment of a thermal protection circuit 10. These are block diagrams which show another embodiment of the thermal protection circuit 10. FIG. FIG. 3 is a block diagram showing another embodiment of the temperature protection circuit 10.

Explanation of symbols

1 Motor driver IC
2 Motor 10 Thermal protection circuit 11, 11a, 11b Heat generation detection unit 12, 12a, 12b Block signal generation unit 13, 13b Suppression signal generation unit 14 AND
20 Motor drive circuit 121, 122 Comparator 123, 124 DC voltage source 125 Inverter 126 RS latch 126a, 126b NAND
I1 to I3 Constant current source D1 to D3 Diode P1 to P4 Pnp type bipolar transistor N1 to N2 Npn type bipolar transistor R1 to R2 Resistance E1 DC voltage source Ia Constant current source Ra Resistance

Claims (9)

  A thermal protection circuit comprising means for continuously or stepwise controlling driving of a load in accordance with the monitored temperature after the monitored temperature exceeds a first threshold temperature.   2. The thermal protection according to claim 1, further comprising means for cutting off the driving of the load when the monitoring target temperature reaches a second threshold temperature higher than the first threshold temperature. circuit.   The thermal protection circuit according to claim 2, further comprising a plurality of heat generation detection units, wherein the driving of the load is cut off when each monitoring target temperature reaches a second threshold temperature.   After the drive of the load is cut off, the device further comprises means for returning the drive of the load when the monitored temperature reaches a third threshold temperature lower than the second threshold temperature. The thermal protection circuit according to claim 2 or 3.   5. The apparatus according to claim 4, further comprising means for returning the driving of the load continuously or stepwise according to the monitored temperature after the monitored temperature falls below a third threshold temperature. The described thermal protection circuit.   The heat according to any one of claims 1 to 5, further comprising means for applying feedback to drive control of the load so that the monitored temperature maintains a first threshold temperature. Protection circuit.   A semiconductor integrated circuit device including a power transistor that is controlled to be switched, and a thermal protection circuit that detects and blocks abnormal heat generation of the power transistor, wherein the thermal protection circuit is defined as claims 1 to 6. A semiconductor integrated circuit device comprising the thermal protection circuit according to any one of the above.   8. The semiconductor integrated circuit device according to claim 7, wherein the drive current or the PWM duty of the power transistor is controlled based on the output of the thermal protection circuit.   9. The semiconductor integrated circuit device according to claim 7, wherein the power transistor constitutes a motor drive circuit or a switching power supply circuit.

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