JP2006279745A - Low noise amplifier with variable gain - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To control a noise leaked from an exterior control circuit and to prevent a noise characteristic in an entire circuit from deteriorating. <P>SOLUTION: A signal by-pass circuit 13 is connected in parallel with an amplification circuit 10 between an input side capacitor 11 and an output side capacitor 12. The signal by-pass circuit 13 is constituted of a high-frequency switch 17 consisting of an n-channel FET which connects a drain between the input side capacitor 11 and an input terminal of the amplification circuit 10, and connects a source between an output terminal of an amplifier 10 and a direct-current breaking capacitor 12 through a direct-current breaking by-pass capacitor 16. The high-frequency switch 17 connects a gate to the exterior control circuit 20 through a serial resistance element 19, and is grounded through a capacitive element 18. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a variable gain low noise amplifier, and more particularly to a high frequency variable gain low noise amplifier.

  In a receiver of a wireless system typified by a cellular phone, a signal received by an antenna is amplified by a first stage amplifier circuit. The first-stage amplifier circuit is required to have low noise and high gain characteristics when receiving weak signals, and to have low distortion and low gain characteristics when receiving large signals. In particular, in recent mobile communications, the characteristics of the received electric field greatly change according to the distance between the base station and the mobile station. For this reason, the receiving system is required to have a wider dynamic range than before. In addition, the amplifier circuit in the reception front end portion is required to have lower noise characteristics than those in the past.

  As an example of a low noise amplifier having such a variable gain function, there is a variable gain amplifier described in Patent Document 1.

  FIG. 6 is a block diagram of the high-frequency variable gain amplifier disclosed in Patent Document 1. FIG. 6 shows an amplifier circuit for one stage among a plurality of stages of amplifier circuits.

  As shown in FIG. 6, the high-frequency variable gain amplifier includes an amplifying element 50 and a high-frequency switching element 56 formed of a field effect transistor (FET) that opens and closes a signal bypass circuit of the amplifying element 50.

  Between the amplifying element 50 and the input node P5 and the output node P6, DC blocking capacitors 57 and 58 are connected in series, respectively.

  The amplifying element 50 is composed of a bipolar transistor connected to a grounded emitter. A high frequency signal from an input node P5 is supplied to the base of the amplifying element 50 through an input matching circuit 51, and a predetermined base bias voltage Vbb is supplied through a resistor 52. Supplied. The collector of the amplifying element 50 outputs an amplified signal to the output node P6 via the output matching circuit 53, and is connected to the changeover switch circuit 61 via a drain bias supply circuit composed of the inductor element 59 and the capacitive element 60.

  The changeover switch circuit 61 has a first input node a connected to the supply line of the power supply voltage Vcc and a second input node b which is grounded. This is performed by the external control circuit 20 that operates according to the power control information or the signal level of the received signal.

  A depletion type FET is used for the high-frequency switch element 56, its drain is connected to the input node P5 via the DC blocking capacitor 54, and its source is connected to the collector of the amplifier element 50. Its gate is connected to ground via a resistor 55.

  The conventional high-frequency variable gain amplifier configured as described above has an amplifying element through the changeover switch circuit 61 while the changeover switch circuit 61 is connected to the first input node a under the control of the external control circuit 20. The power supply voltage Vcc is supplied to 50, and the amplifying element 50 enters an operating state. At this time, the power supply voltage Vcc applied through the changeover switch circuit 61 is supplied to the high frequency switch element 56 as a control signal, and the voltage between the gate and source of the high frequency switch element 56 becomes small, and the high frequency switch element 56 is turned off. Therefore, the connection of the signal bypass circuit is opened.

  In the open state, the signal level of the output high-frequency signal at the output node P6 is a high gain operation mode that is higher than the signal level of the input high-frequency signal at the input node P5 by the gain of the amplification element 50. On the contrary, when the changeover switch circuit 61 is switched to the second input node b, the supply of the power supply voltage Vcc to the amplifying element 50 is cut off, so that the operation of the amplifying element 50 is stopped and the changeover switch circuit. Since the ground potential is supplied as a control signal through 61, the high frequency switch element 56 is turned on and the signal bypass circuit is connected.

  In the connected state, the signal level of the output high-frequency signal at the output node P6 is equal to the sum of the loss due to insertion of the high-frequency switch element 56 and the loss due to impedance mismatch at the input node P5. The low gain operation mode is lower than the signal level.

Therefore, when the signal level of the high frequency signal input to the input node P5 is lower than the predetermined level, the mode is switched to the high gain operation mode, and the signal level of the high frequency signal input to the input node P5 is higher than the predetermined level. In this case, by switching to the low gain operation mode, it is possible to realize a high frequency amplifier that can handle a high frequency signal having a large dynamic range.
Japanese Patent Laid-Open No. 10-173453

  However, in the conventional variable gain low noise amplifier having the above configuration, the gain switching means and the external control circuit are directly connected as shown in FIG. Therefore, there is a problem that noise generated in the external control circuit leaks directly to the amplifier.

  It is an object of the present invention to provide a variable gain low noise amplifier that solves the above-described conventional problems, suppresses noise leaking from an external control circuit, and does not deteriorate the noise characteristics of the entire circuit.

  In order to achieve the above object, a variable gain low noise amplifier according to the present invention includes an amplifier circuit, a switch connected in parallel to the amplifier circuit, and a wiring connecting between a control terminal of the switch and an external control circuit. The wiring is configured to be connected in series with a resistance element and grounded through a capacitive element.

  The variable gain low noise amplifier according to the present invention includes an amplifier circuit, a switch connected in parallel with the amplifier circuit, and a strip line connecting a control terminal of the switch and an external connection circuit, and the strip. The line is grounded through a capacitive element.

  The variable gain low noise amplifier according to the present invention includes an amplifier circuit, a switch connected in parallel with the amplifier circuit, and an inductor element connected in series between the control terminal of the switch and an external connection circuit. The inductor element is grounded through a capacitive element.

  According to the variable gain low noise amplifier according to the present invention, it is possible to suppress noise leaking from the external control circuit and prevent deterioration of noise characteristics in the entire circuit.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a circuit configuration diagram of a high frequency variable gain low noise amplifier according to a first embodiment of the present invention. The high frequency variable gain low noise amplifier according to the first embodiment is input via a DC cut-off input capacitor 11. The amplifier circuit 10 connected to the terminal P1 and connected to the output terminal P2 via the output-side capacitor 12 for DC cutoff and connected in parallel with the amplifier circuit 10 between the input-side capacitor 11 and the output-side capacitor 12 And the inductor element 14 having one end connected to a power supply terminal for supplying a power supply voltage Vcc of about 3 V and the other end connected between the output terminal of the amplifier 10 and the output capacitor 12. is doing. A grounded bypass capacitor 15 is connected to the power supply terminal.

  The signal bypass circuit 13 has a drain connected between the input-side capacitor 11 and the input terminal of the amplifier circuit 10, and a source connected to the output terminal of the amplifier 10 and the output capacitor 12 via a bypass capacitor 16 for blocking DC. The first high-frequency switch (DC switch) 17 composed of an N-channel FET connected between the two. The high-frequency switch 17 has a gate connected to the external control circuit 20 via a series resistor element 19 and is grounded via a capacitor element 18.

  FIG. 2 is a circuit configuration diagram of the amplifier circuit 10 according to the first embodiment.

  As shown in FIG. 2, the emitter is grounded, the base is connected to an input terminal P3 that receives an input signal from the input side capacitor 11, and the collector is connected to an output terminal P4 that sends an output signal to the output capacitor 12. A first bipolar transistor 21 for amplifying a high frequency signal input to the high frequency variable gain amplifier is provided.

  The base of the first bipolar transistor 21 is connected to the base of the second bipolar transistor 23 via a first resistor 22A and a second resistor 22B connected in series with each other.

  The emitter of the second bipolar transistor 23 is grounded, and a bypass capacitor 24 is connected between its collector and emitter. The collector of the second bipolar transistor 23 is connected to the base of the third bipolar transistor 25 and is connected to the third resistor 26 connected in series with each other, and a second resistor composed of, for example, a P-channel FET. Is connected to a power supply terminal P6 through a high frequency switch (DC switch) 27.

  The collector of the third bipolar transistor 25 is connected to the power supply terminal P6, the emitter thereof is connected to the common connection of the first resistor 22A and the second resistor 22B, and the base is the collector of the second bipolar transistor 23. It is connected to the.

  The operation of the high frequency variable gain low noise amplifier of the first embodiment configured as described above will be described below with reference to FIGS.

  First, when the reception level of the input high frequency signal is lower than a predetermined value, the high gain operation mode is set. That is, the voltage value of the external gain control circuit shown in FIG. Further, in the amplifier circuit 10 shown in FIG. 2, since the second DC switch 27 is turned off, the base bias voltage of the first bipolar transistor 21 is about 0.7V. Therefore, the amplifier circuit 10 is turned on, while the first DC switch 17 is turned off when the voltage between the gate and the back gate is almost 0V.

  Next, when the reception level of the input high-frequency signal is higher than a predetermined value, for example, in order to prevent the amplifier circuit 10 from being saturated, the low gain operation mode is set. That is, the voltage value of the external control circuit shown in FIG. 1 becomes the power supply voltage Vcc. Further, in the amplifier circuit 10 shown in FIG. 2, the first DC switch 17 is on and the second DC switch 27 is off, so that the base bias voltage of the first bipolar transistor 21 is approximately 0V. Therefore, the amplifier circuit 10 is turned off, while the first DC switch 17 is turned on with the voltage between its gate and back gate being about Vcc.

  As described above, by connecting the resistance elements 19 and 29 in series between the external control circuit 20 and the DC switches 17 and 27 and grounding them via the capacitance elements 18 and 28, noise leaking from the external control circuit 20 is cut. Thus, leakage to the high-frequency signal line can be reduced. As a result, it is possible to reduce deterioration of noise resistance of the entire circuit due to the DC switches 17 and 27 connected to the external control circuit 20.

  FIG. 3 is a circuit configuration diagram of a modification of the amplifier circuit used in the high-frequency variable gain amplifier according to the first embodiment. In FIG. 3, the same components as those shown in FIG.

  The amplifying circuit according to this modification is characterized in that an amplifying element for an input high-frequency signal is cascode-connected. That is, a first bipolar transistor 21 whose emitter is grounded, a fourth bipolar transistor whose emitter is connected to the collector of the first bipolar transistor 21, whose base is grounded in terms of high frequency, and whose collector is connected to the output terminal P4. Transistor 30 is connected.

  The base of the fourth bipolar transistor 30 is connected to the emitter of the fifth bipolar transistor 31 and is grounded via the second bypass capacitor 32.

  The fifth bipolar transistor 31 has a collector connected to the power supply terminal i and a base connected between the fourth resistor 33 and the fifth resistor 34 connected in series.

  A terminal of the fourth resistor 33 opposite to the common connection with the fifth resistor 34 is connected to a power supply terminal via a third DC switch 35.

  A terminal of the fifth resistor 34 on the opposite side to the common connection with the fourth resistor 33 is connected to the collector of the sixth bipolar transistor 37.

  In the sixth bipolar transistor 37, the collector and base are connected to each other, the base is connected to the base of the seventh bipolar transistor 38, and the emitter is grounded via the sixth resistor 36.

  The collector of the sixth bipolar transistor 37 is grounded by a third bypass capacitor 40 connected in parallel with each other. In the figure, 41 is a capacitive element, and 42 is a resistive element.

  The operation of the amplifier circuit configured as described above and shown in FIG. 3 will be described below.

  The potential of the control signal of the external control circuit shown in FIG. 1 becomes almost 0 V, and the second DC switch 27 and the third DC switch 35 are turned on in the amplifier circuit shown in FIG.

The base bias voltage Vb of the fourth bipolar transistor 30 is as follows when the resistance values of the fourth resistor 33, the fifth resistor 34, and the sixth resistor 36 are R4, R5, and R6, respectively. It is given by equation (1).
Vb = (Vcc−0.7) (R5 + R6) / (R4 + R5 + R6) (1)
As a result, as in the first embodiment, the amplifier circuit 10 shown in FIG. 1 is turned on, and the first DC switch 17 of the signal bypass circuit 13 is turned off.

  Next, in the low gain operation mode, the voltage value of the control terminal of the external control circuit shown in FIG. 1 becomes Vcc. Further, in the amplifier circuit shown in FIG. 3, the second DC switch 27 and the third DC switch 35 are turned off. For this reason, the base bias voltage Vb of the fourth bipolar transistor 30 is approximately 0V.

  Similarly to the first embodiment, since the base voltage of the first bipolar transistor 21 becomes almost 0 V when the DC switch 27 is closed, the amplifier circuit is turned off. On the other hand, the high frequency switch element 17 is turned on when the voltage between its gate and back gate is about Vcc.

  In the first embodiment described above, the power supply voltage Vcc is supplied from the power supply terminal shown in FIG. 1 to the collector of the first bipolar transistor 21 even in the low gain operation mode. Therefore, when an electric field signal is input to the input terminal P1, if a DC current flows from the base of the first bipolar transistor 21 to the emitter, a current also flows from the collector to the emitter of the first bipolar transistor 21. End up. As a result, a signal distorted by the first bipolar transistor 21 is output to the output terminal P2.

  However, the amplifier circuit according to the modified example has a cascode amplifier configuration including the first bipolar transistor 21 and the fourth bipolar transistor 30, and further, the base bias voltage Vb of the fourth bipolar transistor 30 in the low gain operation mode. Is set to approximately 0 V, the current flowing through the first bipolar transistor 21 and the fourth bipolar transistor 30 when a strong electric field signal is input to the input terminal P1 is reduced, and the distortion signal output to the output terminal P2 is reduced. Output level can be reduced.

  FIG. 4 is a circuit configuration diagram of a high-frequency variable gain low noise amplifier according to the second embodiment of the present invention. The same components as those shown in FIG.

  As shown in FIG. 4, in the high frequency variable gain low noise amplifier of the second embodiment, the gate of the DC switch 17 in the signal bypass circuit 13 and the external control circuit 20 are connected in series via the strip line 43, and the capacitive element It is characterized by being grounded through 18. As the amplifier circuit 10, the amplifier circuit shown in FIG. 2 or the amplifier circuit shown in FIG. 3 is used.

  As in the second embodiment, by connecting the strip line 43 in series between the external control circuit 20 and the DC switch 17 and grounding via the capacitive element 18, noise leaking from the external control circuit 20 is cut, Leakage to the high frequency signal line can be reduced. As a result, it is possible to reduce deterioration of noise resistance of the entire circuit due to the high frequency switch 17 connected to the external control circuit 20.

  Further, a coplanar line may be used in place of the strip line 43.

  FIG. 5 is a circuit configuration diagram of the high-frequency variable gain low noise amplifier according to the third embodiment of the present invention. The same components as those shown in FIG.

  As shown in FIG. 5, the high-frequency variable gain amplifier according to the third embodiment is configured such that the gate of the DC switch 17 and the external control circuit 20 in the signal bypass circuit 13 of FIG. 18 is grounded. As the amplifier circuit 10, the amplifier circuit shown in FIG. 2 or the amplifier circuit shown in FIG. 3 is used.

  As described above, the inductor element 44 is connected in series between the external control circuit 20 and the high-frequency switch 17 and grounded via the capacitive element 18, so that noise leaking from the external control circuit 20 is cut, and the high-frequency signal line is connected. Leakage can be reduced. As a result, it is possible to reduce deterioration of noise resistance of the entire circuit due to the high frequency switch 17 connected to the external control circuit 20. As the amplifier circuit 10, the amplifier circuit shown in FIG. 2 or the amplifier circuit shown in FIG. 3 is used.

  The present invention is applied to a high-frequency variable gain low noise amplifier used in a radio circuit such as a mobile phone, and is particularly effective for a variable gain low noise amplifier having a gain switching function by an external logic circuit signal.

1 is a circuit configuration diagram of a high frequency variable gain increasing and decreasing noise amplifier according to a first embodiment of the present invention. Circuit configuration diagram of an amplifier circuit according to the first embodiment Circuit configuration diagram of a modification of the amplifier circuit used in the first embodiment Circuit diagram of high frequency variable gain low noise amplifier according to embodiment 2 of the present invention Circuit configuration diagram of a high frequency variable gain low noise amplifier according to a third embodiment of the present invention Circuit diagram of conventional high-frequency variable gain amplifier

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Amplification circuit 11 Input side capacitor | condenser 12 Output side capacitor | condenser 13 Signal bypass circuit 14 Inductor element 15 Bypass capacitor 16 DC blocking capacitor 17 High frequency switch 18 Capacitance element 19 Resistance element 20 External control circuit 21 1st bipolar transistor 22A 1st resistance 22B 2nd resistor 23 2nd bipolar transistor 24 Bypass capacitor 25 3rd bipolar transistor 26 3rd resistance element 27 High frequency switch 28 Capacitance element 29 Resistance element 30 4th bipolar transistor 31 5th bipolar transistor 32 Second bypass capacitor 33 Fourth resistor 34 Fifth resistor 35 High-frequency switch 36 Sixth resistor 37 Sixth bipolar transistor 38 Seventh bipolar transistor 39 Seventh resistor element Element 40 Third bypass capacitor 41 Capacitance element 42 Resistance element 43 Strip line 44 Inductor element

Claims (6)

  An amplifier circuit; a switch connected in parallel to the amplifier circuit; and a wiring connecting the control terminal of the switch and an external control circuit; and connecting the wiring in series with a resistance element; A variable gain low noise amplifier characterized in that it is grounded through the circuit.   An amplifier circuit; a switch connected in parallel with the amplifier circuit; and a strip line connecting a control terminal of the switch and an external connection circuit, wherein the strip line is grounded via a capacitive element. Variable gain low noise amplifier.   An amplifier circuit, a switch connected in parallel with the amplifier circuit, and an inductor element connected in series between a control terminal of the switch and an external connection circuit, the inductor element being grounded via a capacitive element A variable gain low noise amplifier.   2. The amplifier circuit according to claim 1, further comprising a bipolar transistor, wherein an input signal of the amplifier circuit is input to a base of the bipolar transistor, and an output signal of the amplifier circuit is output from a collector of the bipolar transistor. The variable gain low noise amplifier according to any one of to 3.   The amplifier circuit includes a first bipolar transistor and a second bipolar transistor having an emitter connected to a collector of the first bipolar transistor, and an input signal of the amplifier circuit is provided at a base of the first bipolar transistor. The variable gain low noise amplifier according to claim 1, wherein an output signal of the amplifier circuit is output from a collector of the second bipolar transistor.   3. The variable gain low noise amplifier according to claim 2, wherein the strip line has a coplanar structure.

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