JP2006278587A - Manufacturing method and manufacturing apparatus for semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method and an apparatus of a semiconductor device by which a copper oxide layer formed in a base of a via hole is uniformly removed before a barrier layer is formed without a trouble of damage even if a substrate has a large diameter. <P>SOLUTION: The manufacturing method has a reduction treatment process S101 for reducing the copper oxide layer formed at the base of the via hole by organic acid cleaning, a barrier layer forming process S106 forming the barrier layer by sputtering after the reduction treatment process S101, and a Cu seed layer forming process S107 forming a Cu seed layer by sputtering after the barrier layer is formed. The reduction treatment process S101, the barrier layer forming process S106, and the Cu seed layer forming process S107 are continuously performed in the same manufacture device. Thus, a sufficient contact can uniformly be formed between lower wiring Cu and the barrier layer in a semiconductor substrate plane without deteriorating an interlayer insulating film formed of a low dielectric constant material. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a semiconductor device manufacturing method and a manufacturing apparatus, and more particularly, to a semiconductor device manufacturing method and a manufacturing apparatus related to a Cu wiring forming process among the semiconductor device manufacturing processes.

  In recent years, with the improvement in performance of silicon semiconductor products, miniaturization and multilayering of wiring structures are accelerating. In order to realize such a high-performance wiring, Cu has recently been used as a wiring material. Furthermore, in order to reduce the parasitic capacitance between the wirings and realize a high-speed signal, a low relative dielectric constant material has begun to be used as an interlayer insulating film. As a method for forming such a high-performance Cu wiring structure, damascene technology is generally performed because dry etching of copper is extremely difficult. In the damascene technique, after an interlayer insulating film is deposited on a lower layer wiring, via holes and wiring grooves are first formed by dry etching of the interlayer insulating film. Next, a barrier layer and a Cu seed layer are formed by sputtering in the formed via hole and wiring groove, and then Cu is embedded by electrolytic plating. Finally, excess Cu is removed and planarized by chemical mechanical polishing. As a result, a series of wiring structures are formed.

  In such a wiring structure formation process, in order to realize a high wiring yield, a good contact must be formed between the Cu surface of the lower layer wiring and the barrier layer formed at the bottom of the via hole. On the surface of Cu exposed at the bottom of the via hole after the via hole is formed, a Cu oxide layer is formed by a resist removal process by oxygen ashing and subsequent exposure to the atmosphere. Therefore, in order to obtain good contact with the barrier layer, the Cu oxide layer must be removed prior to the formation of the barrier layer. Has been used.

  However, the argon reverse sputtering method is a method of physically removing the oxidized Cu layer on the surface of the semiconductor substrate by causing argon particles ionized by the plasma to collide with the surface of the semiconductor substrate. is there. First, Cu at the bottom of the via hole adheres to the interlayer insulating film on the side wall of the via hole by resputtering, so that Cu diffuses in the interlayer insulating film. Further, an interlayer insulating film made of a low relative dielectric constant material is damaged by exposure to plasma, and the relative dielectric constant increases. Furthermore, the refined hole pattern is damaged by ion bombardment. All of these are major problems for realizing high-performance wiring. Therefore, it is necessary to remove the oxidized Cu layer on the bottom surface of the via hole without causing such a problem.

In order to cope with such a problem, a method using hydrogen plasma or a method using vaporized formic acid has been proposed as a method to replace the conventional argon reverse sputtering method.
For example, Patent Document 1 proposes to remove Cu oxide at the bottom of a via hole mainly by a chemical reaction using an anisotropic hydrogen plasma method.

Patent Document 2 proposes that vaporized formic acid is introduced into a vacuum reaction chamber and Cu oxide is removed by a chemical reaction between Cu oxide at the bottom of the via hole and formic acid. In this method, Cu oxide can be removed efficiently.
JP 2000-332112 A JP 2003-243502 A

  However, in the method of removing Cu oxide at the bottom of the via hole mainly by chemical reaction using the anisotropic hydrogen plasma method as disclosed in Patent Document 1 or the like, the chemical reaction with Cu oxide by hydrogen plasma Issues such as long reaction time due to slow reaction time, and long processing time for this reason may cause deterioration of low dielectric constant film and pattern damage due to plasma like argon reverse sputtering method have.

  Moreover, the method of introducing vaporized formic acid into a vacuum reaction chamber as disclosed in Patent Document 2 and removing Cu oxide by a chemical reaction between Cu oxide at the bottom of the via hole and formic acid has the following problems. . First, formic acid must be vaporized by bubbling before being introduced into the vacuum chamber because it is liquid at room temperature, and then introduced into the chamber while maintaining a high temperature. It is difficult to supply formic acid uniformly to the inside, and there may be variations in the amount of Cu oxide removed. In addition, when such a high-temperature acid is introduced into a metal vacuum chamber for a long time, corrosion occurs in the chamber, which is problematic for application to mass production.

  The present invention solves these problems, and there is no problem such as damage when removing the oxidized Cu layer formed on the bottom of the via hole before forming the barrier layer, and even a large-diameter substrate is oxidized. It is an object of the present invention to provide a semiconductor device manufacturing method and a manufacturing apparatus capable of uniformly removing a Cu layer.

  In order to solve the above problems, in the method of manufacturing a semiconductor device of the present invention, a step of reducing the Cu oxide layer formed at the bottom of the via hole by cleaning the semiconductor substrate on which the wiring trench and the via hole are formed with an organic acid. And a step of completely removing residual moisture in the via hole by vacuum heating after the reduction treatment, and a step of forming a barrier layer and a Cu seed layer by sputtering after the removal of the residual moisture.

  An apparatus for realizing the present invention includes a reduction processing chamber (reduction processing unit) that removes the oxidized Cu layer at the bottom of the via hole by organic acid cleaning, and drying that removes moisture slightly remaining in the cleaned via hole by vacuum heating. A chamber (drying unit), a barrier layer forming chamber (barrier layer forming unit) for forming a barrier layer by sputtering in the wiring groove and via hole after the drying, and a Cu seed layer for forming a Cu seed layer by sputtering on the barrier layer And a forming chamber (Cu seed layer forming portion). A room connecting the reduction processing chamber and the drying chamber is a highly sealed transfer chamber, and a transfer robot for transferring a semiconductor substrate at atmospheric pressure is installed. The transfer chamber is filled with nitrogen, and the oxygen concentration is kept below a specified concentration. The drying chamber, the barrier layer forming chamber, and the Cu seed layer forming chamber are connected by a vacuum transfer chamber, and a vacuum transfer robot is installed in the vacuum transfer chamber.

The semiconductor substrate is first subjected to an organic acid cleaning process in the reduction processing chamber in the manufacturing apparatus. An organic acid such as oxalic acid or citric acid is generally used as a cleaning solution for removing metal contamination such as Cu and Fe, and oxalic acid has a high removal ability. This is because oxalic acid has a simple chemical structure and can easily form a chelate complex with Cu or Fe. Due to this action, oxalic acid does not form a complex with metal-bonded Cu, but can form a chelate complex with Cu oxide (CuO _x ) to dissolve Cu and remove the Cu oxide layer. be able to. At this time, by adding a surfactant to the organic acid, the organic acid easily penetrates into the via hole, effectively removing Cu oxide formed at the bottom of the via hole to expose Cu. Thereafter, pure water cleaning and spin drying are performed immediately.

  Thereafter, the semiconductor substrate is transferred into the drying chamber by the transfer robot via the transfer chamber filled with nitrogen. At this time, since the oxygen concentration in the transfer chamber is kept below a specified concentration, the Cu surface exposed by cleaning can be kept clean without being oxidized. In the drying chamber, moisture remaining in the via hole is completely removed by vacuum heating. Thereafter, the semiconductor substrate is transferred to the barrier layer forming unit by a vacuum robot, and a barrier layer is formed by sputtering.

  In the present invention, in the Cu wiring forming process, by performing the process having the above method after the formation of the via hole and the wiring groove, the interlayer insulating film made of the low relative dielectric constant material is not deteriorated and the entire surface of the semiconductor substrate is covered. Uniform contact can be formed between the lower layer wiring Cu and the barrier layer uniformly.

  A semiconductor device manufacturing method and a manufacturing apparatus according to embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a flow of a manufacturing method of a semiconductor device according to an embodiment of the present invention, and FIG. FIG. 3 shows an apparatus configuration of a semiconductor device manufacturing apparatus according to the embodiment of the present invention.

  Below, the outline of the process before this process (process corresponding to the manufacturing method of the semiconductor device which concerns on embodiment of this invention) is demonstrated. As shown in FIGS. 1 and 2, first, an interlayer insulating film 3 is deposited on a semiconductor substrate 1 on which a lower wiring 2 made of Cu is formed (step S101). As the interlayer insulating film 3, a low relative dielectric constant material capable of reducing the wiring capacitance and realizing a high-speed signal with the recent high performance of semiconductor devices is used. Next, after forming a resist pattern, via holes 4 and wiring grooves 5 are formed by dry etching of the interlayer insulating film 3 (step S102). Next, the resist is removed by oxygen ashing, and thereafter, organic substances adhering in the via holes 4 and the wiring grooves 5 are removed by chemical cleaning (step S103), and then this step is performed. By the time this process is started, the Cu surface exposed at the bottom of the via hole 4 has a thickness of 3 to 5 nm by being left in the atmosphere before being transported to the location where the oxygen ashing and this process are performed. The oxidized Cu layer 6 is formed.

  Hereinafter, the process of this step and the manufacturing apparatus of the semiconductor device corresponding to the manufacturing method of the semiconductor device according to the embodiment of the present invention will be described in order. As shown in FIG. 3, the semiconductor device manufacturing apparatus includes a reduction processing chamber (reduction processing unit (organic acid cleaning unit)) 14, an atmospheric transfer chamber (atmospheric transfer unit) 12 provided with an atmospheric transfer robot 13, infrared rays. A vacuum drying chamber (vacuum drying unit) 15 provided with a heater 16, a vacuum transfer chamber (vacuum transfer unit) 17 provided with a vacuum transfer robot 18, a barrier layer formation chamber (barrier layer formation unit) 19, and a Cu seed layer formation The chamber (Cu seed layer forming part) 20 is configured.

  As described above, the semiconductor substrate 1 has the via hole 4 and the wiring groove 5 formed in the interlayer insulating film 3 and the Cu oxide layer 6 formed at the bottom of the via hole 4. It is transferred to the reduction treatment chamber 14 by the atmospheric transfer robot 13 in the atmospheric transfer chamber 12.

  In step S104, in the reduction treatment chamber 14, the semiconductor substrate 1 is rotated at a speed of 500 rpm, and oxalic acid having a concentration of 1.0% is poured onto the semiconductor substrate 1 at a flow rate of 1 liter per minute for 30 seconds. Then, the Cu oxide layer 6 formed on the Cu surface at the bottom of the via hole 4 is removed to expose Cu. A surfactant is added to the oxalic acid, so that an organic acid easily penetrates into the fine via hole 4 and the Cu oxide layer 6 at the bottom of the via hole 4 can be efficiently removed. By this treatment, the Cu oxide layer 6 formed on the Cu surface at the bottom of the via hole 4 is uniformly removed over the entire surface of the semiconductor substrate 1 without causing physical damage to the interlayer insulating film 3. Thereafter, rinsing is performed for 15 seconds with pure water, and spin drying is performed by rotating the semiconductor substrate 1 at a speed of 1500 rpm.

  Next, in step S <b> 105, the semiconductor substrate 1 is transferred to the vacuum drying chamber 15 through the atmospheric transfer chamber 12 by the atmospheric transfer robot 13 in the atmospheric transfer chamber 12. Here, the atmospheric transfer chamber 12 has a sealed structure maintained at substantially atmospheric pressure, the chamber is filled with high-purity nitrogen, and the oxygen concentration is maintained at 10 ppm or less. For this reason, the Cu surface exposed at the bottom of the via hole 4 is conveyed to the vacuum drying chamber 15 while maintaining its cleanness without being oxidized.

  Next, in the vacuum drying chamber 15, after the semiconductor substrate 1 is carried in, it is evacuated to 1 Pa, and further heated at 200 ° C. for 30 seconds by the infrared heater 16, so that moisture remaining in the via hole 4 slightly remains. Completely removed.

  Next, in step S106, the semiconductor substrate 1 is transferred to the barrier layer forming chamber 19 through the vacuum transfer chamber 17 by the vacuum transfer robot 18 provided in the vacuum transfer chamber 17, and the barrier layer 7 is formed by sputtering. Thus, a good contact can be formed between the lower layer wiring (Cu) 2 and the barrier layer 7.

  In step S107, the semiconductor substrate 1 is transferred to the Cu seed layer forming chamber 20 by the vacuum transfer robot 18 to form the Cu seed layer 8 by sputtering, and the processing in the manufacturing apparatus is finished.

  After this step, Cu is embedded by electrolytic plating (step S108), and then a redundant wiring is removed by chemical mechanical polishing and a flattening step S109 is performed to form a series of wiring structures.

Next, the effect when the processing method (manufacturing method) according to the present invention is performed will be described below. In order to confirm the effect of the treatment method according to the present invention, the following was performed.
First, as shown in FIG. 4A, the yield is compared between the case where the conventional argon reverse sputtering process is performed using the test wafer for evaluating the via yield and the process according to the present invention. As a result, both treatment methods had a good yield of 98% or more. The test wafer used here has a via hole diameter of 0.18 μm and an aspect ratio of 3, and it can be said that a high yield can be obtained even for fine holes.

  Further, in order to evaluate the influence on the low dielectric constant film, when the semiconductor substrate 1 on which the low dielectric constant film is formed is used, when argon reverse sputtering treatment is performed, and when oxalic acid cleaning treatment is performed The change in relative dielectric constant was measured. The result is as shown in FIG. 4B, and it can be seen that when the argon reverse sputtering process is performed, the relative dielectric constant increases by 40%, but the oxalic acid cleaning process hardly changes.

  From the above, the Cu oxide layer 6 can be formed even on the large-diameter semiconductor substrate 1 without damaging the low dielectric constant interlayer insulating film 3 by the semiconductor device manufacturing method and manufacturing apparatus according to the present invention. It can be removed uniformly and a good contact can be formed.

  The semiconductor device according to the present invention is useful for the manufacture of a high-performance semiconductor device having a multilayer wiring made of Cu wiring.

The figure which shows the processing flow which shows each process (a pre-process and a post process are included) of the manufacturing method of the semiconductor device which concerns on embodiment of this invention. (A)-(d) is sectional drawing of the semiconductor device manufactured by each process (a pre-process and a post process are included), respectively, of the manufacturing method. The figure which shows schematically the apparatus structure of the manufacturing apparatus of the semiconductor device which concerns on embodiment of this invention. (A) And (b) is a figure which shows the effect of the semiconductor device by the manufacturing method and manufacturing apparatus of this invention, respectively.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Lower layer wiring 3 Interlayer insulation film 4 Via hole 5 Wiring groove 6 Cu oxide layer 7 Barrier layer 8 Cu seed layer 12 Atmospheric conveyance part 13 Atmospheric conveyance robot 14 Organic acid cleaning part 15 Vacuum drying part 16 Infrared heater 17 Vacuum conveyance part 18 Vacuum transfer robot 19 Barrier layer forming unit 20 Cu seed layer forming unit

Claims (7)

A method of manufacturing a semiconductor device for processing a semiconductor substrate in which a wiring groove and a via hole are formed by dry etching on an interlayer insulating film made of a low relative dielectric constant material deposited on a Cu wiring,
A reduction treatment step of reducing the oxidized Cu layer formed at the bottom of the via hole by organic acid cleaning;
A barrier layer forming step of forming a barrier layer by sputtering after the reduction treatment step;
And a Cu seed layer forming step of forming a Cu seed layer by sputtering after forming the barrier layer. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the reducing step, the barrier layer forming step, and the Cu seed layer forming step are continuously performed in the same manufacturing apparatus. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the organic acid used in the reduction step includes at least one of oxalic acid and citric acid. 4. 4. The method of manufacturing a semiconductor device according to claim 3, wherein the oxalic acid and citric acid have a concentration of 0.01 to 3%. The method of manufacturing a semiconductor device according to claim 1, wherein a surfactant is added to the organic acid used in the reduction treatment step. A semiconductor device manufacturing apparatus for processing a semiconductor substrate in which a wiring groove and a via hole are formed by dry etching on an interlayer insulating film made of a low relative dielectric constant material deposited on a Cu wiring,
A reduction treatment chamber for reducing the oxidized Cu layer at the bottom of the via hole by organic acid cleaning;
A barrier layer forming chamber for forming a barrier layer by sputtering after the reduction treatment;
A Cu seed layer forming chamber for forming a Cu seed layer by sputtering after forming the barrier layer;
An apparatus for manufacturing a semiconductor device, wherein a vacuum drying chamber having a substrate heating means is provided between the reduction treatment chamber and the barrier layer forming chamber. The semiconductor device manufacturing method according to claim 6, wherein a transfer chamber capable of maintaining an oxygen concentration in a room atmosphere below a specified value is provided between the reduction treatment chamber and the vacuum drying chamber. apparatus.

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