JP2006272970A - Cleaning method for printing mask - Google Patents

Cleaning method for printing mask Download PDF

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JP2006272970A
JP2006272970A JP2006168521A JP2006168521A JP2006272970A JP 2006272970 A JP2006272970 A JP 2006272970A JP 2006168521 A JP2006168521 A JP 2006168521A JP 2006168521 A JP2006168521 A JP 2006168521A JP 2006272970 A JP2006272970 A JP 2006272970A
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printing
printing mask
mask
solder
cleaning
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JP4189931B2 (en
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Tsutomu Yasui
勉 安井
Toshiyuki Nagatsuka
敏行 永塚
Takaaki Domon
孝彰 土門
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TDK Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a cleaning method for printing a mask which effectively cleans the printing mask which prints cream solder on a substrate. <P>SOLUTION: The cleaning method for a printing mask 30 which prints the cream solder on one surface of a substrate includes: a solvent processing step of dropping or spraying solvent 52 from above with a cleaning cloth 50 spread over the upper face of the printing mask 30; and a sucking/cleaning step of removing the deposit on the opening and the surrounding portion of the printing mask 30 by sucking the solvent 52 soaked in the cleaning cloth 50 with a sucking unit 55 arranged below the printing mask 30 while cleaning the lower surface of the printing mask 30 with a dry-type paper 56 after the solvent processing step. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、基板の一面にクリームはんだを印刷する印刷マスクの清掃方法に関する。   The present invention relates to a printing mask cleaning method for printing cream solder on one surface of a substrate.

近年、大容量、高速データ通信に必要な実装技術としてフリップチップ接合が挙げられる。従来は、主にワイヤーボンディング法を用いて、パッケージ化やフェイスアップでベアチップを直接基板に実装していたが、高周波化が進みワイヤーボンディングの配線長等が特性に与える影響が大きくなることで、配線長を短くすることができるフリップチップ接合の必要性が増している。また、機器の小型化、薄型化、軽量化等の観点からも注目されている。フリップチップ接合の方法としては、超音波、荷重、熱を利用したものが挙げられ、それぞれ、接合材等によって使い分けられている。接合材としてはんだを用いた主なフリップチップ接合の方法を下記に示す。   In recent years, flip-chip bonding has been cited as a mounting technique necessary for large-capacity, high-speed data communication. Conventionally, the bare chip was directly mounted on the substrate by packaging or face up mainly using the wire bonding method, but the influence of the wire bonding wiring length etc. on the characteristics becomes larger as the frequency increases, There is an increasing need for flip chip bonding that can reduce the wiring length. In addition, it has attracted attention from the viewpoints of downsizing, thinning, and weight reduction of equipment. As a flip chip bonding method, there is a method using ultrasonic waves, a load, and heat, and each method is properly used depending on a bonding material or the like. The main flip chip bonding methods using solder as the bonding material are shown below.

特開平11−274209号公報Japanese Patent Laid-Open No. 11-274209 特開平11−340270号公報JP-A-11-340270 特開平11−297886号公報JP-A-11-297886 特開平11−103155号公報JP-A-11-103155 特開平11−67823号公報Japanese Patent Laid-Open No. 11-67823 特開平10−4127号公報Japanese Patent Laid-Open No. 10-4127 特開平8−204322号公報JP-A-8-204322 特開2001−308268号公報JP 2001-308268 A

a.回路が形成されたウエハー上でめっき法や印刷法(特許文献1、特許文献2)によってバンプを形成し、個片に切断することによりベアチップを作る。バンプつきのベアチップを配線基板に接合するときは、基板電極又はバンプにフラックス塗布を行い、ベアチップ搭載、リフローの順で行う。 a. Bumps are formed on a wafer on which a circuit is formed by a plating method or a printing method (Patent Documents 1 and 2), and a bare chip is made by cutting into individual pieces. When bonding a bare chip with bumps to a wiring board, flux application is performed on the substrate electrodes or bumps, followed by bare chip mounting and reflow.

b.回路が形成されたウエハーを個片に切断することによりベアチップを製作する。このときはベアチップにはバンプ加工が行われていない。ベアチップを配線基板に接続するときは、あらかじめ、配線基板にフラックスとはんだボールを供給(特許文献3の方法やはんだボール搭載機等)しておき、その上にベアチップを載せリフローすることにより接続を行う。 b. A bare chip is manufactured by cutting a wafer on which a circuit is formed into individual pieces. At this time, the bump processing is not performed on the bare chip. When connecting the bare chip to the wiring board, supply flux and solder balls to the wiring board in advance (the method of Patent Document 3, solder ball mounting machine, etc.), then place the bare chip on it and reflow the connection. Do.

c.特許文献4のように基板上のレジスト内にクリームはんだを塗布、溶融、硬化しレジストを除去することにより、はんだバンプを形成する。 c. As in Patent Document 4, a solder bump is formed by applying, melting, and curing cream solder in a resist on a substrate to remove the resist.

d.特許文献5のように配線基板上にめっき及びエッチングでバンプを形成する。 d. As in Patent Document 5, bumps are formed on a wiring board by plating and etching.

e.特許文献6のようにはんだペーストを充填した凹板を基板に重ね、その状態で加熱、冷却することにより、基板にはんだバンプを形成する。 e. As in Patent Document 6, a concave plate filled with a solder paste is stacked on a substrate, and heated and cooled in that state, thereby forming solder bumps on the substrate.

f.特許文献7のように印刷法にて基板にバンプを形成する。 f. As in Patent Document 7, bumps are formed on the substrate by a printing method.

g.特許文献8のように基板側に印刷法にてクリームはんだを印刷し、バンプ付きチップを搭載した後、リフローすることにより接合を行う。 g. As in Patent Literature 8, cream solder is printed on the substrate side by a printing method, a chip with bumps is mounted, and then joined by reflowing.

上記a.の場合、回路を形成した後ウエハーにバンプを形成するため、パワーアンプモジュール等に使用されるGaAs等の脆い化合物半導体のウエハーでは、ウエハーに負荷が掛かることでマイクロクラック等の発生要因になる可能性が考えられる。特に印刷法の場合、スキージによってウエハーに直接、圧力が掛かるためマイクロクラックの発生要因になる可能性が非常に高い。また、バンプを形成しないときに比べ製造コストの上昇につながる。   A. In this case, since bumps are formed on the wafer after forming the circuit, a wafer of fragile compound semiconductor such as GaAs used for a power amplifier module or the like may cause a microcrack or the like by applying a load to the wafer. Sex is conceivable. In particular, in the case of the printing method, since the pressure is directly applied to the wafer by the squeegee, there is a very high possibility of causing microcracks. Further, the manufacturing cost is increased as compared with the case where no bump is formed.

上記b.の場合、ウエハーにバンプを形成しないため、脆い化合物半導体等には有利である。またバンプ加工の工程が入らないため、ベアチップのコストを抑えられる。しかし、バンプ形成するためには、専用のはんだボール搭載機等が必要となり、工程数増加に伴い製造コストの上昇につながる。一般に市販されているはんだボール搭載機の場合、製品の品種別に高価な専用治具(2〜3百万円/1治具)が必要となるため、製造コスト低下は望めない。   B. In this case, bumps are not formed on the wafer, which is advantageous for brittle compound semiconductors. In addition, since the bump processing step does not enter, the cost of the bare chip can be suppressed. However, in order to form bumps, a dedicated solder ball mounting machine or the like is required, which leads to an increase in manufacturing cost as the number of processes increases. In general, in the case of a solder ball mounting machine that is commercially available, an expensive dedicated jig (2 to 3 million yen / 1 jig) is required for each type of product, so a reduction in manufacturing cost cannot be expected.

上記c.の場合、配線基板製作時のコスト上昇につながり、基板購入コストの上昇につながる。   C. In this case, the cost for manufacturing the wiring board is increased, and the cost for purchasing the board is increased.

上記d.の場合、従来から使用していたプリント配線基板と異なるため、配線基板のコスト上昇につながる。また、電極やパターンを印刷で形成するセラミック基板等にバンプ接続を行うことができない。   D. In this case, since it is different from the printed wiring board used conventionally, the cost of the wiring board is increased. Further, bump connection cannot be made to a ceramic substrate or the like on which electrodes and patterns are formed by printing.

上記e.の場合、はんだペーストを充填する専用の凹版が必要となることや、凹版も一緒に加熱するため、凹版の熱容量分、加熱温度を上昇させることになり基板等に熱的ダメージを与えることになる。   E. In this case, a dedicated intaglio filling with solder paste is required, and the intaglio is also heated together, which increases the heat capacity of the intaglio and heats the substrate. .

上記f.の場合、配線基板にベアチップと表面実装部品(SMD)の両者を搭載する場合、ベアチップ用のバンプ印刷を行った後に、再度、表面実装部品用の印刷を行う必要があり、印刷工程が2回必要となるため、工程数が増え製造コストを抑えることが難しくなると考えられる。   F. In the case of mounting both the bare chip and the surface mount component (SMD) on the wiring board, it is necessary to print again for the surface mount component after performing the bump printing for the bare chip, and the printing process is performed twice. Therefore, it is considered that the number of processes increases and it is difficult to suppress the manufacturing cost.

上記g.の場合、バンプ付きベアチップを使用するため、ベアチップがGaAs等の脆い化合物半導体であっても、それにバンプ形成する必要があり、マイクロクラック等が発生する可能性がある。また、ベアチップを搭載するときは、はんだが未溶融状態であるため、クリームはんだの溶剤分がリフロー時に基板とベアチップの隙間で毛細管現象が起こし、ブリッジやキャピラリーボール(はんだボール)を発生させる可能性が考えられる。   G. In this case, since a bare chip with bumps is used, even if the bare chip is a brittle compound semiconductor such as GaAs, it is necessary to form bumps on the bare chip, which may cause micro cracks. Also, when mounting a bare chip, the solder is in an unmelted state, so the solvent component of cream solder can cause capillary action in the gap between the substrate and the bare chip when reflowed, generating bridges and capillary balls (solder balls) Can be considered.

近年、回路の高周波化が進みつつあり、ベアチップを作製する半導体ウエハーの材質としてGaAs等の非常に脆い化合物半導体が使用されるようになってきた。また、高周波化が進むと従来は問題にならなかった配線長さにおいても極力短くする必要があり、フリップチップ接合の必要性が高まってきている。フリップチップ接合に使用される化合物半導体ウエハー等の場合、バンプ加工時等に負荷が掛かるとマイクロクラック等が発生する可能性があり、出来るだけウエハーに負荷が掛からないようにすることが重要である。   In recent years, the frequency of circuits has been increased, and a very fragile compound semiconductor such as GaAs has been used as a material of a semiconductor wafer for producing a bare chip. As the frequency increases, it is necessary to shorten the wiring length, which has not been a problem in the past, as much as possible, and the need for flip chip bonding is increasing. In the case of compound semiconductor wafers used for flip chip bonding, micro-cracks and the like may occur if a load is applied during bump processing, etc., so it is important to minimize the load on the wafer as much as possible. .

そこで、基板にチップ部品等の表面実装部品とベアチップの両方を搭載する場合に、表面実装部品のはんだリフローによる実装の際にベアチップ接合のためのはんだバンプを基板側に形成することで、表面実装部品接合用はんだとバンプ用のはんだを同時に基板に印刷処理しておくことを可能にし、製造コストの低減とベアチップが化合物半導体等であってもストレス抑制を図って、マイクロクラック等の発生防止を図ることが要望される。   Therefore, when mounting both surface mount components such as chip components and bare chips on the substrate, surface mounting is achieved by forming solder bumps on the substrate side for bare chip bonding when mounting surface mount components by solder reflow. It is possible to perform soldering for component bonding and solder for bumps on the substrate at the same time, reducing manufacturing costs and suppressing stress even if the bare chip is a compound semiconductor, etc. It is desired to plan.

また、上記の場合に、基板へのクリームはんだの印刷には印刷マスクを用いるが、良好なバンプ形成にはクリームはんだ塗布量のばらつきが少ないことが要求されるから、印刷後の印刷マスクを清掃して、版抜け(クリームはんだが開口を通過すること)が常に安定して行われるようにする必要がある。   In the above case, a printing mask is used for printing cream solder on the substrate. However, since it is required that the variation in the amount of cream solder applied is small for good bump formation, clean the printing mask after printing. Thus, it is necessary to ensure that the plate removal (the cream solder passes through the opening) is always performed stably.

従来、スクリーン印刷におけるクリーニング装置としては、下記特許文献9があり、スクリーン下面を移動するクリーニング刃及び吸引管による空気吸引を併用した構造が知られている。   Conventionally, as a cleaning device in screen printing, there is Patent Document 9 below, and a structure using a cleaning blade that moves on the lower surface of a screen and air suction by a suction tube is known.

特開平11−58678号公報Japanese Patent Laid-Open No. 11-58678

本発明の目的は、上記の点に鑑み、基板にクリームはんだを印刷する印刷マスクを効果的に清掃可能な印刷マスクの清掃方法を提供することにある。   The objective of this invention is providing the cleaning method of the printing mask which can effectively clean the printing mask which prints cream solder on a board | substrate in view of said point.

本発明のその他の目的や新規な特徴は後述の実施の形態において明らかにする。   Other objects and novel features of the present invention will be clarified in embodiments described later.

上記目的を達成するために、本発明は、基板の一面にクリームはんだを印刷する印刷マスクの清掃方法であって、
前記印刷マスクの上面に洗浄用布を敷いた状態で溶剤を上方から滴下乃至吹き付ける溶剤処理工程と、
前記溶剤処理工程の後で、前記印刷マスクの下面を乾式ペーパーで拭きながら前記印刷マスクの下方に配置された吸引手段で前記洗浄用布にしみ込ませた溶剤を吸引して前記印刷マスクの開口及びその周辺部の付着物を除去する吸引清掃工程とを備えることを特徴としている。
To achieve the above object, the present invention provides a printing mask cleaning method for printing cream solder on one surface of a substrate,
A solvent treatment step of dripping or spraying a solvent from above in a state where a cleaning cloth is laid on the upper surface of the printing mask;
After the solvent treatment step, while wiping the lower surface of the printing mask with dry paper, the solvent soaked in the cleaning cloth is sucked by suction means arranged below the printing mask, and the opening of the printing mask and And a suction cleaning process for removing deposits on the periphery.

前記印刷マスクは、前記基板の一面における表面実装部品搭載領域及びベアチップ搭載領域にクリームはんだを印刷するための開口を有していてもよい。   The printing mask may have an opening for printing cream solder on a surface mounting component mounting region and a bare chip mounting region on one surface of the substrate.

本発明に係る印刷マスクの清掃方法によれば、湿式洗浄用布と乾式ペーパーと吸引方式による印刷マスク清掃によって、微小印刷用のマスク清掃が可能である。   According to the printing mask cleaning method of the present invention, fine printing mask cleaning is possible by wet cleaning cloth, dry paper, and printing mask cleaning using a suction method.

以下、本発明を実施するための最良の形態として、印刷マスクの清掃方法の実施の形態を図面に従って説明する。   Hereinafter, as a best mode for carrying out the present invention, an embodiment of a printing mask cleaning method will be described with reference to the drawings.

図1乃至図7を用いて本発明の実施の形態として、ベアチップ実装方法及びこの方法に適用した場合の印刷マスクの清掃方法について説明する。   As an embodiment of the present invention, a bare chip mounting method and a printing mask cleaning method applied to this method will be described with reference to FIGS.

図1はチップ部品等の表面実装部品(SMD)及び化合物半導体等のベアチップの配線基板への搭載手順を示し、図2は従来の技術の項目で説明した従来工法a.及び従来工法b.の場合と、本実施の形態の場合の表面実装部品とベアチップの実装工程フローを対比した工程フローを示し、図3乃至図5は印刷マスクを示し、図6は配線基板の支持構造を示し、図7はクリームはんだ印刷のための印刷マスクの清掃方法を示す。   FIG. 1 shows a procedure for mounting a surface mount component (SMD) such as a chip component and a bare chip such as a compound semiconductor on a wiring board, and FIG. 2 shows a conventional method a. And conventional method b. FIG. 3 to FIG. 5 show a printing mask, FIG. 6 shows a wiring board support structure, and FIG. 3 to FIG. FIG. 7 shows a method for cleaning a printing mask for cream solder printing.

図2の印刷工程#1において、配線基板の一面の表面実装部品搭載領域へのクリームはんだ印刷と、ベアチップ搭載領域へのクリームはんだ印刷とを1つの印刷マスクを用いて同時に実行する(クリームはんだのスクリーン印刷で行う)。この結果、図1(A)のように樹脂基板やセラミック基板等の配線基板1の上面の電極パッド2,3上に表面実装部品(SMD)20を搭載するための表面実装部品用クリームはんだ印刷層12が表面実装部品搭載領域に、ベアチップ用はんだバンプ形成のためのバンプ用クリームはんだ印刷層13がベアチップ搭載領域にそれぞれ形成される。   In the printing process # 1 in FIG. 2, cream solder printing on the surface mounting component mounting region on one side of the wiring board and cream solder printing on the bare chip mounting region are simultaneously performed using one printing mask (cream soldering). By screen printing). As a result, as shown in FIG. 1A, cream solder printing for surface mount components for mounting the surface mount components (SMD) 20 on the electrode pads 2 and 3 on the upper surface of the wiring substrate 1 such as a resin substrate or a ceramic substrate. The layer 12 is formed in the surface mount component mounting region, and the bump cream solder printing layer 13 for forming the bare chip solder bump is formed in the bare chip mounting region.

図3のように、前記印刷工程#1に用いる印刷マスク30は表面実装接合用開口32とバンプ接合用開口33の両者を有するが、表面実装部品用のクリームはんだ量と比較してバンプ用は非常に少ないため、印刷マスク30においてバンプ接合用開口33のマスク厚みと、開口形状及び寸法を工夫して、はんだ量のコントロールを行う。バンプ接合用開口33周辺部のマスク厚を変える方法としてハーフエッチング処理等を行い、同一マスクで2種類の厚みがあるマスク構造とする。つまり、表面実装接合用開口32のマスク厚みよりも前記バンプ接合用開口33のマスク厚みを薄くして、図1(A)の配線基板面における表面実装部品搭載領域へのクリームはんだ印刷層12の厚みよりもベアチップ搭載領域へのクリームはんだ印刷層13の厚みを薄く設定する。   As shown in FIG. 3, the printing mask 30 used in the printing step # 1 has both a surface mounting bonding opening 32 and a bump bonding opening 33. Since it is very small, the amount of solder is controlled by devising the mask thickness, opening shape, and dimensions of the bump bonding opening 33 in the printing mask 30. Half-etching or the like is performed as a method of changing the mask thickness in the periphery of the bump bonding opening 33, thereby obtaining a mask structure having two types of thicknesses with the same mask. That is, the mask thickness of the bump bonding opening 33 is made thinner than the mask thickness of the surface mounting bonding opening 32 so that the cream solder printing layer 12 on the surface mounting component mounting region on the wiring board surface of FIG. The thickness of the cream solder printing layer 13 in the bare chip mounting region is set to be thinner than the thickness.

前記印刷マスク30の開口形状については、図4(A)のように開口32,33の角部(コーナー)があると角部にクリームはんだの粒子が残り、印刷したクリームはんだ量のばらつきにつながるため、図4(B)のように角部がない長円形状(半円同士を平行な直線で接続した形状)を採用し、クリームはんだの版抜け性を向上させ、開口部にクリームはんだ粒子が残りにくいようにする。但し、開口ピッチに余裕がある場合には円形の開口でもよい。   As for the opening shape of the printing mask 30, if there are corners of the openings 32 and 33 as shown in FIG. 4A, cream solder particles remain at the corners, leading to variations in the amount of printed cream solder. Therefore, as shown in FIG. 4B, an oval shape with no corners (a shape in which semicircles are connected by parallel straight lines) is adopted to improve the soldering ability of the cream solder, and the cream solder particles in the opening. Make it difficult to remain. However, when there is a margin in the opening pitch, a circular opening may be used.

前記印刷マスク30の開口32,33の開口寸法については、図5(A)の円形パッドの場合、同図(B)の方形パッドの場合で示すように、はんだ溶融時の凝集力よって、電極パッド2,3上に印刷したはんだが確実に戻る寸法(パッド寸法(直径又は辺)の1.6倍以下)とした。   With respect to the opening dimensions of the openings 32 and 33 of the printing mask 30, as shown in the case of the circular pad in FIG. 5A, the electrode is formed by the cohesive force at the time of melting the solder as shown in the case of the square pad in FIG. The dimensions were such that the solder printed on the pads 2 and 3 would surely return (1.6 times or less of the pad dimensions (diameter or side)).

さらに、前記印刷マスク30の製作方法においても、開口内壁面の粗さが少ないもの(算術平均粗さ:Ra≦0.3μm程度)を製作し版抜け性を向上させた。本実施の形態で採用したマスク開口の壁面粗さと、一般に使用されているSMT用のアディティブマスク、レーザーマスクの壁面粗さの値を以下の表1に示す。但し、表1中、Ry:最大粗さ(測定範囲における高低差の最大値)である。   Further, in the manufacturing method of the printing mask 30, one having a small roughness of the inner wall surface of the opening (arithmetic average roughness: about Ra ≦ 0.3 μm) was manufactured to improve the plate slippage. Table 1 below shows values of the wall roughness of the mask opening employed in the present embodiment, and the commonly used SMT additive mask and laser mask wall roughness. However, in Table 1, Ry is the maximum roughness (maximum difference in elevation in the measurement range).

Figure 2006272970
Figure 2006272970

本実施の形態で使用する印刷マスクの開口壁面粗さは、アディティブマスクよりも滑らかな開口壁面、具体的には、Ra<0.84、かつRy<6.54であることが必要であり、好ましくは、表1の「採用したマスク」で示されるように、横方向及び縦方向共にRa≦0.3μmを満足するように設定するのがよい。   The opening wall roughness of the printing mask used in the present embodiment needs to be smoother than the additive mask, specifically, Ra <0.84 and Ry <6.54. Preferably, as indicated by “adopted mask” in Table 1, it should be set so that Ra ≦ 0.3 μm is satisfied in both the horizontal and vertical directions.

クリームはんだについては、微小印刷用の粒径が5〜15μmの真球粉で、印刷時のローリング性、版抜け時の形状、版抜け後の形状保持性等の実験結果より、粘度260±30Pa・sと通常使用されている粘度(200Pa・s前後)よりも硬いものを使用することが好ましい。スクリーン印刷装置側においても、前記配線基板、前記印刷マスク、スキージ走りの平行精度をR20μm以内(真の平行からのずれが20μm以内)とすることが好ましい。   The cream solder is a true spherical powder having a particle size of 5 to 15 μm for fine printing, and has a viscosity of 260 ± 30 Pa based on experimental results such as rolling property at the time of printing, shape at the time of plate removal, shape retention after plate removal, etc. It is preferable to use a material that is harder than s and normally used viscosity (around 200 Pa · s). Also on the screen printing apparatus side, it is preferable that the parallel accuracy of the wiring board, the printing mask, and the squeegee run is within R20 μm (the deviation from true parallel is within 20 μm).

なお、配線基板の支持固定構造としては、図6(A)の基板固定テーブル5の平坦面上に配線基板1を載置、固定する全面受け構造や、同図(B)の固定テーブル5より支持手段6を立設し、支持手段6で配線基板1を支えるポイント受け構造が一般的であるが、本実施の形態では、印刷後の印刷マスク清掃の工夫により、版抜け(クリームはんだが開口を通過すること)が常に安定して行われるようにするため、同図(C)の掘り込み基板固定テーブルのように、基板固定テーブル5に配線基板1の厚さに一致する深さに掘り込んだ基板支持面7を形成し、基板1上面と基板固定テーブル5上面の高さを同一にし、且つ印刷マスク上を移動してクリームはんだを塗布するためのスキージのサイズを被印刷物となる配線基板幅よりも大きくすることによって、印刷マスク上のクリームはんだをスキージによって配線基板サイズより広い範囲で完全にかきとる方法を採用している。その結果、印刷マスク上面からの清掃を可能にしている。   Note that the wiring board supporting and fixing structure is based on the entire surface receiving structure for mounting and fixing the wiring board 1 on the flat surface of the board fixing table 5 in FIG. 6A, or the fixing table 5 in FIG. A point receiving structure in which the supporting means 6 is erected and the wiring board 1 is supported by the supporting means 6 is generally used. However, in this embodiment, the plate omission (the cream solder is opened) by means of cleaning the printing mask after printing. In order to ensure that the process is always performed stably, the substrate fixing table 5 is dug to a depth corresponding to the thickness of the wiring board 1 as in the dug board fixing table of FIG. Forming a substrate support surface 7 that is embedded, the heights of the upper surface of the substrate 1 and the upper surface of the substrate fixing table 5 are the same, and the size of the squeegee for moving the surface of the printing mask and applying the cream solder becomes the printed material Larger than the board width By employs a completely scraping method in a wide range from the wiring substrate size cream solder on the printing mask by a squeegee. As a result, cleaning from the upper surface of the printing mask is possible.

印刷マスクの清掃方法は、図7に示すように、配線基板に接触する印刷マスク30上に洗浄用布50をしき、マスク30の開口形成領域全体を覆う。その布50上にノズル51から均一に溶剤52を定量滴下(又は吹き付け)する溶剤処理工程を実行後、マスク30下側より吸引ユニット55と乾式ペーパー56の繰り出し、巻き取り手段57を備えた下部ユニット58をマスク下面に沿って移動させ、布50にしみこませた溶剤52を吸引ユニット55で吸引しながら、開口及びその周辺部等に付着したはんだ粒子やフラックスを乾式ペーパー56で拭いて除去する(吸引除去工程)。その後、マスク30上部の洗浄用布50を待避させ、自然放置又はエアー、窒素ガス等にて乾燥を行い清掃を終了する。   As shown in FIG. 7, the cleaning method for the printing mask is to apply the cleaning cloth 50 on the printing mask 30 that contacts the wiring board and cover the entire opening formation region of the mask 30. A lower part provided with a suction unit 55 and a dry paper 56 from the lower side of the mask 30 and a take-up means 57 after executing a solvent treatment step in which a solvent 52 is uniformly dropped (or sprayed) from the nozzle 51 onto the cloth 50. The unit 58 is moved along the lower surface of the mask, and the solvent 52 soaked in the cloth 50 is sucked by the suction unit 55, and the solder particles and flux adhering to the opening and its peripheral portion are wiped and removed by the dry paper 56. (Suction removal step). Thereafter, the cleaning cloth 50 on the upper portion of the mask 30 is withdrawn and left to stand naturally or dried with air, nitrogen gas or the like to finish cleaning.

図2の印刷工程#1によるクリームはんだのスクリーン印刷によって、表面実装部品接合用とバンプ接合用クリームはんだを同時に印刷した後、図1(A)の配線基板1上に表面実装部品20を搭載し、リフロー炉に通炉してはんだリフローを実行することにより、図1(B)のように表面実装部品20の配線基板1へのはんだ接合と、はんだバンプ23を同時に形成する。つまり、はんだバンプ23を有するベアチップ実装用基板が得られる。   The surface mounting component 20 is mounted on the wiring board 1 of FIG. 1A after simultaneously printing the surface mounting component bonding solder and the bump bonding cream solder by screen printing of the cream solder in the printing process # 1 of FIG. By passing through a reflow furnace and executing solder reflow, solder bonding of the surface mount component 20 to the wiring board 1 and solder bumps 23 are simultaneously formed as shown in FIG. That is, a bare chip mounting substrate having the solder bumps 23 is obtained.

上記図3乃至図6、表1で説明した印刷マスクの工夫や使用するクリームはんだの工夫等、さらに図7の印刷マスクの清掃方法の採用等による版抜けの改善効果により、クリームはんだ印刷時における不具合(ブリッジ等)やはんだ量のばらつきが抑えられ、バンプ径100μm、ピッチ200μm、バンプ高さばらつき10μm以下というバンプ形成をクリームはんだ印刷法で可能にした。これにより、表面実装部品用とバンプ用はんだを同時に印刷する工法を実現できた。   3 through 6 and Table 1 and the soldering cream to be used, and the effect of improving the printing loss by adopting the cleaning method of the printing mask in FIG. The defect (bridge, etc.) and the variation in the amount of solder were suppressed, and bump formation with a bump diameter of 100 μm, a pitch of 200 μm, and a bump height variation of 10 μm or less was made possible by the cream solder printing method. As a result, it was possible to realize a method for simultaneously printing surface mount components and bump solder.

また、近年、環境対策として使用されるようになったPbフリーはんだ(無鉛はんだ)を用いて、上記工法で径100μm、ピッチ200μmのバンプ形成を行い、上記同様に高さばらつきが小さいバンプ形成が可能であることを確認した。   In addition, bumps having a diameter of 100 μm and a pitch of 200 μm are formed by the above method using Pb-free solder (lead-free solder) that has recently been used as an environmental measure. Confirmed that it was possible.

図1(B)のように表面実装部品20の配線基板1へのはんだ接合と、はんだバンプ23の形成を同時に行った後、図2のように外観検査し、検査結果が良好なものに対してベアチップ搭載用フラックス塗布した後、ベアチップ搭載工程#2を実行し、バンプの無いベアチップ40の電極パッド41を下向きにしてはんだバンプ23上に載せる(電極パッド41をバンプ23に対面させる)。その状態で、リフロー炉に通炉してはんだリフローを実行することにより、図1(C)のように配線基板1上にベアチップ40をフリップチップ接合(フェースダウンはんだ接合)する。   As shown in FIG. 1B, after soldering the surface mount component 20 to the wiring board 1 and forming the solder bumps 23 at the same time, an appearance inspection is performed as shown in FIG. After applying the bare chip mounting flux, bare chip mounting process # 2 is executed, and the electrode pads 41 of the bare chip 40 without bumps are placed on the solder bumps 23 facing downward (the electrode pads 41 face the bumps 23). In this state, by passing through a reflow furnace and executing solder reflow, the bare chip 40 is flip-chip bonded (face-down solder bonding) onto the wiring substrate 1 as shown in FIG.

その後は、必要ならば洗浄、アンダーフィル(ベアチップと配線基板間の隙間に充填する接着材等)塗布、アンダーフィル硬化、検査の各工程を経て配線基板上に表面実装部品とベアチップの両者を搭載した部品が得られる。   After that, if necessary, both surface mounting components and bare chips are mounted on the wiring board through cleaning, underfill (adhesive material filling the gap between the bare chip and wiring board), underfill curing, and inspection. Parts are obtained.

本実施の形態によれば、従来から使用されているスクリーン印刷装置とマスク開口の内壁面粗さを滑らかにして(好ましくはRa≦0.3μm)、はんだ量のばらつきを抑えた印刷マスクを使用し、バンプ形成用と表面実装部品接合用のクリームはんだを同時に印刷し、その後の工程で表面実装部品の搭載、リフローを行うことで、基板上に表面実装部品のはんだ付けが終了し、かつフリップチップ接合用の極小のはんだバンプが形成された状態にすることが可能である。この工法は、SMTの印刷工程で基板側にフリップチップ接合用はんだを供給、リフローでバンプ形成するため、パワーアンプモジュール等に使用されるGaAs等の非常に脆い化合物半導体のベアチップであってもベアチップ側にバンプ加工を行わなくともフリップチップ実装が可能となる。従ってウエハー側への負荷が軽減でき、且つ高価な専用設備と治具を必要としないので、製造コストも低減させることができる。   According to the present embodiment, a screen printing apparatus that has been used conventionally and a printing mask that smoothes the inner wall surface roughness of the mask opening (preferably Ra ≦ 0.3 μm) and suppresses variation in the amount of solder are used. Then, solder paste for surface mounting components is finished on the board by printing cream solder for bump formation and surface mounting component bonding at the same time, and mounting and reflowing surface mounting components in the subsequent process It is possible to form a state in which a very small solder bump for chip bonding is formed. In this method, solder for flip chip bonding is supplied to the substrate side in the SMT printing process, and bumps are formed by reflow, so even bare chip of fragile compound semiconductor such as GaAs used for power amplifier modules etc. Flip chip mounting is possible without bump processing on the side. Therefore, the load on the wafer side can be reduced, and expensive dedicated equipment and jigs are not required, so that the manufacturing cost can be reduced.

また、図7の湿式洗浄用布50と乾式ペーパー56と吸引ユニット55による印刷マスク30の清掃によって、微小印刷用のマスク清掃が可能である。   Further, by cleaning the printing mask 30 with the wet cleaning cloth 50, the dry paper 56 and the suction unit 55 shown in FIG.

以上本発明の実施の形態について説明してきたが、本発明はこれに限定されることなく請求項の記載の範囲内において各種の変形、変更が可能なことは当業者には自明であろう。   Although the embodiments of the present invention have been described above, it will be obvious to those skilled in the art that the present invention is not limited to these embodiments, and various modifications and changes can be made within the scope of the claims.

本発明の実施の形態であって、表面実装部品及びベアチップの搭載手順を示す説明図である。It is embodiment of this invention, Comprising: It is explanatory drawing which shows the mounting procedure of surface mounting components and a bare chip. 本発明の実施の形態における表面実装部品とベアチップの実装工程フロー図である。It is a mounting process flow figure of the surface mounting components and bare chip in an embodiment of the invention. 本発明の実施の形態で使用する印刷マスクの断面図である。It is sectional drawing of the printing mask used in embodiment of this invention. 印刷マスクの開口形状であって、(A)は従来形状、(B)は本実施の形態の開口形状を示す平面図である。It is an opening shape of a printing mask, (A) is a conventional shape, (B) is a top view which shows the opening shape of this Embodiment. 本実施の形態で用いる印刷マスクの開口寸法であって、(A)は電極パッドが円形、(B)は電極パッドが方形の場合に対応した開口寸法の例を示す平面図である。It is an opening dimension of the printing mask used by this Embodiment, Comprising: (A) is a top view which shows the example of an opening dimension corresponding to the case where an electrode pad is circular and (B) is an electrode pad square. 配線基板の固定方法であって、(A)は全面受け構造の基板固定テーブルの側面図、(B)はポイント受け構造の基板固定テーブルの側面図、(C)は本実施の形態で採用する掘り込み基板固定テーブルの側断面図である。A method for fixing a wiring board, wherein (A) is a side view of a substrate fixing table having a full surface receiving structure, (B) is a side view of a substrate fixing table having a point receiving structure, and (C) is employed in the present embodiment. It is a sectional side view of a digging board | substrate fixed table. 本発明の実施の形態における印刷マスク清掃方法を示す構成図である。It is a block diagram which shows the printing mask cleaning method in embodiment of this invention.

符号の説明Explanation of symbols

1 配線基板
2,3,41 電極パッド
5 基板固定テーブル
6 支持手段
12 表面実装部品用クリームはんだ印刷層
13 バンプ用クリームはんだ印刷層
20 表面実装部品
23 はんだバンプ
30 印刷マスク
32 表面実装接合用開口
33 バンプ接合用開口
40 ベアチップ
50 洗浄用布
51 ノズル
52 溶剤
55 吸引ユニット
56 乾式ペーパー
58 下部ユニット
DESCRIPTION OF SYMBOLS 1 Wiring board 2,3,41 Electrode pad 5 Board | substrate fixing table 6 Support means 12 Cream solder printing layer for surface mount components 13 Cream solder print layer for bumps 20 Surface mount component 23 Solder bump 30 Print mask 32 Opening for surface mount bonding 33 Bump bonding opening 40 Bare chip 50 Cleaning cloth 51 Nozzle 52 Solvent 55 Suction unit 56 Dry paper 58 Lower unit

Claims (2)

基板の一面にクリームはんだを印刷する印刷マスクの清掃方法であって、
前記印刷マスクの上面に洗浄用布を敷いた状態で溶剤を上方から滴下乃至吹き付ける溶剤処理工程と、
前記溶剤処理工程の後で、前記印刷マスクの下面を乾式ペーパーで拭きながら前記印刷マスクの下方に配置された吸引手段で前記洗浄用布にしみ込ませた溶剤を吸引して前記印刷マスクの開口及びその周辺部の付着物を除去する吸引清掃工程とを備えることを特徴とする印刷マスクの清掃方法。
A printing mask cleaning method for printing cream solder on one side of a substrate,
A solvent treatment step of dripping or spraying a solvent from above in a state where a cleaning cloth is laid on the upper surface of the printing mask;
After the solvent treatment step, while wiping the lower surface of the printing mask with dry paper, the solvent soaked in the cleaning cloth is sucked by suction means arranged below the printing mask, and the opening of the printing mask and A cleaning method for a printing mask, comprising: a suction cleaning step for removing deposits on the periphery.
前記印刷マスクは、前記基板の一面における表面実装部品搭載領域及びベアチップ搭載領域にクリームはんだを印刷するための開口を有している請求項1記載の印刷マスクの清掃方法。   The printing mask cleaning method according to claim 1, wherein the printing mask has openings for printing cream solder on a surface mounting component mounting region and a bare chip mounting region on one surface of the substrate.
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Publication number Priority date Publication date Assignee Title
WO2022249408A1 (en) * 2021-05-27 2022-12-01 日本電信電話株式会社 Solder connection method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022249408A1 (en) * 2021-05-27 2022-12-01 日本電信電話株式会社 Solder connection method

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