JP2006269976A - Method for manufacturing electronic device and multilayer wiring board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a technology capable of improving a characteristic of an electronic device. <P>SOLUTION: After a plurality of second through-holes 4e for a thermal via holes 4g are formed after closely laminating a plurality of green sheets 4c, thermal via holes 4g are formed by filling conductors 4h into the holes 4e, and after that, a ceramic multilayer wiring board 4 formed by a heat treatment is prepared. As there is no displacement of the holes 4g in each layer of the board 4 by assembling an RF module (the electronic device) with semiconductor chips and chip components mounted on the board 4, a narrow heat-transfer-path from the semiconductor chips can be eliminated to suppress variations in heat resistance in each board 4. Accordingly, variations in the electrical characteristic of the RF module are lowered to improve the characteristic. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a technology for manufacturing an electronic device having a multilayer wiring board, and more particularly to a technology effective when applied to the improvement of characteristics of a high frequency power amplifier (electronic device).

A high-frequency power amplifier includes a multilayer substrate mainly composed of glass, a strip line formed in the substrate, a power transistor electrically connected to the strip line via a connection conductor mounted on the substrate, and It includes a chip component, a terminal electrode formed in a recess provided on the side surface of the substrate and electrically connected to the strip line, and a heat dissipation via hole formed in the lower portion of the power transistor (for example, Patent Documents) 1).
JP-A-9-283700 (FIG. 1)

  As an example of a high-frequency module (electronic device) incorporated in a portable communication device or the like, a high-frequency power amplifier called an RF (Radio Frequency) module is known. Some RF modules have a structure in which a plurality of vias called thermal vias for the purpose of heat dissipation as well as electrical connection such as GND are provided below the chip of a multilayer wiring board on which a semiconductor chip is mounted.

  In recent years, there has been an increasing demand for miniaturization and high functionality in RF modules. Accordingly, the wiring density inside the multilayer wiring board also tends to increase, and the space for providing thermal vias is reduced. Therefore, it is necessary to efficiently dissipate heat with a smaller number of thermal vias.

  In the manufacturing method of the multilayer wiring board used for the RF module, the thermal via and the conductor pattern of the green sheet of each layer are separately formed for each layer, each green sheet is laminated, and then fired (heat treatment). As a result, the position of the thermal via between the layers is shifted due to the position shift of the thermal via at the time of stacking and the elongation (deformation) of the green sheet before the stacking.

  Thereby, the heat transfer path of the thermal via is partially narrowed. Since the size of the thermal via misalignment varies depending on the individual multilayer wiring board, the thermal resistance varies among products (RF modules). Therefore, the temperature rise during the operation of the RF module varies.

  As a result, the electrical characteristics of the RF module also vary and the reliability of the RF module decreases.

  An object of the present invention is to provide a technique capable of improving characteristics in an electronic device.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in this application, the outline of typical ones will be briefly described as follows.

  That is, the present invention is a multilayer wiring formed by forming a plurality of through holes in the plurality of sheet members after laminating and laminating a plurality of sheet members, then filling the through holes with a conductor and performing heat treatment. A step of preparing a substrate, a step of mounting a semiconductor chip and a chip component on the multilayer wiring substrate, a step of electrically connecting the semiconductor chip and the multilayer wiring substrate, and the semiconductor chip and the chip component. And a step of sealing.

  The present invention also includes a step of preparing a plurality of sheet members, a step of forming a plurality of first through holes in the plurality of sheet members, and then filling a conductor into the first through holes, Forming a conductive pattern on a plurality of sheet members; contacting and stacking the plurality of sheet members; forming a plurality of second through holes in the stacked sheet members; 2 having a step of filling the through hole with a conductor and a step of heat-treating the plurality of laminated sheet members.

  Of the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  A multilayer wiring board in which a plurality of through holes are formed after laminating and laminating a plurality of sheet members and then a thermal via is formed by filling the plurality of through holes with a conductor is formed on the multilayer wiring board. By assembling the electronic device by mounting the chip and chip parts, there is no deviation in the position of the thermal vias in each layer of the multilayer wiring board, so the place where the heat transfer path becomes narrow can be eliminated, and the heat is radiated most efficiently be able to. Furthermore, since it is possible to suppress variations in thermal resistance among individual multilayer wiring boards, variations in temperature rise during operation of the electronic device can be reduced. As a result, variation in electrical characteristics in the electronic device can be reduced, and characteristics can be improved.

  In the following embodiments, the description of the same or similar parts will not be repeated in principle unless particularly necessary.

  Further, in the following embodiment, when it is necessary for the sake of convenience, the description will be divided into a plurality of sections or embodiments, but they are not irrelevant to each other unless otherwise specified. The other part or all of the modifications, details, supplementary explanations, and the like are related.

  Also, in the following embodiments, when referring to the number of elements (including the number, numerical value, quantity, range, etc.), particularly when clearly indicated and when clearly limited to a specific number in principle, etc. Except, it is not limited to the specific number, and it may be more or less than the specific number.

  Moreover, in the following embodiments, the term “high frequency” refers to a frequency band of approximately 500 MHz or more.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiments, and the repetitive description thereof will be omitted.

(Embodiment)
1 is a plan view showing an example of the structure of an electronic device (RF module) according to an embodiment of the present invention, FIG. 2 is a side view showing an example of the structure in the longitudinal direction of the electronic device shown in FIG. 1, and FIG. 1 is a side view showing an example of the structure in the width direction of the electronic device shown in FIG. 1, FIG. 4 is a back view showing an example of the back surface structure of the electronic device shown in FIG. 1, and FIG. 5 is an example of the structure of the electronic device shown in FIG. FIG. 6 is a manufacturing process flow chart showing an example of a manufacturing method of the multilayer wiring board used in the electronic device shown in FIG. 1, and FIG. 7 is an example of the structure of the thermal via region of the multilayer wiring board shown in FIG. FIG. 8 is a manufacturing process flow diagram showing an example of an assembly procedure of the electronic device shown in FIG. 1, and FIGS. 9 and 10 are diagrams of manufacturing a multilayer wiring board according to a modification of the embodiment of the present invention. It is a manufacturing process flowchart which shows a method.

  The electronic device of the present embodiment shown in FIGS. 1 to 5 is mainly a high-frequency electronic device incorporated in a portable communication device or the like. In the present embodiment, a multilayer wiring board 4 is used as the electronic device. The case of the RF module 7 (high-frequency power amplifier) provided will be described as an example.

  The configuration of the RF module 7 will be described. As shown in FIG. 5, a multilayer wiring substrate 4 on which a chip part such as a semiconductor chip 1 as a power transistor, a chip capacitor 2 and a chip register 5 is mounted on a main surface 4a A plurality of wires 6 for electrically connecting the semiconductor chip 1 and the multilayer wiring board 4, chip components such as the semiconductor chip 1, the chip capacitor 2 and the chip register 5, and a sealing for sealing the plurality of wires 6 It consists of the sealing body 3 which consists of resin.

  The semiconductor chip 1 is connected by a solder 8 to a cavity 4 n that is a recess formed in the main surface 4 a of the multilayer wiring board 4. Chip components such as the chip capacitor 2 and the chip register 5 are also electrically and mechanically connected to the main surface 4 a of the multilayer wiring board 4 by solder 8.

  As shown in FIG. 8, pads 1 b as a plurality of electrodes are formed on the main surface 1 a of the semiconductor chip 1, and these pads 1 b and the surface layer wiring 4 m are electrically connected by wires 6. Furthermore, a planar conductor pattern 4 j as shown in FIG. 6 is formed below the semiconductor chip 1 and connected to the semiconductor chip 1 via solder 8.

  A plurality of external terminals 9 are arranged in a grid pattern on the back surface 4b of the multilayer wiring board 4 as shown in FIG. 4, and the RF module 7 of the present embodiment is an LGA (Land Grid Array) type. It is an electronic device.

  The multilayer wiring board 4 is a ceramic substrate, for example, and is formed by laminating a plurality of green sheets (sheet members) 4c.

  Further, as shown in FIG. 5, a plurality of thermal vias 4g for heat dissipation as well as electrical connection such as GND connection of the semiconductor chip 1 are provided under the cavity 4n of the multilayer wiring board 4. Further, a plurality of vias 4f intended only for electrical connection between layers other than the thermal via 4g are also provided.

  Since the thermal via 4g is one of the purposes for heat dissipation of the semiconductor chip 1, the thermal via 4g is provided from the bottom of the semiconductor chip 1, that is, from the bottom of the cavity 4n to the back surface 4b of the multilayer wiring board 4. As shown in FIG. 6, a plain-shaped conductor pattern 4j is also provided at the bottom of the cavity 4n, and a plurality of thermal vias 4g are provided in the area of the plane-shaped conductor pattern 4j. Each layer (green sheet 4c) of the multilayer wiring board 4 is formed with a plurality of conductor patterns 4i. Of these conductor patterns 4i, wirings other than the surface layer wiring 4m are as shown in FIG. Internal wiring 4k. For example, the internal wiring 4k between the layers is connected by a via 4f as necessary.

  In the multilayer wiring board 4, the extending conductor pattern 4i, the plain conductor pattern 4j, the via 4f, and the thermal via 4g are made of, for example, a copper alloy or Ag.

  The semiconductor chip 1 is made of, for example, silicon. Furthermore, the wire 6 is, for example, a gold wire, and the sealing resin that forms the sealing body 3 is, for example, a silicone resin.

  However, the multilayer wiring board 4 and the sealing resin may be made of, for example, an epoxy resin.

  In the RF module 7 of the present embodiment, as shown in FIG. 7, a plurality of thermal vias 4g formed on the multilayer wiring board 4 are arranged without forming a shift for each layer.

  That is, in the production of the multilayer wiring board 4, a plurality of green sheets 4c are stacked, and then through holes for the thermal via 4g are formed, and the through holes are filled with the conductor 4h to form the thermal via 4g. Therefore, in all of the plurality of thermal vias 4g, the positional shift for each layer is not formed, and there is no portion where the heat transfer path from the semiconductor chip 1 becomes narrow.

  Next, a method for manufacturing a multilayer wiring board used in the electronic device of the present embodiment will be described with reference to FIG.

  First, as shown in step S1 of FIG. 6, a plurality of green sheets (sheet members) 4c are prepared.

  Thereafter, as shown in step S2, a plurality of first through holes 4d are formed in each of the plurality of green sheets 4c. The first through hole 4d is formed by punching or laser processing. Subsequently, each of the first through holes 4d is filled with a conductor 4h made of an alloy such as a copper alloy or Ag to form a plurality of vias 4f.

  Thereafter, as shown in step S3, extended conductor patterns 4i are formed on the plurality of green sheets 4c by printing. At that time, an extended conductor pattern 4i is formed so as to connect the first through holes 4d.

  Thereafter, as shown in step S4, a plurality of green sheets 4c are adhered and stacked. Here, a plurality of green sheets 4c are laminated by disposing an adhesive between the layers of the green sheets 4c and applying pressure by pressing.

  However, a plurality of green sheets 4c may be laminated only by pressing without using the adhesive or the like.

  Thereafter, as shown in step S5, a plurality of second through holes 4e for the thermal via 4g are formed in the chip mounting region of the plurality of stacked green sheets 4c. Similarly to the first through hole 4d, the second through hole 4e is formed by punching or laser processing. Subsequently, a plurality of thermal vias 4g are formed by filling the plurality of second through holes 4e with conductors 4h by printing or the like.

  Thereafter, as shown in step S6, a plain conductor pattern 4j is formed by printing around the plurality of thermal vias 4g in the uppermost green sheet 4c among the plurality of stacked green sheets 4c.

  Thereafter, as shown in step S7, a heat treatment such as firing is performed on the plurality of stacked green sheets 4c to manufacture the multilayer wiring board 4 made of ceramic.

  According to the method for manufacturing multilayer wiring board 4 of the present embodiment, a plurality of second through holes 4e for thermal via 4g are formed after laminating and laminating a plurality of green sheets 4c. By forming the thermal via 4g by filling the through hole 4e with the conductor 4h, as shown in FIG. 7, there is no deviation in the position of the thermal via 4g by each layer of the green sheet forming the multilayer wiring board 4, The portion where the heat transfer path becomes narrow can be eliminated.

  As a result, in the multilayer wiring board 4, when heat is transferred from the semiconductor chip 1 to the back surface 4b via the plurality of thermal vias 4g, heat can be radiated (heat transfer) most efficiently.

  Next, a method for manufacturing the electronic device according to the present embodiment will be described with reference to a manufacturing process flowchart shown in FIG.

  First, as shown in step S11 of FIG. 8, the multilayer wiring board 4 is prepared. As shown in FIG. 6, the multilayer wiring board 4 is formed by forming a plurality of second through holes 4e for thermal vias 4g in the plurality of green sheets 4c after laminating and laminating the plurality of green sheets 4c, This is a ceramic substrate formed by filling the second through hole 4e with the conductor 4h and performing heat treatment.

  Then, component mounting shown in step S12 is performed. Here, the semiconductor chip 1 is mounted in the cavity 4n which is the concave portion of the multilayer wiring board 4, and chip components such as the chip capacitor 2 and the chip register 5 are mounted on the main surface 4a. At that time, the semiconductor chip 1 and the chip component are connected to the multilayer wiring board 4 via the solder 8 as shown in FIG.

  Thereafter, wire bonding shown in step S13 is performed. Here, the pad 1b of the semiconductor chip 1 and the surface layer wiring 4m of the main surface 4a of the multilayer wiring board 4 are electrically connected by a wire 6 such as a gold wire.

  Thereafter, the sealing shown in step S14 is performed. Here, the semiconductor chip 1 and the chip component are sealed with a sealing resin. At that time, for example, a silicone resin is used as the sealing resin, and the resin is sealed by printing.

  According to the method for manufacturing an electronic device of the present embodiment, a plurality of second through holes 4e for thermal vias 4g are formed in the plurality of green sheets 4c after the plurality of green sheets 4c are adhered and stacked, and thereafter The ceramic through-hole wiring board 4 formed by filling the second through-hole 4e with the conductor 4h to form a plurality of thermal vias 4g and heat-treating the semiconductor chip is provided on the multilayer wiring board 4. 1 and the chip component are assembled to assemble the RF module 7 (electronic device), the position of the thermal via 4g by each layer of the multilayer wiring board 4 is not displaced as shown in FIG. The portion where the heat transfer path becomes narrow can be eliminated, and heat can be radiated most efficiently.

  Furthermore, since it is possible to suppress variations in thermal resistance among the multilayer wiring boards 4, variations in temperature rise during operation of the RF module 7 can be reduced.

  As a result, variations in electrical characteristics in the RF module 7 can be reduced and characteristics can be improved.

  Further, it is possible to improve the reliability by reducing the variation of the electrical characteristics in the RF module 7.

  Next, the manufacturing method of the multilayer wiring board of the modification of this Embodiment is demonstrated.

  The manufacturing method of the multilayer wiring board 4 of the modified example shown in FIG. 9 includes a conductor pattern 4i that extends to a plurality of green sheets 4c and a plain conductor pattern when the conductor pattern is printed before the plurality of green sheets 4c are stacked. 4j is formed by printing.

  First, as shown in step S21, a plurality of green sheets (sheet members) 4c are prepared.

  Thereafter, as shown in step S22, a plurality of first through holes 4d are formed in each of the plurality of green sheets 4c. The first through hole 4d is formed by punching or laser processing. Subsequently, each of the first through holes 4d is filled with a conductor 4h made of an alloy such as a copper alloy or Ag to form a plurality of vias 4f.

  Thereafter, as shown in step S23, the extended conductor pattern 4i and the plain conductor pattern 4j are formed on the plurality of green sheets 4c by printing. At that time, an extended conductor pattern 4i is formed so as to connect the first through holes 4d.

  Thereafter, as shown in step S24, the plurality of green sheets 4c are adhered and stacked. Here, a plurality of green sheets 4c are laminated by disposing an adhesive between the layers of the green sheets 4c and applying pressure by pressing.

  However, a plurality of green sheets 4c may be laminated only by pressing without using the adhesive or the like.

  Thereafter, as shown in step S25, a plurality of second through holes 4e for the thermal vias 4g are formed in the region of the plain conductor pattern 4j of the plurality of stacked green sheets 4c. Similarly to the first through hole 4d, the second through hole 4e is formed by punching or laser processing. Subsequently, a plurality of thermal vias 4g are formed by filling the plurality of second through holes 4e with conductors 4h by printing or the like.

  Thereafter, as shown in step S26, a heat treatment such as firing is performed on the plurality of stacked green sheets 4c to manufacture the multilayer wiring board 4 made of ceramic.

  According to the manufacturing method of the multilayer wiring board of the modified example shown in FIG. 9, as shown in FIG. 7, the position of the thermal via 4 g by each layer of the green sheet forming the multilayer wiring board 4 can be eliminated, and a plurality of In the step of printing the conductor pattern before the green sheet 4c is laminated, the step of forming the plain conductor pattern 4j after the lamination (step of FIG. 6) in order to form the extended conductor pattern 4i and the plain conductor pattern 4j. Step S6) can be omitted, and the manufacturing process of the multilayer wiring board 4 can be simplified.

  10 is a manufacturing method in the case of a multilayer wiring board having a cavity 4n. First, as shown in step S31, each of the openings 4p for the cavity 4n is provided. And a plurality of green sheets 4c corresponding to the depth of the cavity 4n are prepared.

  On the other hand, as shown in step S32, after the plurality of green sheets 4c are adhered and stacked, a plurality of second through holes 4e (see FIG. 6) for the thermal via 4g are formed, and then the second through holes are formed. 4e is filled with a conductor 4h to form a plurality of thermal vias 4g, and a plurality of green sheets 4c on which a plain-shaped conductor pattern 4j is formed are prepared.

  Thereafter, as shown in step S33, all layers are laminated, and heat treatment such as firing shown in step S34 is further performed to manufacture the multilayer wiring board 4 made of ceramic.

  Also in the manufacture of the multilayer wiring board 4 having the cavity 4n which is a recess as shown in FIG. 10, as shown in FIG. 7, the deviation of the position of the thermal via 4g by each layer of the green sheet forming the multilayer wiring board 4 is eliminated. Can do.

  Although the invention made by the present inventor has been specifically described based on the embodiments of the invention, the present invention is not limited to the embodiments of the invention, and various modifications can be made without departing from the scope of the invention. It goes without saying that it is possible.

  For example, in the above embodiment, the case where the RF module 7 which is an electronic device is an LGA type electronic device has been described, but the external terminal 9 of the electronic device may be a ball electrode or the like.

  The present invention is suitable for a method of manufacturing an electronic device having a multilayer wiring board.

It is a top view which shows an example of the structure of the electronic device (RF module) of embodiment of this invention. It is a side view which shows an example of the structure of the longitudinal direction of the electronic device shown in FIG. It is a side view which shows an example of the structure of the width direction of the electronic device shown in FIG. It is a back view which shows an example of the structure of the back surface of the electronic device shown in FIG. It is sectional drawing which shows an example of the structure of the electronic device shown in FIG. It is a manufacturing process flowchart which shows an example of the manufacturing method of the multilayer wiring board used for the electronic device shown in FIG. FIG. 7 is an enlarged partial sectional view showing an example of a structure of a thermal via region of the multilayer wiring board shown in FIG. 6. It is a manufacturing process flowchart which shows an example of the assembly procedure of the electronic device shown in FIG. It is a manufacturing process flowchart which shows the manufacturing method of the multilayer wiring board of the modification of embodiment of this invention. It is a manufacturing process flowchart which shows the manufacturing method of the multilayer wiring board of the modification of embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor chip 1a Main surface 1b Pad 2 Chip capacitor (chip component)
3 Sealing body 4 Multilayer wiring board 4a Main surface 4b Back surface 4c Green sheet (sheet member)
4d 1st through hole 4e 2nd through hole 4f Via 4g Thermal via 4h Conductor 4i Conductor pattern 4j Plain conductor pattern 4k Internal wiring 4m Surface layer wiring 4n Cavity 4p Opening 5 Chip register (chip component)
6 wire 7 RF module (electronic device)
8 Solder 9 External terminal

Claims (5)

(A) After a plurality of sheet members are adhered and stacked, a plurality of through holes are formed in the plurality of sheet members, and then a conductor is filled in the through holes and heat treatment is performed to prepare a multilayer wiring board formed And a process of
(B) mounting a semiconductor chip and a chip component on the multilayer wiring board;
(C) electrically connecting the semiconductor chip and the multilayer wiring board;
(D) A method for manufacturing an electronic device, comprising: sealing the semiconductor chip and the chip component. (A) preparing a plurality of sheet members;
(B) forming a plurality of first through holes in the plurality of sheet members, and then filling the first through holes with a conductor;
(C) forming a conductor pattern on the plurality of sheet members;
(D) a step of laminating the plurality of sheet members in close contact;
(E) forming a plurality of second through holes in the plurality of stacked sheet members, and then filling the second through holes with a conductor;
(F) A method of manufacturing a multilayer wiring board, comprising: a step of heat-treating the plurality of stacked sheet members. (A) preparing a green sheet as a plurality of sheet members;
(B) forming a plurality of first through holes in the plurality of green sheets and then filling the first through holes with a conductor;
(C) forming a conductor pattern on the plurality of green sheets;
(D) a step of adhering and laminating the plurality of green sheets;
(E) forming a plurality of second through holes in the plurality of stacked green sheets, and then filling the second through holes with a conductor;
(F) A method of manufacturing a multilayer wiring board, comprising: heat-treating the plurality of stacked green sheets to form a ceramic multilayer wiring board. (A) preparing a plurality of sheet members;
(B) forming a plurality of first through holes in the plurality of sheet members, and then filling the first through holes with a conductor;
(C) forming a conductor pattern on the plurality of sheet members;
(D) a step of laminating the plurality of sheet members in close contact;
(E) forming a plurality of second through holes in the plurality of stacked sheet members, and then filling the second through holes with a conductor;
(F) forming a plain-shaped conductor pattern around the plurality of second through holes in the uppermost sheet member among the plurality of stacked sheet members;
(G) A method of manufacturing a multilayer wiring board, comprising a step of heat-treating the plurality of laminated sheet members. (A) preparing a plurality of sheet members;
(B) forming a plurality of first through holes in the plurality of sheet members, and then filling the first through holes with a conductor;
(C) forming an extended conductor pattern and a plain conductor pattern on the plurality of sheet members;
(D) a step of laminating the plurality of sheet members in close contact;
(E) forming a plurality of second through holes in a region of the plain-shaped conductor pattern of the plurality of stacked sheet members, and then filling the second through holes with a conductor;
(F) A method of manufacturing a multilayer wiring board, comprising: a step of heat-treating the plurality of stacked sheet members.