JP2006246050A - Composite piezoelectric wafer and surface acoustic wave device - Google Patents

Composite piezoelectric wafer and surface acoustic wave device Download PDF

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JP2006246050A
JP2006246050A JP2005059287A JP2005059287A JP2006246050A JP 2006246050 A JP2006246050 A JP 2006246050A JP 2005059287 A JP2005059287 A JP 2005059287A JP 2005059287 A JP2005059287 A JP 2005059287A JP 2006246050 A JP2006246050 A JP 2006246050A
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wafer
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piezoelectric wafer
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Masaki Sobu
正樹 蘇武
Michiyuki Nakazawa
道幸 中澤
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TDK Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To improve temperature characteristics and electric characteristic of a piezoelectric wafer forming an SAW apparatus and to manufacture a highly reliable piezoelectric wafer especially having these excellent characteristics and capable of preventing electrostatic failures or the like. <P>SOLUTION: A composite piezoelectric wafer is provided with first and second wafers consisting of a piezoelectric material and integrally formed by sticking the first and second wafers to each other so that faces having the same polarity are joined with each other. The thickness of the first wafer is 0.1 to 0.5 λ. Both the wafers are integrated by direct junction or surface activation junction. In the first wafer, it is preferable to improve a pyroelectric characteristic, to add an additive and to set volume resistivity to 3.6×10<SP>10</SP>to 1.5×10<SP>14</SP>Ωcm. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、複合圧電ウエハ及び弾性表面波装置に係り、特に複数枚の圧電ウエハを接合して一体化した複合ウエハ、並びにこのウエハを使用して作製した弾性表面波装置に関する。   The present invention relates to a composite piezoelectric wafer and a surface acoustic wave device, and more particularly to a composite wafer obtained by bonding and integrating a plurality of piezoelectric wafers, and a surface acoustic wave device manufactured using the wafer.

圧電効果によって発生する弾性表面波(Surface Acoustic Wave/SAW)を利用した弾性表面波装置(以下、SAW装置という)は、小型軽量で信頼性に優れることから、携帯電話機等の通信端末における送受信フィルタやアンテナ分波器などに近年広く使用されている。かかるSAW装置は、圧電基板上に交差指状の電極(インターデジタルトランスデューサ:Interdigital Transducer/以下、IDTという)を設け、このIDTに高周波信号を印加して弾性表面波を励振し、伝搬された信号を再び高周波信号に変換して特定の周波数を抽出する。   A surface acoustic wave device (hereinafter referred to as a SAW device) using a surface acoustic wave (SAW) generated by a piezoelectric effect is small and light and has excellent reliability. Therefore, it is a transmission / reception filter in a communication terminal such as a mobile phone. Recently, it has been widely used for antenna demultiplexers. Such a SAW device is provided with a cross-fingered electrode (Interdigital Transducer / hereinafter referred to as IDT) on a piezoelectric substrate, a high frequency signal is applied to the IDT to excite a surface acoustic wave, and the propagated signal Is converted to a high frequency signal again to extract a specific frequency.

ところで、このような圧電基板を利用したSAW装置は、圧電基板自体が温度特性を持つため、例えばフィルタを構成した場合に温度変化によってフィルタの中心周波数がずれるなどデバイスの特性が変動する問題が生じることがある。特に、通信端末の高周波・高性能化に伴い、実装デバイスのより一層の特性向上が求められており、SAW装置の電極構造や接続構造、あるいは圧電基板自体の温度特性を改善する各種の方法が提案されている。   By the way, in the SAW device using such a piezoelectric substrate, since the piezoelectric substrate itself has temperature characteristics, for example, when a filter is configured, there arises a problem that the characteristics of the device fluctuate such that the center frequency of the filter shifts due to temperature change. Sometimes. In particular, with the improvement of high frequency and high performance of communication terminals, further improvement in characteristics of mounted devices is required, and various methods for improving the temperature characteristics of the electrode structure and connection structure of the SAW device or the piezoelectric substrate itself have been proposed. Proposed.

例えば、圧電ウエハの温度特性を改善する方法としては、(1)LiTaO3等の圧電基板上にこれと反対の温度係数を持つSiO2薄膜を成膜する方法や、(2)圧電基板に低膨張率の材料を貼り付け、圧電基板の温度変化による伸縮を抑える方法、あるいは(3)弾性表面波が伝搬される圧電基板の表層にプロトン交換処理によって分極反転層を形成し、電界短絡効果を得る方法などがある。 For example, there are two methods for improving the temperature characteristics of a piezoelectric wafer: (1) a method of forming a SiO 2 thin film having a temperature coefficient opposite to that on a piezoelectric substrate such as LiTaO 3; A method of suppressing expansion and contraction due to temperature change of the piezoelectric substrate by pasting a material having an expansion coefficient, or (3) forming a domain-inverted layer by proton exchange treatment on the surface of the piezoelectric substrate on which the surface acoustic wave is propagated, thereby providing a short circuit effect There are ways to get it.

また、かかる特性改善を提案する文献として下記文献がある。
特開2004−343359号公報 特開2004−297693号公報 特開平10−51262号公報 特開2004−254114号公報 特開2004−35396号公報 特開2004−336600号公報 信学技報US93−49(1993−09/第1〜5頁)「分極反転層を有するLiTaO336°回転Y板におけるSHタイプ弾性表面波の温度特性の測定」東北大学/艾莉、中村 僖良 著
Further, there are the following documents as proposals for improving the characteristics.
JP 2004-343359 A JP 2004-297893 A Japanese Patent Laid-Open No. 10-51262 JP 2004-254114 A JP 2004-35396 A JP 2004-336600 A IEICE Tech. Bulletin US93-49 (1993-09 / pages 1-5) "Measurement of temperature characteristics of SH type surface acoustic wave on LiTaO3 36 [deg.] Rotated Y plate with polarization reversal layer" Tohoku University / Sakai, Akira Nakamura Author

ところが、上記(1)SiO2薄膜を成膜する方法では、成膜時にSiO2の膜厚の制御が難しく、また弾性表面波の伝播損失が大きくなる問題がある。また上記(2)圧電基板に低膨張率の材料を貼り付ける方法にあっては、接着界面での制御が難しく、IDTの形成工程など数百度の温度がかかることとなる後のSAW装置の製造プロセスにおいて、貼り合せた材料間の熱膨張率の差からクラックや割れが生じて歩留りが低下する難がある。さらに上記(3)プロトン交換による方法では、均一な厚さの分極反転層を形成することは容易ではなく、製造プロセスが複雑にならざるを得ない。 However, the above (1) method of depositing the SiO 2 thin film has problems that it is difficult to control the thickness of the SiO 2 film during deposition, and the propagation loss of the surface acoustic wave is increased. In addition, in the above (2) method of attaching a material having a low expansion coefficient to the piezoelectric substrate, it is difficult to control at the bonding interface, and the SAW device is manufactured after several hundred degrees of temperature such as an IDT formation process. In the process, cracks and cracks occur due to the difference in thermal expansion coefficient between the bonded materials, and there is a difficulty in reducing the yield. Furthermore, in the method (3) based on proton exchange, it is not easy to form a domain-inverted layer having a uniform thickness, and the manufacturing process must be complicated.

一方、圧電基板は、圧電性とともに焦電性を一般に有するから、温度変化(上昇)に伴い基板表面に不均一な電荷分布が生じ、デバイスの電気特性を劣化させ、あるいは蓄積された電荷によって微細なIDT部の電極間で放電し電極指がダメージを受けるなどの問題が引き起こされることがありその解決が望まれる。また、これらの問題は上記文献に記載の方法によっても解決することは出来ない。   On the other hand, a piezoelectric substrate generally has pyroelectricity as well as piezoelectricity, and therefore a non-uniform charge distribution is generated on the substrate surface with a temperature change (rise), deteriorating the electrical characteristics of the device, or being fine due to accumulated charges. In some cases, problems such as discharge between the electrodes of the IDT portion and damage to the electrode fingers may be caused. Moreover, these problems cannot be solved even by the method described in the above document.

したがって、本発明の目的は、SAW装置を形成する圧電ウエハの温度特性並びに電気特性を改善する点にあり、特にこれらの良好な特性とともに静電破壊等を防ぐことが出来る信頼性に優れた圧電ウエハをより簡便な方法で製造することを可能とする点にある。   Accordingly, an object of the present invention is to improve the temperature characteristics and electrical characteristics of the piezoelectric wafer forming the SAW device, and in particular, these excellent characteristics and a highly reliable piezoelectric that can prevent electrostatic breakdown and the like. This is in that the wafer can be manufactured by a simpler method.

前記課題を解決し目的を達成するため、本発明に係る複合圧電ウエハは、圧電性材料からなる第一の圧電ウエハと、圧電性材料からなる第二の圧電ウエハとを備え、前記第一の圧電ウエハと前記第二の圧電ウエハとを、同極面同士が接合されるように貼り合せて一体化したものである。   In order to solve the above problems and achieve the object, a composite piezoelectric wafer according to the present invention includes a first piezoelectric wafer made of a piezoelectric material and a second piezoelectric wafer made of a piezoelectric material, The piezoelectric wafer and the second piezoelectric wafer are bonded and integrated so that the same polar surfaces are bonded to each other.

圧電基板(圧電ウエハ)表面の分極を反転させると、電界短絡効果と基板表面の位相速度が低下することによって温度特性(TCD等)並びにQ値等の電気特性が向上する。本発明はこの性質を利用するもので、共に圧電性材料からなる第一の圧電ウエハ(以下、第一ウエハという)と、第二の圧電ウエハ(以下、第二ウエハという)とを同極面同士(プラス面同士又はマイナス面同士)が接合されるように貼り合せて一体化する。これにより、両ウエハの境面部に電界短絡層が形成され、温度特性(TCD等)とQ値等の電気特性とを向上させることが出来る。   When the polarization of the surface of the piezoelectric substrate (piezoelectric wafer) is reversed, the electric field short-circuit effect and the phase velocity of the substrate surface decrease, thereby improving temperature characteristics (such as TCD) and electrical characteristics such as Q value. The present invention utilizes this property, and a first piezoelectric wafer (hereinafter referred to as a first wafer) and a second piezoelectric wafer (hereinafter referred to as a second wafer), both of which are made of a piezoelectric material, have the same polar surface. The two pieces (plus faces or minus faces) are bonded and integrated so as to be joined. As a result, an electric field short-circuit layer is formed at the boundary between both wafers, and temperature characteristics (TCD and the like) and electrical characteristics such as Q value can be improved.

第一ウエハおよび第二ウエハを形成する圧電性材料の種類は、特に限定されない。例えば、リチウムタンタレート(LiTaO3/以下、LTと称することがある)やリチウムナイオベート(LiNbO3/以下、LNと称することがある)、水晶等の圧電単結晶であっても良いし、チタン酸ジルコン酸鉛系圧電セラミックスのような圧電セラミックスにより形成されていても構わない。 The kind of piezoelectric material that forms the first wafer and the second wafer is not particularly limited. For example, a piezoelectric single crystal such as lithium tantalate (LiTaO 3 / hereinafter, sometimes referred to as LT), lithium niobate (LiNbO 3 / hereinafter, sometimes referred to as LN), quartz, or the like may be used. It may be formed of piezoelectric ceramics such as lead zirconate-based piezoelectric ceramics.

尚、両ウエハを同一の材料により(例えば共にLTで或いは共にLNで)構成することが、接合したウエハ(第一ウエハと第二ウエハ)間の熱膨張率差を無くし、デバイス製造時や各種電子機器への実装後の実使用時におけるクラックや割れの発生を防ぐ点からは好ましい。ただし、本発明は、第一・第二両ウエハを同一材料で構成したものに限定されるものではなく、各ウエハをそれぞれ異なる材料により形成したものも(例えば両ウエハのうち一方をLTにより他方をLNにより形成する等)本発明に含まれる。   It should be noted that configuring both wafers with the same material (for example, both LT or both LN) eliminates the difference in thermal expansion coefficient between the bonded wafers (the first wafer and the second wafer), and at the time of device manufacture and various This is preferable from the viewpoint of preventing the occurrence of cracks and cracks during actual use after mounting on an electronic device. However, the present invention is not limited to one in which both the first and second wafers are made of the same material, and one in which each wafer is formed from a different material (for example, one of the two wafers is made of the other by LT). Are formed by LN, etc.).

第一ウエハと第二ウエハの接合には、例えば直接接合や表面活性化接合によることが出来る。直接接合によれば、接着剤等を用いることなく、キュリー点以下の加熱を加えることにより強固な結合を行うことが可能である。また、表面活性化接合によれば、接合の妨げとなる表面層を除去し、ウエハ表面の原子の結合手同士を直接結合させることで両ウエハが強固に接合された複合ウエハを形成することが出来る。   The first wafer and the second wafer can be bonded by, for example, direct bonding or surface activated bonding. According to direct bonding, it is possible to perform strong bonding by applying heating below the Curie point without using an adhesive or the like. Also, according to surface activated bonding, it is possible to form a composite wafer in which both wafers are firmly bonded by removing the surface layer that hinders bonding and directly bonding the bonds of atoms on the wafer surface. I can do it.

上記第一ウエハは、0.1λ〜1.5λの厚さを有するものとする。   The first wafer has a thickness of 0.1λ to 1.5λ.

圧電基板で励振される弾性表面波は、例えば、レーリー波では約90%以上が当該基板表面から深さ1λ以内の表層で伝播される。また、SHタイプなどのリーキー波でも、基板表面の電気的境界条件を適切に選ぶことにより基板表面に波のエネルギーを集中させることが出来る。このため、第一ウエハの厚さを0.1λ〜1.5λとすることによって上記電界短絡効果による温度特性並びに電気特性の改善効果を良好に得ることが出来る。   As for the surface acoustic wave excited by the piezoelectric substrate, for example, about 90% or more of Rayleigh waves are propagated on the surface layer within a depth of 1λ from the substrate surface. In addition, even with a leaky wave of the SH type or the like, wave energy can be concentrated on the substrate surface by appropriately selecting the electrical boundary condition on the substrate surface. For this reason, when the thickness of the first wafer is 0.1λ to 1.5λ, the effect of improving the temperature characteristics and the electrical characteristics due to the electric field short-circuit effect can be obtained satisfactorily.

尚、第一ウエハの厚さを上記値にするには、例えば第一ウエハを第二ウエハと接合させた後に切削・研磨等の方法により第一ウエハを上記値を有するよう加工するが、第二ウエハとの接合前に第一ウエハを予め上記厚さ寸法に加工しておき、その後、第二ウエハと接合を行っても良い。第二ウエハの厚さは特に問わない。   In order to set the thickness of the first wafer to the above value, for example, after bonding the first wafer to the second wafer, the first wafer is processed to have the above value by a method such as cutting and polishing. The first wafer may be processed in advance to the above thickness before bonding to the two wafers, and then bonded to the second wafer. The thickness of the second wafer is not particularly limited.

また、本発明の複合圧電ウエハでは、第一ウエハに対し焦電特性の改善処理を行うことが好ましい。   In the composite piezoelectric wafer of the present invention, it is preferable to perform pyroelectric property improvement processing on the first wafer.

圧電基板は一般に焦電性を有するから、温度変化に伴い基板表面に不均一な電荷分布が生じ、この電荷が蓄積されるとSAW装置の製造時や各種電子機器に実装された後における実使用時に特性劣化やIDT部の放電による電極へのダメージを引き起こすことが危惧される。第一ウエハに対し上記焦電特性の改善処理を行えば、かかる問題を回避し、温度特性並びに信頼性に優れたSAW装置を製造することが出来る。   Piezoelectric substrates generally have pyroelectric properties, and non-uniform charge distribution occurs on the surface of the substrate with changes in temperature. When this charge is accumulated, it is actually used during the manufacture of SAW devices and after being mounted on various electronic devices. At times, there is a concern that the electrode may be damaged due to characteristic deterioration or discharge of the IDT portion. If the pyroelectric characteristics are improved on the first wafer, such a problem can be avoided and a SAW device having excellent temperature characteristics and reliability can be manufactured.

焦電特性を改善する具体的な方法は特に限定されないが、一例を挙げれば、チョクラルスキー法において第一ウエハを構成する圧電材料の単結晶を生成する場合に、溶融圧電材料に添加物(例えばFe、Mn、Cu、Tiのうちの少なくとも1種類以上)を添加し、ウエハ体積抵抗を低減することにより行うことが出来る。また、圧電単結晶を引き上げ、スライスした後に結晶中の酸素を除去する還元処理を行うなどの方法によりウエハ体積抵抗を低減しても良い。   A specific method for improving the pyroelectric characteristics is not particularly limited. For example, when a single crystal of the piezoelectric material constituting the first wafer is generated in the Czochralski method, an additive ( For example, it can be carried out by adding at least one of Fe, Mn, Cu, and Ti) and reducing the volume resistance of the wafer. Further, the volume resistance of the wafer may be reduced by pulling up the piezoelectric single crystal and slicing it to perform a reduction process for removing oxygen in the crystal.

また上記複合圧電ウエハでは、別の観点からも第一ウエハに添加物を添加することが望ましい。   In the composite piezoelectric wafer, it is desirable to add an additive to the first wafer from another viewpoint.

すなわち、添加物を添加すると添加物に応じた色彩がウエハ自体に付く。一方、添加物を添加しない第二ウエハ(例えばLTウエハの場合)は、一般に透明か又は白色の色彩を有する。したがって、第一ウエハと第二ウエハとを接合した後、例えばIDT(SAW素子)が形成されることとなる第一ウエハを切削研磨して所定の厚さまで薄く加工する場合に、加工中、第一ウエハの厚さを容易に目視することが可能となり、正確かつ容易に第一ウエハの加工を行うことが出来る。   That is, when an additive is added, a color corresponding to the additive is attached to the wafer itself. On the other hand, the second wafer to which no additive is added (for example, in the case of an LT wafer) generally has a transparent or white color. Therefore, after bonding the first wafer and the second wafer, for example, when the first wafer on which an IDT (SAW element) will be formed is cut and polished to a predetermined thickness, The thickness of one wafer can be easily visually checked, and the first wafer can be processed accurately and easily.

この場合、添加する添加物としては、例えばFe、Mn、Cu及びTiが挙げられ、これらの1種類以上を第一ウエハを形成する圧電材料中に混入すれば良い。   In this case, examples of the additive to be added include Fe, Mn, Cu, and Ti. One or more of these may be mixed into the piezoelectric material forming the first wafer.

さらに上記複合圧電ウエハでは、第一ウエハが3.6×1010 Ω・cm以上でかつ1.5×1014Ω・cm以下の体積抵抗率を有するものとすることが望ましい。体積抵抗率をかかる値に低下させるには、上記Fe、Mn、Cu又はTiの1種類以上の添加物を第一ウエハに添加すれば良い。 Furthermore, in the composite piezoelectric wafer, it is desirable that the first wafer has a volume resistivity of 3.6 × 10 10 Ω · cm or more and 1.5 × 10 14 Ω · cm or less. In order to reduce the volume resistivity to such a value, one or more additives of Fe, Mn, Cu or Ti may be added to the first wafer.

SAW装置の製造に使用されている従来の圧電ウェハは、一般に体積抵抗率が高く、このため不均一な電荷分布が生じやすく、IDTの電極指間で放電が生じることがあった。これに対し本発明では好ましくは、SAW装置を形成する側のウエハである第一ウエハの体積抵抗率を1.5×1014Ω・cm以下にする。これにより、電荷分布を均一にしてSAW装置の特性を向上させるとともに、放電破壊等の発生を防ぐことが可能となる。 Conventional piezoelectric wafers used in the manufacture of SAW devices generally have a high volume resistivity, which tends to cause a non-uniform charge distribution and can cause discharge between IDT electrode fingers. On the other hand, in the present invention, the volume resistivity of the first wafer, which is the wafer on the side where the SAW device is formed, is preferably set to 1.5 × 10 14 Ω · cm or less. This makes it possible to improve the characteristics of the SAW device by making the charge distribution uniform, and to prevent the occurrence of discharge breakdown and the like.

一方、かかる第一ウエハの体積抵抗率は、3.6×1010 Ω・cm以上とする。これにより、IDTの電極指同士が短絡することを防ぐことが出来る。 On the other hand, the volume resistivity of the first wafer is 3.6 × 10 10 Ω · cm or more. Thereby, it is possible to prevent the electrode fingers of the IDT from being short-circuited.

本発明に係るSAW装置は、上記いずれかの複合圧電ウエハを使用して作製したもので、上記複合圧電ウエハにより形成した圧電基板と、当該圧電基板上に設けられた交差指状電極とを備え、当該交差指状電極は、前記第一ウエハの表面に配置されるように前記圧電基板上に設ける。   A SAW device according to the present invention is manufactured using any one of the above-described composite piezoelectric wafers, and includes a piezoelectric substrate formed by the composite piezoelectric wafer and a cross-finger electrode provided on the piezoelectric substrate. The interdigitated electrodes are provided on the piezoelectric substrate so as to be disposed on the surface of the first wafer.

上記SAW装置には、例えばIDT又はこれと反射器を含むSAW共振器、SAWフィルタ、及びSAWデュプレクサ等の圧電性基板上に発生される弾性表面波を利用する各種のデバイスが含まれる。   Examples of the SAW device include various devices that use surface acoustic waves generated on a piezoelectric substrate such as an IDT or a SAW resonator including a reflector and a SAW filter, a SAW filter, and a SAW duplexer.

本発明によれば、SAW装置を形成する圧電ウエハの温度特性並びに電気特性を改善することができ、特にこれらの良好な特性とともに静電破壊等を防ぐことが出来る信頼性に優れた圧電ウエハをより簡便な方法で製造することが可能となる。   According to the present invention, it is possible to improve the temperature characteristics and electrical characteristics of a piezoelectric wafer forming a SAW device, and in particular, to provide a highly reliable piezoelectric wafer that can prevent electrostatic breakdown and the like with these good characteristics. It becomes possible to manufacture by a simpler method.

本発明の他の目的、特徴および利点は、以下の本発明の実施の形態の説明により明らかにする。   Other objects, features and advantages of the present invention will become apparent from the following description of embodiments of the present invention.

図1は、本発明の一実施形態に係る複合圧電ウエハを示すものである。同図に示すようにこの複合圧電ウエハ11は、圧電性材料からなる第一ウエハ12と、同じく圧電性材料からなる第二ウエハ13とを一体化したものであり、これら第一及び第二ウエハ12,13はこの例では共に39°YカットX伝搬LT(LiTaO3)単結晶ウエハにより形成し、第一ウエハ12には添加物として鉄(Fe)を添加してある。 FIG. 1 shows a composite piezoelectric wafer according to an embodiment of the present invention. As shown in the figure, this composite piezoelectric wafer 11 is obtained by integrating a first wafer 12 made of a piezoelectric material and a second wafer 13 made of the same piezoelectric material, and these first and second wafers. 12 and 13 are both formed of a 39 ° Y-cut X-propagation LT (LiTaO 3 ) single crystal wafer in this example, and iron (Fe) is added to the first wafer 12 as an additive.

尚、第一及び第二の各ウエハ12,13(単結晶)を製造する方法は特に限定されず、例えばLT原料を溶融してこの溶融液の中に種結晶を浸し、引き上げることにより単結晶を得るチョクラルスキー法等によることが出来る。ただし、第一ウエハ12については、上記溶融液中に添加物(Fe)を添加する。   The method for manufacturing the first and second wafers 12 and 13 (single crystal) is not particularly limited. For example, the LT raw material is melted, the seed crystal is immersed in the melt, and the single crystal is pulled up. Can be obtained by the Czochralski method. However, for the first wafer 12, an additive (Fe) is added to the melt.

また、第一ウエハ12に対しては、焦電特性の改善処理を行うとともに体積抵抗率を3.6×1010 〜1.5×1014Ω・cmの範囲内の値としておく。焦電処理並びに体積抵抗率を1×1013Ω・cm以下とすることによって温度変化に伴い蓄積された電荷により放電破壊が生じることを防ぐ一方、体積抵抗率を3.6×1010 Ω・cm以上とすることにより、第一ウエハの表面に形成されるIDT電極間等に短絡が生じることを防ぐためである。 Further, the pyroelectric characteristics are improved for the first wafer 12 and the volume resistivity is set to a value within the range of 3.6 × 10 10 to 1.5 × 10 14 Ω · cm. The pyroelectric treatment and the volume resistivity of 1 × 10 13 Ω · cm or less prevent the occurrence of discharge breakdown due to the accumulated charge accompanying the temperature change, while the volume resistivity is 3.6 × 10 10 Ω · cm. This is to prevent a short circuit from occurring between the IDT electrodes formed on the surface of the first wafer.

焦電特性を改善する具体的方法は、例えば上記LT原料の溶融液中に添加物(例えばFe、Mn、Cu及びTi等)を添加すれば良い。またLT単結晶を引き上げ、スライスした後に結晶中の酸素を除去する還元処理を行っても良い。一方、体積抵抗率を上記値に設定する(低下させる)には、例えばFe、Mn、Cu及びTiのうちの1種類以上を添加物として第一ウエハ12に添加すれば良い。   As a specific method for improving the pyroelectric characteristics, for example, an additive (for example, Fe, Mn, Cu, Ti, etc.) may be added to the molten LT raw material. Further, after the LT single crystal is pulled up and sliced, reduction treatment for removing oxygen in the crystal may be performed. On the other hand, in order to set (lower) the volume resistivity to the above value, for example, one or more of Fe, Mn, Cu and Ti may be added to the first wafer 12 as an additive.

第一ウエハ12と第二ウエハ13とは、マイナス面同士(プラス面同士でも良い)が接するように貼り合わせて一体化する。これにより両ウエハ12,13の境界面に電界短絡層15が形成される。第一ウエハ12の厚さt1は、例えば20μm程度とする。厚さは、基板表層を伝搬する弾性表面波に対し電界短絡効果を効果的に付与するため、弾性表面波の波長(λ)に依存し、数λ程度であることが要求される。第二ウエハ13の厚さt2は、特に問わないが、例えば300μm程度とする。 The first wafer 12 and the second wafer 13 are bonded and integrated so that the minus surfaces (may be plus surfaces) are in contact with each other. As a result, an electric field short-circuit layer 15 is formed at the boundary surface between the wafers 12 and 13. The thickness t 1 of the first wafer 12 is, for example, about 20 μm. The thickness is required to be about several λ depending on the wavelength (λ) of the surface acoustic wave in order to effectively give the electric field short circuit effect to the surface acoustic wave propagating on the substrate surface layer. The thickness t 2 of the second wafer 13 is not particularly limited, but is about 300 μm, for example.

第一ウエハ12と第二ウエハ13の接合は、直接接合により行うことが出来る。図2Aから図2D並びに図3は、この方法により上記複合圧電ウエハ11を製造する工程を順に示すものである。図2A及び図3に示すように、まず、第一ウエハ120(後に研削等により厚さを所定厚t1となるように加工するが、加工前の状態を示すため符号120とした)及び第二ウエハ13を処理液(酸などの薬品及び純水)1を用いて洗浄することにより、ウエハ120,13の表面の不純物を除去し、各ウエハ120,13の表面を親水化する(図3ステップS301)。 The first wafer 12 and the second wafer 13 can be joined by direct joining. 2A to 2D and FIG. 3 sequentially show the steps of manufacturing the composite piezoelectric wafer 11 by this method. As shown in FIG. 2A and FIG. 3, first, a first wafer 120 (which is later processed to have a predetermined thickness t 1 by grinding or the like, but is denoted by reference numeral 120 to indicate a state before processing) and a first wafer 120. The two wafers 13 are washed with a processing solution (chemicals such as acid and pure water) 1 to remove impurities on the surfaces of the wafers 120 and 13 and to make the surfaces of the wafers 120 and 13 hydrophilic (FIG. 3). Step S301).

次に、図2Bに示すように、第一ウエハ120と第二ウエハ13とを互いにマイナス面同士を合わせるように重ね合わせた後(図3ステップS302)、炉2に入れて加熱し(図3ステップS303)、両ウエハ120,13を接合する(図3ステップS304)。そして、図2Dに示すように、第一ウエハ120についてその厚さをt1(=例えば20μm)となるまで研削する(図3ステップS305)。 Next, as shown in FIG. 2B, the first wafer 120 and the second wafer 13 are superposed so that the minus surfaces are aligned with each other (step S302 in FIG. 3), and then heated in the furnace 2 (FIG. 3). In step S303, the wafers 120 and 13 are bonded (step S304 in FIG. 3). Then, as shown in FIG. 2D, the first wafer 120 is ground until the thickness thereof becomes t 1 (= 20 μm, for example) (step S305 in FIG. 3).

このとき、第二ウエハ13は透明ないし白色を呈しているが、第一ウエハ120は前記Feの添加によってオレンジ色の色彩を有する。したがって、両ウエハ120,13が一体化された後においても、第一ウエハ120を視覚的に容易に識別することができ、正確に所定厚t1に第一ウエハ120を研削加工することが出来る。尚、図2Dにおいて符号12aは、研削加工により削り取られる部分を示している。 At this time, the second wafer 13 is transparent or white, but the first wafer 120 has an orange color due to the addition of Fe. Therefore, even after the wafers 120 and 13 are integrated, the first wafer 120 can be easily visually identified, and the first wafer 120 can be accurately ground to the predetermined thickness t 1 . . In FIG. 2D, reference numeral 12a indicates a portion that is removed by grinding.

このように本実施形態によれば、SAW装置の形成面である第一ウエハ12の表面から均一な深さt1(例えば20μm/数λ)に電界短絡層15を容易に形成することができ、電界短絡効果によって温度特性並びにQ値等の電気特性が良好な複合圧電ウエハ11を製造することが出来る。 As described above, according to the present embodiment, the electric field short-circuit layer 15 can be easily formed at a uniform depth t 1 (for example, 20 μm / several λ) from the surface of the first wafer 12 that is the formation surface of the SAW device. The composite piezoelectric wafer 11 having excellent temperature characteristics and electrical characteristics such as the Q value can be manufactured by the electric field short-circuit effect.

第一ウエハ12と第二ウエハ13の接合は、表面活性化接合により行うことも可能である。図4Aから図4D並びに図5は、表面活性化接合により上記複合圧電ウエハ11を製造する工程を順に示すものである。   The bonding of the first wafer 12 and the second wafer 13 can also be performed by surface activated bonding. 4A to 4D and FIG. 5 sequentially show steps for manufacturing the composite piezoelectric wafer 11 by surface activated bonding.

この方法では、まず図4Aに示すように汚染物Sによって覆われた第一ウエハ120及び第二ウエハ13の表面を、図4B並びに図5に示すように真空雰囲気5の中でAr等の不活性ガス6を用いてスパッタエッチングすることによりクリーニングし表面を活性化する(図5ステップS501)。   In this method, first, the surfaces of the first wafer 120 and the second wafer 13 covered with the contaminant S as shown in FIG. 4A are formed on the surface of the first wafer 120 and the second wafer 13 in a vacuum atmosphere 5 as shown in FIG. 4B and FIG. The surface is cleaned and activated by sputter etching using the active gas 6 (step S501 in FIG. 5).

次に、図4Cに示すように表面が活性化された第一ウエハ120と第二ウエハ13とを、図4Dに示すように真空雰囲気中で重ね合わせ(図5ステップS502)、両ウエハ120,13を接合する(同図ステップS503)。尚、このとき、前記直接接合による場合と同様に、両ウエハの同極面同士を重ね合わせる。そして、前記直接接合による方法と同様に第一ウエハ120を、厚さt1となるまで研削加工する。 Next, the first wafer 120 and the second wafer 13 whose surfaces are activated as shown in FIG. 4C are superposed in a vacuum atmosphere as shown in FIG. 4D (step S502 in FIG. 5). 13 are joined (step S503 in the figure). At this time, the same polar surfaces of both wafers are overlapped as in the case of the direct bonding. Then, the first wafer 120 is ground until the thickness t 1 is reached in the same manner as in the direct bonding method.

このような表面活性化接合によれば、接合の妨げになるウエハの表面層を除去し、真空雰囲気中で接合を行うことで、表面の原子の結合手同士を直接結合させ常温または100℃以下程度の加熱を加えることにより強固な接合を形成することが出来る。   According to such surface activated bonding, the surface layer of the wafer that hinders bonding is removed, and bonding is performed in a vacuum atmosphere, whereby the bonds of the surface atoms are directly bonded to each other at room temperature or 100 ° C. or lower. A strong bond can be formed by applying a certain amount of heating.

図6は、上記実施形態に基づいて作製した複合圧電ウエハにおける電界短絡層の深さ(第一ウエハの厚さt1)とSHタイプ弾性表面波の遅延時間温度係数TCDとの関係を示す線図である。同図において、菱形の各点は実験値を、実線は数値計算により求められた理論値をそれぞれ示しており、電界短絡層の深さについては、弾性表面波の波長λにより規格化した値t1/λを用いている。 FIG. 6 is a line showing the relationship between the depth of the electric field short-circuit layer (thickness t 1 of the first wafer) and the delay time temperature coefficient TCD of the SH type surface acoustic wave in the composite piezoelectric wafer manufactured based on the above embodiment. FIG. In the figure, each point of the rhombus indicates an experimental value, and a solid line indicates a theoretical value obtained by numerical calculation. The depth of the electric field short-circuit layer is a value t normalized by the wavelength λ of the surface acoustic wave. 1 / λ is used.

この図から分かるように、電界短絡層の深さ(第一ウエハの厚さ)t1/λを0.1〜1.5とすることが温度特性を改善する点で好ましい。 As can be seen from this figure, it is preferable that the depth (first wafer thickness) t 1 / λ of the electric field short-circuit layer is 0.1 to 1.5 in terms of improving temperature characteristics.

さらに図7は、前記実施形態に係る複合圧電ウエハ11を使用して構成したSAW素子の一例を示す斜視図である。同図に示すようにこのSAW素子21は、圧電基板31の表面にIDT(交差指状電極)22や電極パッド23、導体線路(図示せず)を含む導体パターンを形成したもので、圧電基板は前記複合圧電ウエハにより形成する。また、この圧電基板31において、IDT22等が形成される表面層32が前記第一ウエハ12によって形成されており、第二ウエハ13によって形成される下面層33との境界面に前記電界短絡層15を備える。   FIG. 7 is a perspective view showing an example of a SAW element configured using the composite piezoelectric wafer 11 according to the embodiment. As shown in the figure, this SAW element 21 is formed by forming a conductor pattern including an IDT (intersecting finger electrode) 22, an electrode pad 23, and a conductor line (not shown) on the surface of a piezoelectric substrate 31. Are formed by the composite piezoelectric wafer. In the piezoelectric substrate 31, the surface layer 32 on which the IDT 22 and the like are formed is formed by the first wafer 12, and the electric field short-circuit layer 15 is formed on the boundary surface with the lower surface layer 33 formed by the second wafer 13. Is provided.

さらに図8は、図7に示したSAW素子21を用いて形成したSAWフィルタを示すもので、このフィルタ41は、前記SAW素子21をベース基板42上にバンプ44を介してフリップチップ実装し、蓋体43により気密封止したものである。SAW素子21は電界短絡層15を備えており、これにより当該フィルタ41は、温度特性並びに電気特性に優れたものとなっている。   Further, FIG. 8 shows a SAW filter formed using the SAW element 21 shown in FIG. 7, and this filter 41 is formed by flip-chip mounting the SAW element 21 on a base substrate 42 via bumps 44. The lid 43 is hermetically sealed. The SAW element 21 includes the electric field short-circuit layer 15, whereby the filter 41 has excellent temperature characteristics and electrical characteristics.

以上、本発明の実施の形態について説明したが、本発明はこれらに限定されるものではなく、特許請求の範囲に記載の範囲内で種々の変更を行うことができることは当業者に明らかである。   As mentioned above, although embodiment of this invention was described, this invention is not limited to these, It is clear to those skilled in the art that a various change can be made within the range as described in a claim. .

本発明の一実施形態に係る複合圧電ウエハを示す側面図である。It is a side view which shows the composite piezoelectric wafer which concerns on one Embodiment of this invention. 前記実施形態に係る複合圧電ウエハの作製方法(直接接合)における一工程を示す概念図である。It is a conceptual diagram which shows one process in the manufacturing method (direct bonding) of the composite piezoelectric wafer which concerns on the said embodiment. 前記図2Aの工程に続く一工程を示す概念図である。It is a conceptual diagram which shows one process following the process of the said FIG. 2A. 前記図2Bの工程に続く一工程を示す概念図である。It is a conceptual diagram which shows one process following the process of the said FIG. 2B. 前記図2Cの工程に続く一工程を示す概念図である。It is a conceptual diagram which shows one process following the process of the said FIG. 2C. 前記実施形態に係る複合圧電ウエハの作製工程(直接接合)を示すフローチャートである。It is a flowchart which shows the manufacturing process (direct bonding) of the composite piezoelectric wafer which concerns on the said embodiment. 前記実施形態に係る複合圧電ウエハの作製方法(表面活性化接合)における一工程を示す概念図である。It is a conceptual diagram which shows one process in the manufacturing method (surface activation joining) of the composite piezoelectric wafer which concerns on the said embodiment. 前記図4Aの工程に続く一工程を示す概念図である。It is a conceptual diagram which shows one process following the process of the said FIG. 4A. 前記図4Bの工程に続く一工程を示す概念図である。It is a conceptual diagram which shows one process following the process of the said FIG. 4B. 前記図4Cの工程に続く一工程を示す概念図である。It is a conceptual diagram which shows one process following the process of the said FIG. 4C. 前記実施形態に係る複合圧電ウエハの別の作製工程(表面活性化接合)を示すフローチャートである。It is a flowchart which shows another production process (surface activation joining) of the composite piezoelectric wafer which concerns on the said embodiment. 前記実施形態に係る複合圧電ウエハにおける電界短絡層の深さ(第一ウエハの厚さ)とSH弾性表面波の遅延時間温度係数TCDとの関係を示す線図である。It is a diagram which shows the relationship between the depth of the electric field short circuit layer (thickness of a 1st wafer) in the composite piezoelectric wafer which concerns on the said embodiment, and the delay time temperature coefficient TCD of SH surface acoustic wave. 本発明に係る複合圧電ウエハを使用して作製したSAW素子の一例を示す斜視図である。It is a perspective view which shows an example of the SAW element produced using the composite piezoelectric wafer which concerns on this invention. 前記図7に示すSAW素子を使用して構成したSAWフィルタの一例を示す断面図である。It is sectional drawing which shows an example of the SAW filter comprised using the SAW element shown in the said FIG.

符号の説明Explanation of symbols

11 複合圧電ウエハ
12,120 第一ウエハ
13 第二ウエハ
15 電界短絡層
21 SAW素子
22 IDT(交差指状電極)
23 電極パッド
31 圧電基板
41 SAWフィルタ
DESCRIPTION OF SYMBOLS 11 Composite piezoelectric wafer 12,120 1st wafer 13 2nd wafer 15 Electric field short circuit layer 21 SAW element 22 IDT (interstitial finger electrode)
23 Electrode pad 31 Piezoelectric substrate 41 SAW filter

Claims (8)

圧電性材料からなる第一の圧電ウエハと、
圧電性材料からなる第二の圧電ウエハと、
を備え、
前記第一の圧電ウエハと前記第二の圧電ウエハとを、同極面同士が接合されるように貼り合せて一体化した
ことを特徴とする複合圧電ウエハ。
A first piezoelectric wafer made of a piezoelectric material;
A second piezoelectric wafer made of a piezoelectric material;
With
A composite piezoelectric wafer, wherein the first piezoelectric wafer and the second piezoelectric wafer are bonded and integrated so that the same polar surfaces are bonded to each other.
前記第一の圧電ウエハは、厚さが0.1λ〜1.5λである
ことを特徴とする請求項1に記載の複合圧電ウエハ。
The composite piezoelectric wafer according to claim 1, wherein the first piezoelectric wafer has a thickness of 0.1λ to 1.5λ.
前記第一の圧電ウエハと前記第二の圧電ウエハとを直接接合により一体化した
ことを特徴とする請求項1または2に記載の複合圧電ウエハ。
The composite piezoelectric wafer according to claim 1 or 2, wherein the first piezoelectric wafer and the second piezoelectric wafer are integrated by direct bonding.
前記第一の圧電ウエハと前記第二の圧電ウエハとを表面活性化接合により一体化した
ことを特徴とする請求項1または2に記載の複合圧電ウエハ。
The composite piezoelectric wafer according to claim 1 or 2, wherein the first piezoelectric wafer and the second piezoelectric wafer are integrated by surface activation bonding.
前記第一の圧電ウエハが、焦電特性の改善処理を行った圧電ウエハである
ことを特徴とする請求項1から4のいずれか一項に記載の複合圧電ウエハ。
5. The composite piezoelectric wafer according to claim 1, wherein the first piezoelectric wafer is a piezoelectric wafer that has undergone pyroelectric property improvement processing.
前記第一の圧電ウエハに添加物を添加しウエハを着色した
ことを特徴とする請求項1から5のいずれか一項に記載の複合圧電ウエハ。
The composite piezoelectric wafer according to claim 1, wherein an additive is added to the first piezoelectric wafer to color the wafer.
前記第一の圧電ウエハは、体積抵抗率が3.6×1010 Ω・cm以上でかつ1.5×1014Ω・cm以下である
ことを特徴とする請求項1から6のいずれか一項に記載の複合圧電ウエハ。
The first piezoelectric wafer has a volume resistivity of 3.6 × 10 10 Ω · cm or more and 1.5 × 10 14 Ω · cm or less. The composite piezoelectric wafer according to Item.
請求項1から7のいずれか一項に記載の複合圧電ウエハにより形成した圧電基板と、
当該圧電基板上に設けられた交差指状電極と、
を備えた弾性表面波装置であって、
前記交差指状電極は、前記第一の圧電ウエハの表面に配置されるように前記圧電基板上に設けられている
ことを特徴とする弾性表面波装置。
A piezoelectric substrate formed by the composite piezoelectric wafer according to any one of claims 1 to 7,
An interdigitated electrode provided on the piezoelectric substrate;
A surface acoustic wave device comprising:
The surface acoustic wave device is characterized in that the interdigitated electrodes are provided on the piezoelectric substrate so as to be disposed on a surface of the first piezoelectric wafer.
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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102256426A (en) * 2011-05-05 2011-11-23 大华金辉(北京)科技有限公司 Antistatic plate and device, and application of device
JP2013046107A (en) * 2011-08-22 2013-03-04 Taiyo Yuden Co Ltd Elastic wave device and module
WO2015012005A1 (en) * 2013-07-25 2015-01-29 日本碍子株式会社 Composite board and method for making same
WO2020175234A1 (en) * 2019-02-27 2020-09-03 株式会社村田製作所 Elastic surface wave device
WO2021125013A1 (en) * 2019-12-19 2021-06-24 株式会社村田製作所 Elastic wave device
JP2021185718A (en) * 2020-03-24 2021-12-09 デクセリアルズ株式会社 Bulk wave resonator and bandpass filter
JP2022512700A (en) * 2018-10-16 2022-02-07 国立大学法人東北大学 Elastic wave device

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07206600A (en) * 1994-01-24 1995-08-08 Matsushita Electric Ind Co Ltd Laminated ferroelectric substance and method for joining the same
JPH1155070A (en) * 1997-06-02 1999-02-26 Matsushita Electric Ind Co Ltd Surface acoustic wave element and its producing method
JPH11163668A (en) * 1997-11-28 1999-06-18 Matsushita Electric Ind Co Ltd Laminated piezo-electric single crystal substrate and piezo-electric device using it
JP2004254114A (en) * 2003-02-20 2004-09-09 Yamajiyu Ceramics:Kk Single crystal for piezoelectric substrate, surface acoustic wave filter using the same and its manufacturing method
JP2004343359A (en) * 2003-05-14 2004-12-02 Fujitsu Media Device Kk Method of manufacturing surface acoustic wave element
JP2004356951A (en) * 2003-05-29 2004-12-16 Shin Etsu Chem Co Ltd Wafer made of lithium tantalate crystal
JP2004364041A (en) * 2003-06-05 2004-12-24 Fujitsu Media Device Kk Surface acoustic wave device and manufacturing method thereof

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07206600A (en) * 1994-01-24 1995-08-08 Matsushita Electric Ind Co Ltd Laminated ferroelectric substance and method for joining the same
JPH1155070A (en) * 1997-06-02 1999-02-26 Matsushita Electric Ind Co Ltd Surface acoustic wave element and its producing method
JPH11163668A (en) * 1997-11-28 1999-06-18 Matsushita Electric Ind Co Ltd Laminated piezo-electric single crystal substrate and piezo-electric device using it
JP2004254114A (en) * 2003-02-20 2004-09-09 Yamajiyu Ceramics:Kk Single crystal for piezoelectric substrate, surface acoustic wave filter using the same and its manufacturing method
JP2004343359A (en) * 2003-05-14 2004-12-02 Fujitsu Media Device Kk Method of manufacturing surface acoustic wave element
JP2004356951A (en) * 2003-05-29 2004-12-16 Shin Etsu Chem Co Ltd Wafer made of lithium tantalate crystal
JP2004364041A (en) * 2003-06-05 2004-12-24 Fujitsu Media Device Kk Surface acoustic wave device and manufacturing method thereof

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102256426A (en) * 2011-05-05 2011-11-23 大华金辉(北京)科技有限公司 Antistatic plate and device, and application of device
JP2013046107A (en) * 2011-08-22 2013-03-04 Taiyo Yuden Co Ltd Elastic wave device and module
US10211389B2 (en) 2013-07-25 2019-02-19 Ngk Insulators, Ltd. Composite substrate
CN105409119A (en) * 2013-07-25 2016-03-16 日本碍子株式会社 Composite board and method for making same
KR20160037898A (en) * 2013-07-25 2016-04-06 엔지케이 인슐레이터 엘티디 Composite board and method for making same
JPWO2015012005A1 (en) * 2013-07-25 2017-03-02 日本碍子株式会社 Composite substrate and manufacturing method thereof
US11239405B2 (en) 2013-07-25 2022-02-01 Ngk Insulators, Ltd. Method of producing a composite substrate
KR102256902B1 (en) * 2013-07-25 2021-05-28 엔지케이 인슐레이터 엘티디 Composite board and method for making same
WO2015012005A1 (en) * 2013-07-25 2015-01-29 日本碍子株式会社 Composite board and method for making same
US12081188B2 (en) 2018-10-16 2024-09-03 Skyworks Solutions, Inc. Acoustic wave devices
US12074581B2 (en) 2018-10-16 2024-08-27 Skyworks Solutions, Inc. Methods and assemblies related to fabrication of acoustic wave devices
JP2022512700A (en) * 2018-10-16 2022-02-07 国立大学法人東北大学 Elastic wave device
WO2020175234A1 (en) * 2019-02-27 2020-09-03 株式会社村田製作所 Elastic surface wave device
JPWO2021125013A1 (en) * 2019-12-19 2021-06-24
JP7464062B2 (en) 2019-12-19 2024-04-09 株式会社村田製作所 Elastic Wave Device
WO2021125013A1 (en) * 2019-12-19 2021-06-24 株式会社村田製作所 Elastic wave device
JP2021192549A (en) * 2020-03-24 2021-12-16 デクセリアルズ株式会社 Bulk wave resonator and bandpass filter
JP7165248B2 (en) 2020-03-24 2022-11-02 デクセリアルズ株式会社 Bulk wave resonators and bandpass filters
JP7165247B2 (en) 2020-03-24 2022-11-02 デクセリアルズ株式会社 Bulk wave resonators and bandpass filters
JP2021185718A (en) * 2020-03-24 2021-12-09 デクセリアルズ株式会社 Bulk wave resonator and bandpass filter

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