JP2006243224A - Signal transmission circuit, electro-optical device, and electronic apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a signal transmission circuit which is capable of accurate and easy cascade transmission of signals arranged in a prescribed sequence through a single-layer transmission line without causing delay. <P>SOLUTION: The signal transmission circuit has driving circuits Dr1... for inputting gray scale components D0 to D8 arranged in the prescribed sequence as they are and driving circuits Dr2 ... for inputting them in a bit sequence of the inverted sequence, and odd-numbered driving circuits Dr1 ... and even-numbered driving circuits Dr2 ... are alternately arranged so that lengths of wires L0 to L8 for cascade transmission connecting the driving circuits Dr1, Dr2 ... are approximately equal among gray scale components D0 to D8, and signals which are assigned to driving circuits Dr1, Dr2 ... so that they are assigned to driving circuits Dr1 ... in the bit sequence as they are and are assigned to driving circuits Dr2 ... rearranged into the original sequence, are outputted. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

The present invention relates to a signal transmission circuit, an electro-optical device, and an electronic apparatus, and is particularly useful when applied to cascade connection of circuit blocks divided into a plurality of blocks through a single-layer transmission line.

As an electro-optical device replacing a liquid crystal display device, an organic light-emitting diode element (hereinafter referred to as OLED)
This is called an element. ) Is attracting attention. OLED (Organic Light Emitting D
The iode element operates electrically like a diode, and optically emits light when forward biased, and the emission luminance increases as the forward bias current increases.

An electro-optical device in which OLED elements are arranged in a matrix includes a plurality of scanning lines and a plurality of data lines, and pixel circuits are provided corresponding to intersections of the scanning lines and the data lines. That is, a pixel region which is a display portion is formed by pixel circuits arranged in a matrix. Here, the pixel circuit has a function of storing a value of a current supplied from the data line and supplying a driving current corresponding to the stored current value to the OLED element.

In such an electro-optical device, there is provided a data line driving circuit that supplies gradation signals, which are current signals corresponding to gradations to be displayed, to a plurality of data lines. Here, when the pixel area of the electro-optical device is increased in size, the data line driving circuit is usually divided into a plurality of circuit blocks and gradation data (digital data for generating gradation signals; the same applies hereinafter). .) May be provided in each circuit block, and a cascade transmission method may be employed in which gradation data is sequentially transmitted through the circuit block.

FIG. 14 shows a schematic diagram of an electro-optical device according to the prior art employing such a cascade transmission method. As shown in the figure, in the electro-optical device, an electro-optical substrate 1 which is a glass substrate.
On the top, an image area A and a data line driving circuit 200 are formed.

The image area A is an area in which electro-optic elements serving as pixels are arranged in a matrix and function as a display unit. The data line driving circuit 200 includes a driving circuit Dr that is a plurality of circuit blocks.
1 to DrN. The drive circuits Dr1 to DrN are connected to each other, and an X transfer start pulse DX, an X clock signal XCLK, and gradation data D sent from the control circuit 300 are connected.
Are configured to perform cascade transmission.

The gradation data D is digital data corresponding to the light emission luminance of each pixel, and the gradation components D0 to D8 in bit units are arranged in a predetermined arrangement so as to include the gradation representing the luminance of each pixel as information. For example, it is a 9-bit signal. As shown in FIG. 16, the gradation components D0 to D8 are transmitted in synchronization with the X transfer start pulse DX and the X clock signal XCLK. At this time, in the case of the cascade transmission system, the X transfer start pulse DX is supplied only to the drive circuit Dr1, and the drive circuits Dr2 to DrN generally receive the X transfer start pulse from the adjacent drive circuit Dr. is there. In FIG. 16, for example, the X transfer start pulse supplied from the drive circuit Dr1 to the drive circuit Dr2 is expressed as DX1to2, and the X transfer start pulse supplied from the drive circuit Dr2 to the drive circuit Dr3 is expressed as DX2to3. . The drive circuit Dr that has received the X transfer start pulse recognizes the gradation data D given at that timing as its own, and takes it in.

Further, the X clock signal XCLK and the gradation data D are supplied from the control circuit 300, and are sequentially transmitted from the preceding drive circuit Dr to the subsequent drive circuit Dr via the transmission path 600.

Here, when the electro-optic substrate 1 is formed of a glass substrate, the wiring of the glass substrate yields,
Single layer wiring is desirable in consideration of cost and the like. Assuming a single-layer wiring, the wirings L0 to L8 of the transmission line 600 in the case of cascade transmission of each gradation data D are, for example, as shown in FIG. 15, the wiring L0 that transmits the gradation component D0 is always short, Variations occur in the transmission path length for each of the gradation components D0 to D8, for example, the wiring L8 for transmitting the tone component D8 is always long.

As a result, transmission delay times for the respective grayscale components D0 to D8 differ due to differences in electrical characteristics such as parasitic capacitances and resistances of the wirings L0 to L8. That is, signal skew occurs. When signal skew occurs in the gradation components D0 to D8 and the like, the capture timings of the gradation components D0 to D8 are not matched, causing a malfunction.

As a technique for solving the problem caused by the variation in the transmission delay of the gradation components D0 to D8, there is a technique disclosed in Patent Document 1. This is to output a signal corresponding to gradation data once synchronized within the drive circuit Dr in order to prevent accumulation of delay amount differences caused by wiring resistance during cascade transmission. It is.

According to such a conventional technique, the delay amounts of the respective gradation components D0 to D8 can surely be made uniform, but it is necessary to provide a synchronization circuit individually at the output stage of each drive circuit Dr. Such a synchronization circuit is usually constituted by a flip-flop circuit, but this type of flip-flop circuit occupies a relatively large area, and becomes an obstacle to downsizing of the entire apparatus as the gradation component increases. There is also a problem that the structure becomes complicated.

JP 2001-174785 A

In view of the above-described prior art, the present invention provides a signal transmission circuit capable of accurately and easily performing cascade transmission of signals arranged in a predetermined bit array so as to include unique information without causing a delay in a single-layer transmission line. It is an object of the present invention to provide an electro-optical device having the same, an electronic apparatus having the same, a signal transmission method, and a signal transmission method for the electro-optical device.

The signal transmission circuit according to the first aspect of the present invention for solving the above-described problem is
Controlled by signals arranged in a predetermined arrangement, comprising a circuit group in which a plurality of circuit blocks are connected by a transmission line,
Each of the plurality of circuit blocks has a function of outputting a predetermined signal included in the signal to another circuit block, and the signal is transmitted to the entire circuit group by the function. In
The plurality of circuit blocks have a rearrangement control unit that changes the signal arrangement and takes in the signal when the predetermined signal is input,
The plurality of circuit blocks include a first circuit block that captures the predetermined signal as it is, and a second circuit block that captures the predetermined signal by changing the array,
For the signals transmitted to the circuit group, the first wiring is set so that the wiring length of each signal is approximately the same.
Thru | or 2nd circuit block is arrange | positioned, It is characterized by the above-mentioned.

A signal transmission circuit according to a second aspect of the present invention is the signal transmission circuit according to the first aspect,
The plurality of circuit blocks have a function of reversing the arrangement of the predetermined signals and fetching them inside.

A signal transmission circuit according to a third aspect of the present invention is the signal transmission circuit according to the first or second aspect,
The first circuit block and the second circuit block are arranged adjacent to each other.

A signal transmission circuit according to a fourth aspect of the present invention is the signal transmission circuit according to the first or second aspect,
The first circuit block and the second circuit block are alternately arranged in a predetermined number unit.

A signal transmission circuit according to a fifth aspect of the present invention is the signal transmission circuit according to any one of the first to fourth aspects,
The first circuit block and the second circuit block are mounted on a glass substrate, and the transmission line is formed on the glass substrate as a single-layer wiring.

A signal transmission circuit according to a sixth aspect of the present invention is the signal transmission circuit according to any one of the first to fourth aspects,
The transmission path is formed of a single layer, and the first circuit block and the second circuit block are formed on a printed board.

A signal transmission circuit according to a seventh aspect of the present invention is the signal transmission circuit according to any one of the first to sixth aspects,
Each circuit block has a wiring for outputting the signals in the same arrangement and a wiring for rearranging the arrangement and outputting in the reverse arrangement, and any one of the wirings is selected by the switching means, and the first circuit It is configured to be a block or a second circuit block.

In the signal transmission circuit according to the eighth aspect of the present invention, any one of the signal transmission circuits according to the first to seventh aspects has a function of generating a drive signal from the signal, and a plurality of signals are transmitted by the drive signal. It functions as a drive circuit for driving the element.

A signal transmission circuit according to a ninth aspect of the present invention includes:
Controlled by signals arranged in a predetermined arrangement, comprising a circuit group in which a plurality of circuit blocks are connected by a transmission line,
Each of the plurality of circuit blocks has a function of outputting a first signal included in the signal to another circuit block, and the signal transmission is configured such that the signal is supplied to the entire circuit group by the function. In the circuit
The plurality of circuit blocks include a rearrangement control unit that changes a signal arrangement and takes in the signal when a second signal included in the signal is input,
The plurality of circuit blocks include a first circuit block that captures the second signal as it is, and a second circuit block that captures the second signal by changing the array,
For the second signal included in the circuit group, first to second circuit blocks are arranged so that the wiring length of each signal is substantially the same.

A signal transmission circuit according to a tenth aspect of the present invention is the signal transmission circuit according to the ninth aspect,
The first signal and the second signal are different signals.

A signal transmission circuit according to an eleventh aspect of the present invention is the signal transmission circuit according to the ninth aspect,
The first signal and the second signal are the same signal.

An electro-optical device according to a twelfth aspect of the present invention is
In an electro-optical device configured to display a predetermined image by arranging light emitting elements that control light emission intensity according to gradation signals in a matrix form,
The signal transmission circuit according to any one of the first to eleventh aspects is incorporated as a drive circuit that generates the gradation signal and drives each light emitting element.

An electronic apparatus according to a thirteenth aspect of the present invention is
The electro-optical device according to the twelfth aspect is provided as display means for displaying an image.

A signal transmission method according to a fourteenth aspect of the present invention includes:
Controlled by signals arranged in a predetermined arrangement, a signal transmission method in a circuit group in which a plurality of circuit blocks are connected by a transmission path,
Each of the plurality of circuit blocks has a function of outputting a predetermined signal included in the signal to another circuit block, and the signal is supplied to the entire circuit group by the function,
When the predetermined signal is input, the plurality of circuit blocks are controlled so that the signal arrangement is changed and incorporated therein,
The plurality of circuit blocks are set as a first circuit block that captures the predetermined signal as it is, and a second circuit block that captures the predetermined signal by changing the array,
For the signals transmitted to the circuit group, the first wiring is set so that the wiring length of each signal is approximately the same.
Thru | or 2nd circuit block is arrange | positioned, It is characterized by the above-mentioned.

The electro-optical device signal transmission method according to the fifteenth aspect of the present invention includes:
A signal transmission method for an electro-optical device configured to display a predetermined image by arranging light emitting elements that control light emission intensity by gradation signals in a matrix form,
The signal transmission method described in the fourteenth aspect is used as a driving method for driving each light emitting element by the gradation signal.

A signal transmission method according to a sixteenth aspect of the present invention includes:
Controlled by signals arranged in a predetermined arrangement, a signal transmission method in a circuit group in which a plurality of circuit blocks are connected by a transmission path,
Each of the plurality of circuit blocks has a function of outputting a first signal included in the signal to another circuit block, and the signal is supplied to the entire circuit group by the function.
When the second signal included in the signal is input, the plurality of circuit blocks are controlled so that the signal arrangement is changed and captured therein,
The plurality of circuit blocks are set as a first circuit block that captures the second signal in an array as it is, and a second circuit block that captures the array of the second signal by changing the array,
For the second signal included in the circuit group, first to second circuit blocks are arranged so that the wiring length of each signal is substantially the same.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The description of the present embodiment is an exemplification, and the configuration of the present invention is not limited to the following description.

<First Embodiment>
FIG. 1 is a block diagram showing a schematic configuration of an electro-optical device I according to the first embodiment of the present invention. As shown in the figure, the electro-optical device I includes an image region A, a scanning line driving circuit 100, a data line driving circuit 200, a control circuit 300, and a power supply circuit 500. Among these, the image area A, the scanning line driving circuit 100 and the data line driving circuit 200 are formed on the electro-optical substrate 1 which is a glass substrate. In the image area A, m scanning lines 101 and m light emission control lines 102 are formed in parallel with the X direction, and n data lines 103 are formed in parallel with the Y direction orthogonal to the X direction. Has been. A pixel circuit 400 including an OLED element is provided corresponding to each intersection of the scanning line 101 and the data line 103. Each pixel circuit 400 is supplied with a power supply voltage Vdd via a power supply line L.

The scanning line driving circuit 100 scans signals Y1 and Y for sequentially selecting a plurality of scanning lines 101.
2, Y3,..., Ym and light emission control signals Vg1, Vg2, Vg3,.
Is generated. The scanning signals Y1 to Ym and the light emission control signals Vg1 to Vgm are Y transfer start pulses D
Y is generated by sequentially transferring Y in synchronization with the Y clock signal YCLK. The light emission control signals Vg1, Vg2, Vg3,..., Vgm are supplied to the pixel circuits 40 via the light emission control lines 102, respectively.
0 is supplied to each.

FIG. 2 shows an example of a timing chart of the scanning signals Y1 to Ym and the light emission control signals Vg1 to Vgm. The scanning signal Y1 is a pulse having a width corresponding to one horizontal scanning period (1H) from the first timing of one vertical scanning period (1F), and is supplied to the scanning line 101 in the first row. Thereafter, this pulse is sequentially shifted so that the scanning signal Y is applied to each of the scanning lines 101 in the 2, 3,.
2, Y3,..., Ym. Generally, when the scanning signal Yi supplied to the i-th (i is an integer satisfying 1 ≦ i ≦ m) row scanning line 101 becomes H level, this indicates that the scanning line 101 is selected. Further, as the light emission control signals Vg1, Vg2, Vg3,..., Vgm,
For example, a signal obtained by inverting the logic level of the scanning signals Y1, Y2, Y3,.

The data line driving circuit 200 selects the scanning line 1 selected based on the output gradation data Dout.
A gradation signal generated based on the gradation components D0 to D8 is supplied to each of the pixel circuits 400 positioned at 01. In this example, the gradation components D0 to D8 are reproduced as current signals X1, X2, X3, X4,. The gradation components D0 to D8 are
It is a component of the output gradation data Dout, which is the number of digital data corresponding to each pixel, and the signals in bit units are arranged in a predetermined arrangement so as to include the gradation representing the luminance of each pixel as information, for example, It is a 9-bit signal.

The control circuit 300 generates various control signals such as a Y clock signal YCLK, an X clock signal XCLK, an X transfer start pulse DX, and a Y transfer start pulse DY, and sends them to the scanning line drive circuit 100 and the data line drive circuit 200. Output. In addition, the control circuit 300 performs image processing such as gamma correction on the input gradation data Din supplied from the outside to output gradation data Dout.
Is generated. The output gradation data Dout is, for example, 9-bit gradation components D0 to D8 arranged in a predetermined arrangement.

Next, the pixel circuit 400 will be described. FIG. 3 shows a circuit diagram of the pixel circuit 400. A pixel circuit 400 shown in the figure corresponds to the i-th row and is supplied with a power supply voltage Vdd. The pixel circuit 400 includes four TFTs 401 to 404, a capacitor element 410, and an OLED element 420. In the manufacturing process of the TFTs 401 to 404, a polysilicon layer is formed on the glass substrate using laser annealing shot. Also, the OLED element 420
Has a light emitting layer sandwiched between an anode and a cathode. The OLED element 420 emits light with a luminance corresponding to the forward current. The light-emitting layer has an organic EL (Electrolumines) according to the emission color.
cence) material is used. In the manufacturing process of the light emitting layer, the organic EL material is ejected as droplets from an inkjet head and dried.

The TFT 401 that is a driving transistor is a p-channel type, and the TFTs 402 to 404 that are switching transistors are an n-channel type. The source electrode of the TFT 401 is connected to the power supply line L, while its drain electrode is connected to the drain electrode of the TFT 403, the drain electrode of the TFT 404, and the source electrode of the TFT 402.

One end of the capacitive element 410 is connected to the source electrode of the TFT 401, while the other end is connected to the T
The gate electrode of FT 401 and the drain electrode of TFT 402 are connected to each other. TFT
A gate electrode 403 is connected to the scanning line 101, and a source electrode thereof is connected to the data line 103. The gate electrode of the TFT 402 is connected to the scanning line 101. On the other hand, TFT
The gate electrode 404 is connected to the light emission control line 102, and its source electrode is the OLED element 42.
Connected to zero anode. A light emission control signal Vgi is supplied to the gate electrode of the TFT 404 via the light emission control line 102. Note that the cathode of the OLED element 420 is a common electrode for all of the pixel circuits 400, and has a low (reference) potential in the power supply.

In such a configuration, when the scanning signal Yi becomes H level, the n-channel TFT 40
Since 2 is turned on, the TFT 401 functions as a diode in which the gate electrode and the drain electrode are connected to each other. When the scanning signal Yi becomes H level, the n-channel TFT
Similarly to the TFT 402, 403 is also turned on. As a result, the current Idata of the data line driving circuit 200 flows through the path of the power supply line L → TFT 401 → TFT 403 → data line 103, and at that time, the charge corresponding to the potential of the gate electrode of the TFT 401 is transferred to the capacitive element 4.
10 is accumulated.

When the scanning signal Yi becomes L level, both the TFTs 403 and 402 are turned off. At this time, since the input impedance of the gate electrode of the TFT 401 is extremely high, the charge accumulation state in the capacitor 410 does not change. The voltage between the gate and source of the TFT 401 is maintained at the voltage when the current Idata flows. Further, when the scanning signal Yi becomes L level, the light emission control signal Vgi becomes H level. For this reason, the TFT 404 is turned on, and the TFT 4
An injection current Ioled corresponding to the gate voltage flows between 01 source and drain. Specifically, this current flows through a path of the power supply line L → TFT 401 → TFT 404 → OLED element 420.

Here, the injection current Ioled flowing through the OLED element 420 is determined by the voltage between the gate and the source of the TFT 401, and this voltage is determined when the current Idata flows through the data line 103 by the H level scanning signal Yi. Is the voltage held by. Therefore, when the light emission control signal Vgi becomes H level, the injection current Iol flowing through the OLED element 420
ed substantially matches the current Idata that flows immediately before. As described above, the pixel circuit 400 has the current Idata.
Since the emission luminance is defined by, the circuit is a current program system.

This embodiment is characterized in the configuration of the data line driving circuit 200. FIG. 4 shows the internal configuration of the data line driving circuit 200. As shown in the figure, the data line driving circuit 200 according to this embodiment includes a plurality of circuits in which gradation components D0 to D8 arranged in a predetermined bit arrangement so as to include unique information corresponding to each gradation signal are cascade-connected. The drive circuit Dr1 that is a block
, Dr2... Is transmitted to the drive circuit Dr at the subsequent stage.

The drive circuit Dr in FIG. 4 includes a current generation circuit as shown in FIG. The current generation circuit is a circuit that generates a current signal Xj (j is an integer satisfying 1 ≦ j ≦ n) to be supplied to the data line 103. The current generation circuit generates a current signal X in response to the gradation instruction signals D0I to D8I.
Set the value of j. Here, the gradation instruction signals D0I to D8I correspond to the gradation components D0 to D8 supplied from the outside to the drive circuit Dr, and are output from the rearrangement control unit described later.

Now, the wirings L0 to L8 in FIG. 4 are formed as single-layer wirings on the electro-optical substrate 1 which is a glass substrate. Therefore, the patterns of the wirings L0 to L8 themselves are as shown in FIG.
This is the same as that according to the prior art shown in FIG. However, the drive circuits Dr1, Dr2,... Can be easily multi-layered by forming them with silicon ICs, for example. Therefore, the wiring lengths of the wirings L0 to L8 on the glass substrate are made substantially uniform in the entire data line driving circuit 200 by replacing the wirings inside the driving circuits Dr1, Dr2,. However, at this time, when the wirings L0 to L8 are associated with the gradation components D0 to D8, the positions of the wirings L0 to L8 that transmit the gradation components D0 to D8 are even-numbered drive circuits D.
Reverse at r2. That is, the gradation components D0 to D8 are inputted to the odd-numbered drive circuits Dr1... In a regular arrangement, but the gradation components D0 to D8 are arranged in the opposite arrangement in the even-numbered drive circuits Dr2. Entered. Therefore, the odd-numbered drive circuits Dr1... Output the gradation components D0 to D8 as they are, but the even-numbered drive circuits Dr2.
In *, it is necessary to perform rearrangement so that the arrangement of the respective gradation components D0 to D8 returns to the original, and to output them. In order to solve such a problem, each of the drive circuits Dr1, Dr2,... Has rearrangement control units C1, C2,.

FIG. 6 shows a circuit example of the rearrangement control units C1, C2,. Rearrangement control unit C1, C2,
.. Has a wiring that outputs the grayscale components D0 to D8 in the same bit arrangement and a wiring that rearranges the arrangement and outputs the reverse bit arrangement, and the switching means selects any of the arrangements. It has become. In FIG. 6, two wirings connected in parallel corresponding to the respective gradation components D0 to D8 are prepared, and an n-channel FET and p as switching means are provided in the middle of each wiring.
The channel FET is connected, and a reordering control signal is commonly supplied to each gate to perform a switching operation, thereby selecting a wiring corresponding to either a mode in which no rearrangement is performed or a mode in which rearrangement is performed. Accordingly, each of the gradation components D0 to D8 can be
Can be changed. That is, when the rearrangement control signal is “L”, the grayscale components D0 to D8 correspond to the grayscale instruction signals D0I to D8I as they are (no rearrangement), and when the rearrangement control signal is “H”, the grayscale components. A signal obtained by reversing the arrangement of D0 to D8 is the gradation instruction signal D0.
It corresponds to I to D8I (with rearrangement). As a method for generating the rearrangement control signal, for example, as shown in FIG. 7, a rearrangement control terminal is provided for each drive circuit Dr, and “L” level and “H” are provided on both sides of the rearrangement control terminal. There is a method of arranging a terminal for outputting a level and connecting the rearrangement control terminal to one adjacent terminal.

Here, an example will be described in which odd-numbered Drs among the respective drive circuits Dr are rearranged: disabled, and even-numbered Drs are rearranged: enabled. In the case of this example, as shown in FIGS. 4 and 8, the gradation component D which is the component of the output gradation data Dout sent out by the control circuit 300.
0 to D8 are input to the odd-numbered drive circuits Dr1. on the other hand,
Input to the even-numbered drive circuits Dr2. The gradation components D0 to D8 are sequentially cascade-transmitted to the adjacent drive circuits Dr2.
As a result, the lengths of the wirings L0 to L8 when the gradation components D0 to D8 are cascade-transmitted can be adjusted to be approximately the same between the bits of the gradation components D0 to D8.
Therefore, there is no delay variation caused by variations in the transmission path lengths of the respective gradation components D0 to D8, and inconveniences such as deviations in signal reading timing can be prevented.
As a result, a signal skew or the like at the time of cascade transmission does not occur, and a malfunction due to a shift in signal capture timing can be prevented in advance.

On the other hand, the odd number of drive circuits Dr1.
From r2, the reversed bit arrangement is restored and the gradation components D0 to D8 respectively assigned to the driving circuits Dr1, driving circuits Dr2,... are output in a normal arrangement. As a result, a gradation signal for driving the pixel circuit 400 (see FIG. 1) can be favorably generated based on the gradation components D0 to D8.

<Second Embodiment>
FIG. 9 is a schematic diagram of an electro-optical device according to the second embodiment of the invention. First shown in FIG.
In contrast to the electro-optical device I according to the first embodiment, the data line driving circuit 200 is formed on the electro-optical substrate 1 which is a glass substrate. In this embodiment, the data line driving circuit 200 is a flexible printed circuit board (hereinafter referred to as FPC). This is different in that it is formed by so-called COF mounting. Other configurations are the same as those of the electro-optical device I according to the first embodiment shown in FIG. Therefore, the same parts as those in FIG.

As shown in FIG. 9, in the electro-optical device according to this embodiment, drive circuits Dr1 to DrN are provided on an FPC connection substrate 700 in which a transmission line 600 similar to the conventional one is formed. The drive circuits Dr1 to DrN are the same as those in the first embodiment. That is, the data line driving circuit 200 according to the present embodiment includes gradation components D0 to D8 arranged in a predetermined bit arrangement so as to include unique information corresponding to each gradation signal, as shown in FIG. The drive circuits Dr1, Dr2,..., Which are a plurality of cascade-connected circuit blocks, transmit to the subsequent drive circuit Dr.

  According to this embodiment, the same operation and effect as the first embodiment can be obtained.

<Other embodiments>
In the first and second embodiments, the drive circuit Dr1... That inputs the gradation components D0 to D8 in the same arrangement and the drive circuit Dr2 that inputs the gradation components D0 to D8 in the reverse arrangement. .. Are alternately switched one by one, but it is not necessary to be limited to this. A plurality of drive circuits Dr1,... That are not rearranged are grouped together to form a collective block, and a group block is formed that includes a plurality of drive circuits Dr2,. An array may be used. At this time, the drive circuits Dr1 to DrN constituting each aggregate block
It is not always necessary to match the numbers. In short, it is only necessary that the two types of drive circuits Dr1, Dr2,... Are alternately arranged so that the transmission line lengths of the gradation components D0 to D8 are substantially the same.

Further, it is not necessary to limit the signal transmission circuit to the gradation components D0 to D8. The present invention can be applied for general purposes to cascade transmission of signals arranged in a predetermined bit arrangement so as to include unique information. In this case, the operation and effect that the signal delay amount in the signal transmission circuit can be made uniform can be obtained in the same manner as in the first and second embodiments.

<Application example>
Next, an electronic apparatus to which the electro-optical device I according to the above-described embodiment is applied will be described. FIG. 11 shows a configuration of a mobile personal computer to which the electro-optical device I is applied. The personal computer 2000 includes an electro-optical device I as a display unit and a main body 2010. A main body 2010 includes a power switch 2001 and a keyboard 2002.
Is provided. Since this electro-optical device uses the OLED element 420, it is possible to display a screen having a wide viewing angle and easy to see.

FIG. 12 shows a configuration of a mobile phone to which the electro-optical device I is applied. A cellular phone 3000 includes a plurality of operation buttons 3001, scroll buttons 3002, and an electro-optical device I as a display unit. By operating the scroll button 3002, the screen displayed on the electro-optical device I is scrolled.

FIG. 13 shows a portable information terminal (PDA: Personal Digital Assis) to which the electro-optical device I is applied.
tants). The information portable terminal 4000 includes a plurality of operation buttons 4001, a power switch 4002, and the electro-optical device I as a display unit. Power switch 4
When 002 is operated, various types of information such as an address book and a schedule book are displayed on the electro-optical device I.

Furthermore, field emission element (FED), surface electric emission element (SE
D), and can be suitably applied to display devices, liquid crystal display devices, and the like using self-luminous elements such as ballistic electron-emitting devices (BSD).

The electronic apparatus to which the electro-optical device I is applied includes, in addition to those shown in FIGS. 11 to 13, a digital still camera, a liquid crystal television, a viewfinder type, a monitor direct view type video tape recorder, a car navigation device, a pager, Examples include electronic notebooks, calculators, word processors, workstations, videophones, POS terminals, and devices equipped with touch panels. The electro-optical device described above can be applied as the display unit of these various electronic devices. Further, the present invention can be effectively applied to a printer using an electro-optic element as a light source.

1 is a block diagram showing an electro-optical device according to a first embodiment of the invention. 2 is a timing chart showing scanning signals and light emission control signals in FIG. 1. FIG. 2 is a circuit diagram illustrating a pixel circuit in FIG. 1. FIG. 2 is a block diagram showing an internal configuration of a data line driving circuit in FIG. 1. FIG. 5 is a circuit diagram showing a current generation circuit included in the drive circuit of FIG. 4. FIG. 5 is a circuit diagram illustrating a rearrangement control unit included in the drive circuit of FIG. 4. FIG. 5 is an explanatory diagram illustrating rearrangement control terminals of the drive circuit of FIG. 4. FIG. 5 is an explanatory diagram illustrating a rearrangement function of the drive circuit of FIG. 4. FIG. 6 is a schematic diagram illustrating an electro-optical device according to a second embodiment of the invention. FIG. 10 is a block diagram showing an internal configuration of a data line driving circuit in FIG. 9. 1 is a perspective view of a mobile personal computer to which an electro-optical device is applied. The perspective view which shows the structure of the mobile telephone to which the electro-optical apparatus is applied. The perspective view which shows the structure of the portable information terminal to which the electro-optical device is applied. FIG. 10 is a schematic diagram illustrating an electro-optical device according to a conventional technique. FIG. 15 is a block diagram showing an internal configuration of the data line driving circuit in FIG. 14. Explanatory drawing which shows the aspect of the signal in FIG.

Explanation of symbols

1 electro-optic substrate, 103 data line, 200 data line drive circuit, 300 control circuit, 400 pixel circuit, 420 element, 500 power supply circuit, 600 transmission line,
700 connection board, C1, C2 rearrangement control unit, D gradation data, D0 to D8
Gradation component, Dr1 to DrN drive circuit, I electro-optical device, L0 to L8 wiring

Claims (16)

Controlled by signals arranged in a predetermined arrangement, comprising a circuit group in which a plurality of circuit blocks are connected by a transmission line,
Each of the plurality of circuit blocks has a function of outputting a predetermined signal included in the signal to another circuit block, and the signal is transmitted to the entire circuit group by the function. In
The plurality of circuit blocks have a rearrangement control unit that changes the signal arrangement and takes in the signal when the predetermined signal is input,
The plurality of circuit blocks include a first circuit block that captures the predetermined signal as it is, and a second circuit block that captures the predetermined signal by changing the array,
For the signals transmitted to the circuit group, the first wiring is set so that the wiring length of each signal is approximately the same.
A signal transmission circuit comprising: a second circuit block. The signal transmission circuit according to claim 1,
The signal transmission circuit, wherein the plurality of circuit blocks have a function of reversing the arrangement of the predetermined signals and taking them into the inside. In the signal transmission circuit according to claim 1 or 2,
The signal transmission circuit, wherein the first circuit block and the second circuit block are arranged adjacent to each other. In the signal transmission circuit according to claim 1 or 2,
The signal transmission circuit, wherein the first circuit block and the second circuit block are alternately arranged in a predetermined number unit. The signal transmission circuit according to any one of claims 1 to 4,
The signal transmission circuit, wherein the first circuit block and the second circuit block are mounted on a glass substrate, and the transmission path is formed on the glass substrate as a single-layer wiring. The signal transmission circuit according to any one of claims 1 to 4,
The signal transmission circuit according to claim 1, wherein the transmission path is formed of a single layer, and the first circuit block and the second circuit block are formed on a printed board. The signal transmission circuit according to any one of claims 1 to 6,
Each circuit block has a wiring for outputting the signals in the same arrangement and a wiring for rearranging the arrangement and outputting in the reverse arrangement, and any one of the wirings is selected by the switching means, and the first circuit A signal transmission circuit configured to be a block or a second circuit block. The signal transmission circuit according to any one of claims 1 to 7 has a function of generating a drive signal from the signal, and functions as a drive circuit that drives a plurality of elements by the drive signal. A signal transmission circuit characterized by the above. Controlled by signals arranged in a predetermined arrangement, comprising a circuit group in which a plurality of circuit blocks are connected by a transmission line,
Each of the plurality of circuit blocks has a function of outputting a first signal included in the signal to another circuit block, and the signal transmission is configured such that the signal is supplied to the entire circuit group by the function. In the circuit
The plurality of circuit blocks include a rearrangement control unit that changes a signal arrangement and takes in the signal when a second signal included in the signal is input,
The plurality of circuit blocks include a first circuit block that captures the second signal as it is, and a second circuit block that captures the second signal by changing the array,
A signal transmission circuit, wherein the first and second circuit blocks are arranged so that the wiring length of each signal is about the same for the second signal included in the circuit group. The signal transmission circuit according to claim 9,
The signal transmission circuit according to claim 1, wherein the first signal and the second signal are different signals. The signal transmission circuit according to claim 9,
The signal transmission circuit, wherein the first signal and the second signal are the same signal. In an electro-optical device configured to display a predetermined image by arranging light emitting elements that control light emission intensity according to gradation signals in a matrix form,
12. An electro-optical device, wherein the signal transmission circuit according to claim 1 is incorporated as a driving circuit that generates the gradation signal and drives each light emitting element. An electronic apparatus comprising the electro-optical device according to claim 12 as display means for displaying an image. Controlled by signals arranged in a predetermined arrangement, a signal transmission method in a circuit group in which a plurality of circuit blocks are connected by a transmission path,
Each of the plurality of circuit blocks has a function of outputting a predetermined signal included in the signal to another circuit block, and the signal is supplied to the entire circuit group by the function,
When the predetermined signal is input, the plurality of circuit blocks are controlled so that the signal arrangement is changed and incorporated therein,
The plurality of circuit blocks are set as a first circuit block that captures the predetermined signal as it is, and a second circuit block that captures the predetermined signal by changing the array,
For the signals transmitted to the circuit group, the first wiring is set so that the wiring length of each signal is approximately the same.
A signal transmission method comprising: arranging a second circuit block. A signal transmission method for an electro-optical device configured to display a predetermined image by arranging light emitting elements that control light emission intensity by gradation signals in a matrix form,
15. The signal transmission method for an electro-optical device using the signal transmission method according to claim 14 as a driving method for driving each light emitting element by the gradation signal. Controlled by signals arranged in a predetermined arrangement, a signal transmission method in a circuit group in which a plurality of circuit blocks are connected by a transmission path,
Each of the plurality of circuit blocks has a function of outputting a first signal included in the signal to another circuit block, and the signal is supplied to the entire circuit group by the function.
When the second signal included in the signal is input, the plurality of circuit blocks are controlled so that the signal arrangement is changed and captured therein,
The plurality of circuit blocks are set as a first circuit block that captures the second signal in an array as it is and a second circuit block that captures the array of the second signal by changing the array,
A signal transmission method, wherein the first and second circuit blocks are arranged so that the wiring length of each signal is the same for the second signal included in the circuit group.

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