JP2006237160A - Method for manufacturing solid-state image pickup element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a solid-state image pickup element capable of improving the insulating performance between charge transfer electrodes. <P>SOLUTION: In the method for manufacturing the solid-state image pickup element having a photodiode, and a charge transfer section including transfer electrodes (first and second electrodes 3a, 3b) for transferring charge generated in the photodiode, a recess generated in an insulating film (5a+5b) formed on the sidewall of a first conductive film 3a formed on a silicon substrate 1 is filled with a conductive film 3c once (Figs. (e), (f)), the conductive film 3c is thermally oxidized for forming an insulating film 5c at the recess (Fig. (g)), a second conductive film 3b is formed and patterned, and the second electrode 3b is formed (Fig. (h)). <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a solid-state imaging device having a photoelectric conversion unit and a charge transfer unit including a transfer electrode that transfers charges generated in the photoelectric conversion unit.

  A solid-state imaging device using a CCD used for an area sensor or the like has a photoelectric conversion unit such as a photodiode and a charge transfer unit including a charge transfer electrode for transferring a signal charge generated in the photoelectric conversion unit. A plurality of charge transfer electrodes are arranged adjacent to each other on a charge transfer path formed on the semiconductor substrate, and are sequentially driven.

  In recent years, demands for higher resolution and higher sensitivity have been increasing in solid-state imaging devices, and the number of imaging pixels has been increasing to more than gigapixels. A substrate (silicon substrate) on which a solid-state image sensor is built is mounted by stacking filters and lenses. For this reason, the positional accuracy between the lens and the photoelectric conversion unit is important, and the distance, that is, the distance in the height direction, is a big problem in terms of positional accuracy in the manufacturing process and sensitivity (photoelectric conversion efficiency) in use. .

  Furthermore, in such a situation, in order to obtain high resolution without increasing the chip size, it is necessary to reduce the area per unit pixel and achieve high integration. On the other hand, if the opening area of the photodiode constituting the photoelectric conversion unit is reduced, the sensitivity is lowered, and therefore the opening area of the photodiode must be ensured. Therefore, various studies have been made to reduce the size of the chip while ensuring the area occupied by the opening of the photodiode by reducing the wiring area ratio by reducing the wiring area of the charge transfer portion and the peripheral circuit. .

  In this situation, in order to realize high integration by miniaturization of wiring, in addition to surface flatness, improvement of the breakdown voltage and thinning of the interlayer insulating film between the charge transfer part and the wiring layer are important technologies. It becomes a problem.

FIG. 7 is a diagram for explaining a method of manufacturing a charge transfer electrode having a two-layer electrode structure of a conventional CCD.
As shown in FIG. 7, a silicon oxide film 12a, a silicon nitride film 12b, and a silicon oxide film 12c are formed on the surface of the n-type silicon substrate 11, and a gate oxide film 12 having a three-layer structure is formed. Subsequently, a doped polysilicon film constituting the first electrode 13a is formed on the gate oxide film 12, and this is patterned by photolithography to form the first electrode 13a. A silicon oxide film 15 to be an insulating film is formed (FIG. 7A). Then, using the silicon oxide film 15 as an interelectrode insulating film, a doped polysilicon film constituting the second electrode 13b is formed, and patterned using a desired mask formed by photolithography, so that the second electrode 13b is formed. Form.

  In this method, when the silicon oxide film 15 is formed, the oxygen supply is insufficient in the vicinity of the gate oxide film 12 and the film formation speed is reduced. Therefore, as shown in the drawing, the first electrode 13a is formed as shown in FIG. On the side wall, the thickness of the silicon oxide film 15 decreases in the vicinity of the gate oxide film 12, and a recess t is formed in the silicon oxide film 15 at the lower end of the side wall. When the second electrode 13b is formed in this state, the second electrode is formed in a state where the recessed polysilicon film constituting the second electrode 13b is buried in the recess t of the silicon oxide film 15 (FIG. 7 (b)). When a voltage is applied to each electrode in this state, the electric field concentrates in the recess t, and dielectric breakdown may occur between the first electrode 13a and the second electrode 13b. Such a problem occurs not only in a charge transfer electrode having a two-layer electrode structure but also in a charge transfer electrode having a single-layer electrode structure.

  As a technique for preventing the dielectric breakdown as described above, there is a technique described in Patent Document 1.

JP 2003-229440 A

  As described above, in the conventional solid-state imaging device, a recess is generated in the insulating film formed on the side wall of the first electrode due to thermal oxidation, that is, between the first electrode and the second electrode. There has been a problem that the film quality of the insulating film between two adjacent electrodes is lowered, and further, the electric withstand voltage is lowered. Furthermore, there is a problem that the step coverage is lowered, and further, there is a problem that the probability of occurrence of a leak is increased.

  The present invention has been made in view of the above circumstances, and an object thereof is to provide a method for manufacturing a solid-state imaging device capable of improving the insulation performance between adjacent charge transfer electrodes.

  The method for manufacturing a solid-state imaging device according to the present invention is a method for manufacturing a solid-state imaging device, comprising: a photoelectric conversion unit; and a charge transfer unit including a charge transfer electrode that transfers a charge generated in the photoelectric conversion unit. The transfer electrode forming step includes forming a first conductive film pattern on the surface of the semiconductor substrate on which the gate oxide film is formed, forming the first electrode, and thermally oxidizing the first electrode. Forming a first insulating film on at least a side wall of the first electrode; and forming a conductive film on the semiconductor substrate surface on which the first electrode and the first insulating film are formed; Burying the conductive film in a recess of the first insulating film generated in the vicinity of the gate oxide film of the first electrode, and removing the conductive film leaving a portion buried in the recess. After the process and removal of the conductive film, the recess is buried. Forming the second insulating film in the recess by thermally oxidizing the conductive film, and the semiconductor on which the first electrode, the first insulating film, and the second insulating film are formed. Forming a second conductive film constituting the second electrode on the surface of the substrate.

  According to this method, the concave portion generated in the first insulating film formed on the side wall of the first electrode is temporarily filled with the conductive film, and the conductive film is thermally oxidized to form the insulating film in the concave portion. Since the second conductive film is formed later, the insulation between the first electrode and the second electrode can be satisfactorily performed, and the film quality of the interelectrode insulating film between the first electrode and the second electrode can be improved. Improvements can be made.

  The manufacturing method of the solid-state imaging device of the present invention includes a step of removing the second conductive film above the first electrode after the formation of the second conductive film.

  According to this method, a charge transfer electrode having a single-layer electrode structure can be obtained with a high yield without any risk of interelectrode leakage.

  The method for manufacturing a solid-state imaging device of the present invention includes a step of patterning the second conductive film after forming the second conductive film, leaving a region overlapping on the first electrode.

  According to this method, a charge transfer electrode having a two-layer electrode structure can be obtained with a high yield without any risk of interelectrode leakage.

  In the solid-state imaging device manufacturing method of the present invention, the conductive film is made of the same material as the first conductive film or the second conductive film.

  In the method for manufacturing a solid-state imaging device of the present invention, the first conductive film or the second conductive film includes a silicon-based conductive film.

  In the method for manufacturing a solid-state imaging device according to the present invention, the silicon-based conductive film is a doped amorphous silicon film.

  In the method for manufacturing a solid-state imaging device according to the present invention, the silicon-based conductive film is a doped polysilicon film.

  ADVANTAGE OF THE INVENTION According to this invention, the manufacturing method of the solid-state image sensor which can improve the insulation performance between adjacent charge transfer electrodes can be provided.

  Embodiments of the present invention will be described below with reference to the drawings.

(First embodiment)
FIG. 1 is a schematic plan view of a solid-state image sensor for explaining a first embodiment of the present invention. 2 is a schematic cross-sectional view taken along line AA in FIG.
The solid-state imaging device shown in FIGS. 1 and 2 has a large number of photodiodes 30 as photoelectric conversion portions formed on the surface of an n-type silicon substrate 1, and the signal charges generated by each photodiode 30 are transferred in the column direction (in FIG. 2). A charge transfer section 40 for transferring in the Y direction is formed by meandering between a plurality of photodiode rows composed of a plurality of photodiodes 30 arranged in the column direction.

  The charge transfer unit 40 includes a plurality of charge transfer channels 33 formed in the column direction of the surface portion of the silicon substrate 1 corresponding to each of the plurality of photodiode columns, and a charge transfer formed in the upper layer of the charge transfer channel 33. It includes an electrode 3 (first electrode 3a, second electrode 3b) and a charge readout region 34 for reading out the charge generated in the photodiode 30 to the charge transfer channel 33. The charge transfer electrode 3 has a meandering shape extending in the row direction (X direction in FIG. 2) as a whole between a plurality of photodiode rows composed of a plurality of photodiodes 30 arranged in the row direction. .

  As shown in FIG. 2, a p well layer 9 is formed on the surface portion of the silicon substrate 1, a p region 30a is formed on the surface portion of the p well layer 9, and an n region 30b is formed below the p region 30a. The p region 30a and the n region 30b are formed, and the signal charge generated in the photodiode 30 is accumulated in the n region 30b.

  On the right side of the p region 30a, a charge transfer channel 33 composed of an n region is formed with a slight distance. A charge readout region 34 is formed in the p well layer 9 between the n region 30 b and the charge transfer channel 33.

  A gate oxide film 2 is formed on the surface of the silicon substrate 1, and a first electrode 3 a and a second electrode 3 b are formed on the charge readout region 34 and the charge transfer channel 33 via the gate oxide film 2. The The first electrode 3a and the second electrode 3b are insulated by the interelectrode insulating film 5. A channel stop 32 made of a p + region is provided on the right side of the vertical transfer channel 33 so as to be separated from the adjacent photodiode 30.

  A silicon oxide film 6 is formed on the charge transfer electrode 3, and an intermediate layer 70 is further formed thereon. Of the intermediate layer 70, 71 is a light shielding film, 72 is an insulating film made of BPSG (borophospho silicate glass), 73 is an insulating film (passivation film) made of P-SiN, and 74 is a flattening layer made of a transparent resin film. . The light shielding film 71 is provided except for the opening of the photodiode 30. Above the intermediate layer 70, the color filter 50 and the microlens 60 are provided. A space between the color filter 50 and the microlens 60 is filled with a planarizing layer 61 made of an insulating transparent resin or the like.

  In the solid-state imaging device of the present embodiment, the signal charges generated in the photodiode 30 are accumulated in the n region 30b, and the accumulated signal charges are transferred in the column direction by the charge transfer channel 33, and the transferred signal charges are transferred. Is transferred in the row direction by a charge transfer path (HCCD) (not shown), and a color signal corresponding to the transferred signal charge is output from an amplifier (not shown).

Next, of the above-described manufacturing process of the solid-state imaging device, the charge transfer electrode forming process will be described in detail with reference to FIGS. Manufacturing processes other than the charge transfer electrode forming process are the same as those of the conventional solid-state imaging device.
First, a silicon oxide film 2a, a silicon nitride film 2b, and a silicon oxide film 2c are formed on the surface of the n-type silicon substrate 1, and a gate oxide film 2 having a three-layer structure is formed. Subsequently, a first conductive film 3a constituting the first electrode 3a is formed on the gate oxide film 2 by low pressure CVD (FIG. 3A). As the first conductive film 3a, a silicon-based conductive film such as a phosphorus-doped doped polysilicon film or a doped amorphous silicon film can be used.

  Next, using the desired mask pattern, the first conductive film 3a is selectively removed by etching using the silicon nitride film 2b of the gate oxide film 2 as an etching stopper, and the first electrode 3a and a peripheral circuit (not shown). The wiring patterning is performed (FIG. 3B). Here, it is desirable to use an etching apparatus such as an ECR (Electron Cyclotoron Resonance) system or an ICP (Inductively Coupled Plasma) system.

  Next, an insulating film 5a made of a silicon oxide film is formed on the surface of the first electrode 3a by thermal oxidation (FIG. 3C). Here, the temperature of thermal oxidation is about 900 ° C. Desirably, it is 850 degreeC. Thereby, the elongation of the diffusion length can be prevented. By this step, a recess T is generated in the insulating film 5a formed in the vicinity of the gate oxide film 2 on the side wall of the first electrode 3a.

  Next, an insulating film 5b made of a silicon oxide film (HTO) is formed by low pressure CVD (FIG. 3D). By this step, the recess T is filled with the insulating film 5b, but a recess T 'is generated in the insulating film 5b formed in the vicinity of the gate oxide film 2 on the side wall of the first electrode 3a. Note that the step of forming the insulating film 5b may be omitted. The insulating film 5a or the combination of the insulating film 5a and the insulating film 5b corresponds to the first insulating film in the claims.

  Next, the conductive film 3c is formed on the insulating film 5b by low pressure CVD (FIG. 4E). By this step, the recess T ′ is filled with the conductive film 3 c. When the step of forming the insulating film 5b is omitted, the conductive film 3c is in a state where it is buried in the recess T. As the conductive film 3c, a silicon-based conductive film such as a phosphorus-doped doped polysilicon film or a doped amorphous silicon film can be used.

  Next, a portion other than the conductive film 3c buried in the concave portion T ′ (or T) is removed by, for example, dry etching (FIG. 4F).

  Next, the conductive film 3c buried in the recess T ′ (or T) is thermally oxidized by a thermal oxidation method, and this conductive film 3c is converted into the insulating film 5c (the second insulating film in the claims). (Applicable) (FIG. 4 (g)). Since the amount of the conductive film 3c buried in the recess T ′ (or T) is very small, it can be changed to the insulating film 5c in a short time by thermal oxidation. The insulating films 5a, 5b and 5c described above constitute the interelectrode insulating film 5 of FIG.

  Next, a second conductive film 3b constituting the second electrode 3b is formed by a low pressure CVD method. As the second conductive film 3b, a silicon-based conductive film such as a phosphorus-doped doped polysilicon film or a doped amorphous silicon film can be used. The film thickness of the second conductive film 3b needs to be formed so as to be equal to or greater than the total film thickness of the first electrode 3a and the upper insulating films 5a and 5b. Then, a resist (not shown) is applied, and etching is performed on the entire surface under the condition that the etching rate of the resist and the second conductive film 3b is almost the same, so that the second conductive film 3b above the first electrode is formed. Then, the second conductive film 3b is planarized. Thereafter, a resist pattern (not shown) for forming the active region and the peripheral circuit is formed. Here, a resist pattern is formed so as to cover a part of the solid-state imaging element forming portion and the peripheral circuit portion. Then, using this resist pattern as a mask, the second conductive film 3b on the photodiode 30 is removed by etching, and another pattern (not shown) of the peripheral circuit is left. Then, by removing the resist by ashing, the second conductive film 3b is formed so as to cover a part of the solid-state imaging element forming portion and the peripheral circuit portion (FIG. 4 (h)).

  In this way, the second electrode 3b is formed, the silicon oxide film 6 is formed around the second electrode 3b by thermal oxidation, and the charge transfer electrode 3 having a single-layer electrode structure is formed. Then, a light-shielding film pattern 71 and a BPSG film 72 are formed on the upper layer and reflowed and flattened. Then, an insulating film (passivation film) 73 made of P-SiN and a planarization layer 74 made of a transparent resin film are formed. Thereafter, the color filter 50, the flattening layer 61, the microlens 60, and the like are formed to obtain a solid-state imaging device as shown in FIGS.

  According to the above manufacturing method, the recess T ′ generated in the insulating film 5b formed on the side wall of the first electrode 3a (or the recess T generated in the insulating film 5a) is once filled with the conductive film 3c, and this conductive In order to form the second conductive film 3b after the conductive film 3c is thermally oxidized to form the insulating film 5c in the recess T ′ (or T), the insulation between the first electrode 3a and the second electrode 3b is performed. Thus, it is possible to improve the film quality and electrical breakdown voltage of the interelectrode insulating film between the first electrode 3a and the second electrode 3b. In addition, step coverage can be improved and leakage probability can be reduced.

  Further, according to the above manufacturing method, since the conductive film 3c is used to fill the recess T ′ (or T), the selection ratio between the gate oxide film 2 and the conductive film 3c can be easily determined. The conductive film 3c can be easily etched.

  In addition, since the charge transfer electrode of the solid-state imaging device of this embodiment has a single-layer electrode structure, it is not necessary to form the insulating film 5a on the entire surface of the first electrode 3a in the step of FIG. It is sufficient to form the insulating film 5a only on the side wall of one electrode 3a.

(Second embodiment)
The solid-state imaging device of this embodiment is different from the solid-state imaging device shown in FIG. 2 only in that the charge transfer electrode 3 has a two-layer electrode structure. A schematic plan view of the solid-state imaging device of the present embodiment is the same as FIG.

FIG. 5 is a schematic cross-sectional view of a solid-state imaging device for explaining the second embodiment of the present invention, and is a cross-sectional view taken along line AA of FIG. In FIG. 5, the same components as those in FIG.
The charge transfer electrode 3 of the solid-state imaging device shown in FIG. 5 is the same as FIG. 2 in that the first electrode 3a and the second electrode 3b are adjacent to each other with the interelectrode insulating film 5 interposed therebetween. The difference is that a part of the second electrode 3b is superimposed on 3a.

Hereinafter, of the manufacturing process of the solid-state imaging device shown in FIG. 5, the charge transfer electrode forming process will be described in detail with reference to FIGS. 3, 4, and 6. Manufacturing processes other than the charge transfer electrode forming process are the same as those of the conventional solid-state imaging device.
First, the steps shown in FIGS. 3A to 4G are performed in the same manner as the solid-state imaging device shown in FIG. Next, the second conductive film 3b is formed by a low pressure CVD method. As the second conductive film 3b, a silicon-based conductive film such as a phosphorus-doped doped polysilicon film or a doped amorphous silicon film can be used. Then, a resist (not shown) is applied and the second conductive film 3b is patterned (FIG. 6). At this time, in the present embodiment, the second electrode 3b is formed by patterning so that the second conductive film 3b overlaps a part of the upper layer of the first electrode 3a.

  In this way, the second electrode 3b is formed, and the silicon oxide film 6 is formed around the second electrode 3b by thermal oxidation to form a charge transfer electrode having a two-layer electrode structure. Thereafter, as in the first embodiment, a light shielding film pattern 71, a BPSG film 72, an insulating film (passivation film) 73 made of P-SiN, and a planarizing layer 74 made of a transparent resin film are formed on the upper layer. Thereafter, the color filter 50, the flattening layer 61, the microlens 60, and the like are formed to obtain a solid-state imaging device as shown in FIG.

  According to this method, a charge transfer electrode having a two-layer electrode structure can be obtained with a high yield without any risk of interelectrode leakage.

  In the first and second embodiments, the photoelectric conversion units arranged in odd-numbered rows and the photoelectric conversion units arranged in even-numbered rows are displaced in the direction of approximately ½ rows of the photoelectric conversion unit arrangement pitch of each row. A so-called honeycomb-structured solid-state imaging device has been exemplified, but the manufacturing method of the present embodiment can also be applied to a solid-state imaging device in which photoelectric conversion portions are arranged in a square lattice pattern.

FIG. 1 is a schematic plan view of a solid-state imaging device for explaining a first embodiment of the present invention. AA cross-sectional schematic diagram of FIG. The figure explaining the manufacturing process of the solid-state image sensor for demonstrating 1st embodiment of this invention. The figure explaining the manufacturing process of the solid-state image sensor for demonstrating 1st embodiment of this invention. Sectional schematic diagram of the solid-state image sensor for demonstrating 2nd embodiment of this invention The figure explaining the manufacturing process of the solid-state image sensor for demonstrating 2nd embodiment of this invention. The figure explaining the manufacturing process of the conventional solid-state image sensor

Explanation of symbols

1 n-type silicon substrate 2 gate oxide film 2a, 2c silicon oxide film 2b silicon nitride film 3a first conductive film 3b second conductive film 3c conductive film 5 interelectrode insulating films 5a, 5b, 5c insulating films T, T 'Recess

Claims (7)

A method for manufacturing a solid-state imaging device, comprising: a photoelectric conversion unit; and a charge transfer unit including a charge transfer electrode that transfers charges generated in the photoelectric conversion unit,
The step of forming the charge transfer electrode comprises:
Forming a first conductive film pattern on the semiconductor substrate surface on which the gate oxide film is formed, and forming a first electrode;
Thermally oxidizing the first electrode to form a first insulating film on at least a side wall of the first electrode;
A conductive film is formed on the surface of the semiconductor substrate on which the first electrode and the first insulating film are formed, and the first insulating film generated near the gate oxide film of the first electrode is formed. Filling the recess with the conductive film;
Removing the conductive film leaving a portion buried in the recess;
After removing the conductive film, thermally oxidizing the conductive film buried in the concave portion to form a second insulating film in the concave portion;
Forming a second conductive film constituting a second electrode on the surface of the semiconductor substrate on which the first electrode, the first insulating film, and the second insulating film are formed. Device manufacturing method. It is a manufacturing method of the solid-state image sensing device according to claim 1,
A method of manufacturing a solid-state imaging device, including a step of removing the second conductive film above the first electrode after forming the second conductive film. It is a manufacturing method of the solid-state image sensing device according to claim 1,
A method of manufacturing a solid-state imaging device, comprising: forming a pattern of the second conductive film after forming the second conductive film, leaving a region overlapping on the first electrode. It is a manufacturing method of the solid-state image sensing device according to any one of claims 1 to 3,
The method for manufacturing a solid-state imaging device, wherein the conductive film is the same material as the first conductive film or the second conductive film. It is a manufacturing method of the solid-state image sensing device according to any one of claims 1 to 4,
The first conductive film or the second conductive film is a method for manufacturing a solid-state imaging device including a silicon-based conductive film. It is a manufacturing method of the solid-state image sensing device according to claim 5,
The method for manufacturing a solid-state imaging device, wherein the silicon-based conductive film is a doped amorphous silicon film. It is a manufacturing method of the solid-state image sensing device according to claim 5,
The silicon-based conductive film is a method for manufacturing a solid-state imaging device, which is a doped polysilicon film.

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