JP2006236105A5 - - Google Patents
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- Publication number
- JP2006236105A5 JP2006236105A5 JP2005051369A JP2005051369A JP2006236105A5 JP 2006236105 A5 JP2006236105 A5 JP 2006236105A5 JP 2005051369 A JP2005051369 A JP 2005051369A JP 2005051369 A JP2005051369 A JP 2005051369A JP 2006236105 A5 JP2006236105 A5 JP 2006236105A5
- Authority
- JP
- Japan
- Prior art keywords
- address setting
- memory
- memory module
- determination
- access
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 230000007704 transition Effects 0.000 claims 2
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005051369A JP2006236105A (ja) | 2005-02-25 | 2005-02-25 | アクセス制御装置及びその制御方法 |
| US11/345,388 US20060195665A1 (en) | 2005-02-25 | 2006-02-02 | Access control device, method for changing memory addresses, and memory system |
| CNA2006100078923A CN1825473A (zh) | 2005-02-25 | 2006-02-23 | 存储器控制装置、改变存储器地址的方法以及存储系统 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005051369A JP2006236105A (ja) | 2005-02-25 | 2005-02-25 | アクセス制御装置及びその制御方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2006236105A JP2006236105A (ja) | 2006-09-07 |
| JP2006236105A5 true JP2006236105A5 (https=) | 2008-04-10 |
Family
ID=36933127
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2005051369A Withdrawn JP2006236105A (ja) | 2005-02-25 | 2005-02-25 | アクセス制御装置及びその制御方法 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US20060195665A1 (https=) |
| JP (1) | JP2006236105A (https=) |
| CN (1) | CN1825473A (https=) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7904639B2 (en) * | 2006-08-22 | 2011-03-08 | Mosaid Technologies Incorporated | Modular command structure for memory and memory system |
| JP2008242731A (ja) * | 2007-03-27 | 2008-10-09 | Oki Electric Ind Co Ltd | マイクロプロセッサ設計プログラム、マイクロプロセッサ設計装置及びマイクロプロセッサ |
| JP5171448B2 (ja) * | 2007-07-31 | 2013-03-27 | キヤノン株式会社 | 画像形成装置及びその制御方法 |
| US8924639B2 (en) | 2008-08-08 | 2014-12-30 | Hewlett-Packard Development Company, L.P. | Independently controllable and reconfigurable virtual memory devices in memory modules that are pin-compatible with standard memory modules |
| JP2011081732A (ja) * | 2009-10-09 | 2011-04-21 | Elpida Memory Inc | 半導体装置及びその調整方法並びにデータ処理システム |
| JP2011192343A (ja) | 2010-03-12 | 2011-09-29 | Elpida Memory Inc | 半導体装置及びそのリフレッシュ制御方法並びにコンピュータシステム |
| CN111158600B (zh) * | 2019-12-30 | 2023-10-27 | 中国人民解放军国防科技大学 | 一种提升高带宽存储器(hbm)访问效率的装置和方法 |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6571325B1 (en) * | 1999-09-23 | 2003-05-27 | Rambus Inc. | Pipelined memory controller and method of controlling access to memory devices in a memory system |
| JP4159415B2 (ja) * | 2002-08-23 | 2008-10-01 | エルピーダメモリ株式会社 | メモリモジュール及びメモリシステム |
| US7222224B2 (en) * | 2004-05-21 | 2007-05-22 | Rambus Inc. | System and method for improving performance in computer memory systems supporting multiple memory access latencies |
-
2005
- 2005-02-25 JP JP2005051369A patent/JP2006236105A/ja not_active Withdrawn
-
2006
- 2006-02-02 US US11/345,388 patent/US20060195665A1/en not_active Abandoned
- 2006-02-23 CN CNA2006100078923A patent/CN1825473A/zh active Pending
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