JP2006229799A - Solid-state image sensor, method of driving solid-state image sensor and imaging apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a solid-state image sensor capable of improving a frame rate, a method of driving the solid-state image sensor, and an imaging apparatus. <P>SOLUTION: In reading a signal from each pixel of a pixel array section 10, access is executed other than each pixel of OPB non-inquiry regions 103i, 103o and an effective non-inquiry region 101A under driving of a vertical driving circuit 20 and a horizontal driving circuit 40 to omit the reading of each of pixels of the OPB non-inquiry regions 103i, 103o and an effective non-inquiry region 101A. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a solid-state imaging device, a driving method of the solid-state imaging device, and an imaging apparatus. In particular, pixels including photoelectric conversion elements are two-dimensionally arranged in a matrix and pixels that are shielded from light are arranged around an effective pixel region. The present invention relates to a solid-state imaging device having an optical black region, a driving method of the solid-state imaging device, and an imaging apparatus using the solid-state imaging device as an imaging device.

  Here, the imaging apparatus includes a solid-state imaging device as an imaging device, an optical system that forms image light of a subject on an imaging surface (light-receiving surface) of the solid-state imaging device, and a signal processing circuit of the solid-state imaging device. A camera module or a camera system equipped with the camera module is referred to.

  In the solid-state imaging device, in the pixel array unit 10 shown in FIG. 2, in general, in order to determine a black level reference, a pixel in which a pixel signal is used as a signal actually captured, that is, an effective pixel (aperture pixel) is used. Optical black (hereinafter abbreviated as “OPB”) in which light-shielded pixels (invalid pixels) are arranged so as to surround the effective pixel area 101 with respect to the effective pixel area 101 arranged two-dimensionally in a matrix. In some cases, a configuration in which an area (optical black area) 102 is provided (see, for example, Patent Document 1).

  In the OPB region 102, in pixels located near the boundary (inner edge) or the outermost periphery of the effective pixel region 101, that is, at the inner and outer peripheral portions of the OPB region 102, light from the outside of the effective pixel region 101 or the element chip is transmitted. Since there is leakage and the signal level of these pixels cannot be used as a reference for the black level, the OPB unquestioned area 103 (103i, 103i, 103o), it is not used for actual image processing.

  In addition, the area of the outer edge portion of the effective pixel area 101 that is in contact with the OPB unquestionable area 103 is not stable in characteristics as an effective pixel because the shielded OPB pixel structure and the opened effective pixel structure are discontinuously switched. Of course, it is often not used for image processing.

  As described above, when the signal of each pixel is read out in a row unit from the pixel array unit 10 in which the OPB area 102 including the OPB unquestion area 103 is arranged around the effective pixel area 101 including the effective unquestion area 101A. An image of signal output is shown in FIG.

  In order to read out the signals of all the pixels for each row, first, the 1H signal 505 of the OPB unquestioned row of the first row in the OPB unquestioned region 103o on the lower edge of the effective pixel region 101 is output, and the row advances. The OPB row 1H signal 506 in the OPB area 102 is output. When the line advances, the OPB unquestioned line 1H signal 505 in the inner OPB unquestion area 103i is output. The 1H signal 507 of the effective row in the effective pixel region 101 is output, and the 1H signal 505 of the OPB unrelated row at the inner edge, the 1H signal 506 of the OPB row, and the OPB unrelated row of the outer edge as the processing proceeds further. A 1H signal 505 is output.

  The valid row signal 508 includes a horizontal OPB unquestioned pixel signal 501, a horizontal OPB pixel signal 502, a horizontal OPB unquestioned pixel signal 501, a horizontal valid unquestioned pixel signal 503, an effective pixel signal 504, a horizontal valid unquestioned pixel signal 503, and a horizontal OPB uncleared pixel signal. 501, a horizontal OPB pixel signal 502, and a horizontal OPB unrelated pixel signal 501.

  As described above, since it is common to sequentially read out each pixel of the pixel array unit 10 from the left to the right and from the lower row to the upper row for each row, the image processing includes The pixels in the valid unquestioned pixel area 101A and the OPB unquestioned area 103 that are not used are also accessed sequentially in units of rows, and the valid unquestioned pixel signal 101A and the OPB unquestioned pixel signal 501 are also output.

JP 2003-000000 A

  As described above, in a solid-state imaging device that is configured to sequentially access all pixels including the signals of pixels in the OPB unquestioned region 103 that are not used for image processing, the signals of all pixels are output. Since one frame cannot be formed unless all of the pixels are read out, there is a useless period for reading out the pixels of the valid unquestioned area 101A and the OPB unquestioned area 103 in one frame period. It was an obstacle to improve the frame rate.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a solid-state imaging device, a driving method of the solid-state imaging device, and an imaging apparatus capable of improving the frame rate. .

  In order to achieve the above object, according to the present invention, a pixel array unit having an OPB area in which pixels including photoelectric conversion elements are two-dimensionally arranged in a matrix and light-shielded pixels are arranged around an effective pixel area. When reading a signal from each pixel of the pixel array unit in the solid-state imaging device, the pixel region located at the peripheral portion of the OPB region and the peripheral portion of the effective pixel region are accessed to the other pixels. A configuration for reading a signal from a pixel is adopted. In addition, the solid-state imaging device is used as an imaging device mounted on an imaging apparatus such as a camera system or a camera module.

  In the imaging device using the solid-state imaging device having the above-described configuration or the solid-state imaging device as an imaging device, when reading a signal from each pixel of the pixel array unit, the pixel region located at the periphery of the OPB region and the periphery of the effective pixel region By accessing except the other pixels, that is, the pixels of the OPB unquestionable area and the effective unquestionable area not used for image processing (by skipping the pixels of the OPB unquestionable area and the effective unquestionable area), 1 There is no useless period for reading pixels in the OPB unquestioned area and the effective unquestioned area in the frame period. Therefore, the time of one frame period can be shortened by the amount that can eliminate this useless period from one frame period, and the frame rate of the solid-state imaging device determined by the time of the one frame period can be increased.

  According to the present invention, by skipping each pixel in the OPB unquestionable area and the effective unquestionable area, the time for one frame period can be shortened, and the frame rate of the solid-state imaging device can be improved accordingly.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a block diagram showing an outline of the configuration of a line-sequential solid-state image sensor, for example, a CMOS solid-state image sensor according to an embodiment of the present invention.

  As shown in FIG. 1, the CMOS solid-state imaging device according to this embodiment includes a pixel array unit 10 in which pixels 1 including photoelectric conversion elements (not shown) are two-dimensionally arranged in a matrix, and the pixel array unit 10. For example, the vertical drive circuit 20, the column signal processing circuit unit 30, and the horizontal drive circuit 40 are arranged on one side.

  Here, the vertical drive circuit 20 is disposed only on one side of the pixel array unit 10, but a configuration in which the vertical drive circuit 20 is disposed on both sides of the pixel array unit 10 may be employed.

  In the pixel array unit 10, a vertical signal line 11 is wired for each column and a drive line 12 is wired for each row with respect to the matrix-like pixel arrangement. Here, for convenience of explanation, only one drive line 12 is shown, but actually, as the drive line 12, for example, a selection line used for selective driving of the pixel 1 corresponding to the configuration of the pixel 1, There are a transfer line used for driving to transfer the signal charge photoelectrically converted by the photoelectric conversion element of the pixel 1 to the floating diffusion portion, a reset line used for reset driving the floating diffusion portion, and the like.

  As shown in FIG. 2, the pixel array unit 10 includes an effective pixel region 101 in which effective pixels (opening pixels) used as signals obtained by actually capturing pixel signals are two-dimensionally arranged in a matrix, and a black level In order to determine a reference, an OPB area 102 (optical black area) in which light-shielded pixels (invalid pixels) are arranged so as to surround the effective pixel area 101 is provided.

  In the OPB region 102, in pixels located near the boundary (inner edge) or the outermost periphery of the effective pixel region 101, that is, at the inner and outer peripheral portions of the OPB region 102, light from the outside of the effective pixel region 101 or the element chip is transmitted. Since there are leaks and the signal level of these pixels cannot be used as a reference for the black level, the pixel region located near the boundary of the effective pixel region 101 or near the outer edge is not used for actual image processing. It is an OPB unquestionable area 103 (103i, 103o). Further, the peripheral portion of the effective pixel region 101 is often an effective unquestioned region 101A that is not used for actual image processing.

  In FIG. 1, only the OPB unquestioned area 103 i on the inner edge side of the OPB unquestioned areas 103 i and 103 o is shown for simplification of the drawing. In addition, as the OPB region 102 and the OPB unquestioned region 103i, one pixel row is shown on each of the upper and lower sides of the effective pixel region 101, and one pixel column is shown on each of the left and right sides of the effective pixel region 101.

  In FIG. 1 again, the vertical drive circuit 20 includes a vertical selection circuit 21, a pulse line 22, a logical product circuit group 23, a buffer circuit group 24, and a fixed voltage supply circuit 25.

  For example, the vertical selection circuit 21 is configured by a shift register in which shift stages (transfer stages) corresponding to the number of rows (vertical pixels) of the pixel array unit 10 are connected in cascade, and sequentially outputs scanning pulses. Thus, each row of the pixel array unit 10 is selectively scanned in order. However, the vertical selection circuit 21 does not have access to the rows of the OPB unquestionable area 103 and the effective unquestionable area 101A so that it does not have a shift stage corresponding to each row of the OPB unquestionable area 103, or The configuration is such that it exists but skips, and the selected scanning is performed by skipping each row.

  Here, the case where the vertical selection circuit 21 is configured by a shift register has been described as an example, but the vertical selection circuit 21 can also be configured by a decoder. When the vertical selection circuit 21 is configured using a decoder, a control circuit may be assembled so as not to select each row of the OPB unquestionable area 103 and the valid unquestionable area 101A.

  The pulse line 22 transmits a pulse for driving the drive line 12 (hereinafter referred to as “drive pulse”). Each AND circuit in the AND circuit group 23 supplies a driving pulse input via the pulse line 22 to the row selected by the vertical selection circuit 21. Each buffer circuit of the buffer circuit group 24 drives the drive line 12 of the row selected by the vertical selection circuit 21 by a drive pulse output from each AND circuit of the AND circuit group 23.

  The fixed voltage supply circuit 25 constitutes means for supplying a predetermined fixed voltage to the pixels in each row of the OPB unquestioned area 103 and keeping the pixels in a reset state, and resets the pixels in each row of the OPB unquestioned area 103. By maintaining the state, the charge generated in the pixels in each row of the OPB unquestioned region 103, that is, the dark current charge, is discarded, for example, to the power source of the pixel 1.

  As an example, in a pixel including a charge transfer transistor that transfers a charge of a photoelectric conversion element to a floating diffusion portion and a reset transistor when the potential of the floating diffusion portion is reset to a power supply potential, each gate electrode of the charge transfer transistor and the reset transistor In addition, by supplying a fixed voltage from the fixed voltage supply circuit 25 to keep these transistors in an on state, dark current charges generated in the photoelectric conversion element are transferred from the photoelectric conversion element to the floating diffusion portion, and further from the floating diffusion portion. Discard (reset) the pixel power.

  The column signal processing circuit unit 30 includes column signal processing circuits 31 corresponding to the number of horizontal pixels, each input terminal being connected to each output terminal of the vertical signal line 11. The column signal processing circuit 31 includes, for example, an S / H (sample hold) circuit and a CDS (Correlated Double Sampling) circuit. As the column signal processing circuit 41, a circuit configuration including an A (analog) / D (digital) conversion circuit may be used.

  The horizontal drive circuit 40 includes a horizontal signal line 41, a horizontal selection switch group 42 connected between each output terminal of the column signal processing circuit 41 and the horizontal signal line 41, and a horizontal selection circuit 43. ing.

  The horizontal selection circuit 43 includes a shift register and the like, and sequentially selects and drives each switch of the horizontal selection switch group 42. However, the horizontal selection circuit 43 does not have a shift stage corresponding to each column of the OPB unquestion area 103 or shifts so as not to access each column of the OPB unquestion area 103 and the valid unquestion area 101A. Although there are stages, the configuration is such that skipping is performed, and each column is skipped to perform selective scanning.

  Here, the case where the horizontal selection circuit 43 is configured by a shift register is described as an example, but the horizontal selection circuit 43 can also be configured by a decoder. When the horizontal selection circuit 43 is configured using a decoder, a control circuit may be assembled so as not to select each column of the OPB unquestionable area 103 and the valid unquestionable area 101A.

  Each switch of the horizontal selection switch group 42 sequentially outputs the signal of the pixel 1 output from the column signal processing circuit 31 for each column to the outside through the horizontal signal line 41 by the selection driving by the horizontal selection circuit 43.

  Subsequently, the circuit operation of the CMOS solid-state imaging device according to this embodiment having the above-described configuration will be described. Here, for each pixel 1 of the pixel array unit 10, the signal of the pixel 1 is sequentially read out from the left to the right for each row and from the lower row to the upper row.

  By the selective scanning in the vertical direction (from the bottom to the top) by the vertical selection circuit 21 of the vertical drive circuit 20, the OPB unquestioned region 103o (not shown in FIG. 1) on the lower outer edge of the effective pixel region 101 is skipped. Each row in the lower OPB area 102 is accessed sequentially, and then the rows in the effective pixel area 101 are accessed in turn, jumping over the inner OPB unquestioned area 103i and the valid unquestioned area 101A.

  Next, each row of the upper OPB area 102 is accessed in order by jumping over the upper unquestionable area 101A and the inner OPB unquestion area 103i of the effective pixel area 101, and then the outer OPB unquestion area 103o (FIG. 1). The vertical scanning in one field is completed. That is, in the vertical scanning in each field, access is performed except for the pixels in each row in the OPB unquestioned areas 103i and 103o and each row in the valid unquestioned area 101A, so that each pixel in the OPB unquestioned areas 103i and 103o and the valid unquestioned area 101A. This signal is skipped.

  Here, the dark current charges are accumulated in the pixels where the OPB unquestioned areas 103i and 103o and the valid unquestioned area 101 are not accessed and are not always selected, and the dark current charges overflow to adjacent pixels. There is concern about dirtying the image signal. As a countermeasure, in the CMOS solid-state imaging device according to the present embodiment, the fixed voltage supply circuit 25 is provided in the vertical drive circuit 20, and the fixed voltage supply circuit 25 applies a fixed voltage to each pixel in the OPB unrelated regions 103i and 103o. To give.

  As an example, as described above, in a pixel including a charge transfer transistor and a reset transistor, by applying a fixed voltage from the fixed voltage supply circuit 25 to each gate electrode of the charge transfer transistor and the reset transistor, the transistors are turned on. The charge generated in the photoelectric conversion element is transferred from the photoelectric conversion element to the floating diffusion portion, and further transferred (reset) from the floating diffusion portion to the power source of the pixel.

  As a result, even if pixels in each row of the OPB unquestioned regions 103i and 103o and the valid unquestioned region 101A, that is, pixels in a row that is not always accessed, are always in a clear (reset) state, even if dark current charges are generated in these pixels. Since the dark current charge is discarded by the power source and does not accumulate, adverse effects on adjacent pixels due to leakage of the dark current charge can be avoided.

  On the other hand, for each row selected by the vertical selection scan by the vertical selection circuit 21, the effective pixel region 101 is scanned by the horizontal selection circuit 43 of the horizontal drive circuit 40 in the horizontal direction (from left to right in the figure). The OPB unquestioned area 103o on the left outer edge is skipped, and each column of the left OPB area 102 is first accessed in order, and then the innermost OPB unquestionable area 103i and the effective unquestionable area 101A are jumped to the effective pixel area 101. Each column is accessed sequentially.

  Next, the valid unquestioned area 101A on the right side of the valid pixel area 101 and the OPB unquestioned area 103i are skipped, and each column of the OPB area 102 on the right side is accessed in order, and then the OPB unquestioned area 103o is jumped. That is, in the horizontal scanning for each row, access is performed except for the pixels in each column of the OPB unquestioned areas 103i and 103o, so that the signals of the pixels in the OPB unquestioned areas 103i and 103o are skipped.

  In this horizontal scanning, even if each pixel in the OPB unquestioned areas 103i and 103o and the effective unquestioned area 101A is skipped, the dark current voltage photoelectric conversion element is used in the vertical scanning operation sequence in which access is performed in units of rows. Since the transfer to the floating diffusion portion and the reset from the floating diffusion portion to the power source are performed, even the pixels in the column that are not accessed do not adversely affect the adjacent pixels due to the leakage of dark current charges.

  In this way, the pixels in the other regions, that is, the effective unrequired pixels, are accessed by the vertical drive circuit 20 and the horizontal drive circuit 40 without accessing the pixels in the OPB unrequired regions 103i, 103o and the effective unrequired region 101A. The signals of the pixels in the effective pixel area 101 excluding the area 101A and the pixels in the OPB area 102 excluding the OPB unquestioned areas 103i and 103o can be sequentially read.

  FIG. 3 shows an image of signal output when the signal of each pixel is read from the pixel array unit 10 in units of rows in the CMOS solid-state imaging device according to the present embodiment.

  In the scanning for each row, the rows of the OPB unrelated area 103o at the outer edge are physically arranged, but each row of the OPB unquestioned area 103o is skipped, so the OPB row signal 303 of the OPB area 102 is output first. . As the line advances, physically, the row of the OPB unquestioned area 103i and the line of the valid unquestioned area 101A on the inner edge are arranged, but each line of the OPB unquestioned area 103i and each line of the valid unquestioned area 101A are skipped. Next, an effective row signal 404 for the effective pixel region 101 is output.

  When the access to the row of the effective pixel area 101 is finished, the effective unquestionable area 101A and the OPB unquestionable area 103i on the inner edge are physically arranged, but this is also skipped. Then, the OPB row signal 303 of the OPB area 102 is output. As the line advances, the line of the OPB unquestioned area 103o at the outer edge is physically arranged, but this is also skipped. As a result, an image of a vertical period signal as shown in FIG. 3 is obtained. The valid row signal 304 is constituted by the valid row signal 304 following the OPB row signal 303 in order to skip the OPB unquestioned column, the valid unquestioned column, and the OPB column after the valid column.

  In this way, by skipping the signals of the pixels in the OPB unquestioned areas 103i and 103o and the effective unquestioned area 101A that are unnecessary for image processing, the signals of the pixels in the OPB unquestioned areas 103i and 103o and the valid unquestioned area 101A are read out. Since there is no useless period and the signal constituting one row and the signal constituting one frame are shortened by that amount, the frame rate of the CMOS solid-state imaging device is increased.

  Further, even if the sizes of the OPB unquestioned areas 103i and 103o and the effective unquestioned area 101A are increased, the frame rate does not change because the pixel signal is not read out from that size, and therefore the effective pixel area 101 to the OPB area 102 are not changed. Since a structure capable of reducing light leakage to each pixel to a level that does not cause a substantial problem can be easily realized, stable signal processing is performed using the signal level of each pixel in the OPB region 102 as a black level reference. Will be able to.

  In the above-described embodiment, the case where the present invention is applied to a CMOS solid-state image sensor has been described as an example. However, the present invention is not limited to this application example, and is applicable to XY address type solid-state image sensors other than CMOS solid-state image sensors. Applicable. Further, the present invention is not limited to an XY address type solid-state image pickup device, but is applicable to a charge transfer type solid-state image pickup device represented by a CCD (Charge Coupled Device) solid-state image pickup device.

  When applied to a charge transfer type solid-state image pickup device represented by a CCD solid-state image pickup device, a charge discharge portion is provided adjacent to a horizontal charge transfer portion arranged on one side of the pixel array portion, and the charge discharge portion 1 and the horizontal charge transfer unit, a gate unit is disposed, and when the signal charge is transferred in units of rows from the pixel array unit to the horizontal charge transfer unit in the OPB unquestioned regions 103i and 103o, the transferred 1 By discarding the charge for the row to the charge discharging portion via the gate portion, the signal constituting one frame can be shortened.

  However, regarding the OPB unquestioned regions 103i and 103o on both sides of the effective pixel region 101, even if the charge of the portion can be selectively discarded to the charge discharging portion, the horizontal charge transfer portion has a portion corresponding thereto. Since a horizontal transfer operation is also performed, it is impossible to shorten a signal constituting one row.

[Application example]
The CMOS solid-state imaging device according to the embodiment described above is suitable for use as an imaging device in an imaging apparatus (camera module) such as a digital still camera or a video camera.

  FIG. 4 is a block diagram showing an example of the configuration of the imaging apparatus according to the present invention. As shown in FIG. 4, the imaging apparatus according to this example includes a lens 41, an imaging device 42, a signal processing circuit 43, and a controller 44, which are part of an optical system.

  The lens 41 forms image light from the subject on the imaging surface of the imaging device 42. The imaging device 42 outputs an image signal obtained by converting the image light imaged on the imaging surface by the lens 41 into an electrical signal in units of pixels. As the imaging device 42, the CMOS solid-state imaging device according to the above-described embodiment is used.

  The signal processing circuit 43 includes an amplifier that amplifies the signal level of the image signal output from the imaging device 42, and performs various signal processing on the image signal. The controller 44 controls the imaging device 42 and the signal processing circuit 43 in accordance with each operation mode set by the user.

  As described above, in the imaging apparatus such as a digital still camera or a video camera, the CMOS solid-state imaging device according to the above-described embodiment is mounted as the imaging device 42, so that the CMOS solid-state imaging device is unnecessary for image processing. Since the pixels of the OPB unquestioned area are not accessed and the signals of these pixels are skipped, the frame rate of the imaging device 42 can be increased.

It is a block diagram which shows the outline of a structure of the CMOS solid-state image sensor which concerns on one Embodiment of this invention. It is a figure which shows an example of a structure of a pixel array part. In the CMOS solid-state imaging device according to the present embodiment, it is a diagram illustrating an image of signal output when a signal of each pixel is read from the pixel array unit in units of rows. It is a block diagram which shows an example of a structure of the imaging device which concerns on this invention. It is a figure which shows the image of the signal output used for description of the subject of a prior art.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Pixel, 10 ... Pixel array part, 11 ... Vertical signal line, 12 ... Drive line, 20 ... Vertical drive circuit, 21 ... Vertical selection circuit, 23 ... AND circuit group, 24 ... Buffer circuit group, 30 ... Column signal Processing circuit section 40 ... Horizontal drive circuit 41 ... Horizontal signal line 42 ... Horizontal selection switch group 43 ... Horizontal selection circuit 101 ... Effective pixel region 101A ... Effective unquestionable region 102 ... OPB (optical black) region 103, 103i, 103o ... OPB unquestioned area

Claims (5)

A pixel array unit having an optical black region in which pixels including photoelectric conversion elements are two-dimensionally arranged in a matrix and light-shielded pixels are arranged around the effective pixel region;
Driving means for accessing a pixel other than the pixel region located in the peripheral portion of the optical black region and reading the signal from each pixel when reading the signal from each pixel of the pixel array unit; A solid-state imaging device. The solid-state imaging device according to claim 1, wherein the driving unit maintains each pixel in a pixel region located at a peripheral portion of the optical black region in a reset state. The pixel includes a charge transfer transistor that transfers the charge of the photoelectric conversion element to a floating diffusion portion, and a reset transistor that resets the potential of the floating diffusion portion to a power supply potential.
The solid-state imaging device according to claim 2, wherein the driving unit holds the charge transfer transistor and the reset transistor in an on state. A method of driving a solid-state imaging device having a pixel array portion having an optical black region in which pixels including photoelectric conversion elements are arranged two-dimensionally in a matrix and light-shielded pixels are arranged around an effective pixel region,
When reading a signal from each pixel of the pixel array unit, a solid-state image pickup device that reads a signal from each pixel by accessing a pixel other than the pixel region located at a peripheral portion of the optical black region Driving method. A pixel array unit having an optical black region in which pixels including photoelectric conversion elements are arranged two-dimensionally in a matrix and a light-shielded pixel is arranged around an effective pixel region, and a signal is transmitted from each pixel of the pixel array unit. A solid-state imaging device that accesses a pixel other than the pixel region located in the peripheral portion of the optical black region and reads a signal from each pixel,
An image pickup apparatus comprising: an optical system that forms image light from a subject on an image pickup surface of the solid-state image pickup element.

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