JP2006229374A - Frequency difference detection apparatus and method, frequency discrimination apparatus and method, and frequency synthesizer and method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a frequency difference detection apparatus capable of detecting a frequency difference between a frequency of an input signal and a prescribed reference frequency with high accuracy even when the input signal includes many noises. <P>SOLUTION: The frequency difference detection apparatus includes: a complex sine wave generating circuit 3 for generating a complex sine wave; a multiplier circuit 4 for multiplying the input signal with the complex sine wave; a first integration circuit 5 for integrating a result of multiplication by the multiplier circuit 4 in a temporal direction; a first square circuit 6 for obtaining a square of an absolute value of the complex signal being an output signal from the first integration circuit 5; a second square circuit 7 for obtaining a square of an absolute value of an instantaneous amplitude of the input signal; a second integration circuit 8 for integrating an arithmetic result of the second square circuit 7 in a temporal direction; and a frequency difference arithmetic circuit 9 for obtaining a difference between the frequency of the input signal and an oscillated frequency of the complex sine wave on the basis of a ratio of an output signal level of the first square circuit 6 to an output signal level of the second integration circuit 8. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a frequency difference detection device that detects a frequency difference between a frequency of an input signal and a predetermined reference frequency, a frequency discrimination device that discriminates the frequency difference, and a discrimination result of the frequency difference detection device and the frequency discrimination device. The present invention relates to a frequency synthesizer that synthesizes a frequency equal to an input signal based on the frequency. In particular, the present invention relates to a frequency difference detection device and a frequency discrimination device having high detection system and discrimination accuracy in an input signal including a lot of noise.

  As an apparatus for measuring the frequency distribution of an input signal, for example, there is a spectrum analyzer. Patent Document 1 discloses a configuration of a circuit that can be used as a detector of a spectrum analyzer. Here, the band-limited input signal is converted to a low frequency by using a complex sine wave generated by a local oscillator, and unnecessary high frequency components are removed by a low-pass filter to reduce the amplitude and phase of the input signal. Detected. A similar configuration is also found in Patent Document 2. Here, it is used as a part of a demodulator that detects the amplitude of a modulated signal from a high-frequency signal generated by amplitude modulation. Amplitude modulation uses a carrier wave to shift the frequency distribution of the modulated signal as it is to the high frequency side, so the demodulator is a circuit that detects the frequency distribution of the input signal by shifting it to the low frequency side by the carrier frequency. Can also be considered.

  On the other hand, instead of detecting the overall frequency distribution of the input signal, there is a case where it is desired to automatically determine whether or not the input signal includes a specific frequency component. For example, there is a case where it is desired to determine a color television system in analog broadcasting. In the NTSC system adopted in Japan and the United States, the color subcarrier frequency is about 3.58 MHz (precisely 3.579545 MHz), whereas in the PAL system adopted in Europe, the color subcarrier frequency is about A frequency different from 4.43 MHz (exactly 4.4361875 MHz) is employed. In the SECAM system, the color subcarrier frequency is switched between 4.25 MHz and 4.40625 MHz every horizontal period. For this reason, a global color television receiver requires a circuit for determining the color subcarrier frequency of the input video signal.

  In the transmission of color television signals, the amplitude of the color subcarrier may be greatly attenuated or a lot of noise may be mixed due to the characteristics of the transmission path. Therefore, it is not always necessary to measure the signal amplitude and signal power for each frequency with the same configuration as the spectrum analyzer, and to evaluate the magnitude of the measured value for a specific frequency component by adding a circuit. The frequency cannot be determined correctly.

  Patent Document 3 is an example of a circuit that determines whether the color subcarrier frequency is 3.58 MHz or 4.43 MHz. Here, a trap filter having a stop band around 4.43 MHz is used. A color burst signal that is a reference for the color subcarrier frequency is extracted from the input video signal, the signal obtained by passing the color burst signal through the trap filter is compared with the color burst signal itself, and the color burst signal is attenuated by the trap filter. If so, the color subcarrier frequency of the input video signal is determined to be 4.43 MHz, and if not attenuated, it is determined to be 3.58 MHz. This method is characterized in that the frequency discrimination result does not depend on the amplitude of the color burst signal. However, when the noise amplitude is large, there is a possibility that an erroneous frequency discrimination may be performed depending on whether or not the noise component is attenuated by the trap filter. is there.

  On the other hand, Patent Document 4 is an example of a circuit that determines that the color subcarrier frequency is different for each horizontal period, and uses this determination result to identify that the input video signal is a SECAM system. Here, it is utilized that the phase delay of the RLC resonance circuit is approximately +90 degrees on the high frequency side of the resonance frequency and is approximately −90 degrees on the low frequency side. In order not to affect the discrimination even if the resonance frequency of the resonance circuit is slightly shifted, a color subcarrier of 4.40625 MHz (or 4.25 MHz) is converted to 654 kHz (or 810 kHz) using a complex sine wave of 5.06 MHz. The resonance frequency of the resonance circuit is set to 732 kHz. When the real component of the signal converted to low frequency is passed through the resonance circuit and multiplied by the imaginary component, the positive / negative of the multiplication result is detected, so that the frequency of the input signal becomes the reference frequency (5.06 MHz−732 kHz = 4.328 MHz) can be determined.

  This method is characterized by the fact that the frequency discrimination result does not depend on the amplitude of the color subcarrier and is also relatively insensitive to noise, but is not suitable for use in discriminating large frequency differences. . In order to prevent the frequency discrimination accuracy from being lowered even when the frequency difference with respect to the resonance frequency is small, it is necessary to use a resonance circuit having a high Q value. When a resonance circuit having a high Q value is used, an input signal having a large frequency difference with respect to the resonance frequency cannot pass through the resonance circuit, so that the multiplication result is close to 0 regardless of the frequency difference. Even when the frequency of the input signal is close to the resonance frequency, the multiplication result is a value close to 0. Therefore, it is difficult to determine the correct frequency for an input signal having a substantially large frequency difference with respect to the resonance frequency. Therefore, it is impossible to determine with high accuracy whether the color subcarrier frequency is 3.58 MHz or 4.43 MHz using this circuit for identifying the SECAM system as it is.

US Pat. No. 4,594,555 (pages 21-22, FIG. 6) US Pat. No. 4,090,145 (page 10-11, FIG. 4) Japanese Patent No. 3500883 (page 4, FIG. 1) Japanese Patent Laid-Open No. 10-051802 (page 3, FIG. 1)

  The present invention has been made to solve the above-described problems, and is capable of determining the frequency difference between the two regardless of the frequency of the input signal and the reference frequency and is less susceptible to noise. The object is to obtain a difference detection device.

This invention
In the frequency difference detection device that detects the frequency difference between the frequency of the input signal and a predetermined reference frequency,
Complex sine wave generating means for generating a complex sine wave having an oscillation frequency equal to the reference frequency;
Multiplying means for multiplying the complex sine wave generated by the complex sine wave generating means and the input signal;
First integrating means for integrating the multiplication results of the multiplying means in a time direction;
First absolute value calculation means for obtaining an absolute value of the integration result of the first integration means or a value proportional to the square of the absolute value;
Second absolute value calculation means for obtaining an absolute value of the instantaneous amplitude of the input signal or a value proportional to the square of the absolute value;
Second integrating means for integrating the calculation results of the second absolute value calculating means in the time direction;
Frequency difference calculation means for obtaining a frequency difference between the frequency of the input signal and the reference frequency based on the ratio of the calculation result of the first absolute value calculation means and the integration result of the second integration means. A characteristic frequency difference detection apparatus is provided.

  In the present invention, the complex sine wave generating means is configured to multiply the input signal and the complex sine wave having the oscillation frequency equal to the reference frequency and integrate the multiplication results, so that the noise component is removed in the integration process, Even if the input signal includes a lot of noise, there is an effect that the frequency difference between the frequency of the input signal and the reference frequency can be determined with high accuracy.

Embodiment 1 FIG.
FIG. 1 is a diagram showing a configuration of a frequency discriminating apparatus according to Embodiment 1 of the present invention and a frequency difference detecting apparatus forming a part thereof. The frequency discriminating apparatus in FIG. 1 is configured to be able to discriminate whether the color subcarrier frequency of the input video signal is 3.58 MHz or 4.43 MHz, and the frequency difference forming part of the frequency discriminating apparatus. The detection device is configured to detect a difference from 3.58 MHz and 4.43 MHz in the color subcarrier frequency of the input video signal.

  The composite video signal Vc is input to the DC removal circuit 1. The direct current removal circuit 1 is a filter having a gain at zero direct current and allowing a frequency component of 3.58 MHz to 4.43 MHz, which is a color subcarrier frequency of the NTSC system or PAL system, to pass therethrough almost without attenuation. Since the main purpose of the DC removal circuit 1 is to remove a DC component, it may be a bandpass filter having a stop band in DC or a high-pass filter having a stop band in DC. Further, it may be a clamp circuit (in other words, a circuit that subtracts a signal level corresponding to the DC level of the input signal from the input signal and outputs the DC signal) from the video signal. Video clamps (eg pedestal clamps) are a well-known technique.

  The output signal of the DC removal circuit 1 is input to the burst gate 2. Similarly, the burst gate pulse BGP input to the burst gate 2 is a signal that becomes active during a part of the back porch in the horizontal blanking period. Usually, in this period, a color burst signal which is a reference for the color subcarrier frequency is superimposed. In the burst gate 2, a color burst signal is extracted from the output signal of the DC removal circuit 1 using the burst gate pulse BGP.

  The complex sine wave generation circuit 3 generates a complex sine wave having an oscillation frequency equal to a predetermined reference frequency f. The multiplication circuit 4 obtains the product of the color burst signal extracted by the burst gate 2 and the complex sine wave generated by the complex sine wave generation circuit 3. The output of the multiplier circuit 4 is a complex number. The first integration circuit 5 is a circuit that integrates the output signal of the multiplication circuit 4 in the time direction over one horizontal period. One horizontal period can be measured based on the horizontal synchronization signal. For example, if the integration value is reset to 0 each time a reference edge of the horizontal synchronization signal is detected, the integration result is updated every horizontal period. The first squaring circuit 6 calculates the square of the absolute value of the complex signal that is the output signal of the first integrating circuit 5.

  On the other hand, the color burst signal extracted by the burst gate 2 is also input to the second square circuit 7. The second squaring circuit 7 obtains the square of the absolute value of the output signal of the burst gate 2. The second integrating circuit 8 is a circuit that integrates the output signal of the second squaring circuit 7 in the time direction over one horizontal period. The measurement for one horizontal period can be performed in the same manner as the first integration circuit 5 based on the horizontal synchronization signal.

The frequency difference calculation circuit 9 uses the output signal of the first squaring circuit 6 and the output signal of the second integration circuit 8 to determine the difference between the color subcarrier frequency and the reference frequency for each horizontal period, and Output a signal corresponding to the difference.
The threshold processing circuit 25A determines whether or not the frequency obtained by the frequency difference calculation circuit 9 is smaller than a predetermined value, and outputs a signal RD indicating the determination result.
The frequency difference calculation circuit 9 and the threshold processing circuit 25A use the output signal of the first square circuit 6 and the output signal of the second integration circuit 8 to determine whether the reference frequency and the color subcarrier frequency are different by one horizontal. A discrimination circuit 61 that discriminates every period is configured.

  Hereinafter, the internal configuration of each part of the frequency discrimination device of FIG. 1 will be described in more detail with reference to FIGS.

  FIG. 2 is a diagram showing the internal configuration of the complex sine wave generation circuit 3 and the multiplication circuit 4. A complex sine wave generated by the complex sine wave generation circuit 3, where exp (x) is the base x of the natural logarithm, j is an imaginary unit, π is the pi, f is the oscillation frequency of the complex sine wave, and t is time. The signal is assumed to be exp (−j2πft). Hereinafter, for simplicity, C = cos (2πft) and S = sin (2πft) are set, and a complex sine wave signal generated by the complex sine wave generation circuit 3 is represented by C−jS. Further, it is assumed that the output signal of the burst gate 2 is also a complex number, and this is expressed as X + jY. C, S, X, and Y are functions of time t. At this time, the output signal of the multiplication circuit 4 is (X + jY) × (C−jS). The real part is XC + YS, and the imaginary part is -XS + YC.

  In order to perform the above multiplication, the complex sine wave generation circuit 3 includes a cosine wave generation circuit 10 that generates a signal represented by C. The 90-degree phase shifter 11 generates a signal represented by −S by shifting the output signal of the cosine wave generation circuit 10 by 90 degrees. C generated by the cosine wave generation circuit 10 and -S generated by the 90-degree phase shifter 11 are output to the multiplication circuit 4. It can be considered that the complex sine wave generation circuit 3 having such a configuration outputs the real part and the imaginary part of the complex sine wave signal C-jS separately. Note that -S may be generated not by shifting the output signal of the cosine wave generation circuit 10 by 90 degrees but by using a circuit that generates a sine wave in the same manner as the cosine wave generation circuit 10.

  The multiplier circuit 4 is a circuit for obtaining a product of the complex signal X + jY and C−jS. In the complex signal X + jY, it is assumed that the real part X and the imaginary part Y are input from different terminals. The multiplier circuit 4 includes four multipliers. The first multiplier 12 calculates XC, the second multiplier 13 calculates -YS, and the third multiplier 14 calculates YC. The fourth multiplier 15 calculates -XS. Further, the subtracter 16 subtracts the output signal of the second multiplier 13 from the output signal of the first multiplier 12 to obtain XC + YS. On the other hand, the adder 17 adds the output signal of the third multiplier 12 and the output signal value of the fourth multiplier 13 to obtain -XS + YC. Considering the output signal of the subtractor 16 as a real part and the output signal of the adder 17 as an imaginary part, it is considered that the multiplication circuit 4 has calculated the product of the complex signal X + jY and the complex sine wave generated by the complex sine wave generation circuit 3. It is done.

  In the above description, the output signal of the burst gate 2 is considered to be the complex signal X + jY. However, when the imaginary part Y of the output signal of the burst gate 2 is always 0, the output signal of the multiplication circuit 4 is XC-jXS. It becomes. At this time, the second multiplier 13, the third multiplier 14, the subtracter 16, and the adder 17 are unnecessary, and the circuit can be simplified. If the output signal XC of the first multiplier 12 is output as a real part and the output signal -XS of the fourth multiplier 15 is output as an imaginary part, the output signal X of the burst gate 2 and the complex sine wave signal C-jS The product is calculated.

  Here, the complex sine wave generation circuit 3 generates C and -S, but C and S may be generated. Even in this case, by adding and subtracting appropriately (that is, using an adder instead of the subtracter 16 and using a subtracter instead of the adder 17), a real number that is the product of the complex signal X + jY and C-jS It can be easily understood that the part XC + YS and the imaginary part -XS + YC are obtained. The same applies to the case where Y is always 0.

  FIG. 3 is a diagram showing an internal configuration of the first integrating circuit 5. The first integration circuit 5 is a circuit that integrates the output signal of the multiplication circuit 4 over one horizontal period. Since the output signal of the multiplier circuit 4 is a complex signal, the first integrator 18 that integrates the real part of the output signal of the multiplier circuit 4 in the time direction and the imaginary part of the output signal of the multiplier circuit 4 are integrated in the time direction. A second integrator 19 is prepared. The first integrator 18 and the second integrator 19 output the integrated value every time the reference edge of the horizontal synchronizing signal is input, and then reset to zero. The integrated values (values immediately before reset) of the first integrator 18 and the second integrator 19 are output to the first square circuit at the subsequent stage.

  FIG. 4 is a diagram showing an internal configuration of the first squaring circuit 6. The first squaring circuit 6 is a circuit for obtaining the square of the absolute value of the complex signal that is the output signal of the first integrating circuit 5. If the real part of the output signal of the first integrating circuit 5 can be expressed by P and the imaginary part can be expressed by Q, the output signal of the first squaring circuit 6 becomes P ^ 2 + Q ^ 2. However, it is assumed that x and y are arbitrary numbers, and “x ^ y” represents x to the power of y. Of the circuits built in the first squaring circuit 6, the first square computing unit 20 is a circuit for obtaining P ^ 2, and the second square computing unit 21 is a circuit for obtaining Q ^ 2, and the addition The unit 22 is a circuit for adding P 2 + Q 2 by adding the output signal of the first square calculator 20 and the output signal of the second square calculator 21. The output signal of the adder 22 is output to the subsequent frequency difference detection circuit 9 as the output signal of the first square circuit 6.

  The second squaring circuit 7 is a circuit for obtaining the square of the absolute value of the output signal (instantaneous amplitude) of the burst gate 2. If the imaginary part Y of the output signal X + jY of the burst gate 2 is always 0, X ^ 2 can be obtained. Therefore, the second squaring circuit 7 can be configured with a simple multiplier. On the other hand, when the imaginary part Y is not always 0, the output of the second squaring circuit 7 must be X ^ 2 + Y ^ 2, so that the internal configuration is the same as that of the first squaring circuit 6 shown in FIG. It becomes a composition.

  The second integrating circuit 8 is a circuit that integrates the output signal of the second squaring circuit 7 over one horizontal period. Since there is no imaginary part in the output signal of the second squaring circuit 7, the second integrating circuit 8 is exactly the same as the first integrator 18 (FIG. 3) built in the first integrating circuit 5. It is realizable with the structure of.

FIG. 5 is a diagram showing an internal configuration of the frequency difference calculation circuit 9. The divider 23 divides the output signal of the first squaring circuit 6 by the output signal of the second integrating circuit 8. The division result of the divider 23 is a value Sd corresponding to the difference d between the oscillation frequency f of the complex sine wave and the color subcarrier frequency F, as will be described later. The third integrator 24 resets the integrated value to 0 each time the reference edge of the vertical synchronizing signal is detected, and each time the reference edge of the horizontal synchronizing signal is detected, the third integrator 24 adds the current integrated value to the current integrated value. This circuit adds the division results.
The threshold processing circuit 25A is high level when the output signal of the frequency difference calculation circuit 9, that is, the integrated value which is the output signal of the third integrator 24 is larger than a predetermined threshold value, otherwise it is low level. Is a circuit that outputs.
The output signal RD of the threshold processing circuit 25A is a signal indicating the frequency discrimination result by the discrimination circuit 61. When the output signal of the threshold processing circuit 25A (and hence the output signal of the discrimination circuit 61) is at a high level, it indicates that there is almost no difference between the oscillation frequency f of the complex sine wave and the color subcarrier frequency, and is at a low level. Sometimes the difference between the oscillation frequency f of the complex sine wave and the color subcarrier frequency is large.

Of the circuits described with reference to FIGS. 1 to 5, a frequency difference detection device that detects the frequency difference between the color subcarrier frequency of the input video signal and the reference frequency is configured by the portion up to the frequency difference calculation circuit 9. The frequency discriminating apparatus is constituted by the portion up to the threshold processing circuit 25A. The DC removal circuit 1 and the burst gate 2 may be viewed as a part of the frequency difference detection device or the frequency discrimination device, and may be viewed as not a part thereof.
As will be described in detail below, the output of the frequency difference detection device (the output of the frequency difference calculation circuit 9) is a signal having a value corresponding to the difference between the color subcarrier frequency of the input video signal and the reference frequency. The processing circuit 25A performs comparison with a predetermined value to determine whether the frequency difference is large. Specifically, the color subcarrier frequency of the input video signal is 3.58 MHz or 4.43 MHz. Can be determined. This point will be described in detail below.

For the color burst signal X extracted by the DC removal circuit 1 and the burst gate 2, the amplitude of the color burst signal is written as A, the color subcarrier frequency is written as F, and the phase difference between the color burst signal and the complex sine wave is written as θ. When
X = Asin (2πFt + θ)
It is assumed that the signal is represented by A represents the envelope of the color burst signal, which is actually a function of time t, but for the sake of simplicity, it is assumed below that A is a constant independent of time.

Since the complex sine wave generated by the complex sine wave generation circuit 3 is C−jS, when F−f = d and F + f = D are set, the real part of the output signal of the multiplication circuit 4 is
XC = (A / 2) × {sin (2πDt + θ) + sin (2πdt + θ)}
And the imaginary part is
−XS = (A / 2) × {cos (2πDt + θ) −cos (2πdt + θ)}
It becomes. From the above, for both the real part and the imaginary part of the output signal of the multiplier circuit 4, a (relatively) high frequency D sine wave (or cosine wave) oscillation and a (relatively) low frequency d sine wave (or cosine wave). It can be seen that it is represented by the sum (or difference) of oscillations. Here, if F = f in particular, d = 0 and D = 2f, and the real part XC is
XC = (A / 2) × {sin (4πft + θ) + sin (θ)}
And the imaginary part -XS is
−XS = (A / 2) × {cos (4πft + θ) −cos (θ)}
It becomes. FIG. 6A shows the XC waveform when F = 3.58, f = 4.43, and θ = 0, and FIG. 6B shows the −XS waveform. Similarly, the XC waveform when F = f = 4.43 and θ = π / 3 is shown in FIG. 7A, and the −XS waveform is shown in FIG. 7B. In FIG. 6 and FIG. 7, the frequency d component among the frequency components included in the output signal of the multiplication circuit 4 is indicated by a broken line. As can be seen from FIG. 7, when F = f, the component of frequency d is a DC component.

The first integration circuit 5 integrates the output signal of the multiplication circuit 4 over one horizontal period. Since the integration is performed on the color burst signal extracted by the burst gate 2, the integration is actually performed only during the period in which the color burst signal exists in one horizontal period. Hereinafter, this period is set as T, and a case where T = 2000 ns is considered. Of the frequency components included in the output signal of the multiplier circuit 4, the high frequency component of the frequency D becomes 0 every time it is integrated for a period of 1 / D corresponding to one cycle. If T is set to a sufficiently long period with respect to 1 / D, the component of the frequency D hardly affects the integration result of the first integration circuit 5. Therefore, it can be seen that the integration result of the first integration circuit 5 depends only on the low frequency component of the frequency d. When there is a large difference between F and f, T is sufficiently large with respect to 1 / d, and the integration result of the first integration circuit 5 is close to 0. On the other hand, when F and f are almost equal, the component of frequency d can be regarded as almost a direct current, so that the integration result P of XC is
P = (AT / 2) sin (θ)
The integrated result Q of -XS is
Q = − (AT / 2) cos (θ)
It becomes close to. FIG. 8 shows the result of integrating the waveform of FIG. 6A in the time direction and the result of integrating the waveform of FIG. 7A in the time direction. It can be seen from FIG. 7 that the integration result when F = 3.58 MHz and f = 4.43 MHz is closer to 0 than when F = f = 4.43 MHz.

The first squaring circuit 6 is a circuit that calculates P ^ 2 + Q ^ 2. Especially when F = f
P ^ 2 + Q ^ 2 = (AT / 2) ^ 2
Thus, the output of the first square circuit becomes a value that does not depend on the phase difference θ between the color burst signal and the complex sine wave. On the other hand, when the difference between F and f is large, the integration results P and Q are values close to 0, so the calculation result of the first squaring circuit 6 is also close to 0. FIG. 9 shows the difference in the calculation results of the first squaring circuit 6 when F = 3.58, f = 4.43, and θ = 0, and when F = f = 4.43 and θ = π / 3. Indicates. It can be seen from FIG. 8 that the calculation result in the former case is considerably smaller than the latter.

On the other hand, the color burst signal is also input to the second square circuit 7. In the second squaring circuit 7,
X ^ 2 = (A ^ 2) * {1-cos (4πFt + 2θ)} / 2
Is calculated. The output signal of the second squaring circuit 7 is composed of a DC component proportional to the square of A and a component of frequency 2F that is twice the color subcarrier frequency. When the output of the second squaring circuit 7 is accumulated in the time direction by the second integrating circuit 8, if T is set to a period sufficiently longer than 1 / (2F), the result of integrating the frequency components of 2F is almost zero. , (A ^ 2) T / 2 is output as the integration result of the second integration circuit 8. Since the integration result of the second integration circuit 8 does not depend on the color subcarrier frequency F, the same result is obtained regardless of whether F = 3.58 MHz or F = 4.43 MHz.

  From the above, when the output signal of the first squaring circuit 6 is divided by the output signal of the second integrating circuit 8 in the divider 23 built in the frequency difference arithmetic circuit 9, T / 2 is obtained when F and f are equal. It can be seen that the value becomes closer to 0 as the difference between F and f increases. Similarly, the output signal of the third integrator 24 that integrates the division result of the divider 23 over one vertical period also becomes a larger value as the difference between F and f becomes smaller, and becomes 0 as the difference between F and f becomes larger. A close value. Accordingly, the threshold processing circuit 25A performs threshold processing on the output signal of the third integrator 24 at the timing when the reference edge of the vertical synchronizing signal is detected, so that the color subcarrier frequency of the input video signal is 3. It can be determined whether the frequency is 58 MHz or 4.43 MHz. The threshold value used in the threshold processing circuit 25A may be appropriately determined in consideration of the pulse width of the burst gate pulse BGP.

  Here, consider a case where noise is superimposed on the color burst signal. First, consider a case where the color subcarrier frequency F is substantially the same as the oscillation frequency f of the complex sine wave and the difference between the noise frequency and f is large. As described above, when the difference between F and f is large, the integration result of the first integration circuit 5 becomes a value close to zero. Similarly, when the difference between the noise frequency and f is large, the noise component hardly affects the integration result of the first integration circuit 5. On the other hand, the integration result of the second integration circuit 8 is slightly larger than that in the case where there is no noise due to noise. Usually, the value is the result of F = f = 4.43 MHz shown in FIG. The results at 3.58 MHz and f = 4.43 MHz are not so indistinguishable. Therefore, it can be said that the frequency calculation result of the frequency difference calculation circuit 9 and the frequency determination result of the determination circuit 61 are hardly affected by noise.

  Next, consider a case where the difference between F and f is large and noise is superimposed on the color burst signal. As described above, the integration result of the second integration circuit 8 is (A ^ 2) T / 2 for a signal having an arbitrary amplitude with an amplitude of A (when no noise is superimposed). . The square of the signal amplitude is a value corresponding to the signal power, and the value obtained by multiplying the signal power by time is a value corresponding to the signal energy (a value obtained by multiplying the energy by 1/2). Therefore, it can be considered that the second squaring circuit 7 and the second integrating circuit 8 obtain a value corresponding to the total energy of the output signal of the burst gate 2. Similarly, (AT / 2) ^ 2 which is the output of the first squaring circuit 6 is a value corresponding to a value obtained by further multiplying the energy of the signal having the frequency f by the time T (the above “multiplied value”). Can be considered to be a value obtained by multiplying by 1/4. Normally, noise does not concentrate on a specific frequency, so it is considered that the energy of a noise component having a frequency f is sufficiently small with respect to the total energy of noise. Therefore, it is considered that the value of the divider 23 is close to 0, and it can be seen that the frequency difference calculation result of the frequency difference calculation circuit 9 and the frequency determination result of the determination circuit 61 are hardly affected by noise.

  In the above description, it has been described that the frequency can be determined when the imaginary part Y of the output signal of the burst gate 2 is always 0. However, the output signal of the burst gate 2 is a complex signal (Y ≠ 0. In some cases, the frequency can be similarly determined. Further, the example in which the output signal of the burst gate 2 is a sine wave signal has been described, but any waveform may be used as long as it is a periodic signal. Is possible.

In the first embodiment, the oscillation frequency of the complex sine wave generated by the complex sine wave generation circuit 3 is 4.43 MHz. However, the oscillation frequency of the complex sine wave is almost equal to an arbitrary value close to 4.43 MHz. Same result. The oscillation frequency of the complex sine wave may be an arbitrary value close to 3.58 MHz or 3.58 MHz. In this case, the output signal of the threshold processing circuit 25A is at a high level when F = 3.58 MHz, and is at a low level when F = 4.43 MHz.
Thus, when it is known in advance that the frequency of the color burst of the input composite video signal Vc is one of the two values, either of the two values or this The discrimination can be performed by setting the values close to each other.

  In the first embodiment, the amplitude of the complex sine wave generated by the complex sine wave generation circuit 3 is 1. However, the amplitude of the complex sine wave may be arbitrary. In particular, the sine wave and the cosine wave constituting the complex sine wave may have different amplitudes.

  In the first embodiment, only two types of frequencies of 3.58 MHz and 4.43 MHz are discriminated. However, three or more types of frequencies to be discriminated may exist. For example, ten types of frequencies from F0 to F9 may be determined. In this case, the oscillation frequency of the complex sine wave generated by the complex sine wave generation circuit 3 may be sequentially switched from F0 to F9 until the output signal of the threshold processing circuit 25A becomes high level.

  In the first embodiment, the integration results of the first integration circuit 5 and the second integration circuit 8 are reset to 0 every horizontal period, but the integration period is arbitrary. For example, if the integration result is reset to 0 every vertical period, the third integrator 24 built in the frequency difference calculation circuit 9 is omitted, and the output of the divider 23 is used as the output of the frequency difference calculation circuit 9. Even if the signal is directly input to the threshold processing circuit 25A, the frequency difference can be detected and the frequency can be similarly determined.

  In the first embodiment, the output signal of the multiplication circuit 4 is used as the input signal of the first integration circuit 5. For example, a low-pass filter having a stop band in the frequency D between the multiplication circuit 4 and the first integration circuit 5. May be inserted. In this case, it is considered that the result of integrating the product of the color burst signal and the complex sine wave is generated by the combination of the low-pass filter having the stop band at the frequency D and the first integrating circuit.

Embodiment 2. FIG.
FIG. 10 is a diagram showing the configuration of the frequency discriminating apparatus according to Embodiment 2 of the present invention and the frequency difference detecting apparatus forming a part thereof. 10, the same reference numerals as those in FIG. 1 denote the same or similar members.

  In the second embodiment, the first squaring circuit 6 and the second squaring circuit 7 are replaced with a first absolute value computing circuit 26 and a second absolute value computing circuit 27, and the DC removal circuit 1 is replaced with the burst gate 2 and the first The second embodiment is different from the first embodiment in that it is arranged between two absolute value calculation circuits 27.

  In the first embodiment, the DC removal circuit 1 is arranged in front of the burst gate 2, but it may be arranged between the burst gate 2 and the first absolute value calculation circuit 27. Since the oscillation frequency f of the complex sine wave generated by the complex sine wave generation circuit 3 is normally a sufficiently large frequency with respect to the direct current (frequency zero), even if a direct current component remains in the output signal of the burst gate 2. This is because the integration result of the first integration circuit 5 is hardly affected.

  FIG. 11 shows the internal configuration of the first absolute value calculation circuit 26. The configuration is the same as that of the first squaring circuit 6 shown in FIG. 4 except that the square root calculator 28 is added. The square root calculator 28 is a circuit for obtaining the square root of the output signal of the adder 22. As described in the first embodiment, since the output signal of the adder 22 is (AT / 2) ^ 2 when F = f, the output signal of the square root calculator 28 is AT / when F = f. 2

  The second absolute value calculation circuit 27 is a circuit for obtaining the absolute value of the output signal of the DC removal circuit 1. When the output signal of the DC removal circuit 1 is a complex signal, the internal configuration of the second absolute value calculation circuit 27 is exactly the same as the internal configuration of the first absolute value calculation circuit 26. On the other hand, when the imaginary part of the output signal of the DC removal circuit 1 is always 0, the second absolute value calculation circuit 27 performs the same calculation as the real number absolute value calculation. That is, when the output signal level of the DC removal circuit 1 is 0 or more, the signal is passed as it is, and when it is less than 0, the sign is inverted and a signal level greater than 0 is output to the second integration circuit 8. . Since the calculation result of the second absolute value calculation circuit 27 varies depending on the magnitude of the DC component, when determining the frequency difference from f for a specific frequency F that is not DC, it is necessary to remove the DC component in the preceding process. There is.

  Assuming that the output signal of the DC removal circuit 1 is Asin (2πFt + θ), the output signal of the second integration circuit 8 is approximately 2AT / π regardless of the color subcarrier frequency F. Therefore, the output signal of the divider 23 built in the frequency difference calculation circuit 9 is 4 / π when F = f, and becomes a value close to 0 as the difference between F and f increases.

  In the first embodiment, the output signal of the divider 23 has a value that depends on T. However, in the second embodiment, the output signal of the divider 23 has a value that does not depend on T. Normally, the color burst signal exists during a part of the period when the burst gate pulse BGP is active, and the value of T is precisely the value when the color burst signal exists while the burst gate pulse BGP is active. It is a value that indicates the period. The period in which the color burst signal exists is not necessarily constant. Therefore, strictly speaking, in the first embodiment, it is necessary to change the threshold value according to the value of T, but in the second embodiment, the frequency discrimination result is the value of T. There is an advantage that it is not affected by fluctuations.

A first square circuit 6 and a second square circuit 7 shown in FIG. 1 are used instead of the first absolute value calculation circuit 26 and the second absolute value calculation circuit 27 in the frequency difference calculation circuit shown in FIG. You can also.
Further, instead of the first square circuit 6 and the second square circuit 7 in the frequency difference arithmetic circuit 9 shown in FIG. 1, a first absolute value arithmetic circuit 26 and a second absolute value arithmetic circuit shown in FIG. 27 can also be used.
In the circuit shown in FIG. 10 as well, a frequency difference detecting device is constituted by the portion up to the frequency difference calculating circuit 9, and a frequency discriminating device is constituted by the portion up to the threshold processing circuit 25A.

Embodiment 3 FIG.
FIG. 12 is a diagram showing the configuration of the frequency discriminating apparatus according to Embodiment 3 of the present invention and the frequency difference detecting apparatus forming a part thereof. 12, the same reference numerals as those in FIG. 1 denote the same or similar members.
In the third embodiment, the first integration circuit 5 in the first embodiment is replaced with the first filter circuit 29, and the second integration circuit 7 is replaced with the second filter circuit 30, respectively. This is an example using a frequency difference arithmetic circuit 31 and a threshold processing circuit 25B having an internal configuration different from that of the arithmetic circuit 9 and the threshold processing circuit 25A.

  FIG. 13 is a diagram showing the internal configuration of the filter circuit 29. In the figure, a first coefficient ROM 32 is a circuit for storing a filter tap coefficient that is a real number, and a second coefficient ROM 33 is a circuit for storing a filter tap coefficient that is an imaginary number. . The first convolution calculator 34 is a circuit that performs a convolution operation between the real part of the output signal of the multiplication circuit 4 and the real tap coefficient stored in the first coefficient ROM 32. Similarly, the second convolution calculator 35 performs a convolution operation between the imaginary part of the output signal of the multiplication circuit 4 and the imaginary tap coefficient stored in the second coefficient ROM 33, and the third convolution calculator 36. Performs a convolution operation between the imaginary part of the output signal of the multiplier circuit 4 and the real tap coefficient stored in the first coefficient ROM 32, and the fourth convolution calculator 36 is a real number of the output signal of the multiplier circuit 4. And the imaginary tap coefficient stored in the second coefficient ROM 33 are convolved. The subtractor 38 is a circuit for subtracting the calculation result of the second convolution calculator 35 from the calculation result of the first convolution calculator 34, and the adder 39 is the calculation result of the third convolution calculator 36 and the fourth calculation result. This is a circuit for adding the calculation results of the convolution calculator 37. The calculation result of the subtractor 38 represents the real part of the output signal of the first filter circuit 29, and the calculation result of the adder 39 represents the imaginary part of the output signal of the filter circuit 30. When the tap coefficient of the first filter circuit 29 is only a real number, the second coefficient ROM 33, the second convolution calculator 35, the fourth convolution calculator 37, the subtractor 38, and the adder 39 are The calculation result of the first convolution calculator 34 is used as the real part of the output signal of the first filter circuit 29, and the calculation result of the third convolution calculator 36 is used as the output signal of the first filter circuit 29. The imaginary part may be used. Further, when the first filter circuit 29 is configured by an analog circuit, the first coefficient ROM 32 and the second coefficient ROM 33 are unnecessary, and the first convolution calculator 34, the second convolution calculator 35, The third convolution calculator 36 and the fourth convolution calculator 37 can be configured by circuit elements such as resistors, capacitors, and coils.

  The second filter circuit 30 is a filter that removes high frequency components from the output signal of the second squaring circuit 7. Since the output signal of the second squaring circuit 7 is always a real number, and the output signal of the second filter circuit 30 is also a real number, the second filter circuit 30 includes the first coefficient ROM 32 and the first convolution calculator 34. It is possible to configure with a circuit corresponding to.

FIG. 14 is a diagram showing an internal configuration of the frequency difference calculation circuit 31. The divider 40 is a circuit that divides the output signal of the first square circuit 6 by the output signal of the second filter circuit 30. It is assumed that division is performed only for the color burst signal that has passed through the burst gate 2. The fourth integrator 41 is a circuit that integrates the output signal of the divider 40 in the time direction. The integrated value of the fourth integrator 41 is reset to 0 each time the reference edge of the vertical synchronization signal is detected.
Unlike the threshold value processing circuit 25A of FIG. 5, the threshold value processing circuit 25B connected to the subsequent stage of the frequency difference calculation circuit 31 has a small frequency difference when the input signal Sd is smaller than a predetermined value. A signal RD indicating the determination result is output. That is, when the output signal level of the fourth integrator 41 at the time point when the reference edge of the vertical synchronizing signal is detected is higher than a predetermined threshold value, the high level is output otherwise.
The frequency difference calculation circuit 31 and the threshold processing circuit 25B constitute a discrimination circuit 62.

Of the circuits described with reference to FIGS. 12 to 14, the frequency difference detecting device is configured by the portion up to the frequency difference calculating circuit 31, and the frequency determining device is configured by the portion up to the threshold processing circuit 25B. ing.
As will be described in detail below, the output of the frequency difference detection device (the output of the frequency difference calculation circuit 31) is a signal having a value corresponding to the difference between the color subcarrier frequency of the input video signal and the reference frequency. The processing circuit 25B performs comparison with a predetermined value to determine whether the frequency difference is large. Specifically, the color subcarrier frequency of the input video signal is 3.58 MHz or 4.43 MHz. Can be determined. This point will be described in detail below.

The first filter circuit 29 is configured such that the gain at the frequency corresponding to the sum D (= F + f) of the frequency F of the input signal and the reference frequency f is different from the gain at the frequency corresponding to the difference d (= F−f). Configured. For example, first consider the case where the first filter circuit 29 has a low-pass filter characteristic. If the gain of the first filter circuit 29 is 0 at the frequency D = F + f and G at the frequency d = F−f, then the real part P of the output signal of the first filter circuit 29 is
P = (AG / 2) × sin (2πdt + θ)
And the imaginary part Q is
Q = − (AG / 2) × cos (2πdt + θ)
It becomes. At this time, the output signal of the first squaring circuit 6 is P ^ 2 + Q ^ 2 = (AG / 2) ^ 2.
It becomes. On the other hand, in the second filter circuit 30, the gain at the direct current is relatively larger than the gain at the frequency twice the frequency of the input signal. For example, if the gain of the second filter circuit 30 is 0 at the frequency 2F and 1 at the direct current, the output signal of the second filter circuit 30 is (A ^ 2) / 2. Therefore, the output signal of the divider 40 is (G ^ 2) / 2. If the characteristic of the first filter circuit 29 is determined so that the value of G becomes smaller as the value of d goes away from 0, the output signal of the divider 40 becomes a value representing the frequency difference between F and f. The output signal of the fourth integrator 41 integrated over one vertical period is also a value representing the frequency difference between F and f.

The threshold value processing circuit 25B is high level when the output signal of the frequency difference calculation circuit 31, that is, the integrated value Sd, which is the output signal of the fourth integrator 41, is equal to or higher than a predetermined threshold value, and low level otherwise. Is a circuit that outputs. The output signal RD of the threshold processing circuit 25B is a signal indicating the frequency discrimination result. When the output signal RD of the threshold processing circuit 25B is at a high level, it indicates that there is almost no difference between the oscillation frequency f of the complex sine wave and the color subcarrier frequency, and when it is at the low level, the oscillation frequency f of the complex sine wave. And the difference in color subcarrier frequency is large.
In this way, even with the frequency discriminating apparatus according to the third embodiment, frequency discrimination can be performed as in the first embodiment.

The first filter circuit 29 may have the characteristics of a band pass filter or a high pass filter. Consider a case where the gain of the first filter circuit 29 is G at frequency D and 0 at frequency d. In this case, the real part P of the output signal of the first filter circuit 29 is
P = (AG / 2) × sin (2πDt + θ)
And the imaginary part Q is
Q = (AG / 2) × cos (2πDt + θ)
It becomes. Therefore, the output signal of the first multiplication circuit 6 is also (AG / 2) ^ 2. If the value of G is maximized at the frequency 2f and becomes smaller as it goes away from the frequency 2f, even if the first filter circuit 29 has the characteristics of a bandpass filter, it has the characteristics of a lowpass filter. The same result as the case.

  Instead of the first square circuit 6 and the second square circuit 7 in the frequency difference calculation circuit 31 shown in FIG. 12, a first absolute value calculation circuit 26 and a second absolute value calculation circuit 27 shown in FIG. It can also be used.

Embodiment 4 FIG.
FIG. 15 is a diagram showing the configuration of the frequency discriminating apparatus according to Embodiment 4 of the present invention and the frequency difference detecting apparatus forming a part thereof. 15, the same reference numerals as those in FIG. 1 or 10 indicate the same or similar members.

  The major difference between the first embodiment and the fourth embodiment is that the output signal of the multiplication circuit 4 is input not only to the first integration circuit 5 but also to the third filter circuit 42. The connection and internal configuration of DC removal circuit 1, burst gate 2, complex sine wave generation circuit 3, multiplication circuit 4, and first integration circuit 5 are the same as those in the first embodiment. The output signal of the first integrating circuit 5 is input to the first absolute value circuit 26 described in the second embodiment. The third filter circuit 42 is a circuit that removes high frequency components from the output signal of the multiplication circuit 4. The internal configuration of the third filter circuit 42 is the same as the internal configuration of the first filter circuit 29 of FIG. The second absolute value calculation circuit 27 calculates the absolute value of the complex signal that is the output signal of the third filter circuit 42, and the third integration circuit 43 sets the output signal of the second absolute value calculation circuit 27 in the time direction. Accumulate.

The frequency difference calculation circuit 44 obtains the difference between the color subcarrier frequency of the input video signal and the reference frequency using the output signal of the first integration circuit 5 and the output signal of the third integration circuit 43, and determines the difference. Output the corresponding signal.
The threshold processing circuit 25C determines whether or not the frequency difference obtained by the frequency difference calculation circuit 44 is smaller than a predetermined value, and outputs a signal RD indicating the determination result.
Whether the color subcarrier frequency is different for each horizontal period by using the output signal of the first integration circuit 5 and the output signal of the third integration circuit 43 by the frequency difference calculation circuit 44 and the threshold processing circuit 25C. A discriminating circuit 63 for discriminating the above is configured.

  FIG. 16 is a diagram showing an internal configuration of the frequency difference calculation circuit 44. The line inversion pulse generation circuit 45 is a circuit that generates a line inversion pulse whose level is inverted between a high level and a low level every time a reference edge of the horizontal synchronization signal is detected. The divider 46 divides the output signal of the first squaring circuit 6 by the output signal of the second integrating circuit. The division result of the divider 46 is a value representing the difference between the oscillation frequency f of the complex sine wave and the color subcarrier frequency F. The fifth integrator 47 resets the integrated value to 0 each time the reference edge of the vertical synchronization signal is detected, and whenever the falling edge of the line inversion pulse generated by the line inversion pulse generation circuit 45 is detected. This is a circuit for adding the division result of the divider 46 to the current integrated value. The sixth integrator 48 resets the integrated value to 0 each time the reference edge of the vertical synchronization signal is detected, and whenever the rising edge of the line inversion pulse generated by the line inversion pulse generation circuit 45 is detected. This is a circuit for adding the division result of the divider 46 to the current integrated value. As a result of the above operation, the difference between the color subcarrier frequency of the even line and the oscillation frequency of the complex sine wave is stored in one of the fifth integrator 47 and the sixth integrator 48, and the odd line is stored in the other. A value corresponding to the difference between the color subcarrier frequency and the complex sine wave oscillation frequency is stored. The subtractor 49 subtracts the integrated value of the sixth integrator 48 from the integrated value of the fifth integrator 47 at the timing of the reference edge of the vertical synchronization signal. The output signal of the subtracter 49 is a signal indicating the frequency discrimination result by the frequency difference calculation circuit 44. When the output signal of the frequency difference calculation circuit 44 is close to 0, the difference between the color subcarrier frequency and the reference frequency is approximately the same for the odd lines and the even lines, and the color subcarrier frequency is the same for the odd lines and the even lines as they move away from 0. This indicates that the difference between the oscillation frequencies of the complex sine wave and the complex sine wave is greatly different, that is, the possibility that the input video signal is a SECAM signal.

  The threshold processing circuit 25C outputs a subtraction result that is an output signal of the subtractor 49, that is, a high level when the output of the frequency difference calculation circuit 44 is larger than a predetermined threshold, and a low level otherwise. Circuit. The output signal RD of the threshold processing circuit 25C is a signal indicating the frequency discrimination result. When the output signal RD of the threshold processing circuit 25C is at a high level, it indicates that there is almost no difference between the oscillation frequency f of the complex sine wave and the color subcarrier frequency, and when it is at the low level, the oscillation frequency f of the complex sine wave. And the difference in color subcarrier frequency is large.

Of the circuits shown in FIGS. 15 and 16, the frequency difference detecting device is constituted by the portion up to the frequency difference calculating circuit 44, and the frequency discriminating device is constituted by the portion up to the threshold processing circuit 25C.
The output of the frequency difference detection device (the output of the frequency difference calculation circuit 44) is a signal having a value corresponding to the difference between the color subcarrier frequency of the input video signal and the reference frequency. , It is possible to determine whether the frequency difference is large, specifically, whether the input video signal is in the SECAM system. This point will be described in detail below.

As described in the second embodiment, the output signal of the first absolute value calculation circuit 26 is AT / 2 when F = f, and becomes a value close to 0 as the difference between F and f increases. On the other hand, the output signal of the third filter circuit 42 can be considered in the same way as the output signal of the first filter circuit 29 in the third embodiment. That is, in the third filter circuit 42, the gain at the frequency corresponding to the sum D (= F + f) of the frequency F of the input signal and the reference frequency f is different from the gain at the frequency corresponding to the difference d (= F−f). Configured as follows. For example, if the gain of the third filter circuit 42 is 0 at the frequency D and G at the frequency d, the real part P of the output signal of the third filter circuit 42 is
P = (AG / 2) × sin (2πΔt + θ)
And the imaginary part Q is
Q = − (AG / 2) × cos (2πΔt + θ)
It becomes. Assuming that the gain G of the third filter circuit 42 is a value close to 1 in a wide range near d, the output signal of the second absolute value calculation circuit 27 is approximately A / 2. The same applies to the case where the gain of the third filter circuit 42 is 0 at the frequency d and G at the frequency D. When this is integrated for the period T by the third integration circuit 43, the output signal of the third integration circuit 43 is AT / 2.

  Therefore, the division result of the divider 46 becomes 1 when F = f, and becomes a value close to 0 as the difference between F and f increases. In the SECAM system, the color subcarrier frequency is switched between 4.40625 MHz and 4.25 MHz every horizontal period. For example, when the oscillation frequency f of the complex sine wave generated in the complex sine wave generation circuit 3 is 4.43 MHz, the color The division result of the horizontal period in which the subcarrier frequency is 4.40625 MHz should be larger than the division result of the horizontal period in which the color subcarrier frequency nest is 4.25 MHz. Accordingly, the integrated value of the fifth integrator 47 and the integrated result of the sixth integrator 48 should be different values. On the other hand, in the PAL method or NTSC method in which the color subcarrier frequency is constant, the integrated value of the fifth integrator 47 and the integrated value of the sixth integrator 48 should be almost the same value. Therefore, as the output signal level of the subtractor 49 is farther from 0, the difference between F and f is greatly different between the even and odd lines, and the possibility that the input video signal is in the SECAM system. Will be expensive.

  In the fourth embodiment, since the output signal of the multiplication circuit 4 is input to the third filter circuit 42, it is difficult to discriminate the frequency when the value of d is very large and the frequency d overlaps the stop band of the low-pass filter. However, on the other hand, since the high frequency noise is removed by the third filter circuit 42, a frequency discriminating apparatus that is less susceptible to noise can be configured. Even when the frequency spectrum of the input signal is concentrated on two frequencies F0 and F1, for example, F0-f is set as the pass band of the third filter circuit 42, and F1-f is If the third filter circuit 42 is set to the stop band, it is possible to accurately determine the frequency F0 even if the signal energy of the frequency component F1 is large.

Although the frequency discriminating apparatus for identifying that the input video signal is the SECAM system has been described in the fourth embodiment, the frequency difference calculating circuit 44 and the threshold processing circuit 25C are shown in FIG. 9 and the threshold value processing circuit 25A can also be used as a frequency discriminating device that discriminates whether the color subcarrier frequency is 3.58 MHz or 4.43 MHz. Similarly, if the frequency difference arithmetic circuit 9 and the threshold processing circuit 25A of the first embodiment are replaced with the frequency difference arithmetic circuit 44 and the threshold processing circuit 25C of the fourth embodiment, the frequency discrimination according to the first embodiment is performed. The apparatus can be used as a frequency discriminating apparatus for identifying that an input video signal is a SECAM system.
Also in the frequency discriminating apparatus according to the second and third embodiments, the frequency for identifying that the input video signal is the SECAM system by appropriately changing the internal configuration of the frequency difference calculation circuit and the threshold processing circuit. It can be used as a discrimination device.

Embodiment 5. FIG.
FIG. 17 is a diagram showing the configuration of the frequency discriminating apparatus according to Embodiment 5 of the present invention and the frequency difference detecting apparatus forming a part thereof. In FIG. 17, the same reference numerals as those in FIG. 12 or 15 indicate the same or similar members.
In the fifth embodiment, the first integration circuit 5 of the fourth embodiment is replaced with the first filter circuit 29 of the third embodiment, and the second integration circuit 43 of the fourth embodiment is omitted. .
In the fifth embodiment, the third filter 42 has a wider pass band than the first filter 29.

  As described in the third embodiment, the output of the first squaring circuit 6 in the third embodiment is (AG / 2) ^ 2. The output signal of the first absolute value calculation circuit 26 is equal to the square root of the output of the first square circuit 6, and its value is AG / 2. On the other hand, as described in the fourth embodiment, the output signal of the second absolute value calculation circuit 27 is A / 2. Therefore, the output signal of the divider 46 built in the frequency difference calculation circuit 44 is G. If the gain G of the first filter circuit 29 is determined to be different depending on the difference or sum of F and f, the frequency difference between F and f is the same as that of the third embodiment by the frequency discriminating apparatus of the fifth embodiment. Can be determined.

  In the frequency difference calculation circuit shown in FIG. 15 and the frequency difference calculation circuit shown in FIG. 17, the first square shown in FIG. 1 is used instead of the first absolute value calculation circuit 26 and the second absolute value calculation circuit 27. The circuit 6 and the second squaring circuit 7 can also be used.

Embodiment 6 FIG.
The sixth embodiment is an example of a frequency synthesizer that synthesizes a frequency equal to the color subcarrier frequency of the input video signal using a frequency discriminator similar to the frequency discriminator of the fourth embodiment. 18, the same reference numerals as those in FIG. 15 denote the same or similar members. In the sixth embodiment, the frequency difference arithmetic circuit 9 and the threshold processing circuit 25A of the first embodiment are used instead of the frequency difference arithmetic circuit 44 and the threshold processing circuit 25C of the fourth embodiment. Each of the frequency difference calculation circuit 44 and the frequency difference calculation circuit 9 includes a division circuit that performs division using two inputs, and replacement between the two is possible.

18 further includes a free-running oscillation frequency selection circuit 50, a phase comparator 51, a loop filter 52, and an oscillator 53. Among these, the phase comparator 51, the loop filter 52, and the oscillator 53 constitute a PLL.
In the frequency synthesizer of FIG. 18, a complex sine wave generation circuit 54 is used instead of the complex sine wave generation circuit 3 of FIG. The complex sine wave generation circuit 54 generates a complex sine wave having the frequency f as in the case of the complex sine wave generation circuit 3, but the oscillation frequency of the complex sine wave is switched according to the selection result of the free-running oscillation frequency selection circuit 50. It is different in that it comes to be.

  The color subcarrier signal of the input video signal may be slightly deviated from the NTSC standard or PAL standard value. A method using a PLL (phase locked loop) is well known as a method for reproducing the color subcarrier signal that is phase-synchronized with the color subcarrier of the input video signal by correcting this frequency shift. However, the lock range of a PLL that reproduces a color subcarrier signal is generally not wide enough to include both 3.58 MHz and 4.43 MHz frequencies. Therefore, in order to reproduce both 3.58 MHz and 4.43 MHz color subcarriers using a single PLL circuit, it is necessary to switch the free-running oscillation frequency of the PLL according to the input signal.

  In the sixth embodiment, in order to appropriately switch the free-running oscillation frequency of the PLL, the frequency discrimination result by the discrimination circuit 61 including the frequency difference calculation circuit 9 and the threshold processing circuit 25A is used. The discrimination circuit 61 comprising the frequency difference calculation circuit 9 and the threshold processing circuit 25C is high when the oscillation frequency f of the complex sine wave generated by the complex sine wave generation circuit 3 is substantially equal to the color subcarrier frequency F of the input video signal. Low level is output when the level is not so (when the difference between the oscillation frequency f of the complex sine wave generated by the complex sine wave generation circuit 3 and the color subcarrier frequency F of the input video signal is large).

  When the frequency discrimination result of the discrimination circuit 61 becomes low level for a certain period (for example, one vertical period), the free-running oscillation frequency selection circuit 50 sets the value of the free-running oscillation frequency currently held to 3.58 MHz and 4 .Switch between 43 MHz. For example, when the value of the free-running oscillation frequency currently held is 3.58 MHz and the output signal of the discrimination circuit 61 is low level for one vertical period, the value of the free-running oscillation frequency is switched to 4.43 MHz. To work. At the same time, the complex sine wave generation circuit 54 switches the oscillation frequency f to a value equal to the self-running oscillation frequency selected by the free-running oscillation frequency selection circuit 50 (according to the output of the free-running oscillation frequency selection circuit 50). .

  As described above, the phase comparator 51, the loop filter 52, and the oscillator 53 constitute a PLL. In an analog PLL circuit, a charge pump is usually arranged between the phase comparator 51 and the loop filter 52, but here a digital PLL circuit is assumed and the charge pump is omitted. The phase comparator 51 multiplies the sine wave generated by the oscillator 53 by the color burst signal that is the output signal of the burst gate 2 to obtain the phase error between the two. The loop filter 52 smoothes the output signal level of the phase comparator 51. The oscillator 53 generates a sine wave oscillation having a frequency corresponding to the sum of the value of the free-running oscillation frequency held by the free-running oscillation frequency selection circuit 50 and the output signal level of the loop filter 52.

  Here, consider a case where the color subcarrier frequency F of the input video signal is slightly shifted from 3.58 MHz. If the free-running oscillation frequency held by the free-running oscillation frequency selection circuit 50 is 3.58 MHz, the output of the discriminating circuit 61 remains at a high level and is slightly increased from 3.58 MHz by the well-known operation of the PLL. A frequency equal to the offset F is synthesized. On the other hand, when the free-running oscillation frequency held by the free-running oscillation frequency selection circuit 50 is 4.43 MHz, the color subcarrier frequency F falls outside the PLL lock range, so the PLL synthesizes a frequency equal to F. I can't. However, the output of the discrimination circuit 61 becomes a low level after one vertical period at the longest, and the free-running oscillation frequency held by the free-running oscillation frequency selection circuit 50 is switched to 3.58 MHz. When the free-running oscillation frequency held by the free-running oscillation frequency selection circuit 50 reaches 3.58 MHz, the color subcarrier frequency F falls within the PLL lock range, and a frequency equal to F is synthesized by a well-known operation of the PLL. become.

  Thus, even when a PLL circuit with a narrow lock range is used, a wide range of frequencies can be synthesized by appropriately switching the free-running oscillation frequency of the PLL based on the frequency discrimination result of the discrimination circuit 61. Is possible.

  In the sixth embodiment, a frequency equal to the color complex carrier frequency F is synthesized by switching the oscillation frequency f of the complex sine wave in conjunction with the free-running oscillation frequency of the oscillator 53 using a single frequency discrimination device. However, a plurality of frequency discriminating devices in which the oscillation frequency f of the complex sine wave is fixed to different values may be used. For example, when using a frequency discriminating apparatus having a complex sine wave oscillation frequency f of 3.58 MHz and a frequency discriminating apparatus having a complex sine wave oscillation frequency f of 4.43 MHz, f = 3.58 MHz. When the output of the discrimination circuit built in the frequency discrimination device is at a high level and the output of the discrimination circuit incorporated in the frequency discrimination device at f = 4.43 MHz is at a low level, a free-running oscillation frequency selection circuit 50, the self-running oscillation frequency held by the frequency detector is 3.58 MHz, and conversely, the output of the discrimination circuit built in the frequency discrimination device where f = 3.58 MHz is low level, and the frequency frequency where f = 4.43 MHz. When the output of the discrimination circuit incorporated in the discrimination device is at a high level, the free-running oscillation frequency held by the free-running oscillation frequency selection circuit 50 is 4.43 MHz. And it may be the like to maintain the free-running oscillation frequency of the free-running oscillation frequency selection circuit 50 holds the current when the output of the two judgment circuits at the same level.

  In the sixth embodiment, the oscillator 53 that generates only the sine wave and the complex sine wave oscillation circuit 3 are separately provided. However, the complex sine wave generation circuit that generates both the sine wave and the cosine wave without providing the oscillator 53. 3 may also be used. In this case, the complex sine wave generating circuit 3 is switched between a mode operating at 3.58 MHz and a mode operating at 4.43 MHz, and accordingly, the content of determination is also switched by the frequency difference arithmetic circuit 9. If the oscillation frequency f of the complex sine wave generation circuit 3 is set to a value equal to the frequency corresponding to the sum of the value of the free-running oscillation frequency held by the free-running oscillation frequency selection circuit 50 and the output signal level of the loop filter 52, The oscillator 53 becomes unnecessary. In this case, f changes by a frequency range substantially corresponding to the PLL lock range, but the frequency difference between the upper limit and the lower limit of the PLL lock range is smaller than the frequency difference between 3.58 MHz and 4.43 MHz. Since it is a value, even if the oscillator 53 and the complex sine wave generation circuit 3 are combined, the operation of the frequency difference calculation circuit 9 is hardly affected.

  Although the case where the frequency synthesizer is configured using the frequency difference arithmetic circuit according to the fourth embodiment has been described above, any one of the first, second, third, and fifth embodiments can be used instead of the frequency difference arithmetic circuit according to the fourth embodiment. A frequency synthesizer similar to the above can also be configured using this frequency difference calculation circuit.

Embodiment 7 FIG.
Also, a plurality of frequency difference detection devices having different reference frequencies are provided, the frequency difference detection device outputting the one showing the smallest frequency difference is selected, and the free-running oscillation frequency of the phase locked loop is selected. Further, it may be linked to the reference frequency of the frequency difference detection device.
FIG. 19 shows the configuration of a frequency synthesizer that performs such processing.
The illustrated frequency synthesizer includes first to third frequency difference detectors 71, 72, 73, a free-running oscillation frequency selection circuit 74, a phase comparator 51, a loop filter 52, an oscillator 53, and a direct current elimination. A circuit 1 and a burst gate 2 are included.
Among these, the loop filter 52, the oscillator 53, the DC removal circuit 1, and the burst gate 2 are the same as those shown in FIG.

Each of the first to third frequency difference detection devices 71 to 73 has the same configuration as that of the frequency difference detection device described in the first embodiment except that the reference frequencies are different from each other. Signals Sd1 to Sd3 corresponding to the difference from the frequency are output.
The free-running oscillation frequency selection circuit 74 outputs a signal indicating the smallest frequency difference based on the signals Sd1 to Sd3 output from the first to third frequency difference detection devices 71 to 73. (Any of 71 to 73) is selected, and the free-running oscillation frequency is linked to the reference frequency of the selected frequency difference detection device.
Instead of the frequency difference detection device of the first embodiment, the frequency difference detection device of the second to fifth embodiments may be used.

It is a block diagram which shows the whole structure of the frequency discrimination device of Embodiment 1 of this invention. It is a block diagram which shows the internal structure of the complex sine wave generation circuit 3 and the multiplication circuit 4 which are used in Embodiment 1 of this invention. It is a block diagram which shows the internal structure of the 1st integrating | accumulating circuit 5 used in Embodiment 1 of this invention. It is a block diagram which shows the internal structure of the 1st squaring circuit 6 used in Embodiment 1 of this invention. It is a block diagram which shows the internal structure of the frequency difference calculating circuit 9 used in Embodiment 1 of this invention. FIG. 5 is a waveform diagram showing a waveform of a signal output from a multiplication circuit 4 when the frequency of an input signal is different from a reference frequency. FIG. 5 is a waveform diagram showing a waveform of a signal output from a multiplication circuit 4 when the frequency of an input signal is equal to a reference frequency. FIG. 4 is a diagram showing the output level of the first integrator 18. It is a figure which shows the output level of the 1st squaring circuit. It is a block diagram which shows the whole structure of the frequency discrimination device of Embodiment 2 of this invention. It is a block diagram which shows the internal structure of the 1st absolute value calculating circuit 26 used in Embodiment 2 of this invention. It is a block diagram which shows the whole structure of the frequency discrimination device of Embodiment 3 of this invention. It is a block diagram which shows the internal structure of the 1st filter circuit 29 used in Embodiment 3 of this invention. It is a block diagram which shows the internal structure of the frequency difference calculating circuit 31 used in Embodiment 3 of this invention. It is a block diagram which shows the whole structure of the frequency discrimination device of Embodiment 4 of this invention. It is a block diagram which shows the internal structure of the frequency difference calculating circuit 44 used in Embodiment 4 of this invention. It is a block diagram which shows the whole structure of the frequency discrimination device of Embodiment 5 of this invention. It is a block diagram which shows the whole structure of the frequency synthesizer of Embodiment 6 of this invention. It is a block diagram which shows the whole structure of the frequency synthesizer of Embodiment 7 of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Direct current removal circuit, 2 Burst gate, 3 Complex sine wave generation circuit, 4 Multiplication circuit, 5 1st integrating circuit, 6 1st squaring circuit, 7 2nd squaring circuit, 8 2nd integrating circuit, 9 Frequency Difference calculation circuit, 10 cosine wave generation circuit, 11 90 degree phase shifter, 12 first multiplier, 13 second multiplier, 14 third multiplier, 15 fourth multiplier, 16 subtractor, 17 Adder, 18 first integrator, 19 second integrator, 20 first square operator, 21 second square operator, 22 adder, 23 divider, 24 third integrator, 25A, 25B, 25C threshold processing circuit, 26 first absolute value calculation circuit, 27 second absolute value calculation circuit, 28 square root calculator, 29 first filter circuit, 30 second filter circuit, 31 frequency difference calculation Circuit, 32 first coefficient ROM, 33 2 coefficient ROM, 34 first convolution calculator, 35 second convolution calculator, 36 third convolution calculator, 37 fourth convolution calculator, 38 subtractor, 39 adder, 40 divider, 41 4th integrator, 42 3rd filter circuit, 43 3rd integration circuit, 44 Frequency difference calculation circuit, 45 Line inversion pulse generation circuit, 46 Divider, 47 5th integrator, 48 6th integrator 49 subtractor, 50 free-running oscillation frequency selection circuit, 51 phase comparator, 52 loop filter, 53 oscillator, 71, 72, 73 frequency difference detection device, 74 free-running oscillation frequency selection circuit.

The present invention relates to a frequency difference detection apparatus and method for detecting a frequency difference between a frequency of an input signal and a predetermined reference frequency, a frequency determination apparatus and method for determining the frequency difference, the frequency difference detection apparatus, and a frequency determination apparatus. The present invention relates to a frequency synthesizer and method for synthesizing a frequency equal to an input signal based on the discrimination result of The present invention particularly relates to a frequency difference detection device and method having high detection accuracy and discrimination accuracy in an input signal including a lot of noise, and a frequency discrimination device and method .

This invention
In the frequency difference detection device for detecting the frequency difference between the color subcarrier frequency of the input video signal and a predetermined reference frequency,
Complex sine wave generating means for generating a complex sine wave having an oscillation frequency equal to the reference frequency;
Multiplication means for multiplying the complex sine wave generated by the complex sine wave generation means by the color subcarrier of the input video signal;
First integrating means for integrating the multiplication results of the multiplying means in a time direction;
First absolute value calculation means for obtaining an absolute value of the integration result of the first integration means or a value proportional to the square of the absolute value;
Second absolute value calculating means for obtaining an absolute value of an instantaneous amplitude of a color subcarrier of the input video signal or a value proportional to a square of the absolute value;
Second integrating means for integrating the calculation results of the second absolute value calculating means in the time direction;
Frequency difference calculation means for obtaining a frequency difference between the frequency of the color subcarrier of the input video signal and the reference frequency based on the ratio of the calculation result of the first absolute value calculation means and the integration result of the second integration means; There is provided a frequency difference detecting device characterized by comprising:

In this invention, the complex sine wave generating means multiplies the color subcarrier of the input video signal by the complex sine wave having the oscillation frequency equal to the reference frequency, and integrates the multiplication results. is removed in the process, even when the input video signal includes much noise, there is an effect that the frequency difference between the frequency and the reference frequency of the chrominance of the input video signal subcarrier can be determined with high accuracy.

Claims (12)

In the frequency difference detection device that detects the frequency difference between the frequency of the input signal and a predetermined reference frequency,
Complex sine wave generating means for generating a complex sine wave having an oscillation frequency equal to the reference frequency;
Multiplying means for multiplying the complex sine wave generated by the complex sine wave generating means and the input signal;
First integrating means for integrating the multiplication results of the multiplying means in a time direction;
First absolute value calculation means for obtaining an absolute value of the integration result of the first integration means or a value proportional to the square of the absolute value;
Second absolute value calculation means for obtaining an absolute value of the instantaneous amplitude of the input signal or a value proportional to the square of the absolute value;
Second integrating means for integrating the calculation results of the second absolute value calculating means in the time direction;
Frequency difference calculation means for obtaining a frequency difference between the frequency of the input signal and the reference frequency based on the ratio of the calculation result of the first absolute value calculation means and the integration result of the second integration means. A characteristic frequency difference detection device. In the frequency difference detection device that detects the frequency difference between the frequency of the input signal and a predetermined reference frequency,
Complex sine wave generating means for generating a complex sine wave having an oscillation frequency equal to the reference frequency;
Multiplying means for multiplying the complex sine wave generated by the complex sine wave generating means and the input signal;
A first filtering means having a multiplication result of the multiplication means as an input, a gain at a frequency corresponding to a sum of the frequency of the input signal and the reference frequency, and a gain at a frequency corresponding to a difference;
First absolute value calculation means for obtaining an absolute value of a signal output from the first filter means or a value proportional to the square of the absolute value;
Second absolute value calculation means for obtaining an absolute value of the instantaneous amplitude of the input signal or a value proportional to the square of the absolute value;
A second filter means having a calculation result of the second absolute value calculation means as an input, and a gain at a direct current relatively larger than a gain at a frequency twice the frequency of the input signal;
Frequency difference calculation means for obtaining a frequency difference between the frequency of the input signal and the reference frequency based on the ratio of the calculation result of the first absolute value calculation means and the output of the second filter means. A frequency difference detection device. In the frequency difference detection device that detects the frequency difference between the frequency of the input signal and a predetermined reference frequency,
Complex sine wave generating means for generating a complex sine wave having an oscillation frequency equal to the reference frequency;
Multiplying means for multiplying the complex sine wave generated by the complex sine wave generating means and the input signal;
First integrating means for integrating the multiplication results of the multiplying means in a time direction;
First absolute value calculating means for obtaining an absolute value of an output of the first integrating means or a value proportional to a square of the absolute value;
DC removing means for removing at least a DC component from the input signal;
A second absolute value calculating means for obtaining an absolute value of the instantaneous amplitude of the signal output from the direct current removing means or a value proportional to the square of the absolute value;
Second integrating means for integrating the calculation results of the second absolute value calculating means in the time direction;
Frequency difference calculation means for obtaining a frequency difference between the frequency of the input signal and the reference frequency based on the ratio of the calculation result of the first absolute value calculation means and the output of the second integration means. A frequency difference detection device.   4. The frequency difference detection apparatus according to claim 3, wherein the direct current removing unit is configured by a band pass filter or a high pass filter having a stop band in direct current.   4. The frequency difference detecting apparatus according to claim 3, wherein the direct current removing means subtracts a signal level corresponding to the direct current level of the input signal from the input signal and outputs the subtracted signal level. In the frequency difference detection device that detects the frequency difference between the frequency of the input signal and a predetermined reference frequency,
Complex sine wave generating means for generating a complex sine wave having an oscillation frequency equal to the reference frequency;
Multiplying means for multiplying the complex sine wave generated by the complex sine wave generating means and the input signal;
First integrating means for integrating the multiplication results of the multiplying means in a time direction;
First absolute value calculation means for obtaining an absolute value of the integration result of the first integration means or a value proportional to the square of the absolute value;
Filter means having the multiplication result of the multiplication means as input, a gain at a frequency corresponding to the sum of the frequency of the input signal and the reference frequency, and a gain at a frequency corresponding to the difference are different from each other,
Second absolute value calculation means for obtaining an absolute value of a signal output from the filter means or a value proportional to the square of the absolute value;
Second integrating means for integrating the signals output from the second absolute value calculating means in the time direction;
Frequency difference calculation means for obtaining a frequency difference between the frequency of the input signal and the reference frequency based on the ratio of the calculation result of the first absolute value calculation means and the integration result of the second integration means. A characteristic frequency difference detection device. In the frequency difference detection device that detects the frequency difference between the frequency of the input signal and a predetermined reference frequency,
Complex sine wave generating means for generating a complex sine wave having an oscillation frequency equal to the reference frequency;
Multiplying means for multiplying the complex sine wave generated by the complex sine wave generating means and the input signal;
A first filtering means having a multiplication result of the multiplication means as an input, a gain at a frequency corresponding to a sum of the frequency of the input signal and the reference frequency, and a gain at a frequency corresponding to a difference;
First absolute value calculation means for obtaining an absolute value of a signal output from the first filter means or a value proportional to the square of the absolute value;
The multiplication result of the multiplication means is input, and the gain at the frequency corresponding to the sum of the frequency of the input signal and the reference frequency is different from the gain at the frequency corresponding to the difference.
And second filter means having a wider passband than the first filter means;
Second absolute value calculating means for obtaining an absolute value of a signal output from the second filter means or a value proportional to the square of the absolute value;
Frequency difference calculation means for obtaining a frequency difference between the frequency of the input signal and the reference frequency based on the ratio of the calculation result of the first absolute value calculation means and the calculation result of the second absolute value calculation means. A frequency difference detection apparatus characterized by that. A frequency difference detection device according to any one of claims 1 to 7,
A threshold value processing circuit that compares the frequency difference detected by the frequency difference detection device with a predetermined threshold value to determine whether or not the difference between the frequency of the input signal and the reference frequency is small; Frequency discrimination device.   9. The frequency discriminating apparatus according to claim 8, wherein a reference frequency representing an oscillation frequency of the complex sine wave generated by the complex sine wave generating means is variable. When the threshold value processing circuit determines that the frequency difference between the frequency of the input signal and the reference frequency is large, the complex sine wave generating means changes the reference frequency to a different value. 9. The frequency discriminating apparatus according to claim 8, wherein In a frequency synthesizer that synthesizes a signal having a frequency equal to the frequency of the input signal,
A frequency discrimination device according to claim 8, 9 or 10,
A phase-locked loop for generating a signal that is phase-synchronized with the input signal,
A frequency synthesizer, wherein a free-running oscillation frequency of the phase-locked loop is linked to a change in the reference frequency of the frequency discriminating device. In a frequency synthesizer that synthesizes a signal having a frequency equal to the frequency of the input signal,
A plurality of frequency difference detection devices according to any one of claims 1 to 7 having different reference frequencies;
Based on the detection results of the plurality of frequency difference detection devices, a selection unit that selects, among the plurality of frequency difference detection devices, one having a reference frequency having the smallest frequency difference with an input signal;
A phase-locked loop for generating a signal that is phase-synchronized with the input signal,
The frequency synthesizer, wherein the free-running oscillation frequency of the phase-locked loop is linked to a reference frequency of the frequency difference detection device selected by the selection means.

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