JP2006216735A - Electronic component mounting substrate - Google Patents

Electronic component mounting substrate Download PDF

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JP2006216735A
JP2006216735A JP2005027241A JP2005027241A JP2006216735A JP 2006216735 A JP2006216735 A JP 2006216735A JP 2005027241 A JP2005027241 A JP 2005027241A JP 2005027241 A JP2005027241 A JP 2005027241A JP 2006216735 A JP2006216735 A JP 2006216735A
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electronic component
conductive
insulating substrate
conductive adhesive
adhesive layer
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Mitsuru Saito
充 斎藤
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Alps Alpine Co Ltd
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Alps Electric Co Ltd
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Priority to JP2005027241A priority Critical patent/JP2006216735A/en
Priority to CN 200610006749 priority patent/CN1816250A/en
Publication of JP2006216735A publication Critical patent/JP2006216735A/en
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Abstract

<P>PROBLEM TO BE SOLVED: To provide an electronic component mounting substrate which ensures higher fixing intensity of an electronic component to an insulating substrate. <P>SOLUTION: An electronic component 30 is connected to conductive patterns 11A, 11B via conductive bonding agent layers 20A, 20B by providing an interval L2 between a side end surface 31A1 of an electrode 31A and an end of a connector 11A1 of a conductive pattern 11A, and also providing an interval L3 between a side surface 31B1 of an electrode 31B and end of a connector 11B1 of a conductive pattern 11B. Accordingly, when a peeling force is applied to the electronic component 30, the peeling force is not transferred directly to the conductive patterns 11A, 11B, and the conductive patterns 11A, 11B are not easily peeled. The electronic component 30 is rigidly fixed to the surface of the insulating substrate 10 with conductive bonding agent layers 20A, 20B. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、絶縁基板上に形成された導電パターンに電子部品が接続されている電子部品実装基板に係り、特に、絶縁基板に対する電子部品の固定強度を向上できる電子部品実装基板に関する。   The present invention relates to an electronic component mounting substrate in which an electronic component is connected to a conductive pattern formed on an insulating substrate, and more particularly to an electronic component mounting substrate that can improve the fixing strength of the electronic component to the insulating substrate.

下記特許文献1には、基板へのチップ型電子部品の取り付け方法が開示されている。
図3Aは、従来の、基板へのチップ型電子部品の取り付け方法を示す平面図、図3Bは、図3Aの3−3線での切断断面図である。
Patent Document 1 below discloses a method for attaching a chip-type electronic component to a substrate.
FIG. 3A is a plan view showing a conventional method for attaching a chip-type electronic component to a substrate, and FIG. 3B is a cross-sectional view taken along line 3-3 in FIG. 3A.

フレキシブル基板100では、可撓性を有する合成樹脂フイルム(例えばポリエチレンテレフタレートフイルム)101上に、銀ペースト等をスクリーン印刷することによって回路パターン102,102が形成されており、回路パターン102,102の端部には端子パターン103,103が形成されている。   In the flexible substrate 100, circuit patterns 102 and 102 are formed by screen-printing silver paste or the like on a flexible synthetic resin film (for example, polyethylene terephthalate film) 101, and the ends of the circuit patterns 102 and 102 are formed. Terminal patterns 103, 103 are formed in the part.

端子パターン103,103上には、端子パターン103,103を覆うように、異方性のホットメルトタイプの導電性接着剤104がスクリーン印刷されている。導電性接着剤104は、ポリエステル系熱可塑性樹脂(熱可塑性の樹脂であれば他の樹脂でもよい)の中に金属粉(例えば銅粉,銀粉)と溶剤が混入されている。   An anisotropic hot-melt type conductive adhesive 104 is screen-printed on the terminal patterns 103 and 103 so as to cover the terminal patterns 103 and 103. In the conductive adhesive 104, metal powder (for example, copper powder, silver powder) and a solvent are mixed in a polyester-based thermoplastic resin (other resin may be used as long as it is a thermoplastic resin).

チップ型発光素子200には、その両側面(図示X1側の側面および図示X2側の側面)から下面(図示Z2側の面)にかけて、その表面に直接露出するように電極端子201,201が設けられている。   The chip-type light emitting device 200 is provided with electrode terminals 201 and 201 so as to be directly exposed from the both side surfaces (the side surface on the X1 side in the drawing and the side surface on the X2 side in the drawing) to the bottom surface (the surface on the Z2 side in the drawing). It has been.

そして、チップ型発光素子200の電極端子201,201がそれぞれ、端子パターン103,103の真上の導電性接着剤104上に載置され、チップ型発光素子200がフレキシブル基板100上に載置される。
特開平8−330712号公報
Then, the electrode terminals 201 and 201 of the chip type light emitting element 200 are respectively placed on the conductive adhesive 104 immediately above the terminal patterns 103 and 103, and the chip type light emitting element 200 is placed on the flexible substrate 100. The
JP-A-8-330712

しかし、前記特許文献1に記載の発明では、電極端子201,201が載置され、接着される導電性接着剤104の下で、電極端子201,201に対応する位置に回路パターン102,102が介在している。そして、回路パターン102,102には、導電率を高めるために、ペースト中に銀が多く含まれており、回路パターン102,102の機械的強度は弱い。このため、外部衝撃などによってチップ型発光素子200に引き剥がし力(図示Z1方向に作用する力)が作用したときに、この引き剥がし力が回路パターン102,102に直接伝わり、回路パターン102,102が合成樹脂フイルム101から剥がされてしまう。すなわち、チップ型発光素子200の固定強度が低く、外部衝撃などによってチップ型発光素子200が合成樹脂フイルム101から剥離してしまうといった問題がある。   However, in the invention described in Patent Document 1, the circuit patterns 102 and 102 are provided at positions corresponding to the electrode terminals 201 and 201 under the conductive adhesive 104 on which the electrode terminals 201 and 201 are placed and bonded. Intervene. The circuit patterns 102 and 102 contain a large amount of silver in the paste in order to increase conductivity, and the mechanical strength of the circuit patterns 102 and 102 is weak. For this reason, when a peeling force (a force acting in the Z1 direction in the figure) is applied to the chip-type light emitting element 200 due to an external impact or the like, the peeling force is directly transmitted to the circuit patterns 102, 102, and the circuit patterns 102, 102 Is peeled off from the synthetic resin film 101. That is, there is a problem that the fixing strength of the chip type light emitting element 200 is low and the chip type light emitting element 200 is peeled off from the synthetic resin film 101 due to an external impact or the like.

本発明は上記従来の課題を解決するものであり、電子部品の絶縁基板への固定強度が高い電子部品実装基板を提供することを目的としている。   SUMMARY OF THE INVENTION The present invention solves the above-described conventional problems, and an object thereof is to provide an electronic component mounting substrate having a high strength for fixing an electronic component to an insulating substrate.

本発明は、絶縁基板の表面に、導電性金属粉およびバインダー樹脂を有する導電パターンが形成され、前記絶縁基板上に実装される電子部品が前記導電パターンと導通している電子部品実装基板において、
前記絶縁基板の表面には、導電性フィラーとバインダー樹脂とを有し導電性フィラーの密度が前記導電パターンよりも低い導電性接着剤層が設けられ、この導電性接着剤層は、前記絶縁基板の表面に前記導電パターンを介在させることなく形成され且つ前記導電パターンと導通されており、
前記電子部品が前記導電性接着剤層の上に設置されて、前記電子部品と前記絶縁基板とが前記導電性接着剤層を介して固定されていることを特徴とする。
The present invention provides an electronic component mounting substrate in which a conductive pattern having conductive metal powder and a binder resin is formed on a surface of an insulating substrate, and an electronic component mounted on the insulating substrate is electrically connected to the conductive pattern.
On the surface of the insulating substrate, a conductive adhesive layer having a conductive filler and a binder resin and having a density of the conductive filler lower than that of the conductive pattern is provided. The conductive adhesive layer is formed on the insulating substrate. Is formed without interposing the conductive pattern on the surface and is electrically connected to the conductive pattern,
The electronic component is installed on the conductive adhesive layer, and the electronic component and the insulating substrate are fixed via the conductive adhesive layer.

上記発明では、電子部品が導電性フィラーの混入密度の低い導電性接着剤層を介して絶縁基板の表面に接着され、導電性接着剤層と絶縁基板との間に、導電性金属粉を有する導電パターンが介在していないため、絶縁基板に対する電子部品の固定強度を向上できる。また、導電性接着剤層の比抵抗は導電パターンよりも高いが、導電性接着剤層の通電経路がきわめて短いため、電子部品を含む電子回路の直流抵抗が増大することを抑制できる。   In the said invention, an electronic component is adhere | attached on the surface of an insulated substrate through the conductive adhesive layer with low mixing density of a conductive filler, and has conductive metal powder between a conductive adhesive layer and an insulated substrate. Since the conductive pattern is not interposed, the fixing strength of the electronic component to the insulating substrate can be improved. Further, although the specific resistance of the conductive adhesive layer is higher than that of the conductive pattern, it is possible to suppress an increase in DC resistance of an electronic circuit including an electronic component because the conductive path of the conductive adhesive layer is extremely short.

例えば、本発明は、前記絶縁基板上には、対を成す導電パターンが対向して設けられているとともに、前記対を成す導電パターンの端部間に、対をなす導電性接着剤層が間隔を空けて形成されており、前記電子部品の両端部のそれぞれが前記導電性接着剤層の上に設置されているものとして構成できる。   For example, in the present invention, a pair of conductive patterns are provided on the insulating substrate so as to face each other, and a pair of conductive adhesive layers are spaced between the ends of the pair of conductive patterns. It is possible to configure such that each of both end portions of the electronic component is installed on the conductive adhesive layer.

上記構造では、両導電性接着剤層の間に、前記絶縁基板上から突出する絶縁性の突起が設けられていることが好ましい。   In the above structure, it is preferable that an insulating protrusion protruding from the insulating substrate is provided between the two conductive adhesive layers.

導電性接着剤層は導電性フィラーの混入密度が低いため、溶融状態において、絶縁基板の表面と電子部品の底面との隙間内を毛細管作用で進行していく可能性があるが、前記突起を設けることにより、電子部品の両端部を固定する導電性接着剤層どうしが接触して短絡が生じるのを防止できるようになる。   Since the conductive adhesive layer has a low mixing density of the conductive filler, there is a possibility that in the molten state, the conductive adhesive layer may proceed by a capillary action in the gap between the surface of the insulating substrate and the bottom surface of the electronic component. By providing, it can prevent that the conductive adhesive layer which fixes the both ends of an electronic component contacts, and a short circuit arises.

本発明の電子部品実装基板では、電子部品と絶縁基板とが導電パターンを介在させることなく、導電性接着剤を介して固定されているため、電子部品に剥離力が作用した場合においても、この剥離力が接着力の強い導電性接着剤で受け止められ、前記剥離力が導電パターンに直接に作用しにくくなる。そのため、絶縁基板の表面から導電パターンが剥離することを抑制できる。   In the electronic component mounting substrate of the present invention, the electronic component and the insulating substrate are fixed via the conductive adhesive without interposing the conductive pattern. Therefore, even when a peeling force acts on the electronic component, this The peeling force is received by the conductive adhesive having a strong adhesive force, and the peeling force is less likely to act directly on the conductive pattern. Therefore, it can suppress that a conductive pattern peels from the surface of an insulating substrate.

この結果、電子部品の固定強度を高くでき、外部衝撃などによって電子部品が絶縁基板表面から剥離する可能性を低くできる。   As a result, the fixing strength of the electronic component can be increased, and the possibility that the electronic component is separated from the surface of the insulating substrate due to an external impact or the like can be reduced.

図1は本発明の電子部品実装基板を示す部分平面図、図2は図1の2−2線での切断断面図である。なお、図1では導電パターンの形状等を明確にするために、導電パターンを覆うレジスト層の図示を省略している。   FIG. 1 is a partial plan view showing an electronic component mounting board according to the present invention, and FIG. 2 is a cross-sectional view taken along line 2-2 of FIG. In FIG. 1, the resist layer covering the conductive pattern is not shown in order to clarify the shape of the conductive pattern.

符号10は、ポリエチレンテレフタレート等のポリエステル樹脂やポリイミド樹脂等で形成された可撓性を有する絶縁基板である。図1に示すように、絶縁基板10の表面(図示Z1側の面)には、1対の導電パターン11A,11Bが、図示X1−X2方向に所定間隔L0をあけて互いに対向して形成されている。なお、図1では、1対の導電パターン11A,11Bのみを示しているが、実際には、絶縁基板10上には複数対の導電パターンが形成されている。   Reference numeral 10 denotes a flexible insulating substrate formed of a polyester resin such as polyethylene terephthalate, a polyimide resin, or the like. As shown in FIG. 1, a pair of conductive patterns 11A and 11B are formed on the surface of the insulating substrate 10 (the surface on the Z1 side in the drawing) so as to face each other with a predetermined interval L0 in the X1-X2 direction in the drawing. ing. Although only one pair of conductive patterns 11A and 11B is shown in FIG. 1, a plurality of pairs of conductive patterns are actually formed on the insulating substrate 10.

導電パターン11Aは、接続部11A1と配線部11A2が一体となって構成されており、導電パターン11Bは、接続部11B1と配線部11B2が一体となって構成されている。接続部11A1,11B1は、配線部11A2,11B2よりも幅寸法(図示Y1−Y2方向の寸法)が大きく形成されており、所定の面積を有する、いわゆるランド部として機能している。   In the conductive pattern 11A, the connection portion 11A1 and the wiring portion 11A2 are integrally formed, and in the conductive pattern 11B, the connection portion 11B1 and the wiring portion 11B2 are integrally formed. The connecting portions 11A1 and 11B1 are formed larger in width (dimension in the Y1-Y2 direction in the drawing) than the wiring portions 11A2 and 11B2, and function as so-called land portions having a predetermined area.

導電パターン11A,11Bは、絶縁基板10上に、Agなどの導電性金属粉を含有する導電材により形成されている。前記導電材は、フェノール樹脂等の熱硬化性樹脂からなるバインダー樹脂に前記導電性金属粉と有機溶剤が含まれた導電性ペーストまたは導電性インクをスクリーン印刷することで、絶縁基板10に所定のパターンで印刷形成される。スクリーン印刷した後に焼成することで前記有機溶剤を除去し、その結果、主として導電性金属粉とバインダー樹脂とで構成される導電塗膜が、導電パターン11A,11Bとして、絶縁基板10の表面に固着されて形成される。   The conductive patterns 11A and 11B are formed on the insulating substrate 10 with a conductive material containing conductive metal powder such as Ag. The conductive material is screen-printed with a conductive paste or conductive ink containing the conductive metal powder and an organic solvent on a binder resin made of a thermosetting resin such as a phenol resin, whereby a predetermined amount is applied to the insulating substrate 10. Printed with a pattern. The organic solvent is removed by baking after screen printing. As a result, the conductive coating mainly composed of the conductive metal powder and the binder resin adheres to the surface of the insulating substrate 10 as the conductive patterns 11A and 11B. To be formed.

図2に示すように、導電パターン11A,11Bの配線部11A2,11B2上にはレジスト層12,12が形成されており、配線部11A2,11B2がレジスト層12によって完全に覆われている。レジスト層12は、配線部11A2,11B2に塗布した後に所定の加熱工程を経て硬化させられる。   As shown in FIG. 2, resist layers 12 and 12 are formed on the wiring portions 11A2 and 11B2 of the conductive patterns 11A and 11B, and the wiring portions 11A2 and 11B2 are completely covered with the resist layer 12. The resist layer 12 is cured through a predetermined heating process after being applied to the wiring portions 11A2 and 11B2.

絶縁基板10上には、導電パターン11Aと11Bとの間で、チップ抵抗などの電子部品30が載置させられる位置に対応する位置、たとえば、図2に示すように、導電パターン11Aの接続部11A1の先端からの距離および導電パターン11Bの接続部11B1の先端からの距離がL0/2の位置(導電パターン11Aと導電パターン11Bとの間の中点位置)に、絶縁材料から形成される絶縁突起13が設けられている。   On the insulating substrate 10, a position corresponding to a position where the electronic component 30 such as a chip resistor is placed between the conductive patterns 11 </ b> A and 11 </ b> B, for example, a connection portion of the conductive pattern 11 </ b> A as shown in FIG. 2. Insulation formed from an insulating material at a position where the distance from the tip of 11A1 and the distance from the tip of the connecting portion 11B1 of the conductive pattern 11B is L0 / 2 (the midpoint position between the conductive pattern 11A and the conductive pattern 11B). A protrusion 13 is provided.

電子部品30は、図示X1側の側端面30aに電極31Aが設けられ、図示X2側の端面30bには電極31Bが設けられているものであり、抵抗器、コンデンサ、コイルなどとして使用されるチップ部品である。あるいは、電子部品30は、3個以上の電極を有するICなどの電子部品や複合電子部品であってもよい。   The electronic component 30 is provided with an electrode 31A on the side end surface 30a on the X1 side in the drawing and an electrode 31B on the end surface 30b on the X2 side in the drawing, and is a chip used as a resistor, a capacitor, a coil, or the like. It is a part. Alternatively, the electronic component 30 may be an electronic component such as an IC having three or more electrodes or a composite electronic component.

次に、電子部品30を導電パターン11A,11Bに接続する方法について説明する。
まず、図2に示すように、導電性接着剤層20Aを、絶縁基板10上のうち導電パターン11Aの接続部11A1と絶縁突起13との間、および接続部11A1の先端部分に塗布し、導電性接着剤層20Bを、絶縁基板10上のうち導電パターン11Bの接続部11B1と絶縁突起13との間、および接続部11B1の先端部分に塗布する。すなわち、絶縁基板10上のうち電子部品30が載せられる領域では、その領域の少なくとも一部において、絶縁基板10と電子部品30との間に、導電性接着剤層のみが存在し、導電性接着剤層と絶縁基板10との間に導電パターン11A,11Bは存在していない。
Next, a method for connecting the electronic component 30 to the conductive patterns 11A and 11B will be described.
First, as shown in FIG. 2, a conductive adhesive layer 20A is applied on the insulating substrate 10 between the connecting portion 11A1 of the conductive pattern 11A and the insulating protrusion 13 and on the tip of the connecting portion 11A1. The adhesive layer 20B is applied on the insulating substrate 10 between the connecting portion 11B1 of the conductive pattern 11B and the insulating protrusion 13 and on the tip of the connecting portion 11B1. That is, in the region where the electronic component 30 is placed on the insulating substrate 10, only the conductive adhesive layer exists between the insulating substrate 10 and the electronic component 30 in at least a part of the region, and the conductive bonding is performed. Conductive patterns 11A and 11B do not exist between the agent layer and the insulating substrate 10.

導電性接着剤層20A,20Bは、Agやカーボンなどの導電性フィラーが、エポキシ系やフェノール系などの熱硬化性のバインダー樹脂に混入されたものである。導電性接着剤層20A,20Bは有機溶剤を含んだペースト状で、絶縁基板10の表面に塗布され、電子部品30が設置された後に加熱することでバインダー樹脂が硬化する。   In the conductive adhesive layers 20A and 20B, a conductive filler such as Ag or carbon is mixed in a thermosetting binder resin such as epoxy or phenol. The conductive adhesive layers 20A and 20B are in the form of a paste containing an organic solvent. The conductive adhesive layers 20A and 20B are applied to the surface of the insulating substrate 10, and after the electronic component 30 is installed, the binder resin is cured by heating.

硬化した導電性接着剤層20A,20Bにおける導電性フィラーの混入密度は、導電パターン11A,11Bにおける導電性金属粉の混入密度よりも低く、硬化した導電性接着剤層20A,20Bは、硬化した導電パターン11A,11Bよりも機械的強度が高く、絶縁基板10に対する剥離強度は、導電性接着剤層20A,20Bの方が導電パターン11A,11Bよりも高い。ただし、比抵抗および面抵抗は、導電性接着剤層20A,20Bの方が導電パターン11A,11Bよりも高い。   The mixed density of the conductive filler in the cured conductive adhesive layers 20A and 20B is lower than the mixed density of the conductive metal powder in the conductive patterns 11A and 11B, and the cured conductive adhesive layers 20A and 20B are cured. The mechanical strength is higher than that of the conductive patterns 11A and 11B, and the peel strength with respect to the insulating substrate 10 is higher in the conductive adhesive layers 20A and 20B than in the conductive patterns 11A and 11B. However, the specific resistance and the sheet resistance are higher in the conductive adhesive layers 20A and 20B than in the conductive patterns 11A and 11B.

電子部品30は、その下面(図示Z2側の面)30cの、たとえば、ほぼ中央部分が絶縁突起13に対向するように、電子部品30を絶縁突起13上に載せられ、このとき、電極31A,31Bの下面が、導電性接着剤層20A,20Bに接せられる。また、導電パターン11Aと11Bとの間の間隔L0は、電子部品30の図示X1―X2方向の寸法L1に比べて大きいことが好ましい。すなわち、電極31Aの側端面31A1と導電パターン11Aの接続部11A1の先端部との間には間隔L2があいており、電極31Bの側端面31B1と導電パターン11Bの接続部11B1の先端部との間には間隔L3があいている。ただし、前述のように、絶縁基板10上のうち電子部品30が載せられる領域において、この領域の一部に導電性接着剤層20A,20Bのみが介在していれば、前記領域の一部に導電パターン11A,11Bが少し入り込んでいてもよい。   The electronic component 30 is placed on the insulating protrusion 13 such that, for example, a substantially central portion of the lower surface (surface on the Z2 side) 30c of the electronic component 30 faces the insulating protrusion 13, and at this time, the electrodes 31A, The lower surface of 31B is in contact with the conductive adhesive layers 20A and 20B. In addition, the distance L0 between the conductive patterns 11A and 11B is preferably larger than the dimension L1 of the electronic component 30 in the illustrated X1-X2 direction. That is, there is a gap L2 between the side end surface 31A1 of the electrode 31A and the tip of the connection portion 11A1 of the conductive pattern 11A, and the side end surface 31B1 of the electrode 31B and the tip of the connection portion 11B1 of the conductive pattern 11B There is an interval L3 between them. However, as described above, in the region where the electronic component 30 is placed on the insulating substrate 10, if only the conductive adhesive layers 20 </ b> A and 20 </ b> B are interposed in a part of this region, a part of the region is included. The conductive patterns 11A and 11B may slightly enter.

電子部品30を絶縁突起13上に載せた後に、図2の矢印で示すように、電子部品30を下方に押し込み且つ導電性接着剤層20A,20Bを加熱すると、導電性接着剤層20A,20Bのバインダー樹脂が硬化し、電子部品30の下面30cの位置が図2の点線の位置となり、電極31A,31Bの下面および電子部品30の下面30cと絶縁基板10とが導電性接着剤層20A,20Bを介して固定される。   After the electronic component 30 is placed on the insulating protrusion 13, as shown by the arrow in FIG. 2, when the electronic component 30 is pushed downward and the conductive adhesive layers 20A and 20B are heated, the conductive adhesive layers 20A and 20B are heated. 2 is cured, the position of the lower surface 30c of the electronic component 30 becomes the position of the dotted line in FIG. 2, and the lower surfaces of the electrodes 31A and 31B and the lower surface 30c of the electronic component 30 and the insulating substrate 10 are connected to the conductive adhesive layer 20A, It is fixed via 20B.

このとき、図2の矢印で示すように、導電性接着剤層20Aは図示X2方向に変形し、導電性接着剤層20Bは図示X1方向に変形し、図2の点線のようになるが、絶縁基板10上に絶縁突起13が設けられているため、絶縁突起13によって、導電性接着剤層20Aと20Bとが一体になることが防止される。その結果、導電パターン11Aと11Bが短絡してしまうことを防止できる。   At this time, as shown by the arrows in FIG. 2, the conductive adhesive layer 20A is deformed in the X2 direction shown in the figure, and the conductive adhesive layer 20B is deformed in the X1 direction shown in FIG. Since the insulating protrusions 13 are provided on the insulating substrate 10, the insulating protrusions 13 prevent the conductive adhesive layers 20A and 20B from being integrated. As a result, it is possible to prevent the conductive patterns 11A and 11B from being short-circuited.

なお、本発明では、絶縁突起13ではなく、絶縁基板10上に、シリコンなどからなる撥水剤を塗布してもよい。この場合には、導電性接着剤層20Aが図示X2方向に変形し、導電性接着剤層20Bが図示X1方向に変形した場合においても、導電性接着剤層20A,20Bが前記撥水剤によってはじかれ、導電性接着剤層20Aと20Bとが一体になることが防止される。   In the present invention, a water repellent made of silicon or the like may be applied on the insulating substrate 10 instead of the insulating protrusions 13. In this case, even when the conductive adhesive layer 20A is deformed in the illustrated X2 direction and the conductive adhesive layer 20B is deformed in the illustrated X1 direction, the conductive adhesive layers 20A and 20B are formed by the water repellent. As a result, the conductive adhesive layers 20A and 20B are prevented from being integrated.

また、本発明では、電極31Aの側端面31A1と導電パターン11Aの接続部11A1の先端部との間には間隔L2があいており、電極31Bの側端面31B1と導電パターン11Bの接続部11B1の先端部との間には間隔L3があいている。このため、導電性接着剤層20A,20Bを多量に塗布しておくと、電子部品30を下方に押し込んだときに、導電性接着剤層20Aが、図2に矢印で示すように上方(図示Z1方向)へ盛り上がり、図2の点線で示すように、電極31Aの側端面31A1を図示X1方向から覆い、導電性接着剤層20Bも、図2に矢印で示すように上方へ盛り上がり、図2の点線で示すように、電極31Bの側端面31B1を図示X2方向から覆う。このため、電子部品30が、導電性接着剤層20A,20Bによって下方および側方から固定される。その結果、電子部品30を、導電性接着剤層20A,20Bによって確実に固定することができ、外部から衝撃などが加えられた場合においても、電子部品30が外れてしまうことを防止することができる。   Further, in the present invention, there is a gap L2 between the side end face 31A1 of the electrode 31A and the tip end portion of the connection portion 11A1 of the conductive pattern 11A, and the side end face 31B1 of the electrode 31B and the connection portion 11B1 of the conductive pattern 11B. There is a space L3 between the tip portion. For this reason, if a large amount of the conductive adhesive layers 20A and 20B are applied, when the electronic component 30 is pushed downward, the conductive adhesive layer 20A moves upward (shown by an arrow in FIG. 2). Z1 direction), and as shown by the dotted line in FIG. 2, the side end face 31A1 of the electrode 31A is covered from the X1 direction shown in FIG. 2, and the conductive adhesive layer 20B also rises upward as shown by the arrow in FIG. As shown by the dotted line, the side end surface 31B1 of the electrode 31B is covered from the X2 direction in the figure. For this reason, the electronic component 30 is fixed from below and from the side by the conductive adhesive layers 20A and 20B. As a result, the electronic component 30 can be reliably fixed by the conductive adhesive layers 20A and 20B, and the electronic component 30 can be prevented from coming off even when an impact is applied from the outside. it can.

本発明では、図2に示すように、電子部品30の下面30cと絶縁基板10との間には導電性接着剤層20A,20Bのみが介在している。そして、電極31Aの側端面31A1と導電パターン11Aの接続部11A1の先端部との間には間隔L2があいており、電極31Bの側端面31B1と導電パターン11Bの接続部11B1の先端部との間には間隔L3があいている。   In the present invention, only the conductive adhesive layers 20A and 20B are interposed between the lower surface 30c of the electronic component 30 and the insulating substrate 10, as shown in FIG. There is a space L2 between the side end face 31A1 of the electrode 31A and the tip of the connecting portion 11A1 of the conductive pattern 11A, and the side end face 31B1 of the electrode 31B and the tip of the connecting portion 11B1 of the conductive pattern 11B There is an interval L3 between them.

このため、たとえば電子部品30に引き剥がし力が作用したときに、引き剥がし力が導電パターン11A,11Bには直接に伝わらず、導電パターン11A,11Bが剥がされにくくなる。また、電子部品30は導電性接着剤層20A,20Bによって絶縁基板10の表面に強固に固定されるようになる。   For this reason, for example, when a peeling force acts on the electronic component 30, the peeling force is not directly transmitted to the conductive patterns 11A and 11B, and the conductive patterns 11A and 11B are hardly peeled off. Further, the electronic component 30 is firmly fixed to the surface of the insulating substrate 10 by the conductive adhesive layers 20A and 20B.

本発明の電子部品実装基板を示す部分平面図、The partial top view which shows the electronic component mounting board of this invention, 図1の2−2線での切断断面図、FIG. 2 is a sectional view taken along line 2-2 in FIG. 図3Aは、従来の、基板へのチップ型電子部品の取り付け方法を示す平面図、図3Bは、図3Aの3−3線での切断断面図FIG. 3A is a plan view showing a conventional method for attaching a chip-type electronic component to a substrate, and FIG. 3B is a cross-sectional view taken along line 3-3 in FIG.

符号の説明Explanation of symbols

10 絶縁基板
11A,11B 導電パターン
11A1,11B1 接続部
11A2,11B2 配線部
13 絶縁突起
20A,20B 導電性接着剤層
30 電子部品
31A,31B 電極
L2,L3 間隔
DESCRIPTION OF SYMBOLS 10 Insulation board | substrate 11A, 11B Conductive pattern 11A1, 11B1 Connection part 11A2, 11B2 Wiring part 13 Insulation protrusion 20A, 20B Conductive adhesive layer 30 Electronic component 31A, 31B Electrode L2, L3 Space | interval

Claims (3)

絶縁基板の表面に、導電性金属粉およびバインダー樹脂を有する導電パターンが形成され、前記絶縁基板上に実装される電子部品が前記導電パターンと導通している電子部品実装基板において、
前記絶縁基板の表面には、導電性フィラーとバインダー樹脂とを有し、導電性フィラーの密度が前記導電パターンよりも低い導電性接着剤層が設けられ、この導電性接着剤層は、前記絶縁基板の表面に前記導電パターンを介在させることなく形成され且つ前記導電パターンと導通されており、
前記電子部品が前記導電性接着剤層の上に設置されて、前記電子部品と前記絶縁基板とが前記導電性接着剤層を介して固定されていることを特徴とする電子部品実装基板。
In the electronic component mounting substrate in which a conductive pattern having conductive metal powder and a binder resin is formed on the surface of the insulating substrate, and the electronic component mounted on the insulating substrate is in conduction with the conductive pattern,
On the surface of the insulating substrate, there is provided a conductive adhesive layer having a conductive filler and a binder resin, and the density of the conductive filler is lower than that of the conductive pattern. Formed without interposing the conductive pattern on the surface of the substrate and electrically connected to the conductive pattern;
The electronic component mounting substrate, wherein the electronic component is installed on the conductive adhesive layer, and the electronic component and the insulating substrate are fixed via the conductive adhesive layer.
前記絶縁基板上には、対を成す導電パターンが対向して設けられているとともに、前記対を成す導電パターンの端部間に、対をなす導電性接着剤層が間隔を空けて形成されており、前記電子部品の両端部のそれぞれが前記導電性接着剤層の上に設置されている請求項1記載の電子部品実装基板。   On the insulating substrate, a pair of conductive patterns are provided opposite to each other, and a pair of conductive adhesive layers are formed between the end portions of the pair of conductive patterns with a space therebetween. The electronic component mounting board according to claim 1, wherein each of both end portions of the electronic component is disposed on the conductive adhesive layer. 両導電性接着剤層の間に、前記絶縁基板上から突出する絶縁性の突起が設けられている請求項2記載の電子部品実装基板。   The electronic component mounting board according to claim 2, wherein an insulating protrusion protruding from the insulating substrate is provided between the two conductive adhesive layers.
JP2005027241A 2005-02-03 2005-02-03 Electronic component mounting substrate Withdrawn JP2006216735A (en)

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