JP2006179560A - Reproducing method of storage element and memory circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a reproducing method of a non-volatile storage element for reducing a resistance change in a reproduction process and for improving a data preservation characteristic, and also to provide a memory circuit. <P>SOLUTION: The circuit is provided with a variable resistor where a resistance value is changed to a different state by applying an electric pulse, a diode connected to the variable resistor in series, and a sense amplifier connected to the diode in parallel. One group of reproduction voltage pulses formed of a first voltage pulse and a second voltage pulse different in code from the first voltage pulse is applied to the variable resistor. Thus, a state where the resistance value of the variable resistor differs is read by a value of current flowing in the sense amplifier. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a method for reproducing a nonvolatile memory element and a memory circuit in which stored information does not disappear even when the power is turned off.

In recent years, with the advancement of digital technology in electronic devices, there has been a growing demand for non-volatile memory elements for storing data such as images. Furthermore, the capacity of memory elements has been increased, write power has been reduced, and writing / reading has been performed. There is a growing demand for faster time and longer life. Currently, as a nonvolatile memory element, a flash memory which has a floating gate provided in a gate portion of a semiconductor transistor and realizes nonvolatile using a mechanism for injecting electrons into the floating gate has been put into practical use. It is often used as an external storage element.
U.S. Pat.No. 6,204,139

  However, the flash memory has many problems such as a high write voltage, a slow write / erase time, a short rewrite life, and difficulty in increasing the capacity (element miniaturization). Therefore, in order to solve the problems of these flash memories at present, a semiconductor memory (FeRAM) using a ferroelectric material, a semiconductor memory (MRAM) using a TMR (tunnel MR) material, and a semiconductor memory (OUM) using a phase change material. The development of new nonvolatile memory devices such as the above has been actively conducted. However, these memory elements also have problems such as difficulty in miniaturization of elements for FeRAM, high write voltage for MRAM, and short rewrite life for OUM, and all requests for nonvolatile memory elements. There is no memory element that satisfies this condition. Therefore, as a new recording method for overcoming them, a method of changing the resistance value of the perovskite structure oxide by a pulse voltage was developed from the University of Houston (Patent Document 1). At this time, it was found that the recorded resistance value changed and had a big problem of lacking data retention characteristics.

  A method for reproducing a memory element according to the present invention is a method for reproducing a memory element using a variable resistor capable of changing a resistance value to a different state by applying an electric pulse. It is characterized in that a state in which the resistance value of the variable resistor is different is read by applying a set of regenerative voltage pulses composed of second voltage pulses having different signs for the one voltage pulse and the first voltage pulse.

  The memory circuit according to the present invention includes a variable resistor capable of changing a resistance value to a different state by applying an electric pulse, a diode connected in series to the variable resistor, and a parallel to the diode. And applying a set of regenerative voltage pulses composed of second voltage pulses having different signs to the first voltage pulse and the first voltage pulse, to the variable resistor. It is characterized in that states having different resistance values of the body are read based on current values flowing through the sense amplifier.

  According to the present invention, all of the many problems such as high writing power, long writing time, short rewrite life, and difficulty in increasing capacity (element miniaturization), which have been problems with conventional nonvolatile memory elements Non-volatile memory elements that can be solved (using the principle of changing the resistance value of the perovskite structure oxide by the pulse voltage) can reduce the resistance change during the reproduction process, which has been a major issue. Data retention characteristics can be dramatically improved.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals, and description thereof will not be repeated.

<Basic configuration and basic characteristics of variable resistor>
First, the basic configuration and basic characteristics of the variable resistor used in the embodiment of the present invention will be described.

  The variable resistor used in the present embodiment has a characteristic of increasing / decreasing its resistance value according to the sign of an applied electric pulse. The basic configuration is shown in FIG. In this variable resistor, an electrode 3 is provided on a substrate 4, a variable resistance material 2 is formed on the electrode 3, and an electrode 1 is provided on the variable resistance material 2. Here, a CMR material made of Pr0.7Ca0.3MnO3 (PCMO) was used as the resistance change material 2. The resistance of PCMO material reversibly changes depending on the sign of the applied pulse voltage (here, the pulse voltage applied between electrodes 1 and 3) (here, the polarity of the pulse voltage applied between electrodes 1 and 3). Patent Document 1 reports that (increase / decrease). FIG. 2 shows the experimental results of the resistance change of the PCMO film we formed. Here, the PCMO film was formed by sputtering with the substrate temperature heated to 700.degree. The film thickness was 0.1 μm. As the electrode material, Pt was used for both the electrodes 1 and 3. In this experiment, the polarity of the pulse voltage is defined as the polarity of the voltage applied to the film surface (electrode 1) of the PCMO material 2 for convenience. Here, since the resistance value of the PCMO material immediately after film formation is high and the variation is large, in this experiment, a positive polarity pulse voltage (voltage value 3 V, pulse width 10 μsec.) Is applied multiple times to reduce the resistance value. The initial state (reset) was set at the time when the value reached about 1000Ω. The result of reversibly changing the resistance value of the PCMO material according to the sign of the pulse voltage is shown in FIG. In this embodiment, the applied pulse voltage is 5 V and the pulse width is 10 nsec. The number of pulses is one. -The resistance value of the PCMO film 2 is increased by about an order of magnitude from 1000Ω to 10000Ω (high resistance state) by applying a polar pulse voltage, and the resistance value is increased from 10,000Ω to the initial 1000Ω (low resistance) by applying a positive polarity pulse voltage. It has been confirmed that this change repeatedly and reversibly occurs. The resistance values in this experiment are calculated by applying a DC voltage of about 500 mV to the PCMO film 2 and measuring the current at that time. As described above, the PCMO film 2 in this experiment has a characteristic that the resistance value is increased by applying a negative polarity pulse voltage to the film surface, and the resistance value is decreased by applying a positive polarity pulse voltage.

  In this experiment, the polarity of the pulse voltage has been defined as the polarity of the voltage applied to the film surface (electrode 1) of the PCMO material 2 for convenience. However, in the case of explaining with a circuit diagram, the definition of the front and back of the material has meaning. Since there is no symbol, the variable resistor used here is represented by a symbol as shown in FIG. That is, the variable resistor is represented as symbol 11, and in the symbol 11, when a positive polarity pulse voltage is applied to the tip of the arrow, the resistance value increases and is set to a high resistance state. -If it defines that it has the characteristic that resistance value will decrease and reset to a low-resistance state when a polar pulse voltage is applied, the pulse voltage 15a of -5V will be applied to the input terminal 13 like Fig.3 (a) Then, the resistance value of the variable resistor 11 is set to the high resistance state, and when the + 5V pulse voltage 15b is applied as shown in FIG. 3B, the resistance value of the variable resistor 11 is reset to the low resistance state. Will be. In this way, data can be recorded and erased.

  FIG. 4 shows a method of reproducing the recording (set) state and the erasing (reset) state. At the time of reproduction, as shown in FIG. 4A, by applying a + 2V pulse voltage (pulse width is 10 nsec.) 16a and reading the current value by the sense amplifier 14, the variable resistor 11 is in a recording state (high Whether it is in the resistance state) or in the erased state (low resistance state) can be identified. Further, at the time of reproduction, as shown in FIG. 4B, it can be similarly identified by applying a pulse voltage (-2V, 10 nsec.) 16b having a reverse polarity.

  FIG. 5A shows a change in resistance value when the recording state (high resistance state) is read a plurality of times with a pulse voltage of +2 V (pulse width is 10 nsec.). FIG. 5B shows a change in resistance value when the recording state (high resistance state) is read a plurality of times with a pulse voltage of −2 V (pulse width is 10 nsec.). As described above, the resistance value of the variable resistor gradually decreases according to the number of readings when read with a positive polarity voltage (FIG. 5 (a)), and gradually reads according to the number of readings when reading with a negative polarity voltage. As can be seen from FIG. 5 (b). FIG. 6 shows the change in resistance value according to the number of readings in the case of the erased state (low resistance state). Thus, in this experiment, it has been found that the resistance value of the variable resistor has a basic characteristic that it changes after reading. Therefore, when this variable resistor is used as a memory element, there is a big problem that data retention characteristics are lacking.

(First embodiment)
FIG. 7A shows an outline of the storage element reproducing method according to the first embodiment. In the present embodiment, the reproduction pulse for identifying whether the memory element is in the recording state (high resistance state) or the erasing state (low resistance state) is the first voltage pulse of +2 V (10 nsec.) And the first voltage pulse. The pulse width and the absolute value of the pulse voltage are the same, and the signs are different from each other. The reproduction voltage pulse 17a is composed of a second voltage pulse of −2V (10 nsec.). Although both + current and -current flow through the sense amplifier 14, it is identified from the initial value of + current whether the variable resistor 11 is in the recording state (high resistance state) or in the erasing state (low resistance state). Furthermore, the resistance value of the variable resistor 11 can be returned to the state before reproduction by the negative polarity pulse voltage. FIG. 8 shows changes in the resistance value after reading with the reproduction pulse voltage 17a according to the present embodiment for (a) recording state (high resistance state) and (b) erasing state (low resistance state). . As described above, according to the reproducing method according to the present embodiment, it can be seen that the resistance value of the variable resistor 11 is maintained at a constant value without being changed by reading, and a memory element having excellent data retention characteristics is realized. be able to.

(Second Embodiment)
FIG. 7B shows an outline of a storage element reproducing method according to the second embodiment. In the present embodiment, the reproduction pulse for identifying whether the memory element is in the recording state (high resistance state) or the erasing state (low resistance state) includes a first voltage pulse of −2 V (10 nsec.), A first voltage pulse, Is characterized by comprising a set of reproduced voltage pulses 17b comprising second voltage pulses of + 2V (10 nsec.) Having the same pulse width and absolute value of pulse voltage but different signs. Both -current and + current flow through the sense amplifier 14. From the first -current value, it is identified whether the variable resistor 11 is in the recording state (high resistance state) or in the erasing state (low resistance state). Furthermore, the resistance value of the variable resistor 11 can be returned to the state before reproduction by the pulse voltage of + polarity. FIG. 8 shows changes in the resistance value after reading with the reproduction pulse voltage 17b of this embodiment depending on the number of readings, for (a) recording state (high resistance state) and (b) erasing state (low resistance state). . As described above, also in the reproducing method according to the present embodiment, it can be seen that the resistance value of the variable resistor 11 does not change by reading and is held at a constant value, and a memory element having excellent data retention characteristics is realized. Can do.

(Third embodiment)
FIG. 9A shows an outline of a method for reproducing a memory element (memory circuit) according to the third embodiment. In the memory circuit according to the present embodiment, a variable resistor 11 and a diode 12 that can change resistance values to different states by applying an electric pulse are connected in series to form a cell. 12 is provided in parallel with a sense amplifier 14. With this configuration, the reproduction pulse for identifying whether the storage element is in the recording state (high resistance state) or the erasing state (low resistance state) is the first voltage pulse of +2 V (10 nsec.) And the first voltage pulse. Even if a set of reproduction voltage pulses 17a composed of a second voltage pulse of −2V (10 nsec.) Having the same pulse width and the same absolute value of the pulse voltage but different in sign are applied to the memory cell, the sense amplifier 14 Since only the + current flows through the sense amplifier 14, it is possible to identify whether the variable resistor 11 is in the recording state (high resistance state) or in the erasing state (low resistance state) by the current value flowing through the sense amplifier 14. Furthermore, the resistance value of the variable resistor 11 can be returned to the state before reproduction by the negative pulse voltage. At this time, since the diode 12 is present, no current flows through the sense amplifier 14, and the resistance state of the variable resistor 11 can be easily identified. In addition, it can be seen that in the memory circuit according to the present embodiment as well, by the reproducing method of the first embodiment, the resistance value of the variable resistor 11 does not change by reading and maintains a constant value. A memory element with excellent retention characteristics can be realized.

(Fourth embodiment)
FIG. 9B shows an outline of the reproducing method of the memory element (memory circuit) according to the fourth embodiment. In the memory circuit according to the present embodiment, a variable resistor 11 and a diode 12 that can change resistance values to different states by applying an electric pulse are connected in series to form a cell. 12 is provided in parallel with a sense amplifier 14. With this configuration, the reproduction pulse for identifying whether the storage element is in the recording state (high resistance state) or the erasing state (low resistance state) is the first voltage pulse of −2 V (10 nsec.), Even if a set of reproduction voltage pulses 17b consisting of a second voltage pulse of + 2V (10 nsec.) Having the same pulse width and the same absolute value of the pulse voltage but different in sign from one voltage pulse is applied to the memory cell, the sense amplifier 14 Since only a current flows through the sense amplifier 14, it is possible to identify whether the variable resistor 11 is in the recording state (high resistance state) or in the erasing state (low resistance state) based on the current value flowing through the sense amplifier 14. Furthermore, the resistance value of the variable resistor 11 can be returned to the state before reproduction by the pulse voltage of + polarity. At this time, the positive current does not flow through the sense amplifier 14 due to the diode 12, and the resistance state of the variable resistor 11 can be easily identified. In addition, it can be seen that in the memory circuit according to the present embodiment as well, by the reproducing method of the second embodiment, the resistance value of the variable resistor 11 is maintained at a constant value without being changed by reading. A memory element with excellent retention characteristics can be realized.

  In the above embodiment, the absolute value of the recording and erasing pulse voltage is 5 V and the absolute value of the reproducing pulse voltage is 2 V. However, this is an example, and the absolute value of the reproducing pulse voltage is the absolute value of the recording and erasing pulses. If it is below the value, there is no problem.

  Further, the interval between the first voltage pulse and the second voltage pulse constituting the reproduction voltage pulse is 1 nsec. It is preferable that there is more.

  In addition, the absolute value of the second voltage pulse having a different sign does not need to be the same for the first voltage pulse and the first voltage pulse constituting the reproduction voltage pulse, and the resistance value is changed before and after reading the resistance value of the variable resistor. It is preferable to adjust the absolute values of the first voltage pulse and the second voltage pulse so that there is no change.

  Further, the pulse width of the first voltage pulse constituting the reproduction voltage pulse need not be the same as the pulse width of the second voltage pulse having a sign different from that of the first voltage pulse, and the resistance value of the variable resistor is read. It is preferable to adjust the pulse widths of the first voltage pulse and the second voltage pulse so that the resistance value does not change before and after.

  Furthermore, in the above-described embodiment, an example of reproducing 1-bit information in the recording state and the erasing state has been described. However, the present invention is not limited to 1-bit information. For example, the resistance value of the variable resistor is set to the recording pulse voltage or the recording pulse voltage. By adjusting the number of times of application, the present invention can be applied to a multi-bit information storage element that is changed in multiple stages.

  The memory element reproducing method and the memory circuit according to the present invention have the effect that the data retention characteristics of a nonvolatile memory capable of low power, high-speed writing / erasing, and large capacity can be dramatically improved, It is useful as a next generation nonvolatile memory.

The figure which shows the basic composition of the variable resistor used in embodiment of this invention. The figure which shows the change of resistance value when a pulse voltage is applied to the variable resistor shown in FIG. The figure which shows a mode when the resistance value of the variable resistor shown in FIG. 1 is set (high resistance state) and reset (low resistance state). The figure which shows a mode at the time of identifying (reproducing) the resistance value of the conventional memory element. The figure which shows the change of the resistance value of a variable resistor when the high resistance state of the variable resistor shown in FIG. 1 is reproduced | regenerated by the conventional reproduction | regeneration method. The figure which shows the change of the resistance value of a variable resistor when the low resistance state of the variable resistor shown in FIG. 1 is reproduced | regenerated by the conventional reproduction | regeneration method. FIG. 4A is a diagram showing an outline of a method for reproducing a memory element according to the first embodiment. FIG. 5B is a diagram showing an outline of a method for reproducing a memory element according to the second embodiment. The figure which shows the change of the resistance value of a variable resistor when each resistance state of a variable resistor is reproduced | regenerated with the reproduction | regenerating method by embodiment of this invention. (A) The figure which shows the outline of the reproducing | regenerating method of the memory element by 3rd Embodiment (b) The figure which shows the outline of the reproducing | regenerating method of the memory element by 4th Embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Electrode 2 Resistance change material 3 Electrode 4 Board | substrate 11 Variable resistor 12 Diode 13 Input terminal 14 Sense amplifier 15a, 15b Voltage pulse 16a, 16b Reproduction voltage pulse 17a, 17b Reproduction voltage pulse

Claims (14)

A method of reproducing a memory element using a variable resistor that can change a resistance value to a different state by applying an electric pulse,
A state in which the resistance value of the variable resistor is different is read by applying to the variable resistor a set of reproduction voltage pulses including second voltage pulses having different signs from the first voltage pulse and the first voltage pulse.
A method for reproducing a storage element. In claim 1,
The resistance value of the variable resistor changes in the opposite direction due to voltage pulses having different signs.
A method for reproducing a storage element. In claim 2,
The absolute value of the pulse voltage of the reproduction voltage pulse is smaller than the absolute value of the pulse applied to the variable resistor during data recording and erasing,
A method for reproducing a storage element. In claim 2 or 3,
The interval between the first voltage pulse and the second voltage pulse is 1 nsec. That's it,
A method for reproducing a storage element. In any one of claims 2 to 4,
The absolute values of the pulse voltages of the first voltage pulse and the second voltage pulse are different,
A method for reproducing a storage element. In any one of claims 2 to 4,
The pulse widths of the first voltage pulse and the second voltage pulse are different.
A method for reproducing a storage element. In any one of Claims 1-6,
Read the state of different resistance values of the variable resistor according to the current value flowing through the sense amplifier,
A method for reproducing a storage element. A variable resistor capable of changing the resistance value to a different state by applying an electrical pulse;
A diode connected in series with the variable resistor;
A sense amplifier connected in parallel with the diode;
A state in which the resistance value of the variable resistor differs is applied to the variable resistor by applying a reproduction voltage pulse including a second voltage pulse having a different sign from the first voltage pulse to the variable resistor. Read according to the current flowing through the amplifier.
A memory circuit characterized by that. In claim 8,
The resistance value of the variable resistor changes in the opposite direction due to voltage pulses having different signs.
A memory circuit characterized by that. In claim 8 or 9,
The absolute value of the pulse voltage of the reproduction voltage pulse is smaller than the absolute value of the pulse applied to the variable resistor during data recording and erasing,
A memory circuit characterized by that. In claim 9 or 10,
The interval between the first voltage pulse and the second voltage pulse is 1 nsec. That's it,
A memory circuit characterized by that. In any one of claims 9 to 11,
The absolute values of the pulse voltages of the first voltage pulse and the second voltage pulse are different,
A memory circuit characterized by that. In any one of claims 9 to 11,
The pulse widths of the first voltage pulse and the second voltage pulse are different.
A method for reproducing a storage element. In any one of claims 8 to 13,
The diode is connected in such a direction that current due to the second voltage pulse does not flow to the sense amplifier.
A memory circuit characterized by that.

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