JP2006179582A - Reproducing method of storage element and memory circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a reproducing method of a non-volatile storage element with which a data holding characteristic is remarkably improved, and also to provide a memory circuit. <P>SOLUTION: One group of reproduction voltage pulses formed of a first voltage pulse and a second voltage pulse whose code is the same as the first voltage pulse and whose pulse width is longer than the first voltage pulse are applied to a variable resistor, where a resistance value is changed to a different state by applying an electric pulse of the same code different in pulse width. The state where the resistance value of the variable resistor differs is read thereby. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a reproducing method and a memory circuit of a nonvolatile memory element in which stored information does not disappear even when the power is turned off.

In recent years, with the advancement of digital technology in electronic devices, there has been a growing demand for non-volatile memory elements to store data such as images. Furthermore, the capacity of memory elements, the reduction in write power, There is an increasing demand for faster reading time and longer life. Currently, as a nonvolatile memory element, a flash memory which has a floating gate provided in a gate portion of a semiconductor transistor and realizes nonvolatile using a mechanism for injecting electrons into the floating gate has been put into practical use. It is often used as an external storage element.
U.S. Pat.No. 6,204,139 U.S. Pat.No. 6,673,691

  However, the flash memory has many problems such as a high write voltage, a slow write / erase time, a short rewrite life, and difficulty in increasing the capacity (element miniaturization). Therefore, in order to solve the problems of these flash memories at present, a semiconductor memory (FeRAM) using a ferroelectric material, a semiconductor memory (MRAM) using a TMR (tunnel MR) material, and a semiconductor memory (OUM) using a phase change material. The development of new nonvolatile memory devices such as the above has been actively conducted. However, these memory elements also have problems such as difficulty in miniaturization of elements for FeRAM, high write voltage for MRAM, and short rewrite life for OUM, and all requests for nonvolatile memory elements. There is no memory element that satisfies this condition. Therefore, as a new recording method for overcoming them, a method of changing the resistance value of the perovskite structure oxide by a pulse voltage has been developed by the University of Houston and Sharp Laboratories of America. Inc. (Patent Documents 1 and 2). It has been found that there is a big problem that the recorded resistance value changes during reproduction as an operation as a storage element and lacks data retention characteristics.

  A method for reproducing a memory element according to the present invention is a method for reproducing a memory element using a variable resistor capable of changing a resistance value to a different state by applying electric pulses of the same sign having different pulse widths. Applying a set of regenerative voltage pulses consisting of a first voltage pulse and a second voltage pulse having the same sign as the first voltage pulse and a longer pulse width than the first voltage pulse to the variable resistor, The state in which the resistance value of the variable resistor is different is read.

  A memory circuit according to the present invention is connected in series with a variable resistor capable of changing a resistance value to a different state by applying electric pulses of the same sign having different pulse widths, and the variable resistor pair. A second voltage having a low-pass filter and a sense amplifier connected in parallel with the low-pass filter, wherein the variable resistor has the same sign as the first voltage pulse and the first voltage pulse and has a longer pulse width than the first voltage pulse; By applying a set of regenerative voltage pulses consisting of pulses, different states of the resistance value of the variable resistor are read by the value of current flowing through the sense amplifier.

  According to the present invention, many problems such as high write power, long write time, short rewrite life, and difficulty in increasing capacity (element miniaturization) have been problems with conventional nonvolatile memory elements. Non-volatile memory element (using the principle of changing the resistance value of the perovskite structure oxide by the pulse voltage) can reduce the resistance change during the reproduction process, which has been a big problem, As a result, data retention characteristics can be dramatically improved.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals, and description thereof will not be repeated.

<Basic configuration and basic characteristics of variable resistor>
First, the basic configuration and basic characteristics of the variable resistor used in the embodiment of the present invention will be described.

The variable resistor used in the present embodiment has a characteristic of increasing / decreasing its resistance value according to the pulse width of an applied electric pulse. The basic configuration is shown in FIG. In this variable resistor, an electrode 3 is provided on a substrate 4, a variable resistance material 2 is formed on the electrode 3, and an electrode 1 is provided on the variable resistance material 2. Here, a CMR material made of Pr0.7Ca0.3MnO3 (PCMO) was used as the resistance change material 2. The PCMO material has a resistance value depending on a pulse width of an applied pulse voltage (here, a pulse voltage applied between the electrodes 1 and 3) (here, a pulse width of the same polarity pulse voltage applied between the electrodes 1 and 3). Has been reported in Patent Document 2 to reversibly change (increase / decrease). FIG. 2 shows the experimental results of the resistance change of the PCMO film we formed. Here, the PCMO film was formed by sputtering with the substrate temperature heated to 700.degree. The film thickness was 0.1 μm. As the electrode material, Pt was used for both the electrodes 1 and 3. In this experiment, the polarity of the pulse voltage is defined as the polarity of the voltage applied to the film surface (electrode 1) of the PCMO material 2 for convenience. Here, since the resistance value of the PCMO material immediately after film formation is high and the variation is large, in this experiment, a positive polarity pulse voltage (voltage value 3 V, pulse width 10 μsec.) Is applied multiple times to reduce the resistance value. The initial state (reset) was set at the time when the value reached about 1000Ω. FIG. 2 shows an experimental result of examining how the resistance value of the PCMO material whose resistance value is initialized to 1000Ω changes depending on the pulse width of the applied pulse voltage. In this embodiment, the applied pulse voltage is +5 V and the pulse width is 1 nsec. To 1 msec. The change in resistance of the PCMO film was examined by changing to The number of applied pulses here is one. As shown in FIG. 2A, the pulse width of the pulse voltage is 10 nsec. 2 μsec. In the following, the resistance value of the PCMO film increased by about one digit from the initial state of 1000Ω to 10,000Ω (high resistance state). The pulse width is 10 nsec. When shorter, the resistance value remained at the initial 1000Ω (low resistance state). Furthermore, the pulse width is 10 μsec. As described above, the resistance value of the PCMO film greatly decreased from the initial state of 1000Ω. Therefore, in order to increase the resistance value of the PCMO film initialized by the above method from 1000Ω (low resistance state) to 10000Ω (high resistance state), the pulse width τ of the voltage pulse is about 10 nsec. More than about 2 μsec. It can be seen that the following is necessary. Next, in the experiment shown in FIG. A pulse width of 1 nsec. Is applied to a PCMO film having a resistance value of 10000 Ω (high resistance state) by applying a voltage pulse (+5 V). To 1 msec. FIG. 2B shows the experimental results of examining how the resistance value changed according to the pulse width by applying a voltage pulse (+5 V) of the same polarity changed up to. The number of applied pulses here is one. Pulse width is 10 μsec. As a result, the resistance value decreased from 10,000Ω (high resistance state) to 1000Ω (low resistance state). Therefore, in order to reduce the resistance value of the PCMO film that has become 10000Ω (high resistance state) to 1000Ω (low resistance state) by the above method, the pulse width τ of the voltage pulse is 10 μsec. It turns out that it is necessary above. From the above results, the initial resistance value of the PCMO film, which varied in a high resistance state immediately after the film formation, was set to +5 V and the pulse width τ = 10 μsec. The PCMO film initialized to 1000 Ω by applying the voltage pulse of 2 times multiple times has a pulse width τ of 10 nsec. ≦ τ ≦ 2 μsec. When the voltage pulse (short pulse) is applied, the resistance value is increased to 10000Ω, and the pulse width τ is τ ≧ 10 μsec. It was found that the voltage again decreased to 1000Ω by applying a voltage pulse (long pulse). FIG. 3 shows the result of confirming that the resistance value is reversibly changed by repeatedly applying voltage pulses having different pulse widths to the PCMO film initialized to a low resistance state (1000Ω) as in this embodiment. Show. In this embodiment, the pulse width τ of the voltage pulse is 10 nsec. ≦ τ ≦ 2 μsec.
Is defined as a short pulse,
τ ≧ 10 μsec.
Was defined as a long pulse.

  Thus, it can be seen that the resistance value of the PCMO film increases by applying a short pulse voltage of +5 V, and the resistance value of the PCMO film decreases by applying a long pulse of +5 V. In the memory element using the PCMO film in this embodiment, when the high resistance state is called “set” and the low resistance state is called “reset”, the memory element is set and reset by voltage pulses of the same sign having different pulse widths. Can be reversibly changed, and a nonvolatile memory element can be realized. Note that each resistance value in this example is calculated by applying a DC voltage of about 500 mV to the PCMO film and measuring the current at that time.

  In this embodiment, the polarity of the pulse voltage is defined as the polarity of the voltage applied to the film surface (electrode 1) of the PCMO material 2 for convenience. However, in the case of explaining with a circuit diagram, the definition of the front and back of the material has meaning. Since it does not have, the variable resistor used here is described with a symbol as shown in FIG. That is, the variable resistor is represented as symbol 11, and in the symbol 11, when a short pulse voltage of + polarity is applied to the tip of the arrow, the resistance value is increased and set to a high resistance state. When a long pulse voltage with + polarity is applied to the capacitor, the resistance value decreases and the characteristic is reset to a low resistance state. As shown in FIG. 4A, a short pulse voltage 15a of +5 V is applied to the input terminal. Is applied to the variable resistor 11, the resistance value of the variable resistor 11 is set to a high resistance state, and when a + 5V long pulse voltage 15b is applied as shown in FIG. 4B, the resistance value of the variable resistor 11 is set to a low resistance state. Will be reset. In this way, data can be recorded and erased. FIG. 5 shows a method of reproducing the recording (set) state and the erasing (reset) state. At the time of reproduction, as shown in FIG. 5, a short pulse voltage (pulse width is 10 nsec.) 16 of + 2V is applied, and the current value is read by the sense amplifier 14, whereby the variable resistor 11 is brought into a recording state (high resistance state). Whether it is in an erased state (low resistance state) can be identified. 6A shows a change in resistance value when the recording state (high resistance state) is read out a plurality of times with a short pulse voltage of +2 V (pulse width is 10 nsec.), And FIG. 6B shows the recording state (high resistance state). ) Is read a plurality of times with a short pulse voltage of +2 V (pulse width is 10 nsec.). Thus, it can be seen that when the resistance value of the variable resistor 11 is read with a short pulse voltage, it gradually increases according to the number of times of reading. As described above, it was found that the present experiment has a basic characteristic that the resistance value of the variable resistor 11 changes after reading. Therefore, when the variable resistor 11 is used as a memory element, there is a big problem that data retention characteristics are lacking.

  Therefore, we investigated how the resistance value of the PCMO material in the low resistance state (at the time of reset) and the high resistance state (at the time of setting) changed depending on the pulse width of the applied reproduction pulse voltage. The PCMO film used in this experiment was the same as the experiment described above (FIG. 2). The experimental results are shown in FIG. Here, the applied pulse voltage is +2 V and the pulse width is 1 nsec. To 1 msec. The change in resistance of the PCMO film was examined by changing to The number of applied pulses here is one. At the time of resetting, as shown in FIG. 7A, the pulse width of the pulse voltage is about 10 nsec. More than about 2 μsec. In the following, the resistance value of the PCMO film increased from 1000Ω in the initial state to about 1100Ω. The pulse width is about 10 nsec. When shorter, the resistance value remained at the initial 1000Ω (low resistance state). Further, the pulse width is about 10 μsec. As described above, the resistance value of the PCMO film decreased from 1000Ω in the initial state to about 900Ω. Even at the time of setting, as shown in FIG. 7B, the pulse width of the pulse voltage is about 10 nsec. More than about 2 μsec. In the following, the resistance value of the PCMO film increased from 10,000Ω in the initial state to about 11000Ω. The pulse width is about 10 nsec. When shorter, the resistance value remained at the initial 10000Ω (high resistance state). Further, the pulse width is about 10 μsec. As described above, the resistance value of the PCMO film decreased from 10000Ω in the initial state to about 9000Ω.

(First embodiment)
FIG. 8 shows an outline of a storage element reproducing method according to the first embodiment of the present invention. In the present embodiment, the reproduction pulse for identifying whether the storage element is in a recording state (high resistance state) or an erasing state (low resistance state) is a first short pulse voltage of +2 V (10 nsec.) And a first short pulse voltage of +2 V (10 μsec.). The short-circuit current and the long-pulse current both flow in the sense amplifier 14, but the first short-pulse current to be applied first From the value, it is possible to identify whether the variable resistor 11 is in the recording state (high resistance state) or the erasing state (low resistance state). The resistance value of the body 11 can return to the state before the reproduction. FIG. 9 shows changes in the resistance value according to the number of readings after reading with the reproduction pulse voltage of this embodiment in (a) recording state (high resistance state) and (b) erasing state (low resistance state). As described above, according to the reproducing method according to the present embodiment, it can be seen that the resistance value of the variable resistor 11 is maintained at a constant value without being changed by reading, and a memory element having excellent data retention characteristics can be realized. did it.

  In this embodiment, the case where the sign of the regenerative voltage pulse is positive has been described. However, even when the sign of the regenerative voltage pulse is negative, only the sign of the pulse current flowing through the sense amplifier is different. There is no problem in identifying the 11 recording states.

(Second Embodiment)
FIG. 10 shows an outline of a memory circuit reproducing method according to the second embodiment of the present invention. In this memory circuit, a variable resistor 11 having a characteristic of increasing / decreasing its resistance value according to the pulse width of an applied electric pulse and a low-pass filter 12 are connected in series, and a sense amplifier is connected in parallel with the low-pass filter 12. 14 is connected. The low-pass filter 12 used in this example has a pulse width τ of τ ≧ 1 μsec. The one having the characteristic of passing only the pulse current is used. With such a configuration, the first voltage pulse of +2 V (10 nsec.) And +2 V (10 μsec) are used as a reproduction pulse for identifying whether the memory element is in a recording state (high resistance state) or an erasing state (low resistance state). .)) Even if a set of reproduction voltage pulses 17 consisting of the second voltage pulses are applied to the memory cells in the order of the first voltage pulse and the second voltage pulse, the sense amplifier 14 has a pulse width τ of τ <1 μsec. . Since only the first pulse current flows, it is possible to identify whether the variable resistor 11 is in the recording state (high resistance state) or in the erasing state (low resistance state) by the current value flowing through the sense amplifier 14. , Τ> 10 μsec. The second pulse current does not flow to the sense amplifier 14, but the resistance value of the variable resistor 11 can be returned to the state before reproduction by the second voltage pulse. In addition, it can be seen that in the memory circuit according to the present embodiment as well, by the reproducing method of the first embodiment, the resistance value of the variable resistor 11 does not change by reading and maintains a constant value. A memory element having excellent retention characteristics could be realized.

  In the first and second embodiments, the absolute value of the recording and erasing pulse voltage is 5 V and the absolute value of the reproducing pulse voltage is 2 V. However, this is an example, and the absolute value of the reproducing pulse voltage is recorded and recorded. There is no problem as long as it is less than the absolute value of the erase pulse. Further, the interval between the first voltage pulse and the second voltage pulse constituting the reproduction voltage pulse is 1 nsec. It is preferable that there is more. Further, the absolute values of the first voltage pulse and the second voltage pulse constituting the reproduction voltage pulse do not need to be the same, and the first value pulse does not change before and after reading the resistance value of the variable resistor 11. It is preferable to adjust the absolute values of the voltage pulse and the second voltage pulse (in many cases, the absolute value of the second voltage pulse is smaller than the absolute value of the first voltage pulse). Further, there is no problem even if the number of the second voltage pulses is adjusted to be plural so that the resistance value does not change before and after the reading of the resistance value of the variable resistor 11. Furthermore, in the first and second embodiments, an example of reproducing 1-bit information in the recording state and the erasing state has been described. However, the present invention is not limited to 1-bit information. For example, the resistance value of the variable resistor 11 is changed to the recording pulse voltage. Alternatively, the present invention can be applied to a storage element of multi-bit information that is changed in multiple stages by adjusting the number of times of applying the recording pulse voltage.

  INDUSTRIAL APPLICABILITY The memory element reproducing method and memory circuit according to the present invention have the effect that the data retention characteristics of a nonvolatile memory capable of low power, high speed writing / erasing, and large capacity can be dramatically improved. It is useful as a next generation nonvolatile memory.

The figure which shows the basic composition of the variable resistor used in embodiment of this invention. The figure which shows the change of resistance value when the pulse voltage from which a pulse width differs is applied to the variable resistor shown in FIG. The figure which shows the reversibility of the change of resistance value when the pulse voltage from which a pulse width differs is applied to the variable resistor shown in FIG. The figure which showed the mode at the time of setting (high resistance state) and reset (low resistance state) of the resistance value of the memory element of this invention. The figure which shows the method of identifying (reproducing) the resistance value of the conventional memory element. (A) The figure which shows the change of the resistance value of a variable resistor when the high resistance state of a variable resistor is reproduced | regenerated by the conventional reproduction | regeneration method (b) When the low resistance state of a variable resistor is reproduced | regenerated by the conventional reproduction | regeneration method The figure which shows the change of the resistance value of a variable resistor. The figure which shows the change of resistance value when the reproduction | regeneration pulse voltage from which a pulse width differs is applied to the variable resistor shown in FIG. FIG. 3 is a diagram showing a method for reproducing a memory element according to the first embodiment. The figure which shows the change of the resistance value of a variable resistor when each resistance state of a variable resistor is reproduced | regenerated with the reproduction | regenerating method by embodiment of this invention. FIG. 6 is a diagram showing a method for reproducing a memory element (memory circuit) according to a second embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Electrode 2 ... Variable resistance material 3 ... Electrode 4 ... Board | substrate 11 ... Variable resistor 12 ... Low pass filter 13 ... Input terminal 14 ... Sense amplifier 15 ... Recording voltage pulse 16 ... conventional reproduction voltage pulse 17 ... reproduction voltage pulse of the present invention

Claims (13)

A method for reproducing a memory element using a variable resistor capable of changing a resistance value to a different state by applying electric pulses of the same sign with different pulse widths,
A variable voltage is applied to the variable resistor by applying a set of regenerative voltage pulses including a first voltage pulse and a second voltage pulse having the same sign as the first voltage pulse and a longer pulse width than the first voltage pulse. Read the different resistance values of the resistor,
A method for reproducing a storage element. In claim 1,
The absolute value of the pulse voltage of the reproduction voltage pulse is smaller than the absolute value of the pulse applied to the variable resistor during data recording and erasing,
A method for reproducing a storage element. In claim 1 or 2,
The second voltage pulse comprises a plurality of pulses;
A method for reproducing a storage element. In any one of Claims 1-3,
The absolute values of the pulse voltages of the first voltage pulse and the second voltage pulse are different,
A method for reproducing a storage element. In claim 4,
The absolute value of the pulse voltage of the second voltage pulse is smaller than the absolute value of the first voltage pulse;
A method for reproducing a storage element. In any one of Claims 1 to 5,
Read the state of different resistance values of the variable resistor according to the current value flowing through the sense amplifier,
A method for reproducing a storage element. A variable resistor capable of changing the resistance value to different states by applying electric pulses of the same sign with different pulse widths;
A low pass filter connected in series with the variable resistance pair;
A sense amplifier connected in parallel with the low-pass filter;
Applying a set of regenerative voltage pulses consisting of a second voltage pulse having the same sign as the first voltage pulse and the first voltage pulse and having a longer pulse width than the first voltage pulse to the variable resistor, Read the state of different resistance values of the current value flowing through the sense amplifier,
A memory circuit characterized by that. In claim 7,
The absolute value of the pulse voltage of the reproduction voltage pulse is smaller than the absolute value of the pulse applied to the variable resistor during data recording and erasing,
A memory circuit characterized by that. In claim 7 or 8,
The second voltage pulse comprises a plurality of pulses;
A memory circuit characterized by that. In any one of claims 7 to 9,
The absolute values of the pulse voltages of the first voltage pulse and the second voltage pulse are different,
A memory circuit characterized by that. In claim 10,
The absolute value of the pulse voltage of the second voltage pulse is smaller than the absolute value of the first voltage pulse;
A memory circuit characterized by that. In any one of claims 7 to 11,
Read the state of different resistance values of the variable resistor according to the current value flowing through the sense amplifier,
A memory circuit characterized by that. In any one of claims 7 to 12,
The low-pass filter has a pulse width of 1 μsec. It has the characteristic of cutting the following pulse current,
A memory circuit characterized by that.

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