JP2009071105A - Variable resistor element, and memory device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a variable resistor element which can get rid of an increase of an erase time even if increasing an area to increase the rewritable number of time. <P>SOLUTION: The variable resistor element includes electrodes 11, 14 opposed each other and a variable resistor layer which is formed at least in the opposed region of electrodes 11, 14 and its resistance value changes corresponding to the direction of electric field produced between the electrodes 11, 14 by applying a voltage to electrodes 11, 14. The electrodes 11, 14 have a shape different from a perfect circle or a square. When deforming the opposed portion of the electrodes 11, 14 to a perfect circle or a square which has an area same as the area of the opposed portion of the electrodes 11, 14. The electrodes have a shape and size so that a difference between an upper limit value and lower limit value of inside strength distribution of the electric field produced in the opposed region of electrodes 11, 14 is smaller than a difference between an upper limit value and lower limit value of inside strength distribution of the electric field produced in the deformed opposed region of its two electrodes. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a variable resistance element having a variable resistance layer whose resistance value changes according to the direction of an applied electric field, and a memory device including the variable resistance element.

  In information devices such as computers, a high-density DRAM (Dynamic Random Access Memory) capable of high-speed operation is widely used. However, a DRAM has a problem that its manufacturing cost is high because a manufacturing process is more complicated than a general logic circuit or signal processing circuit used in an electronic device. A DRAM is a volatile memory in which information is lost when the power is turned off, and it is necessary to frequently perform a refresh operation.

    Thus, for example, FeRAM (Ferroelectric Random Access Memory) and MRAM (Magnetoresistive Random Access Memory) have been proposed as non-volatile memories whose information does not disappear even when the power is turned off. In these memories, it is possible to keep the written information for a long time without supplying power, and it is not necessary to perform a refresh operation, so that power consumption can be reduced correspondingly. However, FeRAM has a problem that miniaturization is not easy, and MRAM has a problem that a write current is large (see, for example, Non-Patent Document 1).

  Thus, for example, a new type of storage device as shown in FIGS. 11 and 12 has been proposed as a memory suitable for increasing the data writing speed.

  FIG. 11 is an enlarged view of the memory cell 100 of a new type of storage device. The memory cell 100 includes a variable resistance element 110 and a transistor 120 (switching element). FIG. 12 illustrates a cross-sectional configuration of the variable resistance element 110. The variable resistance element 110 is formed by laminating an electrode 111, a conductor film 112, an insulator film 113, and an electrode 114 in this order. The electrode 111 is electrically connected to the source line S, and the electrode 114 is electrically connected to the drain (not shown) of the transistor 120. A source (not shown) of the transistor 120 is electrically connected to the bit line B, and a gate (not shown) of the transistor 120 is electrically connected to the word line W.

  In this memory device, when a voltage is applied to the electrode 114 and the electrode 111 so that a current flows from the conductor film 112 toward the insulator film 113, the insulator film 113 changes to a low resistance and data is written. When a voltage is applied to the electrode 114 and the electrode 111 so that a current flows from the film 113 toward the conductor film 112, the insulator film 113 changes to a high resistance and data is erased.

  In this memory device, a memory cell can be configured with a simple structure as compared with a conventional non-volatile memory or the like, so that a large signal can be obtained without depending on the size of the element, so that it is resistant to scaling. It has the feature. In addition, the data writing speed due to the resistance change can be increased to, for example, about 5 nanoseconds, and it can be operated at a low voltage (for example, about 1 V) and a low current (for example, about 20 μA).

Nikkei Electronics, 2007.7.7.16, p. 98

  However, in the above-described new type of memory device, the number of rewritable times may be reduced depending on the material and manufacturing method of the conductor film 112 and the insulator film 113. Here, the number of rewrites refers to repeated writing and erasing with respect to the variable resistance element 110, and the number of rewritable times includes, for example, the write resistance Rw, as shown in FIG. This indicates the number of times of rewriting when the difference from the erasing resistance Re decreases rapidly. However, in the above case, as shown in FIG. 14, it is possible to increase the number of rewritable times by increasing the cell area (displacement to the right side of the horizontal axis in FIG. 14). However, there was a problem that the erase time would increase drastically if the area was increased.

  The present invention has been made in view of such a problem, and an object of the present invention is to provide a variable that can reduce the increase in erase time even when the cell area is increased in order to increase the number of rewrite cycles. It is an object to provide a resistance element and a memory device including the resistance element.

  The variable resistance element according to the present invention includes at least a part of two electrodes facing each other in close proximity to each other, and at least two electrodes formed in a close facing region of the two electrodes, and applying two voltages to the two electrodes And a variable resistance layer whose resistance value changes according to the direction of the electric field generated between the two. Here, the adjacent opposing portions of the two electrodes have a shape different from a perfect circle and a square. Further, the proximity facing portion of the two electrodes has a difference between the upper limit value and the lower limit value of the in-plane intensity distribution of the electric field generated in the proximity facing region of the two electrodes. More than the difference between the upper limit value and the lower limit value of the in-plane intensity distribution of the electric field generated in the proximity facing region of the two deformed electrodes when deformed into a perfect circle or square having the same area as the area of the proximity facing portion The shape and size are small.

  The memory device of the present invention includes the variable resistance element, a first wiring electrically connected to one electrode of the variable resistance element, and a second wiring electrically connected to the other electrode of the variable resistance element. A wiring and a switching element that is inserted in series with the first wiring and that controls a voltage applied between the two electrodes are provided.

  In the variable resistance element and the storage device of the present invention, the proximity facing portion of the two electrodes has a shape different from a perfect circle and a square, and further, the in-plane strength of the electric field generated in the proximity facing region of the two electrodes When the difference between the upper limit value and the lower limit value of the distribution deforms the proximity facing portion of the two electrodes into a perfect circle or square having an area equal to the area of the proximity facing portion of the two electrodes, the two deformed electrodes The shape and size are smaller than the difference between the upper limit value and the lower limit value of the in-plane intensity distribution of the electric field generated in the adjacent opposing region. Thereby, since the electric field concentration on the edges of the two electrodes is relaxed, the in-plane intensity distribution of the electric field applied to the variable resistance layer becomes more uniform, and the average value of the electric field strength applied to the variable resistance layer Becomes larger.

  According to the variable resistance element and the memory device of the present invention, the in-plane intensity distribution of the electric field applied to the variable resistance layer becomes more uniform, and the average value of the electric field strength applied to the variable resistance layer becomes larger. Therefore, even if the cell area is increased in order to increase the number of rewrite cycles, the increase in the erase time can be reduced.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  A storage device according to an embodiment of the present invention is configured by arranging memory cells 1 as a storage unit in a matrix. FIG. 1 is an enlarged view of the memory cell 1 of this storage device. The memory cell 1 includes a variable resistance element 10 and a transistor 20 (switching element).

  FIG. 2 illustrates a cross-sectional configuration of the variable resistance element 10. The variable resistance element 10 is formed by laminating an electrode 11, a conductor film 12, an insulator film 13 (variable resistance layer), and an electrode 14 in this order. The electrode 11 is electrically connected to the source line S, and the electrode 14 is electrically connected to the drain (not shown) of the transistor 20. The source (not shown) of the transistor 20 is electrically connected to the bit line B, and the gate (not shown) of the transistor 20 is electrically connected to the word line W.

  Here, the electrodes 11 and 14 are made of, for example, a metal material such as aluminum (Al), copper (Cu), or tungsten (W). The insulator film 13 is made of, for example, a metal material, a rare earth element, an oxide or nitride of a mixture thereof, or a semiconductor material, and a voltage is applied to the two electrodes (electrodes 11 and 14) as described later. It has a function of changing the resistance value in accordance with the direction of the electric field generated between the two electrodes.

  The conductor film 12 includes, for example, at least one metal element of Cu, Ag, and Zn and at least one chalcogen element of Te, S, and Se. For example, the CuTeSi, GeSbTeSi, It consists of CuGeTeSi, AgGeTeSi, AgTeSi, ZnTeSi, ZnGeTeSi, CuSSi, CuGeSSi, CuSeSi, CuGeSeSi and the like.

  Here, Cu, Ag, and Zn are elements that easily move in the conductor film 12 and the insulator film 13 when they become cations. Te is an element that can make the resistance value of the conductor film 12 smaller than the resistance value of the insulator film 13 when the variable resistance element 10 is turned on. Therefore, in the conductor film 12, when Te is used as the chalcogen element, the portion where the resistance value greatly changes can be limited to the insulator film 13, and the stability of the memory operation can be improved. Further, when Cu is used as the cation element in the conductor film 12 and Te is used as the chalcogen element, the resistance value of the conductor film 12 is set to the insulator film when the variable resistance element 10 is turned on. Since it can be made sufficiently smaller than the resistance value of 13, the stability of the memory operation can be further improved.

  Si is an element capable of making the conductor film 12 amorphous and increasing the crystallization temperature of the conductor film 12. Therefore, when an appropriate amount of Si is contained in the conductor film 12, a change in state such as crystallization due to heat received during the process is suppressed, and the stability of the memory operation can be improved.

  The operation of the memory device (memory cell 1) of this embodiment will be described.

(writing)
When a negative potential (−potential) is applied to the electrode 14 and a positive potential (+ potential) or a zero potential is applied to the electrode 11, and a current flows from the conductor film 12 toward the insulator film 13, the conductor film 12. Then, at least one metal element of Cu, Ag, and Zn is ionized and diffuses in the insulator film 13 and is combined with electrons on the electrode 14 side and deposited, or the insulator film 13 It stays diffused inside. As a result, a current path containing a large amount of at least one metal element of Cu, Ag, and Zn is formed in the insulator film 13, or Cu, Ag, and Zn are formed in the insulator film 13. Among them, a large number of defects due to at least one metal element are formed, and the resistance value of the insulator film 13 is lowered. At this time, since the resistance value of the conductor film 12 is originally lower than the resistance value of the insulator film 13 before recording, the resistance value of the variable resistance element 10 as a whole is also reduced by reducing the resistance value of the insulator film 13. (Ie, the variable resistance element 10 is turned on). Note that the resistance of the entire variable resistance element 10 at this time is the writing resistance.

  Thereafter, when the voltage applied to the electrodes 11 and 14 is set to zero and the voltage applied to the variable resistance element 10 is set to zero, the resistance value of the variable resistance element 10 is held in a low state. In this way, information is recorded (written).

(Erase)
Next, when a positive potential (+ potential) is applied to the electrode 14 and a negative potential (−potential) or zero potential is applied to the electrode 11, and a current flows from the insulator film 13 toward the conductor film 12, At least one kind of metal element of Cu, Ag and Zn constituting the current path or impurity level formed in the insulator film 13 is ionized and moves in the insulator film 13 to be a conductor film. Return to the 12th side. As a result, the current path or the defect disappears from the insulator film 13 and the resistance value of the insulator film 13 is increased. At this time, since the resistance value of the conductive film 12 is originally low, the resistance value of the entire variable resistance element 10 is also increased by increasing the resistance value of the insulator film 13 (that is, the variable resistance element 10 is turned off). Note that the resistance of the entire variable resistance element 10 at this time is an erasing resistor.

  Thereafter, when the voltage applied to the electrodes 11 and 14 is set to zero and the voltage applied to the variable resistance element 10 is set to zero, the resistance value of the variable resistance element 10 is held in a high state. In this way, the recorded information is erased.

  By repeating such a process, information can be recorded (written) on the variable resistance element 10 and recorded information can be erased repeatedly.

  At this time, for example, the state in which the resistance of the entire variable resistance element 10 is a write resistance (state of low resistance value) is set to information “1”, and the resistance of the entire variable resistance element 10 is an erasure resistance When the state (high resistance value) corresponds to information “0”, the information of the variable resistance element 10 is changed from “0” to “1” by applying a negative potential (−potential) to the electrode 14. Instead, by applying a positive potential (+ potential) to the electrode 14, the information of the variable resistance element 10 can be changed from “1” to “0”.

  As described above, in this embodiment, recording and erasing of information is performed using the variable resistance element 10 having a simple structure in which the electrode 11, the conductor film 12, the insulator film 13, and the electrode 14 are simply laminated in this order. Thus, even if the variable resistance element 10 is miniaturized, information can be recorded and erased easily. In addition, since the resistance value of the insulator film 13 can be maintained even without power supply, information can be stored for a long time. Further, since the resistance value of the insulator film 13 does not change by reading and it is not necessary to perform a fresh operation, the power consumption can be reduced by that amount.

By the way, in the present embodiment, the proximity facing portions of the two electrodes (electrodes 11 and 14) (the entire facing surfaces of the two electrodes in FIG. 2) have a shape different from a perfect circle and a square. Rectangular shape (see FIG. 2), oval shape (see FIG. 3), U-shape (see FIG. 4), ring shape (see FIGS. 5 and 6), spiral shape (see FIG. 7), or serpentine shape (see FIG. 8). In each figure, the length on the short axis side is shown as L ₁ , and the length on the long axis side is shown as L ₂ . Furthermore, the proximity facing portion of the two electrodes (electrodes 11 and 14) has an in-plane intensity distribution of an electric field (electric field applied to the conductor film 12) generated in the proximity facing region of the two electrodes (electrodes 11 and 14). The difference between the upper limit value and the lower limit value transforms the proximity facing portion of the two electrodes (electrodes 11 and 14) into a true circle or square having an area equal to the area of the proximity facing portion of the two electrodes (electrodes 11 and 14). In this case, the shape and size are smaller than the difference between the upper limit value and the lower limit value of the in-plane intensity distribution of the electric field generated in the proximity facing region of the two deformed electrodes.

For example, as shown in FIG. 2, when the adjacently facing portions of the electrodes 11 and 14 have a rectangular shape with a length L ₁ on the short axis side and a length L ₂ on the long axis side, As shown in FIG. 9, the difference (E ₂ −E ₁ ) between the upper limit value E ₂ and the lower limit value E ₁ of the in-plane intensity distribution of the electric field generated in the adjacent facing region of the electrodes 11, 14 is When the 14 adjacent facing portions are deformed into a perfect circle having an area equal to the area of the adjacent facing portions of the electrodes 11 and 14, the in-plane intensity distribution of the electric field generated in the adjacent facing regions of the two deformed electrodes It is smaller than the difference (E ₃ −E ₀ ) between the upper limit value E ₃ (> E ₂ ) and the lower limit value E ₀ (<E ₁ ).

Here, the alternate long and two short dashes line in FIG. 9 is obtained when the proximity facing portion of the electrodes 11 and 14 is deformed into a perfect circle having a diameter c having an area equal to the area of the proximity facing portion of the electrodes 11 and 14. An example of an in-plane intensity distribution of an electric field generated in a close opposed region of two electrodes is shown. Further, one-dot chain line in FIG. 9, when the length L ₁ of the short axis side of the proximity region facing electrodes 11 and 14 is in the b (<c), occurs near the opposite area of the electrodes 11 and 14 An example of the in-plane intensity distribution of the electric field is shown. The solid line in FIG. 9, the length _{L 1} of the short axis side of the proximity region facing electrodes 11 and 14 is a (<b, c) when that is the proximity opposing area of the electrodes 11 and 14 in An example of the in-plane intensity distribution of the generated electric field is shown.

9, easy electric field is concentrated on the edges of adjacent facing portions of the two electrodes (the boundary portion of the cell), and the length L ₁ larger than b, becomes remarkable electric field concentration on the edge, the edge It can be seen that the electric field strength is extremely smaller than the electric field strength at the edge at portions other than the edge. On the other hand, when the length L ₁ is smaller than b, the electric field concentration on the edge is relaxed, and the electric field strength E ₃ generated at the edge when the length L ₁ is larger than b (E 3) _It can be seen that the electric field of ₁ , E ₂ ) is generated over the entire area of the two adjacent electrodes.

Thus, for example, as shown in FIG. 10, the shape and size of the proximity facing portion of the electrodes 11, 14 can be changed to the proximity facing region of the electrodes 11, 14 while the cell area is constant (for example, αm ² ). When the difference between the upper limit value and the lower limit value of the in-plane intensity distribution of the electric field generated inside the electrode 11, 14 is deformed into a perfect circle having an area equal to the area of the electrodes 11, 14. In addition, the erasing speed (time) is set to a rectangular shape and a dimension that are smaller than the difference between the upper limit value and the lower limit value of the in-plane intensity distribution of the electric field generated in the adjacent opposing region of the two deformed electrodes. It can be seen that can be greatly shortened. In this case, since the cell area is fixed (for example, αm ² ), the number of rewrite cycles is not particularly changed.

Further, for example, as shown in FIG. 10, in order to increase the rewrite number of repetitions, in the case of increasing the cell area from βm ^{2 (<αm 2)} to .alpha.m ^2, the proximity portion opposed electrodes 11 and 14 The difference in shape and size between the upper limit value and the lower limit value of the in-plane intensity distribution of the electric field generated in the proximity facing region of the electrodes 11 and 14 indicates that the proximity facing portion of the electrodes 11 and 14 is close to the electrodes 11 and 14. When deformed into a perfect circle having an area equal to the area of the part, the difference between the upper limit value and the lower limit value of the in-plane intensity distribution of the electric field generated in the adjacent opposing region of the two deformed electrodes is smaller By making the shape and the size of the rectangle, an extreme increase in the erasing time can be reduced. That is, even when the area is increased and the number of rewrite cycles is increased, the increase in the erase time can be reduced.

  The above-described effect is not only when the proximity facing portion of the electrodes 11 and 14 is transformed into a true circle having an area equal to the area of the proximity facing portion of the electrodes 11 and 14, but also the proximity facing portion of the electrodes 11 and 14. It can also be obtained when it is transformed into a square having an area equal to the area.

  The variable resistance element and the memory device of the present invention have been described with reference to the embodiment, but the present invention is not limited to the above embodiment, and the configuration of the variable resistance element and the memory device of the present invention is as follows. As long as it is possible to obtain the same effect as that of the above-described embodiment, it can be freely modified.

1 is a circuit configuration diagram of a storage device according to an embodiment of the present invention. It is a perspective view of the variable resistance element of FIG. It is the schematic showing the one shape of the electrode of FIG. It is the schematic showing the other shape of the electrode of FIG. It is the schematic showing the other shape of the electrode of FIG. It is the schematic showing the other shape of the electrode of FIG. It is the schematic showing the other shape of the electrode of FIG. It is the schematic showing the other shape of the electrode of FIG. It is a conceptual diagram for demonstrating electric field strength distribution in the variable resistance element of FIG. FIG. 2 is a characteristic diagram for explaining an erasing characteristic of the variable resistance element of FIG. 1. It is a circuit block diagram of the conventional memory | storage device. It is a cross-sectional block diagram of the variable resistance element of FIG. It is a characteristic view for demonstrating the rewrite frequency. It is a characteristic view for demonstrating the rewritable frequency | count.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Memory cell, 10 ... Variable resistance element, 11, 14 ... Electrode, 12 ... Conductor film | membrane, 13 ... Insulator film | membrane, 20 ... Transistor.

Claims (3)

Two electrodes at least partially facing each other close to each other;
A variable resistance layer which is formed in at least the adjacent region of the two electrodes and has a resistance value that changes according to the direction of an electric field generated between the two electrodes by applying a voltage to the two electrodes. Prepared,
The proximity facing portion of the two electrodes has a shape different from a perfect circle and a square, and an upper limit value and a lower limit value of the in-plane intensity distribution of the electric field generated in the proximity facing region of the two electrodes. A difference is generated in the near-facing region of the deformed two electrodes when the close-facing portion of the two electrodes is transformed into a true circle or a square having an area equal to the area of the near-facing portion of the two electrodes. A variable resistance element characterized by having a shape and size smaller than a difference between an upper limit value and a lower limit value of an in-plane intensity distribution of an electric field. 2. The variable resistance element according to claim 1, wherein the adjacently facing portions of the two electrodes have an elliptical shape, a rectangular shape, a U shape, a meandering shape, a ring shape, or a spiral shape. At least a portion of two electrodes facing each other in close proximity to each other, and an electric field formed between the two electrodes by applying a voltage to the two electrodes formed in at least a proximity facing region of the two electrodes A variable resistance element having a variable resistance layer whose resistance value changes according to the orientation of
A first wiring electrically connected to one electrode of the variable resistance element;
A second wiring electrically connected to the other electrode of the variable resistance element;
A switching element that is inserted in series with the first wiring and that controls a voltage applied between the two electrodes,
The proximity facing portion of the two electrodes has a shape different from a perfect circle and a square, and an upper limit value and a lower limit value of the in-plane intensity distribution of the electric field generated in the proximity facing region of the two electrodes. A difference is generated in the near-facing region of the deformed two electrodes when the near-facing portion of the two electrodes is deformed into a perfect circle or a square having an area equal to the area of the near-facing portion of the two electrodes. A storage device having a shape and a size that are smaller than a difference between an upper limit value and a lower limit value of an in-plane intensity distribution of an electric field.

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