JP2006145267A - Waveform display - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a waveform display capable of discriminating the quality level of the input signal. <P>SOLUTION: The display comprises a measuring section measuring the input signal with a specific period and outputting the measured values, a first memory storing the measured value, a second memory storing the area data for indicating a plurality of determining areas Z1 to Z4 set for input signals in a display 5 with a neighboring state without overlapping each other, a control part reading the measured values out of the first memory and indicating signal waveform WS1 of the input signals on the display 5 and reading the area data from the second memory and indicating a plurality of determining areas Z1 to Z4 on the display 5 with a neighboring state, without overlapping each other. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a waveform display device that displays a signal waveform of an input signal.

As this type of waveform display device, a recorder disclosed in Japanese Patent Application Laid-Open No. 11-118532 is known. This recorder automatically generates a waveform determination area that represents the allowable range of the waveform (signal waveform) measured from the input signal with a predetermined width set in advance in the vertical direction of the reference waveform. Are displayed on the display means. For this reason, the measurer can determine whether or not the signal waveform is acceptable based on whether or not the signal waveform belongs to the waveform determination area.
JP-A-11-118532 (page 1-3)

  However, the conventional recorder has the following problems. That is, in this recorder, the signal waveform and one waveform determination area are displayed simultaneously, and it is determined whether or not the signal waveform belongs to this one waveform determination area. Therefore, as long as all of the signal waveforms belong to the waveform judgment area, this recorder has the same judgment that both high-quality ones that have been passed with sufficient margin and low-quality ones that have passed the last minute are acceptable. Result. Specifically, for example, when a logic IC or the like is used as a determination target, a response time (delay time, rise time, etc.) of a signal waveform output from the logic IC is sufficiently short and the response time is high. Long and low-quality ones with the same quality result are both accepted. For this reason, the conventional recorder has a problem that it is difficult to accurately determine the quality of the input signal, for example, it is difficult to select a determination target for each rank.

  The present invention has been made in view of such problems, and a main object of the present invention is to provide a waveform display device that can determine the quality of an input signal.

  In order to achieve the above object, the waveform display device according to claim 1, a measurement unit that measures an input signal at a predetermined period and outputs a measurement value, a first storage unit that stores the measurement value, and the input A second storage unit for storing area data to be displayed on the display unit in a state of being adjacent to each other without overlapping a plurality of determination areas set for signals; and the measured value from the first storage unit And displaying the signal waveform of the input signal on the display unit and reading the area data from the second storage unit to display the plurality of determination areas on the display unit in an adjacent state without overlapping each other. Department.

  The waveform display device according to claim 2 is the waveform display device according to claim 1, wherein the control unit specifies a determination area to which a part or all of the signal waveform of the plurality of determination areas belongs. The result information based on the specific result is notified.

  Further, in the waveform display device according to claim 3, in the waveform display device according to claim 2, the control unit displays the result information on the display unit for notification.

  The waveform display device according to claim 4 is the waveform display device according to any one of claims 1 to 3, wherein the second storage unit sets the plurality of determination areas in a horizontal axis direction of the display unit. And storing the area data to be displayed adjacent to each other without overlapping each other, and the control unit reads the area data from the second storage unit and reads the plurality of area data along the horizontal axis direction. The determination areas are displayed on the display unit in an adjacent state without overlapping each other.

  The waveform display device according to claim 5 is the waveform display device according to any one of claims 1 to 3, wherein the second storage unit sets the plurality of determination areas in a vertical axis direction of the display unit. Area data to be displayed adjacent to each other without overlapping each other, and the control unit reads the area data from the second storage unit and performs the plurality of determinations along the vertical axis direction. The areas are displayed on the display unit in an adjacent state without overlapping each other.

  According to the waveform display device of the first aspect, the control unit displays a plurality of determination areas on the display unit adjacent to each other without overlapping each other, thereby comparing with a conventional recorder that displays one determination area. Thus, for example, the number of determination areas to which the signal waveform belongs and the determination area that completes the rise of the signal waveform are identified. Based on the identified determination area, the input signal such as the rise time and delay time of the signal waveform is identified. The quality can be accurately discriminated by the measurer. As a result, the rank of the determination object can be accurately determined based on this quality.

  According to the waveform display device of the second aspect, the control unit specifies a determination area to which a part or all of the signal waveform of the plurality of determination areas belongs, and notifies the result information based on the determination result. As a result, the determination area to which the signal waveform belongs can be identified accurately and quickly. As a result, the quality of the input signal can be determined accurately in a short time by the measurer.

  According to the waveform display device of the third aspect, since the control unit displays the result information on the display unit and notifies the user, it is possible to easily identify the determination area to which the signal waveform belongs by just looking at it. The quality of the input signal can be quickly determined by the measurer.

  According to the waveform display device of the fourth aspect, the control unit reads the area data from the second storage unit, and the display units are adjacent to each other without overlapping each other along the horizontal axis direction without overlapping each other. Since the display area can specify the degree of change of the signal waveform in the voltage axis direction with respect to the time axis such as the rise time, for example, by the determination area to which the signal waveform belongs, the quality of the input signal in the time axis direction can be determined. The measurer can be discriminated accurately.

  According to the waveform display device of the fifth aspect, the control unit reads the area data from the second storage unit, and the plurality of determination areas are adjacent to each other along the vertical axis direction without overlapping each other. By displaying, for example, the degree of change in the signal waveform in the voltage axis direction, such as the oscillating signal waveform, can be specified by the number of determination areas to which the signal waveform belongs, so the degree of convergence of the input signal in the voltage axis direction The quality can be determined accurately by the measurer.

  Hereinafter, a waveform display device according to the present invention will be described with reference to the accompanying drawings.

  First, the configuration of the waveform display device 1 will be described with reference to the drawings.

  The waveform display device 1 shown in FIG. 1 is based on measured values VS obtained by measuring an electrical parameter (for example, voltage) of an input signal S1 from a determination target (as an example, a logic IC: not shown) at a predetermined period. A signal waveform WS for an input signal S1, which will be described later, and display processing for a plurality of independent and independent rank determination areas (corresponding to determination areas in the present invention, hereinafter also simply referred to as areas) Z1 to Z5, and an input signal S1 (signal An area specifying process for specifying which of the areas Z1 to Z5 part or all of the waveform WS) belongs is executed. Here, as an example, an input signal S0 that rises from a low level to a high level is input to the logic IC, and a signal output from the logic IC in synchronization with the input of the input signal S0 is used as the input signal S1. An example will be described in which the operator finally determines the quality of the response characteristics of the logic IC, that is, the degree of quality of the logic IC.

  The waveform display device 1 includes a measurement unit 2, an operation unit 3, a control unit 4, a display unit 5, a VRAM 6, a ROM 7, and RAMs 8 and 9. The measuring unit 2 includes an A / D converter, and when a predetermined condition set in advance is satisfied (for example, when the input signal S0 to the logic IC exceeds a preset voltage) ), The voltage of the input signal S1 input through the signal input connector is measured (sampled) for a predetermined time in a predetermined cycle, and a measured value VS of binary data is output. The operation unit 3 includes an area setting key for setting a plurality of areas for an input signal, a numerical value input key for inputting a numerical value, and the like, and outputs an operation signal S2 corresponding to these key operations.

  The control unit 4 comprehensively controls the waveform display device 1 and executes various processes according to preset operation conditions. Specifically, in the image display process described later, the control unit 4 performs signal waveforms WS1 to WS5 (hereinafter, signal waveforms WS1 to WS5 when the signal waveforms WS1 to WS5 are not distinguished) for the input signal S1, as shown in FIG. Also, for example, five areas Z1 to Z5 for waveform determination are displayed on the display screen of the display unit 5. In this case, the control unit 4 virtually draws the signal waveform WS, the areas Z1 to Z5, the voltage scale V, the time scale T, and the like in the VRAM 6 to display them on the display unit 5. D is generated in the VRAM 6. Moreover, the control part 4 performs the area specific process mentioned later, and specifies the area where a part or all of the signal waveform WS (a part of the rising waveform of the signal waveform WS in this example) belongs to each of the areas Z1 to Z5. In addition, a specific result display A (an example of the result information in the present invention) representing an area (any one or more of Z1 to Z5) to which a part of the signal waveform WS belongs is displayed on the display unit 5 as shown in FIG. Display on the screen (an example of notification). In this case, the control unit 4 draws the waveform determination areas Z1 to Z5 for the input signal S1 on the virtual plane in the RAM 9 corresponding to the display screen of the display unit 5, and performs area specifying processing for the input signal S1. Execute.

  The display unit 5 includes a color liquid crystal panel as an example, and displays the signal waveform WS, the areas Z1 to Z5, the voltage scale V, the time scale T, the specific result display A, and the like under the control of the control unit 4. The VRAM 6 stores display data D generated by the control unit 4. The ROM 7 corresponds to a second storage unit in the present invention, is configured by a flash ROM, stores the operation program of the control unit 4, and displays the areas Z1 to Z5 adjacent to each other without overlapping each other. Area data Da to Dd to be displayed on the display screen 5 is stored. The RAM 8 corresponds to a first storage unit in the present invention, and stores measurement values VS, VS,... Output from the measurement unit 2 and transferred under the control of the control unit 4. The RAM 9 stores the areas Z1 to Z5 drawn on the virtual plane by the control unit 4.

  Next, the overall operation of the waveform display device 1 will be described with reference to the drawings.

  First, areas Z1 to Z5 used for area identification processing for the input signal S1 are set in the waveform display device 1 as advance preparation for area identification processing for the input signal S1. In this case, by operating the area setting key and the numerical value input key of the operation unit 3, a graphic or numerical value indicating each area of each area Z1 to Z5 is input. At this time, the control unit 4 generates area data Da to Dd indicating the areas Z1 to Z5 based on the data indicating the graphic or numerical value output from the operation unit 3 according to this operation, and stores it in the ROM 7. In this example, when the rising waveform of the input signal S1 belongs to this area as the area Z1, that is, when the input signal S1 rises only through this area, the input signal S1 is An area where the output logic IC can be selected as a high-speed product is set. Similarly, as for the areas Z2, Z3, Z4 and Z5, when the rising waveform of the input signal S1 belongs only to each of these areas, that is, the input signal S1 passes only within these areas. When standing up, areas that can be selected as medium-high-speed products, medium-speed products, low-speed products, and extremely low-speed products are set. In this case, when the rising waveform of the input signal S1 belongs to a plurality of areas, it is selected as a product having a slower speed. Further, as the number of areas to which the user belongs is increased, the product is selected as a product with a slow rise. Further, the area Z5 is an area for determining as an unacceptable product, and when the rising waveform of the input signal S1 passes through this area, it is selected as an unacceptable product with a very slow delay time. . Specifically, as an example, as the area Z1, a region where the time is 0.7 ns or more and less than 0.9 ns and the voltage is 0.8 V or more and 3.2 V or less is set. Similarly, as the areas Z2 to Z5, the time is 0.9 ns to less than 1.1 ns, 1.1 ns to less than 1.3 ns, 1.3 ns to less than 1.5 ns, and 1.5 ns to less than 1.7 ns, respectively. Thus, a region where both voltages are 0.8 V or more and 3.2 V or less is set. Thus, the areas Z1 to Z5 used for the area specifying process are set, and the preliminary preparation for the area specifying process is completed.

  Next, the signal output terminal in the logic IC of the determination target and the signal input connector of the measurement unit 2 of the waveform display device 1 are connected to each other, and the signal input terminal in the logic IC and the signal input connector of the measurement unit 2 are connected to each other. The logic IC is operated in a state connected to. Subsequently, the input signal S0 rising from the low level to the high level is input to the signal input terminal of the logic IC. Next, when the input signal S0 input to the measurement unit 2 exceeds a predetermined voltage, the input signal S1 output from the logic IC is sampled at a predetermined period, thereby measuring the measured values VS, VS,・ Sequentially generate and output over a predetermined time. Further, the control unit 4 sequentially stores the measurement values VS, VS,... Output from the measurement unit 2 in the RAM 8.

  In addition, the control unit 4 executes an image display process for displaying the signal waveform WS1, the areas Z1 to Z5, and the like. In this image display process, the control unit 4 first virtually draws the areas Z1 to Z5, the voltage scale V, and the time scale T based on the area data Da to Dd stored in the ROM 7 on the virtual plane of the VRAM 6. Thus, display data D for displaying them is generated in the VRAM 6. In this case, the control unit 4 generates the display data D so that the areas of the areas Z1 to Z5 are displayed in different colors so as to be identifiable. Further, the control unit 4 virtually draws the signal waveform WS1 based on the measurement values VS, VS,... Stored in the RAM 8 on the virtual plane so as to overlap the areas Z1 to Z5 and the like, and displays the display data D. Is generated in the VRAM 6. In this case, the control unit 4 generates the display data D so that the signal waveform WS1 is displayed in a color different from the color of each area of each area Z1 to Z5. Subsequently, the display unit 5 reads the display data D from the VRAM 6 and displays a waveform display screen (signal waveform WS1 and areas Z1 to Z5, etc.) based on the display data D on the display screen. In this case, as shown in FIG. 2, the areas Z <b> 1 to Z <b> 5 are displayed in color on the display screen of the display unit 5 in an adjacent state without overlapping each other along the horizontal axis (time axis) direction. Specifically, each of the areas Z1 to Z5 has a width of 0.2 ns with respect to the time axis and is displayed as a band-like region having a vertically long width of 2.4 V with respect to the voltage axis. In this case, since five subdivided areas Z1 to Z5 are displayed instead of one area, only the number of areas through which the signal waveform WS1 passes and the area where the rising of the signal waveform WS1 is completed are identified. The quality of the logic IC is accurately and easily determined by the measurer based on the identified area. Specifically, as shown in FIG. 2, since the signal waveform WS1 is identified as passing only within the area Z1 of the areas Z1 to Z5, the rising time of the signal waveform WS1 is one area width (this The delay time from the time when the input signal S0 of the logic IC exceeds the predetermined voltage until the rise of the signal waveform WS1 is completed is associated with the area Z1. The quality of the logic IC that is within the time (in this example, within the time of 0.7 ns or more and less than 0.9 ns) is accurately and easily determined by the measurer. As a result, the measurer accurately determines that the rank of the logic IC that has output the input signal S1 is an acceptable product and a high-speed product.

  On the other hand, the control unit 4 starts an area specifying process. In this area specifying process, the control unit 4 virtually draws the areas Z1 to Z5 on the virtual plane in the RAM 9 when the areas Z1 to Z5 are virtually drawn on the virtual plane in the VRAM 6. Further, when the signal waveform WS1 is drawn on the virtual plane in the VRAM 6 when the control unit 4 draws the signal waveform WS1 on the virtual plane in the RAM 9, the areas Z1 to Z5 are located at the positions to be drawn. It is determined whether or not exists. Further, when it is determined that the areas Z1 to Z5 exist at the position where the signal waveform WS is to be drawn, the control unit 4 specifies which area is present. In this case, as shown in FIG. 2, the control unit 4 specifies that the signal waveform WS1 passes only in the area Z1 because the signal waveform WS1 exists only in the area Z1 of the areas Z1 to Z5. Subsequently, the control unit 4 virtually includes a specific result display A representing the specified result (in this case, the character “passing Z1” shown in the figure) on the virtual plane so as to overlap the signal waveform WS1 and the like. Drawing is performed to generate display data D in the VRAM 6. Subsequently, the display unit 5 reads the display data D from the VRAM 6 and displays the specific result display A (the letter “passing Z1”) together with the signal waveform WS1 and the areas Z1 to Z5 as shown in FIG. On the display screen. Thus, the area specifying process is completed. In this case, since the specific result display A “passing Z1” is displayed on the display screen of the display unit 5, the area to which the signal waveform WS1 belongs can be identified accurately and quickly only by looking at the specific result display A. The quality of the logic IC is determined accurately and easily by the measurer. As a result, the measurer accurately determines that the rank of the logic IC that has output the input signal S1 is an acceptable product and a high-speed product.

  Next, the logic ICs are sequentially replaced, and image display processing and area identification processing are executed for each logic IC in the same manner as described above. In response to this, it is assumed that signal waveforms WS2 to WS5 corresponding to the respective logic ICs are displayed on the display screen of the display unit 5. In this case, in the same manner as described above, the quality of the logic IC is accurately determined by the measurer by identifying the number of areas through which each of the signal waveforms WS2 to WS5 passes and the area where the rising of each of the signal waveforms WS2 to WS5 is completed. Determined. As a result, the rank of the logic IC that has output the input signal S1 corresponding to the signal waveforms WS2 to WS5 is accurately determined by the measurer.

  In this case, the control unit 4 specifies that the signal waveform WS2 has passed only two areas Z2 and Z3 without passing through the areas Z1, Z4, and Z5, and specifies “passing Z2 and Z3”. The result display A is displayed on the display screen of the display unit 5. For this reason, the area to which the signal waveform WS2 belongs is identified accurately and quickly only by looking at the specific result display A, and the rise time of the signal waveform WS2 is within the time of two area widths (in this case, 0.4 ns). And the quality of the logic IC that the delay time is within the time of the area Z3 (in this case, 1.1 ns or more and less than 1.3 ns) is accurately and easily determined by the measurer. As a result, the measurer accurately determines that the rank of the logic IC that has output the input signal S1 is the acceptable product and the medium-speed product. Similarly, the control unit 4 specifies that the signal waveform WS3 has passed through only two areas Z3 and Z4 without passing through the areas Z1, Z2 and Z5, and “passes Z3 and Z4”. The specific result display A is displayed on the display screen of the display unit 5. Therefore, the rise time of the signal waveform WS3 is within the time of two area widths (in this case, 0.4 ns), and the delay time is within the time of the area Z4 (in this case, 1.3 ns or more and less than 1.5 ns). The quality of the logic IC is determined accurately and easily by the measurer. As a result, the measurer accurately determines that the rank of the logic IC that has output the input signal S1 is the acceptable product and the low-speed product. Similarly, the control unit 4 specifies that the signal waveform WS4 has passed through the four areas Z1 to Z4 without passing through the area Z5, and displays the specified result display A as “passing Z1 to Z4”. It is displayed on the display screen of the display unit 5. Therefore, the rise time of the signal waveform WS4 is within the time of four area widths (in this case, 0.8 ns), and the delay time is within the time of the area Z4 (in this case, 1.3 ns or more and less than 1.5 ns). The quality of the logic IC is determined accurately and easily by the measurer. As a result, the measurer accurately determines that the rank of the logic IC that has output the input signal S1 is a rejected product and that the rise is gentle. On the other hand, with respect to the signal waveform WS5, the control unit 4 does not pass through the areas Z1 to Z4. If a part of the waveform passes only the area Z5 or is a pass product, the control unit 4 should pass through the areas Z1 to Z1. It is specified that none of Z4 passes, and a specific result display A such as “passing Z5 NG” or “non-passing NG” is displayed on the display screen of the display unit 5. For this reason, the measurer can accurately and easily determine that the delay time of the signal waveform WS5 is extremely slow. In addition, the measurer accurately determines that the logic IC that outputs the input signal S1 is a rejected product.

  As described above, according to the waveform display device 1, a plurality of areas Z <b> 1 to Z <b> 5 subdivided in a state where the control unit 4 is adjacent to each other without overlapping each other is displayed on the display screen of the display unit 5. Since the number of areas through which the signal waveform WS passes and the area where the rising of the signal waveform WS is completed are identified as compared with the conventional recorder that displays the signal, the rising of the signal waveform WS is determined based on the identified area. The quality of the input signal S1 (signal waveform WS) such as time and delay time can be accurately determined by the measurer. As a result, the rank of the determination object such as the logic IC can be accurately determined based on the quality.

  Moreover, according to this waveform display apparatus 1, the control part 4 specifies the area to which a part or all of the signal waveform WS of the areas Z1 to Z5 belongs, and notifies the specified result display A based on this specified result. As a result, the area to which the signal waveform WS belongs can be identified accurately and quickly, so that the quality of the input signal S1 can be accurately determined in a short time by the measurer.

  Further, according to the waveform display device 1, the control unit 4 displays the specific result display A on the display screen of the display unit 5 and notifies the user, thereby easily identifying the area to which the signal waveform WS belongs at a glance. Therefore, the measurer can quickly determine the quality of the input signal S1.

  Further, according to the waveform display device 1, the control unit 4 displays the areas Z1 to Z5 adjacent to each other along the horizontal axis direction of the display screen of the display unit 5 so that, for example, a time axis such as a rise time is displayed. Since the degree of change of the signal waveform WS in the voltage axis direction can be specified by the area (any one of Z1 to Z5) to which the signal waveform WS belongs, the quality of the input signal S1 with respect to the time axis direction can be accurately determined to the measurer. Can be discriminated.

  In addition, this invention is not limited to said structure. For example, the configuration in which the areas Z1 to Z5 are displayed adjacent to each other along the horizontal axis (time axis) direction has been described. However, instead of the areas Z1 to Z5, the waveform display device 1A illustrated in FIG. A configuration in which the areas Z11 to Z14 are displayed on the display unit 5 in a state of being adjacent along the axis (voltage axis) direction may be employed. Hereinafter, constituent elements having the same functions as constituent elements in the waveform display device 1 are denoted by the same reference numerals, and redundant description is omitted. In the waveform display device 1A, the image display process and the area specifying process for the areas Z11 to Z14 are executed in the same manner as the image display process and the area specifying process for the areas Z1 to Z5. In this case, as an example, as shown in the figure, the areas Z11 to Z14 are 9.0 V or more and less than 9.5 V, 9.5 V or more and less than 10.0 V, 10.0 V or more and 10.5 V, respectively, with respect to the voltage axis. And 0.5V width of 10.5V or more and less than 11.0V. In addition, the areas Z11 to Z14 are displayed as horizontally long and band-like areas each having a width of 1.2 ms of 0.4 ms or more and 1.6 ms or less with respect to the time axis. In this case, color display is performed on the display screen of the display unit 5 in an adjacent state without overlapping each other. As an example, the signal waveforms WS11 and WS12 represent signal waveforms of the input signal S1 in which the vibration in the voltage axis direction gradually converges with time.

  In this waveform display device 1A, by identifying the number of areas to which the signal waveforms WS11 and WS12 belong, the quality related to the degree of convergence of the input signal S1 in the voltage axis direction with respect to time is determined based on the identified number of areas. The measurer can be discriminated accurately. In this case, the control unit 4 specifies that the signal waveform WS11 has passed through the two areas Z12 and Z13, and displays a specific result display A “passing Z12 and Z13” on the display screen of the display unit 5. Let Therefore, from this identification result, the area to which the signal waveform WS11 belongs (passes) is accurately and quickly identified, and the measurer accurately determines that the signal waveform WS11 is a high-quality input signal S1 with rapid vibration convergence. Is determined. Further, the control unit 4 specifies that the signal waveform WS12 has passed through the four areas Z11 to Z14, and displays a specific result display A “passing Z11 to Z14” on the display screen of the display unit 5. . For this reason, from this specific result, it is possible for the measurer to accurately determine that the signal waveform WS12 is a low-quality input signal S1 with slow convergence of vibration.

  Thus, according to this waveform display device 1A, the control unit 4 displays a plurality of areas Z11 to Z14 subdivided in a state adjacent to each other without overlapping each other along the vertical axis direction of the display screen of the display unit 5. 5, the degree of change in the signal waveform WS in the voltage axis direction, such as a vibrating signal waveform, is compared with a conventional recorder that displays one area. Since it can be specified by the number of areas to which WS belongs, the quality relating to the degree of convergence of the input signal S1 in the voltage axis direction can be accurately determined by the measurer.

  In addition, although the example which set four areas like the areas Z1-Z5 and the areas Z11-Z14 was demonstrated, the number of areas is set to two or more arbitrary numbers according to the test | inspection specification etc. of the input signal S1. be able to. Moreover, although the example which set each area to the rectangle like the areas Z1-Z5 and the areas Z11-Z14 was demonstrated, it can set to arbitrary shapes, such as a parallelogram and a rhombus. Moreover, although the example which set each area Z1-Z5 and each area Z11-Z14 to the same shape was demonstrated, it can also set to a similar shape or a different shape (For example, the rectangle from which side length differs).

  Further, the example in which an area to which a part or all of the signal waveform WS belongs (passes) is displayed on the display screen of the display unit 5 as the specific result display A has been described, but the specific result specifying the area where the signal waveform WS exists is described. For example, characters and symbols (an example of result information in the present invention) indicating the degree of quality of the determination target object such as “high speed product”, “medium / high speed product”, and “low speed product”, It can be displayed together with the determination result such as “failed product” or separately from the determination result. Further, the example in which the specific result display A is displayed on the display screen of the display unit 5 has been described. However, together with or instead of this display, result information based on the specific result (for example, “Z1” indicating the specified area) Etc. and “information such as“ high-speed products ”) as data to an external device or a voice output (both are examples of notification) may be employed. Also, the measured value in the present invention is not limited to the above voltage, and various electrical parameters such as a current value and a phase value for the input signal can be used as the measured value.

  Furthermore, the present invention is not limited to logic ICs, and can be applied to various determination objects such as valves such as electromagnetic valves, photocouplers, and relays. Further, although an example in which the area specifying process is executed for the rising waveform of the input signal S1 has been described, the area specifying process can be executed in the same manner for various waveforms such as the falling waveform of the input signal S1.

2 is a block diagram showing a configuration of a waveform display device 1. FIG. It is a display screen figure of the display part 5 in the state where the rank determination areas Z1 to Z5 are displayed. It is a display screen figure of the display part 5 in the state where the rank determination areas Z11 to Z14 are displayed.

Explanation of symbols

1, 1A Waveform display device 2 Measuring unit 4 Control unit 5 Display unit 7 ROM
8 RAM
A Specific result display Z1 to Z5, Z11 to Z14 Rank determination area Da to Dd Area data WS1 to 5, WS11, WS12 Signal waveform

Claims (5)

  A measurement unit that measures an input signal at a predetermined cycle and outputs a measurement value, a first storage unit that stores the measurement value, and a plurality of determination areas set for the input signal do not overlap each other A second storage unit that stores area data for display on the display unit in an adjacent state, and the measurement value is read from the first storage unit and the signal waveform of the input signal is displayed on the display unit. A waveform display device comprising: a control unit that reads the area data from the second storage unit and causes the display unit to display the plurality of determination areas in an adjacent state without overlapping each other.   The waveform display device according to claim 1, wherein the control unit specifies a determination area to which a part or all of the signal waveform belongs among the plurality of determination areas, and reports result information based on the specification result.   The waveform display device according to claim 2, wherein the control unit displays the result information on the display unit for notification. The second storage unit stores the area data for displaying the plurality of determination areas adjacent to each other without overlapping each other along the horizontal axis direction of the display unit,
The said control part reads the said area data from the said 2nd memory | storage part, and displays it on the said display part in the state which adjoined the said some determination area along the said horizontal axis direction without mutually overlapping. The waveform display device according to any one of the above. The second storage unit stores area data for displaying the plurality of determination areas in an adjacent state without overlapping each other along the vertical axis direction of the display unit,
The said control part reads the said area data from the said 2nd memory | storage part, and displays it on the said display part in the state which adjoined the said some determination area along the said vertical axis direction, without mutually overlapping. The waveform display device according to any one of the above.

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