JP2006134920A - Lamination components and packaging structure thereof - Google Patents

Lamination components and packaging structure thereof Download PDF

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JP2006134920A
JP2006134920A JP2004319042A JP2004319042A JP2006134920A JP 2006134920 A JP2006134920 A JP 2006134920A JP 2004319042 A JP2004319042 A JP 2004319042A JP 2004319042 A JP2004319042 A JP 2004319042A JP 2006134920 A JP2006134920 A JP 2006134920A
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printed circuit
circuit board
laminated
electrode
component
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JP2004319042A
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JP4604656B2 (en
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Toru Umeno
徹 梅野
Takeshi Tachibana
武司 橘
Yasuhisa Katayama
靖久 片山
Tomoyuki Tada
多田  智之
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Hitachi Metals Ltd
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Neomax Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide lamination components which can reduce the packaging height from the lower surface of a printed circuit board to the height of the lamination components and the packaging structure of the lamination components, even when insulation is required on the lower surface of the printed circuit substrate. <P>SOLUTION: The project 1a of the center part of the lamination 1 of the lamination component 10 is dropped into the hole 5 of the printed circuit board 4, the electrode 2 formed in both the ends of the lamination 1 and on its front surface is laid in the printed circuit board 4, and the electrode 2 and the printed circuit board 4 are connected electrically and mechanically by a solder 6. Since the project 1a of the lamination 1 is dropped into the hole 5 of the printed circuit board 4, the packaging height from the lower surfaced 4 of the printed circuit board becomes 1 mm in thickness of the lamination components 10 (lamination 1), and the flat structure can be achieved. Since the electrode is not exposed from the lower surface of the printed circuit board 4, the insulation of the lower surface of the printed circuit board 4 can be assured. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、配線パターンを形成した複数の磁性体または誘電体シートを積層した積層体と、積層体の両端部に形成され、プリント基板と電気的に接続される電極とを有する積層部品、及び、積層部品をプリント基板に実装するための実装構造に関する。   The present invention relates to a laminated part having a laminated body in which a plurality of magnetic bodies or dielectric sheets having wiring patterns formed thereon, and electrodes that are formed at both ends of the laminated body and are electrically connected to a printed board, and The present invention relates to a mounting structure for mounting a laminated component on a printed circuit board.

配線パターンを形成した複数の磁性体または誘電体シートを積層した積層体によりインダクタ機能またはコンデンサ機能を果たして、インダクタまたはコンデンサの小型化を図るようにした積層部品が知られている(例えば、特許文献1参照)。図9は従来の積層部品の構成を示す斜視図である。従来の積層部品20は、配線パターンを形成した複数の磁性体または誘電体シートを積層してなる積層体21と、この積層体21の長手方向の両端部の表面に形成された電極22とを有している。   There is known a multilayer component that achieves an inductor function or a capacitor function by a multilayer body in which a plurality of magnetic bodies or dielectric sheets in which a wiring pattern is formed is laminated so as to reduce the size of the inductor or the capacitor (for example, Patent Documents) 1). FIG. 9 is a perspective view showing a configuration of a conventional laminated component. A conventional laminated component 20 includes a laminated body 21 formed by laminating a plurality of magnetic bodies or dielectric sheets having a wiring pattern, and electrodes 22 formed on the surfaces of both end portions in the longitudinal direction of the laminated body 21. Have.

このような積層部品20は、例えば特許文献2に開示されている表面実装部品(チップ部品)の実装方法と同様な手法によって、プリント基板に実装される。図10は、従来のプリント基板24への積層部品20の実装構造を示す断面図である。プリント基板24の上面に積層部品20を載置し、積層部品20の両端部の電極22をハンダ26を介してプリント基板24の電極と電気的に接続することにより、積層部品20をプリント基板24に実装している。
特開2002−75780号公報 特開平8−148798号公報
Such a laminated component 20 is mounted on a printed circuit board by a method similar to the method for mounting surface-mounted components (chip components) disclosed in Patent Document 2, for example. FIG. 10 is a cross-sectional view showing a conventional structure for mounting the laminated component 20 on the printed circuit board 24. The multilayer component 20 is placed on the upper surface of the printed circuit board 24, and the electrodes 22 at both ends of the multilayer component 20 are electrically connected to the electrodes of the printed circuit board 24 through the solder 26. Is implemented.
JP 2002-75780 A JP-A-8-148798

図10に示すような実装構造では、積層部品20をプリント基板24上に載置させて実装するので、プリント基板24下面からの実装高さが高くなってしまい、特に薄型化が要求される場合には適さないという問題がある。例えば、積層部品20の厚さが1mm、プリント基板24の厚さが0.5mmである場合、その実装高さは1.5mmとなる。積層部品20の厚さを薄くすれば、実装高さは低くなるが、薄くした場合にはインダクタ機能またはコンデンサ機能を十分に果たせず、機能低下が問題となる。   In the mounting structure as shown in FIG. 10, since the laminated component 20 is mounted on the printed circuit board 24 and mounted, the mounting height from the lower surface of the printed circuit board 24 is increased, and particularly when the thickness is required to be reduced. There is a problem that it is not suitable. For example, when the thickness of the laminated component 20 is 1 mm and the thickness of the printed circuit board 24 is 0.5 mm, the mounting height is 1.5 mm. If the thickness of the multilayer component 20 is reduced, the mounting height is reduced. However, if the thickness is reduced, the inductor function or the capacitor function cannot be sufficiently performed, and the function deterioration becomes a problem.

そこで、図11に示すような実装構造が考えられる。図11に示す従来例では、プリント基板24に孔25を形成しておき、その孔25に積層部品20を落とし込み、その両端部の電極22を導電性接着剤でプリント基板24の電極と電気的に接続させることにより、積層部品20をプリント基板24に実装している。この例では、プリント基板24下面からの実装高さが積層部品20の厚さ(1mm)と同じ(1mm)となり、図10に示す例と比較して低背化を実現できている。   Therefore, a mounting structure as shown in FIG. 11 is conceivable. In the conventional example shown in FIG. 11, a hole 25 is formed in the printed circuit board 24, the laminated component 20 is dropped into the hole 25, and the electrodes 22 at both ends thereof are electrically connected to the electrodes of the printed circuit board 24 with a conductive adhesive. As a result, the laminated component 20 is mounted on the printed circuit board 24. In this example, the mounting height from the lower surface of the printed circuit board 24 is the same (1 mm) as the thickness (1 mm) of the laminated component 20, and a reduction in height is realized compared to the example shown in FIG.

しかしながら、積層部品20の電極22がプリント基板24の下面から露出することになるので、プリント基板24下面に絶縁性が要求される場合には適用できないという問題がある。また、電極22とプリント基板24とが離れているので、ハンダを使った容易な実装を行えないという問題もある。   However, since the electrode 22 of the laminated component 20 is exposed from the lower surface of the printed circuit board 24, there is a problem that it cannot be applied when insulation on the lower surface of the printed circuit board 24 is required. In addition, since the electrode 22 and the printed circuit board 24 are separated from each other, there is a problem that easy mounting using solder cannot be performed.

本発明は斯かる事情に鑑みてなされたものであり、プリント基板下面に絶縁性が要求される場合にあっても、プリント基板下面からの実装高さを積層部品の高さまで低減することができる積層部品及び積層部品の実装構造を提供することを目的とする。   The present invention has been made in view of such circumstances, and the mounting height from the bottom surface of the printed circuit board can be reduced to the height of the laminated component even when insulation is required on the bottom surface of the printed circuit board. An object of the present invention is to provide a laminated part and a mounting structure of the laminated part.

本発明の他の目的は、ハンダリフロー工程による容易な実装が可能である積層部品及び積層部品の実装構造を提供することにある。   Another object of the present invention is to provide a multilayer component and a multilayer component mounting structure that can be easily mounted by a solder reflow process.

本発明に係る第1の積層部品は、配線パターンを形成した複数の磁性体または誘電体シートを積層した積層体と、該積層体の両端部に形成された電極とを有する積層部品において、前記電極と前記電極形成部の前記積層体とは積層方向に一部欠損していることを特徴とする。   A first laminated component according to the present invention is a laminated component having a laminated body in which a plurality of magnetic bodies or dielectric sheets having a wiring pattern are laminated, and electrodes formed at both ends of the laminated body. The electrode and the stacked body of the electrode forming portion are partially missing in the stacking direction.

本発明に係る第2の積層部品は、配線パターンを形成した複数の磁性体または誘電体シートを積層した積層体と、該積層体の両端部に形成された電極とを有する積層部品において、前記電極は積層方向に一部欠損していることを特徴とする。   A second laminated component according to the present invention is a laminated component comprising a laminated body in which a plurality of magnetic bodies or dielectric sheets having a wiring pattern are laminated, and electrodes formed at both ends of the laminated body. The electrode is partially missing in the stacking direction.

上記第1の積層部品を使用する本発明に係る第1の積層部品の実装構造は、第1の積層部品をプリント基板に実装した実装構造であって、前記プリント基板に形成された孔に、前記積層体の欠損部により形成される前記積層体の凸部を入れてあり、前記プリント基板上に位置した前記電極が前記プリント基板と電気的に接続されていることを特徴とする。   The mounting structure of the first multilayer component according to the present invention using the first multilayer component is a mounting structure in which the first multilayer component is mounted on a printed circuit board. In the hole formed in the printed circuit board, The convex part of the said laminated body formed by the defect | deletion part of the said laminated body is put, and the said electrode located on the said printed circuit board is electrically connected with the said printed circuit board.

上記第1の積層部品を使用する本発明に係る第2の積層部品の実装構造は、第1の積層部品をプリント基板に実装した実装構造であって、前記プリント基板に形成された孔に前記積層部品を入れてあり、前記電極が前記プリント基板と電気的に接続されていることを特徴とする。   The mounting structure of the second multilayer component according to the present invention using the first multilayer component is a mounting structure in which the first multilayer component is mounted on a printed board, and the hole is formed in the hole formed in the printed board. A laminated part is inserted, and the electrode is electrically connected to the printed board.

上記第2の積層部品を使用する本発明に係る第3の積層部品の実装構造は、第2の積層部品をプリント基板に実装した実装構造であって、前記プリント基板に形成された孔に前記積層部品を入れてあり、前記電極が前記プリント基板と電気的に接続されていることを特徴とする。   A mounting structure of a third laminated component according to the present invention using the second laminated component is a mounting structure in which the second laminated component is mounted on a printed board, and the hole is formed in the hole formed in the printed board. A laminated part is inserted, and the electrode is electrically connected to the printed board.

第1の積層部品の実装構造にあっては、プリント基板に形成した孔に積層部品の積層体の凸部を落とし込み、電極をプリント基板に載置させて、積層部品をプリント基板に実装する。積層体の凸部がプリント基板の孔に落とし込まれているため、プリント基板下面からの実装高さは積層部品(積層体)の厚さとなって、低背化を図れる。また、積層部品の電極がプリント基板下面から露出せず、プリント基板下面の絶縁性は確保される。また、電極がプリント基板に載置されているため、ハンダリフロー工程による容易な実装を行える。   In the mounting structure of the first laminated component, the convex part of the laminated body of the laminated component is dropped into the hole formed in the printed board, the electrode is placed on the printed board, and the laminated component is mounted on the printed board. Since the convex part of the laminated body is dropped into the hole of the printed board, the mounting height from the lower surface of the printed board becomes the thickness of the laminated part (laminated body), and the height can be reduced. In addition, the electrodes of the laminated component are not exposed from the lower surface of the printed circuit board, and insulation of the lower surface of the printed circuit board is ensured. In addition, since the electrodes are placed on the printed board, easy mounting by a solder reflow process can be performed.

第2の積層部品の実装構造にあっては、積層体/電極欠損部を下方にした状態で、プリント基板に形成した孔に積層部品を落とし込んで、積層部品をプリント基板に実装する。積層部品がプリント基板の孔に落とし込まれているため、プリント基板下面からの実装高さは積層部品の厚さとなって、低背化を図れる。また、積層部品の下側には電極が形成されていないため、電極がプリント基板下面から露出せず、プリント基板下面の絶縁性は確保される。   In the mounting structure of the second laminated component, the laminated component is dropped into the hole formed in the printed board in a state where the laminated body / electrode missing portion is positioned downward, and the laminated component is mounted on the printed board. Since the multilayer component is dropped into the hole of the printed circuit board, the mounting height from the lower surface of the printed circuit board becomes the thickness of the multilayer component, and the height can be reduced. In addition, since no electrode is formed on the lower side of the laminated component, the electrode is not exposed from the lower surface of the printed circuit board, and insulation of the lower surface of the printed circuit board is ensured.

第3の積層部品の実装構造にあっては、両端部での電極を上方にした状態で、プリント基板に形成した孔に積層部品を落とし込んで、積層部品をプリント基板に実装する。積層部品がプリント基板の孔に落とし込まれているため、プリント基板下面からの実装高さは積層部品の厚さとなって、低背化を図れる。また、積層部品の下側には電極が形成されていないため、電極がプリント基板下面から露出せず、プリント基板下面の絶縁性は確保される。   In the third laminated component mounting structure, with the electrodes at both ends facing upward, the laminated component is dropped into a hole formed in the printed board, and the laminated component is mounted on the printed board. Since the multilayer component is dropped into the hole of the printed circuit board, the mounting height from the lower surface of the printed circuit board becomes the thickness of the multilayer component, and the height can be reduced. In addition, since no electrode is formed on the lower side of the laminated component, the electrode is not exposed from the lower surface of the printed circuit board, and insulation of the lower surface of the printed circuit board is ensured.

本発明では、プリント基板下面からの実装高さを積層部品の厚さ程度に低減することができ、また、電極がプリント基板下面から露出しないので、プリント基板下面に絶縁性が要求される場合でも、このような低背化を実現することができる。さらに、電極をプリント基板に載置する例では、通常のハンダリフロー工程によって容易な実装を行うことが可能である。   In the present invention, the mounting height from the lower surface of the printed circuit board can be reduced to the thickness of the laminated component, and since the electrodes are not exposed from the lower surface of the printed circuit board, even when insulation is required on the lower surface of the printed circuit board. Thus, such a low profile can be realized. Further, in the example in which the electrode is placed on the printed board, easy mounting can be performed by a normal solder reflow process.

以下、本発明をその実施の形態を示す図面を参照して具体的に説明する。
(第1実施の形態)
図1は、本発明に係る積層部品10の一例の構成を示す斜視図であり、図1(a)は上側から見た斜視図、図1(b)は下側から見た斜視図である。
Hereinafter, the present invention will be described in detail with reference to the drawings showing embodiments thereof.
(First embodiment)
FIG. 1 is a perspective view showing a configuration of an example of a laminated component 10 according to the present invention, FIG. 1 (a) is a perspective view seen from above, and FIG. 1 (b) is a perspective view seen from below. .

積層部品10は、配線パターンを形成した複数の磁性体または誘電体シートを積層してなる積層体1と、この積層体1の長手方向の両端部の表面に形成された電極2とを有している。この積層体1はインダクタまたはコンデンサとして機能する。積層体1の両端部は、その厚さ方向下側が欠損しており、残された上側端部の表面に電極2が形成され、その厚さ方向の下側半分は積層体/電極欠損部3となっている。積層体1(積層部品10)の厚さは1mm、積層体/電極欠損部3の高さは0.5mmであって、積層体1の中央部には残存する厚さ0.5mmの凸部1aが形成されることになる。この凸部1aの厚さ(積層体/電極欠損部3の高さ)は、実装されるプリント基板4の厚さと等しくなっている。   The laminated component 10 includes a laminated body 1 formed by laminating a plurality of magnetic bodies or dielectric sheets having a wiring pattern, and electrodes 2 formed on the surfaces of both end portions in the longitudinal direction of the laminated body 1. ing. This laminated body 1 functions as an inductor or a capacitor. At both ends of the laminate 1, the lower side in the thickness direction is missing, and the electrode 2 is formed on the surface of the remaining upper end, and the lower half in the thickness direction is the laminate / electrode missing part 3. It has become. The thickness of the laminated body 1 (laminated part 10) is 1 mm, the height of the laminated body / electrode defect part 3 is 0.5 mm, and the convex part having a thickness of 0.5 mm remaining in the central part of the laminated body 1 1a is formed. The thickness of the convex portion 1a (the height of the laminate / electrode defect portion 3) is equal to the thickness of the printed circuit board 4 to be mounted.

図2は、本発明に係る積層部品10のプリント基板4への実装構造の一例を示す断面図である。厚さ0.5mmのプリント基板4には、実装対象の積層部品10の積層体1の凸部1aの大きさより少し大きい孔5が形成されている。この孔5に積層部品10の積層体1中央部の凸部1aが落とし込まれ、積層体1両端部及び電極2がプリント基板4に載置されており、電極2とプリント基板4とはハンダ6によって電気的及び機械的に接続されている。プリント基板4の厚さと凸部1aの厚さ(積層体/電極欠損部3の高さ)とが等しいので、積層体1両端部及び電極2がプリント基板4に載置された状態で、積層部品10(積層体1)の下面とプリント基板4の下面とが面一になる。   FIG. 2 is a cross-sectional view showing an example of a structure for mounting the laminated component 10 on the printed circuit board 4 according to the present invention. A hole 5 that is slightly larger than the size of the convex portion 1a of the multilayer body 1 of the multilayer component 10 to be mounted is formed in the printed board 4 having a thickness of 0.5 mm. The convex portion 1a at the center of the laminated body 1 of the laminated component 10 is dropped into the hole 5, the both ends of the laminated body 1 and the electrode 2 are placed on the printed board 4, and the electrode 2 and the printed board 4 are soldered. 6 is electrically and mechanically connected. Since the thickness of the printed circuit board 4 is equal to the thickness of the convex portion 1a (the height of the stacked body / electrode defect portion 3), the both ends of the stacked body 1 and the electrode 2 are stacked on the printed circuit board 4. The lower surface of the component 10 (laminated body 1) and the lower surface of the printed circuit board 4 are flush with each other.

図2に示す実装構造では、プリント基板4の孔5に積層体1の凸部1aが落とし込まれているため、プリント基板下面4からの実装高さは、積層部品10(積層体1)の厚さ1mmとなって、図10に示す実装構造(実装高さ:1.5mm)と比べて低減される。この結果、実装構造の低背化を実現できる。また、図11の従来例とは異なり、プリント基板4下面から電極2が露出していないため、プリント基板4下面の絶縁性を確保することができる。また、電極2がプリント基板4に載置されているため、ハンダ6を用いて容易な工程で実装を行うことができる。   In the mounting structure shown in FIG. 2, since the convex part 1a of the laminated body 1 is dropped into the hole 5 of the printed circuit board 4, the mounting height from the lower surface 4 of the printed circuit board is that of the laminated component 10 (laminated body 1). The thickness is 1 mm, which is reduced compared to the mounting structure (mounting height: 1.5 mm) shown in FIG. As a result, it is possible to reduce the height of the mounting structure. Further, unlike the conventional example of FIG. 11, since the electrode 2 is not exposed from the lower surface of the printed circuit board 4, the insulation of the lower surface of the printed circuit board 4 can be ensured. In addition, since the electrode 2 is mounted on the printed circuit board 4, the mounting can be performed by an easy process using the solder 6.

(第2実施の形態)
図3は、本発明に係る積層部品10の他の例の構成を示す斜視図であり、図3(a)は上側から見た斜視図、図3(b)は下側から見た斜視図である。図3に示す積層部品10は図1の積層部品10と同様の構成をなしており、同一部分には同一番号を付してそれらの説明は省略する。なお、図1と異なる点は、積層体/電極欠損部3の高さ、言い換えると積層体1中央部の凸部1aの厚さを0.3mmとした点である。
(Second Embodiment)
3 is a perspective view showing the configuration of another example of the laminated component 10 according to the present invention, FIG. 3 (a) is a perspective view seen from the upper side, and FIG. 3 (b) is a perspective view seen from the lower side. It is. The laminated component 10 shown in FIG. 3 has the same configuration as the laminated component 10 shown in FIG. 1, and the same parts are denoted by the same reference numerals and description thereof is omitted. 1 differs from FIG. 1 in that the height of the laminated body / electrode defect portion 3, in other words, the thickness of the convex portion 1a at the central portion of the laminated body 1 is set to 0.3 mm.

図4は、本発明に係る積層部品10のプリント基板4への実装構造の他の例を示す断面図である。厚さ0.5mmのプリント基板4には、実装対象の積層部品10の大きさより少し大きい孔5が形成されている。積層部品10(積層体1)の下面とプリント基板4の下面とが面一になるように、この孔5に積層部品10が落とし込まれており、電極2とプリント基板4とは導電性接着剤7によって電気的及び機械的に接続されている。   FIG. 4 is a cross-sectional view showing another example of the structure for mounting the laminated component 10 on the printed circuit board 4 according to the present invention. A hole 5 slightly larger than the size of the laminated component 10 to be mounted is formed in the printed board 4 having a thickness of 0.5 mm. The laminated component 10 is dropped into the hole 5 so that the lower surface of the laminated component 10 (laminate 1) and the lower surface of the printed circuit board 4 are flush with each other, and the electrode 2 and the printed circuit board 4 are electrically bonded. The material 7 is electrically and mechanically connected.

図4に示す実装構造では、プリント基板4の孔5に積層部品10が落とし込まれているため、プリント基板4下面からの実装高さは、積層部品10(積層体1)の厚さ1mmとなって、図10に示す実装構造(実装高さ:1.5mm)と比べて低減される。この結果、実装構造の低背化を実現できる。また、電極2の下面とプリント基板4の下面とが0.3mmだけ離隔しており、図11の従来例とは異なってプリント基板4下面から電極2が露出していないため、プリント基板4下面の絶縁性を確保することができる。第1実施の形態では、積層部品10の孔5への落とし込み厚をプリント基板4の厚さに一致させる制約があるが、第2実施の形態では、このような制約がないため、任意の厚さのプリント基板4に対応できる。   In the mounting structure shown in FIG. 4, since the laminated component 10 is dropped into the hole 5 of the printed circuit board 4, the mounting height from the lower surface of the printed circuit board 4 is 1 mm of the thickness of the laminated component 10 (laminated body 1). Thus, it is reduced as compared with the mounting structure (mounting height: 1.5 mm) shown in FIG. As a result, it is possible to reduce the height of the mounting structure. Further, since the lower surface of the electrode 2 and the lower surface of the printed circuit board 4 are separated by 0.3 mm and the electrode 2 is not exposed from the lower surface of the printed circuit board 4 unlike the conventional example of FIG. Insulating properties can be ensured. In the first embodiment, there is a restriction that the drop thickness of the laminated component 10 into the hole 5 is matched with the thickness of the printed circuit board 4, but in the second embodiment, there is no such restriction. This can correspond to the printed circuit board 4.

図5は、本発明に係る積層部品10のプリント基板4への実装構造の更に他の例を示す断面図である。図5に示すものは、図4の変形例である。図5に示す例では、積層体/電極欠損部3に樹脂などの絶縁物8が充填されている。よって、絶縁の信頼性を更に高めることができる。   FIG. 5 is a cross-sectional view showing still another example of the mounting structure of the multilayer component 10 according to the present invention on the printed circuit board 4. FIG. 5 shows a modification of FIG. In the example shown in FIG. 5, the laminate / electrode defect portion 3 is filled with an insulator 8 such as a resin. Therefore, the reliability of insulation can be further increased.

(第3実施の形態)
図6は、本発明に係る積層部品10の更に他の例の構成を示す斜視図である。積層部品10は、配線パターンを形成した複数の磁性体または誘電体シートを積層してなる厚さ1mmの積層体1と、この積層体1の長手方向の両端部の表面に形成された電極2とを有している。この積層体1はインダクタまたはコンデンサとして機能する。電極2は、積層部品10の厚さ方向全域に形成されておらず、その厚さ方向の上部0.7mmの範囲の積層体1端部表面にのみ形成されている。積層部品10の厚さ方向の下部0.3mmの範囲の積層体1端部表面には電極2が形成されておらず、電極2の欠損領域となっている。
(Third embodiment)
FIG. 6 is a perspective view showing the configuration of still another example of the laminated component 10 according to the present invention. The laminated component 10 includes a laminated body 1 having a thickness of 1 mm formed by laminating a plurality of magnetic bodies or dielectric sheets having a wiring pattern, and electrodes 2 formed on the surfaces of both end portions in the longitudinal direction of the laminated body 1. And have. This laminated body 1 functions as an inductor or a capacitor. The electrode 2 is not formed in the entire thickness direction of the multilayer component 10 but is formed only on the surface of the end of the multilayer body 1 in the upper 0.7 mm range in the thickness direction. The electrode 2 is not formed on the surface of the end of the laminated body 1 in the range of the lower part 0.3 mm in the thickness direction of the laminated component 10, and is a defect region of the electrode 2.

図7は、本発明に係る積層部品10のプリント基板4への実装構造の更に他の例を示す断面図である。厚さ0.5mmのプリント基板4には、実装対象の積層部品10の大きさより少し大きい孔5が形成されている。積層部品10(積層体1)の下面とプリント基板4の下面とが面一になるように、この孔5に積層部品10が落とし込まれており、電極2とプリント基板4とは導電性接着剤7によって電気的及び機械的に接続されている。   FIG. 7 is a cross-sectional view showing still another example of the structure for mounting the laminated component 10 on the printed circuit board 4 according to the present invention. A hole 5 slightly larger than the size of the laminated component 10 to be mounted is formed in the printed board 4 having a thickness of 0.5 mm. The laminated component 10 is dropped into the hole 5 so that the lower surface of the laminated component 10 (laminate 1) and the lower surface of the printed circuit board 4 are flush with each other, and the electrode 2 and the printed circuit board 4 are electrically bonded. The material 7 is electrically and mechanically connected.

図7に示す実装構造では、プリント基板4の孔5に積層部品10が落とし込まれているため、プリント基板4下面からの実装高さは、積層部品10(積層体1)の厚さ1mmとなって、図10に示す実装構造(実装高さ:1.5mm)と比べて低減される。この結果、実装構造の低背化を実現できる。また、図11の従来例とは異なり、積層部品10の下面に電極2が設けられていないため、プリント基板4下面から電極2が露出せず、プリント基板4下面の絶縁性を確保することができる。また、第2実施の形態と同様に、任意の厚さのプリント基板4に対応できる。更に、第1,第2実施の形態のように積層体1の欠損部分を設ける必要がない。   In the mounting structure shown in FIG. 7, since the laminated component 10 is dropped into the hole 5 of the printed circuit board 4, the mounting height from the lower surface of the printed circuit board 4 is 1 mm of the thickness of the laminated component 10 (laminated body 1). Thus, it is reduced as compared with the mounting structure (mounting height: 1.5 mm) shown in FIG. As a result, it is possible to reduce the height of the mounting structure. In addition, unlike the conventional example of FIG. 11, the electrode 2 is not provided on the lower surface of the multilayer component 10, so that the electrode 2 is not exposed from the lower surface of the printed circuit board 4, thereby ensuring insulation of the lower surface of the printed circuit board 4. it can. Moreover, it can respond to the printed circuit board 4 of arbitrary thickness similarly to 2nd Embodiment. Furthermore, it is not necessary to provide a missing portion of the laminate 1 as in the first and second embodiments.

次に、本発明の積層部品の製造方法について説明する。図8は、図1に示す積層部品10の製造方法の工程を示す模式図である。まず、フェライト材料(Fe,Ni,Zn,Cuの酸化物)のスラリー化を行う(図8(a))。このフェライト材料をシート状に成型した後、例えば150mm×150mmの寸法に裁断する(図8(b),(c))。得られた誘電体シート11にNCパンチ加工を施し、アライメント用の貫通孔12、スルーホール13、カットマークを形成する(図8(d))。次いで、スクリーン印刷により例えば銀ペーストからなる所望の配線パターン14を誘電体シート11に形成する(図8(e))。   Next, the manufacturing method of the laminated component of this invention is demonstrated. FIG. 8 is a schematic diagram showing the steps of the method for manufacturing the laminated component 10 shown in FIG. First, a slurry of ferrite material (oxide of Fe, Ni, Zn, Cu) is performed (FIG. 8A). After this ferrite material is molded into a sheet shape, it is cut into a size of, for example, 150 mm × 150 mm (FIGS. 8B and 8C). The obtained dielectric sheet 11 is NC punched to form alignment through holes 12, through holes 13, and cut marks (FIG. 8D). Next, a desired wiring pattern 14 made of, for example, silver paste is formed on the dielectric sheet 11 by screen printing (FIG. 8E).

配線パターン14が形成された複数の誘電体シート11を順次積層プレス加工して積層体15(厚さ:1mm)を得る(図8(f))。そして、一方向の素子分離線に沿わせて、幅広の外周刃切断機を用いて、スリット16(深さ:0.5mm)を形成する(図8(g))。このスリット16が、積層部品10の積層体/電極欠損部3となり、複雑なプロセスを追加することなく、容易に積層体1の欠損部分を形成できる。   A plurality of dielectric sheets 11 on which the wiring pattern 14 is formed are sequentially laminated and pressed to obtain a laminated body 15 (thickness: 1 mm) (FIG. 8 (f)). Then, a slit 16 (depth: 0.5 mm) is formed along a unidirectional element separation line using a wide peripheral blade cutter (FIG. 8G). This slit 16 becomes the laminated body / electrode defect portion 3 of the laminated component 10, and the defect portion of the laminated body 1 can be easily formed without adding a complicated process.

積層体15を素子毎に分割した後、900〜960℃の温度で焼結する(図8(h))。その後、各素子の積層体1のスリット16(積層体1の欠損部分)でない両端部分をAgペースト液に浸漬させてその部分にAg膜17を形成する(図8(i))。このAg膜17が、積層部品10の電極2となる。なお、必要に応じてAg膜17にNiなどのメッキ処理を施しても良い。   After the laminated body 15 is divided for each element, it is sintered at a temperature of 900 to 960 ° C. (FIG. 8H). Thereafter, both end portions of the multilayer body 1 of each element that are not the slits 16 (deleted portions of the multilayer body 1) are immersed in an Ag paste solution to form an Ag film 17 on the portions (FIG. 8 (i)). This Ag film 17 becomes the electrode 2 of the multilayer component 10. If necessary, the Ag film 17 may be plated with Ni or the like.

図3に示す積層部品10を製造する場合には、図8(g)でスリット16の深さを0.3mmとすれば良く、他の工程は、上述した図1に示す積層部品10の工程と同様である。図6に示す積層部品10を製造する場合には、図8(g)でスリット16を形成する必要がなくて単に素子分離を行い、図8(i)で各素子を傾けてAgペースト液に浸漬させれば良く、他の工程は、上述した図1に示す積層部品10の工程と同様である。   When the laminated component 10 shown in FIG. 3 is manufactured, the depth of the slit 16 may be 0.3 mm in FIG. 8G, and the other steps are the steps of the laminated component 10 shown in FIG. It is the same. When the laminated component 10 shown in FIG. 6 is manufactured, it is not necessary to form the slit 16 in FIG. 8G, and the elements are simply separated, and each element is tilted in FIG. What is necessary is just to immerse and the other process is the same as the process of the laminated component 10 shown in FIG. 1 mentioned above.

本発明に係る積層部品の一例の構成を示す斜視図である。It is a perspective view which shows the structure of an example of the laminated component which concerns on this invention. 本発明に係る積層部品のプリント基板への実装構造の一例を示す断面図である。It is sectional drawing which shows an example of the mounting structure to the printed circuit board of the multilayer component which concerns on this invention. 本発明に係る積層部品の他の例の構成を示す斜視図である。It is a perspective view which shows the structure of the other example of the laminated component which concerns on this invention. 本発明に係る積層部品のプリント基板への実装構造の他の例を示す断面図である。It is sectional drawing which shows the other example of the mounting structure to the printed circuit board of the multilayer component which concerns on this invention. 本発明に係る積層部品のプリント基板への実装構造の更に他の例を示す断面図である。It is sectional drawing which shows the further another example of the mounting structure to the printed circuit board of the multilayer component which concerns on this invention. 本発明に係る積層部品の更に他の例の構成を示す斜視図である。It is a perspective view which shows the structure of the further another example of the laminated component which concerns on this invention. 本発明に係る積層部品のプリント基板への実装構造の更に他の例を示す断面図である。It is sectional drawing which shows the further another example of the mounting structure to the printed circuit board of the multilayer component which concerns on this invention. 本発明に係る積層部品の製造方法の工程を示す模式図である。It is a schematic diagram which shows the process of the manufacturing method of the laminated component which concerns on this invention. 従来の積層部品の構成を示す斜視図である。It is a perspective view which shows the structure of the conventional laminated component. 従来のプリント基板への積層部品の実装構造を示す断面図である。It is sectional drawing which shows the mounting structure of the multilayer component on the conventional printed circuit board. 従来のプリント基板への積層部品の実装構造を示す断面図である。It is sectional drawing which shows the mounting structure of the multilayer component on the conventional printed circuit board.

符号の説明Explanation of symbols

1 積層体
1a 凸部
2 電極
3 積層体/電極欠損部
4 プリント基板
5 孔
6 ハンダ
7 導電性接着剤
8 絶縁物
10 積層部品
11 誘電体シート
14 配線パターン
DESCRIPTION OF SYMBOLS 1 Laminated body 1a Convex part 2 Electrode 3 Laminated body / electrode defect | deletion part 4 Printed circuit board 5 Hole 6 Solder 7 Conductive adhesive 8 Insulator 10 Laminated part 11 Dielectric sheet 14 Wiring pattern

Claims (5)

配線パターンを形成した複数の磁性体または誘電体シートを積層した積層体と、該積層体の両端部に形成された電極とを有する積層部品において、前記電極と前記電極形成部の前記積層体とは積層方向に一部欠損していることを特徴とする積層部品。   In a laminated part having a laminate in which a plurality of magnetic bodies or dielectric sheets having a wiring pattern are laminated, and electrodes formed at both ends of the laminate, the electrode and the laminate in the electrode forming section Is partly missing in the stacking direction. 配線パターンを形成した複数の磁性体または誘電体シートを積層した積層体と、該積層体の両端部に形成された電極とを有する積層部品において、前記電極は積層方向に一部欠損していることを特徴とする積層部品。   In a laminated part having a laminate in which a plurality of magnetic bodies or dielectric sheets having a wiring pattern are laminated and electrodes formed at both ends of the laminate, the electrodes are partially missing in the lamination direction. Laminated parts characterized by that. 請求項1記載の積層部品をプリント基板に実装した実装構造であって、前記プリント基板に形成された孔に、前記積層体の欠損部により形成される前記積層体の凸部を入れてあり、前記プリント基板上に位置した前記電極が前記プリント基板と電気的に接続されていることを特徴とする積層部品の実装構造。   A mounting structure in which the multilayer component according to claim 1 is mounted on a printed circuit board, and a hole formed in the printed circuit board includes a convex portion of the multilayer body formed by a defective portion of the multilayer body, A laminated component mounting structure, wherein the electrode located on the printed board is electrically connected to the printed board. 請求項1記載の積層部品をプリント基板に実装した実装構造であって、前記プリント基板に形成された孔に前記積層部品を入れてあり、前記電極が前記プリント基板と電気的に接続されていることを特徴とする積層部品の実装構造。   2. A mounting structure in which the multilayer component according to claim 1 is mounted on a printed circuit board, wherein the multilayer component is placed in a hole formed in the printed circuit board, and the electrode is electrically connected to the printed circuit board. Mounting structure of laminated parts characterized by the above. 請求項2記載の積層部品をプリント基板に実装した実装構造であって、前記プリント基板に形成された孔に前記積層部品を入れてあり、前記電極が前記プリント基板と電気的に接続されていることを特徴とする積層部品の実装構造。   A mounting structure in which the multilayer component according to claim 2 is mounted on a printed circuit board, wherein the multilayer component is placed in a hole formed in the printed circuit board, and the electrode is electrically connected to the printed circuit board. Mounting structure of laminated parts characterized by the above.
JP2004319042A 2004-11-02 2004-11-02 Multilayer component mounting structure Expired - Fee Related JP4604656B2 (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58129670U (en) * 1982-02-25 1983-09-02 株式会社精工舎 Mounting structure of chip parts
JPS61123526U (en) * 1985-01-23 1986-08-04
JPH0328773U (en) * 1989-07-28 1991-03-22

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58129670U (en) * 1982-02-25 1983-09-02 株式会社精工舎 Mounting structure of chip parts
JPS61123526U (en) * 1985-01-23 1986-08-04
JPH0328773U (en) * 1989-07-28 1991-03-22

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