JP2006134917A - Method of sealing with resin - Google Patents
Method of sealing with resin Download PDFInfo
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- JP2006134917A JP2006134917A JP2004319020A JP2004319020A JP2006134917A JP 2006134917 A JP2006134917 A JP 2006134917A JP 2004319020 A JP2004319020 A JP 2004319020A JP 2004319020 A JP2004319020 A JP 2004319020A JP 2006134917 A JP2006134917 A JP 2006134917A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01019—Potassium [K]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Casting Or Compression Moulding Of Plastics Or The Like (AREA)
Abstract
Description
本発明は、半導体チップが基板上に積層されたワークに封止樹脂を供給してモールド金型でクランプして樹脂封止する樹脂封止方法に関する。 The present invention relates to a resin sealing method in which a sealing resin is supplied to a workpiece in which a semiconductor chip is laminated on a substrate, and is clamped with a molding die to be resin-sealed.
パーソナルコンピュータ、携帯電話などのSRAM、フラッシュメモリなどのデバイスとしてスタックドパッケージと呼ばれるCSP(Chip・Size・Package又はChip・Scale・Package)が用いられている。半導体チップのサイズと同程度の基板実装面積に複数の半導体チップ(例えば10層程度)が重ね合わせて実装されるタイプの半導体装置である。 A CSP (Chip / Size / Package or Chip / Scale / Package) called a stacked package is used as a device such as an SRAM or a flash memory of a personal computer or a mobile phone. This is a semiconductor device of a type in which a plurality of semiconductor chips (for example, about 10 layers) are stacked and mounted on a substrate mounting area approximately the size of the semiconductor chip.
上記半導体装置は、組立てが複雑なデバイスであるため、半導体チップの積層不良やワイヤボンディング接続不良などにより、例えば基板上に10層分重ね合わせるところ6層目で不良が発生してそれ以上の半導体チップが積層されない場合が多い。よって、基板上にマトリクス状或いはマップ状に半導体チップが積層して各々配置されたワークを樹脂封止する場合、半導体チップが全て(例えば10層分)積層されているとは限らず、ワークによって封止に必要な樹脂量が異なる。 Since the semiconductor device is a device that is complicated to assemble, due to poor stacking of semiconductor chips, poor wire bonding connection, or the like, for example, when 10 layers are stacked on a substrate, a failure occurs in the sixth layer, and more semiconductors. Chips are often not stacked. Therefore, when a semiconductor chip is laminated on a substrate in a matrix shape or a map shape and a work placed respectively is sealed with a resin, not all semiconductor chips are laminated (for example, 10 layers). The amount of resin required for sealing is different.
上記基板上に半導体チップがスタックされたワークを樹脂封止する場合、トランスファー成形法による樹脂封止では、ポットに装填される樹脂量は定量的であるため、半導体チップの欠損分に対応した樹脂封止ができない。また、圧縮成形法においては、半導体チップの欠損を予想して液状樹脂を増量して滴下することも想定できるが、半導体チップの欠損枚数は一定ではない。そのため、ダミーチップを欠損部に補填して樹脂量を適正化する作業が必要となるが、10層分の範囲内でダミーチップを供給する機構を具備するとすれば大変なコストを要する。
積層型の半導体装置は高価で高度なデバイスであるため、歩留まりを向上させて製造コストを削減するためには、樹脂封止工程で確実に封止する必要がある。このため、半導体チップの積層状態を検出し欠損分だけ樹脂量を増やして樹脂圧を均一にして圧縮成形を行うか、或いは個別キャビティの場合は半導体チップの欠損部分に樹脂を供給せずに樹脂封止が行えるように、ワークによって樹脂量を調整できるようにするのが望ましい。
When resin-sealing a workpiece in which semiconductor chips are stacked on the substrate, the amount of resin loaded in the pot is quantitative in resin sealing by transfer molding, so that the resin corresponding to the missing portion of the semiconductor chip Cannot be sealed. In addition, in the compression molding method, it can be assumed that the liquid resin is increased and dropped in anticipation of chipping of the semiconductor chip, but the number of chipped semiconductor chips is not constant. For this reason, it is necessary to work to compensate the defective portion with the dummy chip so as to optimize the amount of resin. However, if a mechanism for supplying the dummy chip within the range of 10 layers is provided, a great cost is required.
Since a stacked semiconductor device is an expensive and sophisticated device, in order to improve the yield and reduce the manufacturing cost, it is necessary to securely seal in a resin sealing process. For this reason, it is possible to detect the lamination state of the semiconductor chip and increase the amount of resin by the amount of loss and perform compression molding with a uniform resin pressure, or in the case of individual cavities, the resin is not supplied to the defective portion of the semiconductor chip. It is desirable that the amount of resin can be adjusted by the workpiece so that sealing can be performed.
本発明の目的は、上記従来技術の課題を解決し、半導体チップが基板上に複数積層されたワークに供給する封止樹脂量を半導体チップの積層状態により調整して供給する樹脂封止方法を提供することにある。 SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems of the prior art and to provide a resin sealing method in which the amount of sealing resin supplied to a work in which a plurality of semiconductor chips are stacked on a substrate is adjusted according to the stacked state of the semiconductor chips. It is to provide.
本発明は上記目的を達成するため、次の構成を備える。
即ち、半導体チップが基板上に積層されたワークをモールド金型に搬入して圧縮成形する樹脂封止方法において、半導体チップの容積と樹脂補填量を対応させて記憶するステップと、ワークに積層された半導体チップのうち基板面から最上側のチップまでのZ軸高さ計測を行うステップと、Z軸高さ計測値からチップ積層量を判定し、不足する半導体チップに補填する樹脂量若しくは補填しない樹脂量を算出するステップと、補填する樹脂量もしくは供給しない樹脂量を制御データとして樹脂供給部に指示するステップと、ワークごとに制御データを集積して封止樹脂を樹脂供給部からワークへ供給するステップを含むことを特徴とする。
また、樹脂補填量は、不足する半導体チップの容積に応じた樹脂量を算出することを特徴することを特徴とする。
また、ワークのチップ積層高さは、Z軸検査機を用いて或いは撮像装置により撮像された画像によりZ軸高さ計測を行うことを特徴とする。
In order to achieve the above object, the present invention comprises the following arrangement.
That is, in a resin sealing method in which a work in which a semiconductor chip is laminated on a substrate is carried into a mold and compression-molded, a step of storing the volume of the semiconductor chip in correspondence with a resin filling amount, and a lamination on the work. The step of measuring the Z-axis height from the substrate surface to the uppermost chip among the semiconductor chips, and determining the chip stacking amount from the Z-axis height measurement value, or the amount of resin to be compensated for the insufficient semiconductor chip or not compensated The step of calculating the amount of resin, the step of instructing the resin supply unit as the amount of resin to be compensated or the amount of resin not to be supplied, and the control data are integrated for each workpiece to supply the sealing resin from the resin supply unit to the workpiece Including the step of:
Further, the resin compensation amount is characterized in that a resin amount corresponding to a lacking semiconductor chip volume is calculated.
The chip stack height of the workpiece is characterized in that the Z-axis height is measured using an image taken by an imaging apparatus using a Z-axis inspection machine.
本発明に係る樹脂封止方法を用いれば、半導体チップが基板上に積層されたワークのチップの積層高さを計測し、高さ計測値からチップ積層量を判定し、不足する半導体チップに補填する樹脂量若しくは供給しない樹脂量を算出するので、良品と不良品を見極めたうえで良品についての樹脂封止を確実に行って高価なデバイスの成形不良を防いだり封止樹脂の無駄使いを防いだりすることができる。よって、高価な成形品の歩留まりを向上させることができる。 If the resin sealing method according to the present invention is used, the stacking height of the chip of the work in which the semiconductor chip is stacked on the substrate is measured, the chip stacking amount is determined from the height measurement value, and the missing semiconductor chip is compensated. The amount of resin to be used or the amount of resin that is not to be supplied is calculated, and after confirming good and defective products, resin sealing of the good products is ensured to prevent molding defects of expensive devices and to prevent waste of the sealing resin. Can be drunk. Therefore, the yield of expensive molded products can be improved.
以下、本発明に係る樹脂封止方法の好適な実施の形態について添付図面と共に詳述する。本願発明は、一例として半導体チップが基板上に複数積層されたワークに供給する液状樹脂量を調整して圧縮成形する樹脂封止方法について説明する。 Hereinafter, preferred embodiments of a resin sealing method according to the present invention will be described in detail with reference to the accompanying drawings. This invention demonstrates the resin sealing method which adjusts and adjusts the amount of liquid resin supplied to the workpiece | work with which the semiconductor chip was laminated | stacked on the board | substrate as an example.
先ず、樹脂封止装置の概略構成について説明する。
ワーク供給部から供給されたワークWに、樹脂供給部6(図1参照)に備えたディスペンサーノズル6bから液状樹脂6cを塗布する(図3(c)(d)参照)。液状樹脂6cは、金型外で塗布されても良いし或いはモールド金型内で塗布されてもいずれでも良い。液状樹脂6cが塗布されたワークWは、モールド金型にクランプされて圧縮成形が行われる。ワークWは、図3(a)(b)のように基板1の一方の面に複数の半導体チップ2が重ね合わせて積層されてマトリクス状或いはマップ状に配置されたものが用いられる。基板1の他方の面には、端子部(例えばはんだボール)1aが設けられている。半導体チップ2は基板1とワイヤボンディング接続されるものでも良いし、チップどうしがフリップチップ接続されるものでも良い。また、半導体チップ2間にはスペーサ3が設けられていても良い(図3(b)参照)。
First, a schematic configuration of the resin sealing device will be described.
A
ここで、樹脂供給部の制御系の構成について図1を参照して説明する。制御部4は、Z軸検査機5から入力された入力データに基づいて樹脂供給部6へ制御指令を出力するCPU4a、ディスペンサーノズル6bの動作プログラム等が格納されたROM4b、入力されたデータの記憶やCPU4aのワークエリアとして使用されるRAM4c等を備えている。RAM4cには、半導体チップごとにZ軸高さデータ、容積データと補填すべき(若しくは補填しない)樹脂量データが記憶されている。
制御部4には、Z軸検査機5からの半導体チップ2のZ軸高さデータが入力される。また、制御部4は、Z軸検査機5から入力されたZ軸高さデータに応じて供給すべき樹脂量データを算出して樹脂供給部6へ制御指令を送る。
Here, the configuration of the control system of the resin supply unit will be described with reference to FIG. The
The
次に、樹脂封止方法の一例について図2を参照して説明する。
先ず、圧縮成形に先立って、樹脂封止を行うワークWの各層ごとのZ軸高さ位置をZ軸高さデータとして測定しておく。ワークWのZ軸高さデータは、半導体チップ2が6層分として説明する。Z0は基準面(測定点Xi,Yi)となる基板1の高さを示すもので、チップ近くのチップ底面の高さとなる値(例えばZ0=0.064mm)である。尚、Z0は基坂1の反りを考慮して毎回測定することが好ましい。各層半導体チップ2の高さデータは例えば6層分の場合例えばZ1=0.15mm〜Z6=0.75mmで与えられる。この各層半導体チップ2を封止するのに必要な樹脂量データ例えばVz1=0.00524cc〜Vz6=0.00274ccを予め樹脂供給部の制御部4へ記憶させておく。この樹脂量データは、図示しない金型キャビティに占める各層半導体チップの容積を元に作成される(ステップS1)。
Next, an example of a resin sealing method will be described with reference to FIG.
First, prior to compression molding, the Z-axis height position for each layer of the workpiece W to be resin-sealed is measured as Z-axis height data. The Z-axis height data of the workpiece W will be described assuming that the
次に、Z軸検査機5を用いてワークWのZ軸高さ測定を行う。測定は積層された半導体チップ2の中心部(測定点Xj,Yj)においてチップ上面Zcまでの高さ測定を行う。その後チップ近傍の基板高さZ0を測定する。Z軸検査機5は、例えばレーザー光を測定対象物(半導体チップ)に照射して得られる反射光の焦点距離を読み取ることにより高さZcの計測が行われる(ステップS2)。例えば、Zc測定値が0.582mmの場合、Zc−Zo=0.582−0.064=0.518mmとなり、制御部4はZ軸高さデータからZ4=0.50mmに近い値であることから、4層目の半導体チップ2の表面までの高さデータであると判断される(ステップS3)。よって、制御部4は、半導体チップ2が5層及び6層は欠損していると判断できることから、樹脂量データよりVz5+Vz6=0.00346+0.00274=0.00620ccを基準量に加算して樹脂供給量を決定する(ステップS4)。
Next, the Z-axis height of the workpiece W is measured using the Z-axis inspection machine 5. In the measurement, the height to the chip upper surface Zc is measured at the central portion (measurement points Xj, Yj) of the
制御部4は、マトリクス状若しくはマップ状に配置された半導体チップ2を搭載したワークWごとに樹脂供給量に関する制御データを樹脂供給部6に送信する(ステップS5)。樹脂供給部6は、ワークWの1枚分の制御データを集積し(ステップS6)、1チップごとに、或いは1キャビティごとに液状樹脂を基板1上に供給する(ステップS7)。ワークWごとに集積された制御データは樹脂供給量として蓄積される。また、次回以降の同じ欠損内容のワークWに対する樹脂供給量としてフィードバック制御することで、樹脂補填量を分析して過不足なく供給することができる。以上の樹脂封止動作が繰り返し行われる。尚、本実施例では、一括封止用のキャビティ71を設けた金型81内でワークWのうち半導体チップ欠損部21に対応する量の液状樹脂6cを補填して樹脂圧を保って樹脂封止する場合(図3(c)参照)について説明したが、個別キャビティ72を設けた金型82内でワークWを樹脂封止する場合には、樹脂の無駄使いをなくすためチップが欠損したキャビティ72内に液状樹脂6cを供給しないように樹脂供給部6に指示することも可能である(図3(d)参照)。
The
上記実施例は、Z軸検査機5を用いてZ軸高さ測定を行っているが、ワークWを撮像して半導体チップの欠損を画像処理により検出しても良い。半導体チップ2のZ軸高さ位置は、例えば撮像される最上側の半導体チップ2までの焦点距離または半導体チップ2の形状から測定される。
In the above embodiment, the Z-axis height measurement is performed using the Z-axis inspection machine 5, but the workpiece W may be imaged and the defect of the semiconductor chip may be detected by image processing. The Z-axis height position of the
以上のように、半導体チップ2が複数積層されたワークWを樹脂封止する場合、半導体チップの欠損箇所に応じた樹脂量を供給して封止することで、高価な良品を生かしつつ、成形品高さのばらつきから成形不良を防いだり、封止樹脂の無駄使いを防いだりすることができる。
As described above, when resin-sealing a workpiece W in which a plurality of
以上、本発明の好適な実施例について種々述べてきたが、封止樹脂は液状樹脂に限定されるものではなく粉状、顆粒状樹脂であっても良く、樹脂供給のタイミングは、ワークWがモールド金型へ搬入される前であっても後であってもいずれでよい。 As described above, various preferred embodiments of the present invention have been described. However, the sealing resin is not limited to a liquid resin, and may be a powdered or granular resin. It may be before or after being carried into the mold.
W ワーク
1 基板
2 半導体チップ
3 スペーサ
4 制御部
5 Z軸検査機
6 樹脂供給部
6b ディスペンサーノズル
6c 液状樹脂
21 半導体チップ欠損部
71、72 キャビティ
81、82 金型
Claims (4)
半導体チップの容積と樹脂補填量を対応させて記憶するステップと、
ワークに積層された半導体チップのうち基板面から最上側のチップまでのZ軸高さ計測を行うステップと、
Z軸高さ計測値からチップ積層量を判定し、不足する半導体チップに補填する樹脂量若しくは補填しない樹脂量を算出するステップと、
補填する樹脂量若しくは供給しない樹脂量を制御データとして樹脂供給部に指示するステップと、
ワークごとに制御データを集積して封止樹脂を樹脂供給部からワークへ供給するステップを含むことを特徴とする樹脂封止方法。 In a resin sealing method in which a work in which a semiconductor chip is stacked on a substrate is carried into a mold and compression-molded,
Storing the volume of the semiconductor chip and the resin filling amount in correspondence with each other;
A step of measuring the Z-axis height from the substrate surface to the uppermost chip among the semiconductor chips stacked on the workpiece; and
Determining the chip stacking amount from the Z-axis height measurement value, and calculating a resin amount to be compensated for an insufficient semiconductor chip or a resin amount not to be compensated;
Instructing the resin supply unit as control data on the amount of resin to be compensated or the amount of resin not to be supplied;
A resin sealing method comprising: collecting control data for each workpiece and supplying a sealing resin from the resin supply unit to the workpiece.
Priority Applications (8)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004319020A JP2006134917A (en) | 2004-11-02 | 2004-11-02 | Method of sealing with resin |
TW094137723A TWI359069B (en) | 2004-11-02 | 2005-10-28 | Resin molding equipment and resin molding method |
US11/262,851 US7407608B2 (en) | 2004-11-02 | 2005-11-01 | Resin molding equipment and resin molding method |
EP08008176A EP1958748A3 (en) | 2004-11-02 | 2005-11-02 | Equipment and method for controlling encapsulating semiconductors with plastics |
CN 200510119377 CN1769027A (en) | 2004-11-02 | 2005-11-02 | Equipment and method for controlling encapsulating semiconductors with plastics |
EP05256773A EP1657043B1 (en) | 2004-11-02 | 2005-11-02 | Machine for controlling encapsulating semiconductors with plastics |
KR1020050104226A KR101332141B1 (en) | 2004-11-02 | 2005-11-02 | Resin molding equipment and resin molding method |
CN201310321030.8A CN103448188B (en) | 2004-11-02 | 2005-11-02 | Resin molding apparatus and resin molding method |
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JP2008306040A (en) * | 2007-06-08 | 2008-12-18 | Shinkawa Ltd | Imaging device for bonding apparatus and imaging method |
JP2008306039A (en) * | 2007-06-08 | 2008-12-18 | Shinkawa Ltd | Imaging device for bonding apparatus and imaging method |
JP2009088402A (en) * | 2007-10-02 | 2009-04-23 | Sumitomo Heavy Ind Ltd | Resin sealing device |
JP2009253128A (en) * | 2008-04-09 | 2009-10-29 | Sumitomo Heavy Ind Ltd | Amount-of-resin decision device and resin sealing device including amount-of-resin decision device |
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JP2008306039A (en) * | 2007-06-08 | 2008-12-18 | Shinkawa Ltd | Imaging device for bonding apparatus and imaging method |
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JP2009253128A (en) * | 2008-04-09 | 2009-10-29 | Sumitomo Heavy Ind Ltd | Amount-of-resin decision device and resin sealing device including amount-of-resin decision device |
JP2009260009A (en) * | 2008-04-16 | 2009-11-05 | Sumitomo Heavy Ind Ltd | Resin amount determining apparatus and resin sealing apparatus provided with the same |
JP2009260180A (en) * | 2008-04-21 | 2009-11-05 | Sumitomo Heavy Ind Ltd | Resin amount determining unit, and resin sealing apparatus comprising the resin amount determining unit |
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JP2010093137A (en) * | 2008-10-09 | 2010-04-22 | Sumitomo Heavy Ind Ltd | Managing method of resin and resin sealing apparatus |
JP2010245328A (en) * | 2009-04-07 | 2010-10-28 | Sumitomo Heavy Ind Ltd | Apparatus and method of calculating thickness of semiconductor chip, apparatus and method of determining amount of resin, and resin sealing apparatus |
JP2014121826A (en) * | 2012-12-20 | 2014-07-03 | Sumitomo Heavy Ind Ltd | Resin molding apparatus and method for the same |
CN107914359A (en) * | 2017-10-28 | 2018-04-17 | 江苏星科精密模具有限公司 | A kind of processing method of headlight Double-color mask |
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JP7444453B2 (en) | 2020-11-25 | 2024-03-06 | アピックヤマダ株式会社 | Resin sealing equipment and resin sealing method |
JP7493806B2 (en) | 2021-06-23 | 2024-06-03 | アピックヤマダ株式会社 | Compression molding apparatus and compression molding method |
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