JP2006130082A - Game machine - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To inform the players or the managers of the generation of the excessiveness or insufficiency in the number of the prize balls put out in an easily understandable fashion while preventing the putting out of the prize balls otherwise caused by the fraudulence reducing the burden on the processing with the put-out control microcomputer. <P>SOLUTION: The CPU carries out the processing of judging the excessiveness or insufficiency in the number of the prize balls put out based on the values of a total number of winning balls counter for counting the total number of winning balls based on the detection signal of a total of winning balls detection switch to be inputted into the main board and transmits the result of the judgment to the put-out control board to stop the put-out operation. This can prevent the putting out of the prize balls otherwise caused by the fraudulence reducing the burden on the processing with the put-out control microcomputer. Furthermore, the CPU transmits the result of the judgment to the performance control board and carries out a notification using a variable display device, thereby informing the players or the managers of the generation of the excessiveness or the insufficiency in the number of the prize balls put out in an easily understandable fashion. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a gaming machine such as a pachinko gaming machine, and more specifically, a plurality of winning areas provided in a gaming area where a player plays a predetermined game using a gaming medium, and a predetermined payout condition is established. The present invention relates to a gaming machine comprising payout means for paying out a prize game medium, which is a game medium as a prize, and effect means for executing a predetermined effect when a predetermined effect condition is satisfied.

  A gaming machine such as a pachinko machine, when a game medium such as a game ball fired by a launching device wins a winning area such as a winning opening provided in the gaming area, the game is played by a prize opening switch provided in the winning area. The medium is detected, and a predetermined number of prize balls are paid out to the player based on the detection.

  In such a gaming machine, by sending a radio wave to the prize opening switch, etc., the prize opening switch is erroneously detected as if there was a prize even though there was no prize actually, and the prize game medium is illegally obtained. The act of getting

Therefore, in recent years, gaming machines having a function for preventing such illegal acts have been disclosed (see Patent Document 1 and Patent Document 2).
The gaming machines described in Patent Document 1 and Patent Document 2 are provided corresponding to a plurality of winning holes provided in the gaming area, and a winning port switch for detecting a winning game medium for each winning port, and a winning port switch And a winning ball detector which is provided at a position where all the game media won in the winning opening are guided and detects the game media passing through the position.

When a game medium is detected at the prize opening switch, the detection signal is input to the game control microcomputer. Based on this detection signal, the game control microcomputer transmits a prize ball designation command instructing the number of prize game media to be paid out according to the winning to the payout control microcomputer.
On the other hand, the detection signal of the game medium in the winning ball detector is input to the payout control microcomputer. The payout control microcomputer counts the number of times a prize ball designation command is received from the game control microcomputer and the number of game media detected by the prize ball detector, and if these values do not match, there is an abnormality in the prize detection. It is determined that it has occurred, and a case where a prize game medium is illegally acquired is detected.
JP 2002-35224 A (pages 10-13, FIG. 14) Japanese Unexamined Patent Publication No. 2002-35325 (pages 10-13, FIG. 14)

  As described above, the gaming machines described in Patent Document 1 and Patent Document 2 input a signal detected by the winning ball detector to the payout control microcomputer, and the payout control microcomputer side determines abnormality of the winning detection. The necessary processing is being executed. For this reason, there is a problem that the processing load of the payout control microcomputer is large.

  Even when there is no fraudulent activity, there may be cases where the prize balls to be paid out are excessive or insufficient due to a failure of the detector, for example. As a notification method in such a case, normally, an abnormality is notified by a dedicated error display LED or the like directly connected to the payout control microcomputer. However, with such notifications, general players who are not familiar with the structure of the gaming machine may not know what is happening, and it takes time for the gaming machine administrator to grasp the situation. There was a fear.

The present invention has been made in view of the above circumstances, and provides a gaming machine capable of reducing the processing burden of the payout control microcomputer and preventing the payout game medium from being paid out due to fraud. With the goal.
Another aspect of the present invention is to provide a gaming machine that can notify a player or a manager of a gaming machine of an abnormality in an easy-to-understand form when an excess or a shortage of prize balls to be paid out occurs. Objective.

In order to achieve the above object, a gaming machine according to claim 1 of the present application,
A plurality of winning areas (for example, winning holes 20a to 20d, ordinary variable winning ball apparatus 6 and special variable winning ball apparatus 7) provided in a game area where a player plays a predetermined game using a game medium, and a predetermined payout A payout means (for example, a payout device 50) for paying out a prize game medium (for example, a prize ball), which is a game medium as a prize, based on the establishment of a condition (for example, winning a game ball in a winning area), and a predetermined effect Production means (for example, variable display device 4) for executing a predetermined production (for example, variable display of special symbols) based on the establishment of a condition (for example, winning of a game ball to the normal variable winning ball device 6) is provided. Game machines (for example, pachinko machine 1)
A game control microcomputer (for example, a game control microcomputer 110 mounted on the main board 11) for controlling the progress of the game;
A winning detection means (for example, winning port switches 25a to 25d, which is provided corresponding to each of the plurality of winning areas, and detects a winning game medium (for example, a winning ball) that is a gaming medium having won the winning area, is started. Mouth switch 22, count switch 24 and V winning switch 23),
All winning detection means (all winning ball detection switch 29) for detecting a winning game medium downstream of a position where the winning game media that have won the plurality of winning areas join;
A payout control microcomputer (for example, a payout control microcomputer 150 mounted on the payout control board 15) for controlling the payout operation of the prize game medium by the payout means based on a control command transmitted from the game control microcomputer; ,
An effect control microcomputer (for example, an effect control microcomputer 120 mounted on the effect control board 12) for controlling the effect by the effect means based on a control command transmitted from the game control microcomputer;
Relay means for relaying communication between the game control microcomputer and the effect control microcomputer (for example, the relay board 18);
With
The game control microcomputer is:
A payout control for transmitting a designated payout control command (for example, a prize ball number signal) for designating the number of prize game media to be paid out from the payout means to the payout control microcomputer as the control command in response to detection by the winning detection means. Command transmission means (for example, a portion where the CPU 113 executes the process of step S332);
The designated payout control command transmission number counting means for counting the number of times of sending of the designated payout control command by the payout control command sending means (for example, the CPU 113 ends the summing process by setting K = 1 in the process of step S408, and proceeds to the process of step S332) Each time the award ball number signal is transmitted, the portion of K = 1 in the process of step S421),
A total winning number counting means (for example, a total winning number counter 209) for counting the number of winning game media detected by the total winning detection means;
The difference between the value of the designated payout control command transmission count counted by the designated payout control command transmission count counting means and the value of the number of winning game media counted by the total winning count counting means is calculated as a winning number difference. Winning number difference calculating means (for example, a portion where the CPU 113 executes the process of step S421);
Winning number difference determining means for determining whether or not the winning number difference calculated by the winning number difference calculating means is greater than or equal to a predetermined value (for example, a portion where the CPU 113 executes the process of step S424);
When the winning number difference determining unit determines that the winning number difference is greater than or equal to a predetermined value (for example, when the CPU 113 determines Yes in the process of step S424), the determination information based on the determination is notified. Effect control command transmission means (for example, the CPU 113 performs command set processing in steps S113 and S116) for transmitting effect control commands (for example, a prize ball excess error notification command and a prize ball shortage error notification command) to the effect control microcomputer as the control commands. Part for executing the command transmission process of steps S224 and S229),
Including
The production control microcomputer is:
Effect control command receiving means for receiving the effect control command transmitted by the effect control command transmitting means (for example, the part where the CPU 123 executes steps S83 and S86);
On the basis of the effect control command received by the effect control command receiving means, the effect means is controlled, and a notice effect control means (for example, CPU123) for executing the effect of notifying the determination information based on the determination by the winning number difference determining means. Is a part that executes the processing of steps S802 and S805),
including,
It is characterized by that.

In the gaming machine according to claim 2,
The game control microcomputer is:
The prize game medium information (for example, number data) for specifying the number of prize game media to be paid out in correspondence with the detection by the winning detection means from the payout means is individually stored for each detection by the winning detection means. Medium number information storage means (for example, type storage area 208);
Number information reading means (for example, a portion in which the CPU 113 repeatedly executes the process of step S404) for reading a plurality of the prize game medium number information from the prize game medium number information stored in the prize game medium number information storage means;
By adding together the number of prize game media (for example, the number of prize balls) specified by the plurality of prize game medium number information read by the number information reading means, the total number calculation means (for example, CPU 113) calculates the total number. A portion that repeatedly executes the processing of steps S405 and S407), and
For the calculation of the total number by the total number calculation means, the total information number counting means for counting the total information number that is the number of the prize game medium number information read by the number information reading means (for example, the CPU 113 performs the process of step S408). Repeated part)
Total designation payout control command for designating the total number calculated by the total number calculation means as the number of prize game media to be paid out from the payout means (for example, a prize when the CPU 113 sets K = 2 or more in the process of step S408) A total designated payout control command transmission means (for example, a portion where the CPU 113 executes the process of step S332) for transmitting a ball number signal);
When the total designation payout control command transmission means transmits the total designation payout control command, the prize game medium number information read by the number information reading means for calculating the total number by the total number calculation means is the prize. The prize game medium number information updating means for updating the prize game medium number information storage means by deleting from the prize game medium number information stored in the game medium number information storage means (for example, the CPU 113 performs steps S356 and S357). And a part for executing
The designated payout control command transmission number counting means is
Each time the payout control command transmission means transmits 1 specified payout control command, 1 is added, and every time the total specified payout control command transmission means transmits 1 total specified payout control command, the total number of information The total number of information counted by the counting means is added, and the added value is used as the value of the number of times of transmission of the designated payout control command. The command transmission number pseudo-counting means (for example, the value of K specified by the CPU 113 in the process of step S408) Each time a prize ball number signal is transmitted in the process of step S332, a portion of K value in the process of step S421) is included.

In the gaming machine according to claim 3,
The notification effect control means includes:
Based on the effect control command received by the effect control command receiving means, the effect means is controlled, and an effect of notifying the determination information based on the determination by the winning number difference determining means is executed for a predetermined time, and the predetermined time has elapsed. After (for example, when the CPU 123 determines Yes in the process of step S807), it includes a fixed time notification effect control means (for example, a portion where the CPU 123 executes the process of step S808) for stopping the effect.

In the gaming machine according to claim 4,
The game control microcomputer is:
Designation of the designated payout control command transmission number counting means when the prize number difference judging means judges that the prize number difference is greater than or equal to a predetermined value (for example, when the CPU 113 judges Yes in the process of step S424). Including a winning number comparison determining means (for example, a portion where the CPU 113 executes the process of step S425) for determining whether or not the value of the number of payout control command transmissions is larger than the value of the number of winning game media of the total winning number counting means;
The production control command transmission means
When it is determined by the winning number comparison judging means that the value of the designated payout control command transmission number of the designated payout control command transmission number counting means is larger than the value of the number of winning game media of the total winning number counting means (for example, the CPU 113) When it is determined No in the process of step S425), a payout excessive effect control command (for example, a prize ball excessive error notification command) for instructing to notify the determination information based on the determination by the effect means is provided. A payout excess effect control command transmission means for transmitting to the effect control microcomputer as an effect control command (for example, a portion where the CPU 113 executes the command transmission process of steps S224 and S229 in the command set process of step S113);
When it is determined by the winning number comparison judging means that the value of the designated payout control command transmission number of the designated payout control command transmission number counting means is not larger than the value of the number of winning game media of the total winning number counting means (for example, the CPU 113) Is determined to be Yes in the process of step S425), a payout shortage effect control command (for example, a shortage error notification command for a prize ball) for instructing that the determination means based on the determination is notified by the effect means is issued. A payout insufficient effect control command transmission means (for example, a portion in which the CPU 113 executes the command transmission process of steps S224 and S229 in the command set process of step S116) to transmit to the effect control microcomputer as the effect control command,
The notification effect control means includes:
When the effect control command receiving means receives the payout excessive effect control command transmitted by the payout excessive effect control command transmitting means (for example, when the CPU 123 determines Yes in the process of step S801), the effect device A payout excess notification effect control means (for example, a portion where the CPU 123 executes the process of step S802) for executing the notification effect of the first aspect by controlling
When the effect control command receiving means receives the payout insufficient effect control command transmitted by the payout insufficient effect control command transmitting means (for example, when the CPU 123 determines Yes in the process of step S804), the effect device And a payout shortage notification effect control means (for example, a portion where the CPU 123 executes the process of step S805) that executes a notification effect of a second aspect different from the first aspect.

In the gaming machine according to claim 5,
The payout control command transmission means includes:
When the winning number difference determining means determines that the winning number difference is greater than or equal to a predetermined value (for example, when the CPU 113 determines Yes in the process of step S424), the payout means is abnormally paid out. An abnormal payout control command transmission means (for example, the CPU 113 in step S336 or step S336) that transmits an abnormal payout control command (for example, an excessive prize ball error signal and an insufficient prize ball error signal) to the payout microcomputer as the control command. Including a portion for executing the processing of S339),
The payout control microcomputer includes:
An abnormal payout control command receiving means for receiving the abnormal payout control command transmitted by the abnormal payout control command transmitting means (for example, the part that the CPU 153 has determined as Yes in the process of step S605 or S607);
Based on the abnormal payout control command received by the abnormal payout control command receiving means, the payout means is controlled to stop payout operation of the prize game medium (for example, the CPU 153 determines Yes in the process of step S641). And a portion to be determined).

In the gaming machine according to claim 6,
A payout operation stop release signal output means (for example, an error) that outputs a payout operation stop release signal for releasing the stop of the payout operation in response to an artificial operation when the payout operation of the prize game medium by the payout means is stopped. Release switch 73),
The payout control microcomputer includes:
In accordance with the output of the payout operation stop release signal by the payout operation stop release signal output means, the payout operation restarting means for resuming the payout operation stopped by the payout operation stop means (for example, after the CPU 153 has executed the process of step S537) A portion determined as No in the process of step S641).

In the gaming machine according to claim 7,
The relay means is
Signal transmission direction for relaying transmission of the effect control command from the effect control command transmitting means to the effect control command receiving means and for preventing signals from being transmitted from the effect control microcomputer to the game control microcomputer Restriction means (for example, signal direction restriction part 183) is included.

  The inventions according to claims 1 to 7 of the present application have the following effects.

According to the configuration of the first aspect, the signal detected by the all winning detection means is input to the game control microcomputer, and the game control microcomputer determines abnormality of the number of prize game media paid out from the payout means. To perform the necessary processing. Therefore, it is possible to reduce the processing load on the payout control microcomputer and to prevent the prize game medium from being paid out due to fraud.
When the game control microcomputer determines that an abnormality has occurred in the number of prize game media paid out from the payout means, the game control microcomputer transmits an effect control command for notifying the fact to the effect control microcomputer. The computer notifies the abnormality by controlling the production means based on the production control command. For this reason, it is possible to notify the abnormality to the player or the administrator of the gaming machine in an easily understandable form.
The game control microcomputer also counts the number of transmissions of the designated payout control command and the number of all winning game media that have won the plurality of winning areas detected by the all winning detection means, and the difference between these values is counted. Is determined to be greater than or equal to a predetermined value, it is determined whether an abnormality has occurred in the number of premium game media paid out by the payout means. Here, since the designated payout control command is transmitted in response to detection by the winning detection means, if there is no abnormality, the number of transmissions of the designated payout control command and the number of winning game media detected by the all winning detection means are It becomes the same value. Therefore, it is possible to detect the occurrence of an abnormality in the number of premium game media to be paid out without directly counting the payout of premium game media by the payout means. Further, since the occurrence of an abnormality can be detected based on the number of prize game media that is smaller than the number of prize game media to be paid out, the amount of data stored can be reduced.

According to the configuration of the second aspect, the game control microcomputer specifies the number of prize game media to be paid out from the payout means in response to detection by the winning detection means. Store information. Then, the prize game media number specified by the plurality of prize game medium number information read out from the stored prize game medium number information is added up, and the added number is given out from the payout means One total designated payout control command designated as the number of payouts is sent to the payout control microcomputer. Thereby, the number of premium game media to be paid out from the payout means specified by a plurality of specified payout control commands can be specified by one total command payout control command. For this reason, it is possible to reduce the number of times a payout control command is transmitted from the game control microcomputer to the payout control microcomputer, and to reduce the processing load on the game control microcomputer or the payout control microcomputer.
In addition, when the game control microcomputer transmits a total designated payout control command, the game control microcomputer designates the total payout information counted by the total information counting means for each command transmission instead of counting the number of command transmissions. Add to the value of command transmission count. Here, the total number of information coincides with the number of transmissions when the number of prize game media specified by the prize game medium number information is transmitted as a designated payout control command without being summed. Therefore, even when the number of times of sending out the payout control commands sent from the game control microcomputer to the payout control microcomputer is reduced, it is possible to accurately determine the abnormality in the number of prize game media paid out from the payout means.

  According to the configuration of the third aspect, the effect control microcomputer executes the effect control process based on the effect control command instructing the abnormality notification transmitted from the game control microcomputer, It stops automatically without waiting for reception of an effect control command for commanding stop of the effect. For this reason, the number of transmissions of the effect control command transmitted from the game control microcomputer to the effect control microcomputer can be reduced, and the processing load of the game control microcomputer or the effect control microcomputer can be reduced.

  According to the configuration of the fourth aspect, the game control microcomputer compares the value of the designated payout control command transmission count with the value of the number of winning game media, determines which is larger, and sends the designated payout control command transmission. If the value of the number of times is larger, an excessive payout effect control command is transmitted to the effect control microcomputer. If the value of the number of winning game media is larger, an insufficient payout effect control command is transmitted to the effect control microcomputer. Then, the effect control microcomputer performs effect control processing for notifying abnormality in a different manner based on the difference between the received effect control commands. For this reason, the player or the manager of the gaming machine can easily recognize whether the abnormality is excessive payout or insufficient payout based on the difference in abnormality notification mode. As a result, the player or the manager of the gaming machine can easily investigate the cause of the abnormality and recover from the abnormal state.

  According to the configuration of claim 5, the game control microcomputer, when determining that the prize difference is equal to or greater than a predetermined value, indicates that an abnormal payout indicating that an abnormality has occurred in the payout of the prize game medium by the payout means. A control command is transmitted to the dispensing control microcomputer. Then, the payout control microcomputer stops paying out the prize game medium from the payout means based on the received abnormal payout control command. For this reason, the payout operation of the prize game medium by the payout means can be stopped together with the notification of the payout abnormality by the effect means.

  According to the configuration of the sixth aspect, when the payout control microcomputer stops the payout of the prize game medium from the payout means, when the payout operation stop cancel signal for canceling the stop is input. , The payout operation is resumed. For this reason, payout of the prize game medium in an abnormal state can be prevented.

  According to the configuration of the seventh aspect, the relay means prevents a signal from being transmitted from the effect control microcomputer to the game control microcomputer. For this reason, even if an unauthorized signal is input to the effect control microcomputer, the unauthorized signal can be prevented from being input to the game control macro computer via the effect control microcomputer.

  Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a front view of a pachinko gaming machine according to the present embodiment and shows an arrangement layout of main members. The pachinko gaming machine in the present embodiment is a card reader (CR: Card Reader) type pachinko gaming machine that lends a ball using a prepaid card. For example, a bullet ball with a probability setting function called a general electric machine or a pachinko machine. It may be a gaming machine or the like. Furthermore, it is applicable not only to a CR-type pachinko gaming machine that lends a ball with a prepaid card, but also to a pachinko gaming machine that lends a ball with cash.

  A pachinko gaming machine (gaming machine) 1 is roughly divided into a gaming board (gauge board) 2 constituting a gaming board surface and a gaming machine frame (base frame) 3 for supporting and fixing the gaming board 2. .

  The game board 2 is formed with a substantially circular game area surrounded by guide rails. A variable display device 4 is provided at a substantially central position of the game area. A passing gate 5 is provided on the side of the variable display device 4. Under the variable display device 4, an ordinary variable winning ball device (start winning port) 6 is disposed. A special variable winning ball apparatus (large winning opening) 7 is disposed below the normal variable winning ball apparatus 6. In addition, a normal symbol display 40 is provided above the variable display device 4.

  The variable display device 4 includes an LCD (Liquid Crystal Display) module that variably displays symbols as identification information by a plurality of variable display units. For example, a game ball wins a normal variable winning ball device 6. In the variable display game (special game) where is the execution condition, start the variable display of three display symbols (special symbols) composed of numbers, letters, symbols, etc., and after a certain period of time, left, right, Confirm the displayed symbols in the order of middle. The pachinko gaming machine 1 enters a specific gaming state (a jackpot gaming state) when a combination of confirmed display symbols (a determined symbol) has a predetermined specific display result (a jackpot). The variable display device 4 may be provided with four start memory display areas for displaying the number of effective winning balls that have entered the normal variable winning ball device 6, that is, the start memory number.

  In addition to this, the variable display device 4 displays various information based on the state of the pachinko gaming machine 1 as necessary. For example, when it is determined that the number of game balls to be paid out as prize balls is excessive or insufficient by a predetermined determination process performed by a microcomputer mounted on the pachinko gaming machine 1, the variable display device 4 A screen for informing the effect is displayed.

  The passing gate 5 guides the passed hit ball to the normally variable display device 6 through the ball exit. A gate switch 21 (FIG. 5) that detects a hit ball that has passed through the passage gate 5 is provided in a passage between the passage gate 5 and the ball outlet.

  The normal symbol display 40 includes a light emitting diode (LED) and the like, and in a normal diagram game in which a game ball passes through one of the passing gates 5 as a starting condition, the lighting, blinking, emission color, etc. Be controlled. When a display with a predetermined hit pattern is performed in this normal figure game, the display result in the normal figure game is “win”, and the movable wing piece of the electric tulip constituting the normal variable winning ball apparatus 6 is passed for a predetermined time. Tilt control.

  The normal variable winning ball apparatus 6 is a tulip-type accessory (ordinary electric motor) having a pair of movable wing pieces that are movable and controlled between a vertical (normally open) position and a tilt (enlarged open) position by a solenoid 81 (FIG. 5). It is configured as an accessory). The winning ball that has entered the normal variable winning ball device 6 is guided to the back of the game board 2 and detected by the start port switch 22 (FIG. 5).

  The special variable winning ball apparatus 7 includes an opening / closing plate that opens and closes a winning area by a solenoid 82 (FIG. 5). This opening / closing plate is normally closed, and when the special display game is performed by the variable display device 4 based on the winning of the game ball to the normal variable winning ball device 6, the specific game state is obtained. The solenoid 82 is set so that the winning area is opened (opening cycle) until a predetermined period (for example, 29 seconds) or a predetermined number (for example, 10) of winning balls are generated. The game ball that falls on the surface of the game board 2 is received. This opening cycle can be repeated up to 16 times.

  Of the winning balls guided to the back of the game board 2 from the opening / closing plate, the winning ball entering one (V zone) is detected by the V winning switch 23 (FIG. 5). The winning ball from the opening / closing plate is detected by the count switch 24 (FIG. 5). In response to the detection of a winning ball, a predetermined number of winning balls are paid out by a main board 11 and a payout control board 15 (FIGS. 2 and 5) described later.

The game area of the game board 2 is provided with a plurality of winning ports 20a to 20d (left winning port 20a, right winning port 20b, left dropping winning port 20c, right dropping winning port 20d). Winnings of the game balls to the winning ports 20a to 20d are detected by the corresponding winning port switches 25a to 25d (FIG. 5).
In addition, an all winning ball detection switch 29 (FIG. 5) is provided in the joining passage where the ordinary variable winning ball device 6, the special variable winning ball device 7 and the winning ball passages from the winning ports 20a to 20d merge. The all winning ball detection switch 29 detects a game ball passing through the merge passage.

In the game area of the game board 2, in addition to the above-described configuration, a windmill having a decorative lamp, an outlet, and the like are provided.
Two speakers 8L and 8R that emit sound effects are provided on the left and right upper portions outside the game area. A game effect lamp 9 that is lit or blinks is provided on the outer periphery of the game area.

  A hit ball supply tray (upper plate) 31 is provided on the lower surface of the game area. Below the hitting ball supply tray 31, a hitting operation handle (operation knob) 30 that is operated by the player to fire the playing ball, and an extra ball receiving tray 32 that stores game balls that cannot be accommodated in the hitting ball supply tray 31. , Is provided.

  A frame button 19 is provided at the lower left portion of the surplus ball tray 32. The frame button 19 is used to enhance a game effect by arbitrarily changing a part of the game effect by being pressed under a predetermined condition during the game. For example, when the frame button 19 is pressed under a predetermined condition, the symbol variably displayed on the variable display device 4 can be changed to a symbol different from the normal one. The pressing of the frame button 19 is detected by the frame button switch 28 (FIG. 5).

  Further, FIG. 1 also shows a prepaid card unit (hereinafter referred to as a card unit) 70 that is installed adjacent to the pachinko gaming machine 1 and enables lending of a ball by inserting a prepaid card. The card unit 70 includes a usable indicator lamp that indicates whether or not the card unit 70 is in a usable state, a connection table direction indicator that indicates which side of the pachinko gaming machine 1 corresponds to the card unit 70, and the card unit 70. When checking the card insertion indicator lamp indicating that a card is inserted in the card, the card insertion slot into which the card as a recording medium is inserted, and the card reader / writer mechanism provided on the back of the card insertion slot A card unit lock or the like for opening the card unit 70 is provided.

  FIG. 2 is a rear view of the pachinko gaming machine 1. Above the back of the pachinko gaming machine 1, there are provided a storage tank 41 for storing game balls as supply balls, and a guide rail 43 for guiding the game balls stored in the storage tank 41 to the payout case 42. . The downstream side of the guide rail 43 communicates with the two rows of ball passages 44a and 44b via a curve rod. A ball switch 27 is installed upstream of the ball passages 44a and 44b. A payout case 42 covering the payout device 50 (FIG. 3) is fixed to the lower part of the ball passages 44a and 44b.

  The ball switch 27 is a switch for detecting the presence or absence of a game ball in the ball passages 44a and 44b. When the ball switch 27 no longer detects a game ball, the rotation of the payout motor 51 (FIG. 4) in the payout device 50 is performed. And the payout of the game ball is made immobile. Further, the ball switch 27 is locked by a locking piece at a position where it can be detected that 27 to 28 game balls are present in the ball passages 44a and 44b. In other words, the ball switch 27 is installed at a position where it can be confirmed that a maximum payout amount (100 yen: 25 in this embodiment) or more per unit of ball lending is secured.

  A full tank switch 26 is provided on the side wall of the surplus ball passage that communicates between the hit ball supply tray 31 and the surplus ball receiving tray 32 below the back of the pachinko gaming machine 1. The full tank switch 26 detects a full tank of the surplus ball receiving tray 32.

  When a lot of game balls based on award balls or ball lending requests are paid out, the hitting ball supply tray 31 is full, and after the game balls reach the contact port, when the game balls are further paid out, the game balls are surplus balls. It is guided to the surplus ball receiving tray 32 through the passage. When the game ball is further paid out, the sensing lever presses the full switch 26 to turn it on. In this state, the rotation of the payout motor 51 in the payout device 50 is stopped, the payout operation of the payout device 50 is stopped, and the driving of the firing device 60 is also stopped.

  FIG. 3 is a front view (FIG. 3A) and a cross-sectional view (FIG. 3B) showing the dispensing device 50 covered with the dispensing case 42. FIG. FIG. 4 is an exploded perspective view showing a configuration example of the dispensing device 50. In this example, a payout device 50 is formed inside three cases 45a, 45b and 45c as the payout case 42. Holes 46a and 46b communicating with the ball passages 44a and 44b are respectively provided in the upper portions of the cases 45a and 45b, and the game balls flow into the payout device 50 through the holes 46a and 46b.

  The payout device 50 pays out a winning ball or a game ball based on a ball lending request, and includes a payout stepping motor (payout motor) 51 serving as a drive source. The rotation operation of the payout motor 51 is controlled by a drive signal sent from the payout control board 15.

  Further, the payout device 50 includes a gear 52 fitted to the rotation shaft of the payout motor 51, a gear 53 meshing with the gear 52, and a cam 54 fitted to the central axis of the gear 53 and having a ball mounting portion. And a ball passage 55 below the cam 54 is provided. The game balls that have flowed in through the holes 46a and 46b fall alternately through the ball passage 55 one by one every time the ball mounting portion of the cam 54 rotates 1/3.

  The payout device 50 is provided with a payout motor position sensor 71 composed of a light emitting element (LED) and a light receiving element. The payout motor position sensor 71 is a sensor for detecting the rotational position of the payout motor 51, and is used for detecting clogging of a game ball, that is, so-called ball biting. When ball biting occurs in the payout device 50, a ball biting release process is performed in which the process of rotating the payout motor 51 at a high speed and the process of rotating at a low speed are repeated a predetermined number of times. Also at this time, by confirming the rotational position of the payout motor 51 by the detection signal of the payout motor position sensor 71, it is possible to check whether or not the ball biting state has been released.

  Below the payout device 50, for example, a payout count switch 72 using a proximity switch is provided. The payout count switch 72 is turned on every time one game ball falls from the payout device 50 and transmits a predetermined detection signal to the payout control board 15. Thereby, on the payout control board 15 side, the number of game balls actually paid out from the payout device 50 can be counted.

  A launching device 60 shown in FIG. 2 includes a launching stepping motor (launching motor) 61 (FIG. 5) serving as a drive source, and elastically deforms the launching spring by the rotation of the launching motor 61 to apply the urging force of the launching spring to a hammer. The game ball is fired toward the game area by transmitting to and hitting the game ball. The elastic force of the firing spring is adjusted according to the operation amount of the operation knob 30 (FIG. 5). That is, the game ball is launched at a speed corresponding to the operation amount of the operation knob 30. Further, the rotation operation of the launch motor 61 is controlled by a launch drive signal sent from the launch control board 17.

  Further, on the back of the pachinko gaming machine 1, there are a power supply board 10, a main board 11, an effect control board 12, an audio control board 13, a lamp control board 14, a payout control board 15, an information terminal board 16, a launch control board 17, and a relay. Main substrates such as the substrate 18 are arranged in place.

  FIG. 5 is a block diagram showing a system configuration example centering on the main board 11, the effect control board 12 and the payout control board 15. 5 also shows the power supply board 10, the information terminal board 16, the launch control board 17, and the relay board 18.

The power supply board 10 supplies a predetermined power supply voltage to each circuit in the pachinko gaming machine 1.
The relay board 18 is connected between the main board 11 and the effect control board 12 and relays communication between both boards. Specifically, the relay board 18 relays transmission of a signal transmitted from the main board 11 to the effect control board 12, and conversely prevents transmission of a signal transmitted from the effect control board 12 to the main board 11. It is.

  The main board 11 includes a game control microcomputer 110, a switch circuit 115, a solenoid circuit 116, a power supply monitoring circuit 117, and the like. Further, the main board 11 includes wiring to the effect control board 12 and the payout control board 15, the gate switch 21, the start port switch 22, the V winning switch 23, the count switch 24, the winning port switches 25a to 25d, and all winning ball detection. The wiring from the switch 29 is connected. Further, the main board 11 is also connected to wirings for solenoids 81 and 82 for performing movable control of the movable blade piece in the normal variable winning ball apparatus 6 and opening / closing control in the special variable winning ball apparatus 7. .

  The game control microcomputer 110 is, for example, a one-chip microcomputer, and is controlled according to a ROM (Read Only Memory) 111 for storing a game control program, a RAM (Random Access Memory) 112 used as a work memory, and the program. A CPU (Central Processing Unit) 113 and an I / O (Input / Output) port 114 are included. The game control microcomputer 110 has a function of generating random numbers used in the special game, a function of outputting and transmitting control signals as examples of command information to the effect control board 12 and the payout control board 15, respectively. It is what you have.

  FIG. 6 is an explanatory diagram showing an example of the contents of a payout control signal transmitted and received between the main board 11 and the payout control board 15. In this embodiment, a plurality of types of control signals are transmitted and received between the main board 11 and the payout control board 15 in order to perform various controls relating to payout control and the like. As shown in FIG. 6, the connection confirmation signal is a signal that is output when the main board 11 rises and notifies the payout control board 15 that the main board 11 has risen. The connection confirmation signal indicates that the winning ball can be paid out.

  The prize ball excess error signal and the prize ball shortage error signal are signals for notifying the payout control board 15 of a prize ball payout excess / deficiency error. The award ball excess error signal is output when it is determined that the payout of the award ball is excessive as a result of a predetermined determination process executed by the game control microcomputer 110. As a result of the determination process, it is output when it is determined that the payout of prize balls is insufficient.

The prize ball REQ signal is a signal that is in an output state (on state) when a prize ball payout request is made (that is, a trigger signal for a prize ball payout request). The prize ball REQ signal is in an output stop state (off state) when the prize ball BUSY signal from the payout control board 15 is turned off after the prize ball BUSY signal is turned on.
The prize ball number signal (prize ball command) is a signal output for designating the number (1 to 15) of game balls to be paid out.

  The prize ball BUSY signal is a signal that is turned on when the payout control board 15 confirms the on state of the prize ball REQ signal and is turned off after a predetermined period. That is, it corresponds to an acceptance confirmation signal for the prize ball REQ signal. Therefore, the state where the prize ball BUSY signal is OFF corresponds to a state waiting for the prize ball number signal reception. Each control signal may be configured so that the output state or on state and the output stop state or off state can be distinguished, and the above logic may be reversed.

  FIG. 7 is a block diagram showing signal lines and the like used for transmission / reception of each control signal shown in FIG. As shown in FIG. 7, the connection confirmation signal, the prize ball excess error signal, the prize ball shortage error signal, the prize ball REQ signal, and the prize ball number signal are output by the CPU 113 of the main board 11 via the output circuit 114b and input. This is input to the CPU 153 of the payout control board 15 via the circuit 154a.

  The prize ball BUSY signal is output by the CPU 153 via the output circuit 154b and input to the CPU 113 via the input circuit 114a. Each of the connection confirmation signal, the prize ball excess error signal, the prize ball shortage error signal, the prize ball REQ signal, and the prize ball BUSY signal is 1-bit data, and is transmitted through one signal line. Since 1 to 15 award ball number signals are designated, it is composed of 4-bit data and transmitted through four signal lines.

  An effect control command (effect control signal) is transmitted from the main board 11 to the effect control board 12 via the relay board 18. In this embodiment, the effect control command is transmitted from the main board 11 to the effect control board 12 through the eight signal lines of the effect control signals CD0 to CD7. In order to transmit a strobe signal, a signal line for an effect control INT signal is wired between the main board 11 and the effect control board 12 via the relay board 18. The effect control INT signal is a signal for instructing the effect control board 12 to capture 8-bit data of the effect control signal.

FIG. 8 is an explanatory diagram showing an example of the contents of an effect control command sent from the main board 11 to the effect control board 12 used in this embodiment.
As shown in FIG. 8A, the effect control command has a 2-byte structure, and the first byte represents MODE (command classification), and the second byte represents EXT (command type). The first bit of MODE data is always “1”, and the first bit of EXT data is “0”.

  In the example of the effect control command shown in FIG. 8B, the command 80XX (h) is a variable display start command for instructing to start variable display of the special symbol on the variable display device 4. It should be noted that XX (h) of the EXT data is an unspecified hexadecimal number and is a value arbitrarily set according to the instruction content by the effect control command. On the side of the effect control board 12, in accordance with the EXT data included in the variable display start command, the determination result of whether or not the total variable display time of the special symbol and the display result of the variable display become the specific display result of the jackpot combination It is possible to specify the determination result of whether or not to reach.

  Commands 90XX (h), 91XX (h), and 92XX (h) are special symbol designation commands for designating the left, middle, and right fixed symbols of the special symbols. In each special symbol designation command, the symbol number of the special symbol is set in XX (h). Command A000 (h) is a special symbol confirmation command for instructing the end of variable symbol variable display. Command B000 (h) is a jackpot end command for instructing the end of the jackpot gaming state.

  The command C000 (h) is a prize ball excess error notification command for instructing that the number of game balls to be paid out as a prize ball from the payout device 50 is excessive, and the command C001 (h) is a prize ball. Is a prize ball shortage error notification command for instructing notification that the number of game balls to be paid out from the payout device 50 is insufficient.

  FIG. 9 is a block diagram showing details of a configuration example of the game control microcomputer 110. As shown in FIG. 9, the game control microcomputer 110 includes a switch timer memory 201, a switch-on determination value table memory 202, a flag memory 203, a command transmission table memory 204, a winning ball number table memory 205, and a total winning ball number storage. A buffer 206, prize ball number buffer 207, type storage area 208, total winning number counter 209, total prize ball number counter 210, total counter 211, and various timers 212 are provided.

  The switch timer memory 201 stores a plurality of switch timers that are added or cleared depending on whether a detection signal input from various switches is in an on state or an off state. In this embodiment, as shown in FIG. 10, switch timers are provided at addresses corresponding to various switches.

  The switch-on determination value table memory 202 shown in FIG. 9 stores a plurality of switch-on determination values for determining whether or not various switches are turned on. Specifically, the number of times that the detection signals input from the various switches are continuously determined to be in the on state is stored as the switch-on determination value.

  In this embodiment, “2” is set as the switch-on determination value of the winning opening switches 25a to 25d, the gate switch 21, the start opening switch 22, the count switch 24, the V winning switch 23, and the all winning ball detection switch 29. ing. Accordingly, when the value of the switch timer for various switches becomes “2”, it is determined that the various switches are on.

  The flag memory 203 is for setting a plurality of types of flags used for controlling the progress of the game in the pachinko gaming machine 1. For example, the flag memory 203 is provided with a special symbol process flag, a normal symbol process flag, a prize ball process flag, a prize ball shortage error flag, a prize ball excess error flag, a timer interrupt flag, and the like.

The special symbol process flag indicates which process should be selected and executed in the special symbol process (to be described later) (step S16 in FIG. 26). The normal symbol process flag indicates which process should be selected and executed in the normal symbol process (to be described later) (step S17 in FIG. 26) in order to control the display state of the normal symbol display 40 in a predetermined order. .
The prize ball process flag indicates which process should be selected and executed in a prize ball control process (step S123 in FIG. 32) described later.

The award ball excess error flag is turned on when it is determined by the predetermined determination process executed by the game control microcomputer 110 in the award ball control process that the number of game balls to be paid out as an award ball is excessive. Flag set to state. The award ball shortage error flag is a flag that is set when it is determined by this predetermined determination process that the number of game balls to be paid out as a prize ball is insufficient.
In addition, there are a match flag, an abnormal state flag, and the like as flags used in the prize ball control process.

  The timer interrupt flag is a flag that is set to an on state every time a predetermined time elapses and a timer interrupt is generated.

  The command transmission table memory 204 is provided with a plurality of command transmission tables for control commands output from the main board 11 to the effect control board 12. FIG. 11A is a diagram illustrating a configuration example of the command transmission table memory 204. One command transmission table is composed of 3 bytes, and INT data is set in the first byte. Further, MODE data is set in the command data 1 of the second byte, and EXT data is set in the command data 2 of the third byte.

  Although the EXT data itself may be set in the area of the command data 2, the command data 2 may be set with data for designating the address of the table storing the EXT data. . For example, if bit 7 (work area reference bit) of command data 2 is 0, it indicates that EXT data itself is set in command data 2. Such EXT data is data in which bit 7 is 0. In this embodiment, if the work area reference bit is 1, it indicates that the contents of the transmission buffer are used as EXT data. If the work area reference bit is 1, the other 7 bits may be configured to indicate an offset for designating an address of a table storing EXT data.

  FIG. 11B is a diagram illustrating a configuration example of INT data. Bit 0 of the INT data indicates whether or not an effect control command should be sent to the effect control board 12. If bit 0 is “1”, it indicates that an effect control command should be sent. Therefore, the game control microcomputer 110 sets “01 (h)” in the INT data, for example, in an error process (step S13 in FIG. 26) and a command control process (step S18 in FIG. 26) described later.

  Further, as shown in FIG. 11C, the command transmission table memory 204 is provided with a ring buffer and a transmission buffer for the effect control command. In the special symbol process or the like, when the production condition is established, the EXT data of the production control command corresponding to the established condition is sequentially set in the ring buffer. Further, when sending the effect control command, one piece of data is transferred from the ring buffer to the transmission buffer. In the example shown in FIG. 11C, the ring buffer is composed of 12 buffers and can store data corresponding to 12 presentation control commands.

  The prize ball number table memory 205 shown in FIG. 9 is formed in the ROM 111, and game balls to the prize winning holes 20a to 20d, the ordinary variable winning ball apparatus (start winning prize opening) 6, and the special variable winning ball apparatus (large winning prize opening) 7. A prize ball number table in which the number of prize balls to be paid out based on the winnings is set. In this prize ball number table, as shown in FIG. 12, the number of processes is set at the head address, and thereafter, prize winning holes (winning prizes 20a to 20d, starting prize winning holes 6, and big prize winnings) for paying out prize balls by winning. The lower address of the switch timer (see FIG. 10) and the number of winning balls are sequentially set in pairs for each switch of the mouth 7).

  In this embodiment, “7”, which is the number of winning-port switches for paying out a winning ball by winning, is set as the processing number used in the winning ball number adding process (FIG. 33) described later. “7” as the number of winning balls when the winning port switches 25a to 25d detect winning balls, “4” as the number of winning balls when the starting port switch 22 detects winning balls, the count switch 24 and the V winning switch 23 “15” is set as the number of winning balls when a winning ball is detected.

The total number of winning balls storage buffer 206 is formed in the backup RAM area of the RAM 112, and when a game ball wins at any one of the winning openings for paying out winning balls by winning, a prize paid out according to those winnings. The total number of balls is stored.
The prize ball number buffer 207 stores the number of prize balls paid out specified in one prize ball number signal.

  The type storage area 208 is formed in the backup RAM area of the RAM 112, and when a game ball wins at any one of the winning openings for paying out a winning ball by winning, the number of winning balls to be paid out according to the winning is individually indicated. To remember. This type storage area has an area designation pointer and a number data storage area as shown in FIG.

  When any of the winning opening switches 25a to 25d, the start opening switch 22, the count switch 24, and the V winning switch 23 provided in each winning opening for paying out the winning ball by winning is detected, the game control is performed. The microcomputer 110 reads out the number of prize balls corresponding to the switch that detected the prize ball from the prize ball number table shown in FIG. 12, and adds the value of the area designation pointer to the data of the number of prize balls read out in order of winning. The number data storage area is stored.

  The total winning number counter 209 is for counting the number of game balls detected by the all winning ball detection switch 29. That is, the game control microcomputer 110 uses the total number-of-wins counter 209 to pay out winning balls by winning (winning ports 20a to 20d, normal variable winning ball device 6, special variable winning ball device 7). ) Count the total number of game balls won.

  The total prize ball counter 210 and the sum counter 211 are counters used in a prize ball control process (FIG. 35) which is an internal process of a prize ball process (step S21 in FIG. 26) described later. The total prize ball counter 210 is used for temporary storage of values stored in the total prize ball number storage buffer 206, and the sum counter 211 is used for summation of the number of prize balls indicated by the number data read from the type storage area 208. used.

  The various timers 212 include a plurality of types of timers used for game control. For example, the various timers 212 include a prize ball timer. The prize ball timer is a timer for measuring a time required in prize ball processing (step S21 in FIG. 26) described later.

  14 and 15 are explanatory diagrams illustrating an example of bit allocation of the I / O port 114. FIG. As shown in FIG. 14, the detection signals of the winning port switches 25a to 25d, the gate switch 21, the start port switch 22, the count switch 24, and the V winning switch 23 are input to bits 0 to 7 of the input port 0, respectively. The In addition, detection signals from all winning ball detection switches 29, a power-off signal from the power supply monitoring circuit 117, and a winning ball BUSY signal from the payout control board 15 are input to bits 0 to 2 of the input port 1, respectively. .

  As shown in FIG. 15, a prize ball number signal is output from the output port 0 to the payout control board 15. Further, 8-bit data of the effect control command is output from the output port 1 to the effect control board 12.

From the bits 0 and 1 of the output port 2, the solenoid 81 for performing the movable control of the movable blade piece in the normal variable winning ball device 6 and the solenoid 82 for performing the opening / closing control in the special variable winning ball device 7. Drive signals are output respectively. Further, from the bits 2 to 5 of the output port 2, a prize ball REQ signal (payout request signal), a prize ball excess error signal, a prize ball shortage error signal, and a connection confirmation signal are output to the dispensing control board 15, respectively. .
From the output port 3, the INT signal of the effect control command is output to the effect control board 12.

The switch circuit 115 shown in FIG. 5 takes in the detection signals from the gate switch 21, the start port switch 22, the V winning switch 23, the count switch 24, the winning port switches 25a to 25d and the all winning ball detection switch 29, and controls the game. Is transmitted to the microcomputer 110.
The solenoid circuit 116 drives the solenoids 81 and 82 in accordance with a command from the game control microcomputer 110. The solenoid 81 is connected to the movable wing piece of the normally variable winning ball apparatus 6 through a link mechanism. The solenoid 82 is connected to the opening / closing plate of the special variable winning ball apparatus 7 through a link mechanism.

  The power supply monitoring circuit 117 monitors the power supply voltage supplied from the power supply board 10 and outputs a power-off signal to the game control microcomputer 110 as the power supply is stopped when the voltage drops below a predetermined voltage. is there.

  The payout control board 15 shown in FIG. 5 is connected to the main board 11, the information terminal board 16 and the launch control board 17 by wiring. Further, detection signals from the payout motor position sensor 71, the payout count switch 72, the full tank switch 26, the ball cutting switch 27, and the error release switch 73 are input to the payout control board 15. Further, the payout control board 15 is connected to the payout motor 51, the error display LED 74, and the wiring to the card unit 70.

  The payout control board 15 is equipped with a payout control microcomputer 150, a switch circuit 155, and the like, and the payout control microcomputer 150 performs payout control of game balls and the like based on award balls and ball lending requests. The payout control microcomputer 150 is, for example, a one-chip microcomputer, and includes a ROM 151 that stores a payout control program and the like, a RAM 152 that is used as a work memory, a CPU 153 that performs a payout control operation according to the program, and an I / O port 154. Contains.

  FIG. 16 is a block diagram showing details of a configuration example of the payout control microcomputer 150. As shown in FIG. 16, the payout control microcomputer 150 includes a switch timer memory 251, a switch-on determination value table memory 252, a flag memory 253, a payout motor excitation pattern table 254, a payout motor rotation number buffer 255, and an unpaid-out number counter. 256, a re-payout operation counter 257, and various timers 258.

  The switch timer memory 251 indicates whether the detection signals input from the payout motor position sensor 71, the payout count switch 72, the full tank switch 26, the ball-off switch 27, and the error release switch 73 are in the on state or in the off state. In response to this, a plurality of switch timers to be added or cleared are stored. In this embodiment, as shown in FIG. 17, switch timers are provided at addresses corresponding to sensors and various switches.

  The switch-on determination value table memory 252 shown in FIG. 16 stores a plurality of switch-on determination values for determining whether or not the sensor and various switches are turned on. Specifically, the number of times that the detection signal input from the sensor and various switches is continuously determined to be in the on state is stored as a switch-on determination value.

  In this embodiment, for example, “2” is set as the switch-on determination value of the payout motor position sensor 71 and the payout count switch 72, “50” is set as the switch-on determination value of the full switch 26, “250” is set as the switch-on determination value of the error release switch 73. In the switch-on determination value table memory 252, “30” is set as a switch-off determination value for determining whether or not the ball switch 27 is turned off.

  The flag memory 253 is for setting a plurality of types of flags used for controlling the payout operation of the payout device 50. For example, the flag memory 253 is provided with a payout motor control flag, a main control communication control flag, a payout control flag, an error flag, a winning ball operating flag, a ball lending operating flag, a timer interrupt flag, and the like.

  The payout motor control flag indicates which process should be selected and executed in a payout motor control process (step S54 in FIG. 43) to be described later. The main control communication control flag indicates which process should be selected / executed in the main control communication process (step S56 in FIG. 43) described later. In the payout control flag, instructing which process should be selected and executed in the payout control execution process (step S57 in FIG. 43) described later.

The error flag is a flag that is set when it is detected that various errors have occurred, and includes a plurality of bits corresponding to the various errors.
The winning ball operation flag is a flag that is set when a winning ball is being paid out, and the ball lending operation flag is a flag that is set when a ball lending operation is being performed.
The timer interrupt flag is a flag that is set to an on state every time a predetermined time elapses and a timer interrupt is generated.

  The payout motor excitation pattern table 254 is a table in which data of excitation patterns (payout motors φ1 to φ4) at each step for rotating the payout motor 51 at the time of ball payout is sequentially set. The payout motor rotation frequency buffer 255 is a buffer for storing the number of times the payout motor 51 is rotated.

The unpaid-out number counter 256 adds the number of paid-out game balls specified by these signals based on the reception of the winning ball number signal from the main board 11 or the ball lending request signal from the card unit 70, This counter counts the number of game balls that have not been paid out by subtracting the number of game balls that have actually been paid out.
The re-payout operation counter 257 is a counter that counts the number of re-payout operations in the re-payout operation performed when the game ball payout operation does not end normally and there are unpaid game balls.

  The various timers 258 include a plurality of types of timers used for payout control. For example, the various timers 258 include a main control communication control timer, a payout control timer, and a pre-error recovery timer.

  The main control communication control timer is a timer for measuring a time required in a main control communication process (step S56 in FIG. 43) described later, and is a time related to communication with the game control microcomputer 110 of the main board 11. Used for monitoring, etc. The payout control timer is a timer for measuring the time required in the payout control execution process (step S57 in FIG. 43). The timer before error recovery is a timer used in error processing (step S58 in FIG. 43), and is a timer for measuring the time from when the error release switch 73 is operated until it returns to a normal state. .

18 and 19 are explanatory diagrams illustrating an example of bit allocation of the I / O port 154. FIG.
As shown in FIG. 18, a 4-bit prize ball number signal is input to bits 0 to 3 of the input port 0. In addition, bits 0 to 4 of the input port 1 are input with a discharge motor position sensor 71, a payout count switch 72, a full switch 26, a ball switch 27 detection signal, and an operation signal from the error release switch 73, respectively. The The VL signal, the BRDY signal, and the BRQ signal from the card unit 70 are input to bits 5 to 7 of the input port 1, respectively.

The VL signal is a connection signal output from the card unit 70 when the power of the card unit 70 is turned on, and the BRDY signal is a unit operation signal output from the card unit 70 in response to a ball lending operation. The BRQ signal is a ball lending request signal that is output from the card unit 70 when a predetermined delay time elapses after the BRDY signal is output.
The bit 0 and 1 of the input port 2 are input with a prize ball excess error signal and a prize ball shortage error signal from the main board 11, and bits 2 and 3 are a connection confirmation signal and a prize ball REQ from the main board 11, respectively. A signal is input.

  As shown in FIG. 19, a signal for driving the payout motor 51 is output from bits 0 to 3 of the output port 0. The payout motors φ1 to φ4, which are output signals, are signals representing the excitation pattern of the payout motor 51 that is a stepping motor. From the bit 4 of the output port 0, a launch control signal for the launch control board 17 is output. This firing control signal is output, for example, when the firing motor 61 is not driven such that the card unit 70 is not connected to the payout control board 15, and the drive of the firing motor 61 is stopped.

  From the bit 0 of the output port 1, a prize ball BUSY signal is outputted, and from the bits 1 to 3, prize ball information, ball rental information and ball cut information outputted to the outside of the gaming machine via the information terminal board 16 are outputted. Is output. In addition, the bits 0 to 6 of the output port 2 output signals to the segments a to g of the error display LED 74 which is a 7-segment LED.

  The PRDY signal and EXS signal to the card unit 70 are output from the bits 0 and 1 of the output port 3. The PRDY signal is a pachinko machine operation signal that is output when the power of the pachinko gaming machine 1 is turned on. The EXS signal is activated when the BRQ signal is received from the card unit 70, and is lowered when the lending of the lending ball is completed to notify the card unit 70 that the lending of the ball has been completed. This is a completion signal.

  The switch circuit 155 shown in FIG. 5 takes in detection signals from the payout motor position sensor 71, the payout count switch 72, the full tank switch 26, the ball cut switch 27 and the error release switch 73 and transmits them to the payout control microcomputer 150. To do.

The error cancel switch 73 is a switch for canceling the error state by software reset when the payout control microcomputer 150 is in a predetermined error state.
The error display LED 74 is composed of a 7-segment LED, and displays error codes corresponding to various errors based on an error flag set by the payout control microcomputer 150.

  The information terminal board 16 is for outputting various game-related information output from the payout control board 15 to the outside. For example, the information terminal board 16 includes at least a ball cutting terminal for introducing and outputting the output of the ball cutting switch 27 and a prize ball terminal for outputting prize ball information (prize ball number signal) to the outside. And a ball lending terminal for externally outputting ball lending information (ball lending number signal).

  The launch control board 17 is for controlling the launch operation by the launch device 60 in accordance with the launch control signal from the payout control board 15 and the operation amount of the operation knob 30. The launch control board 17 is connected to wiring from the payout control board 15 and the operation knob 30 and to the launch motor 61. The firing control board 17 fires a hit ball at a speed corresponding to the operation amount by adjusting the driving force of the firing motor 61 according to the operation amount of the operation knob 30.

  The effect control board 12 shown in FIG. 5 is connected to the main board 11, the sound control board 13, the lamp control board 14, the variable display device 4, and the normal symbol display 40. Also, the detection signal of the frame button switch 28 is input to the effect control board 12.

  The effect control board 12 is equipped with an effect control microcomputer 120, a switch circuit 125, and the like. The effect control microcomputer 120 produces an effect based on an effect control command received from the main board 11 via the relay board 18. Take control. The effect control microcomputer 120 is, for example, a one-chip microcomputer, and includes a ROM 121 that stores an effect control program, a RAM 122 that is used as a work memory, a CPU 123 that performs a payout control operation according to the program, and an I / O port 124. Contains.

  The effect control microcomputer 120 displays an image used in the variable display game on the variable display device 4 on the basis of the effect control command output from the main board 11, and turns on / off the normal symbol display 40. I do. The production control microcomputer 120 controls the sound output operation by the speakers 8L and 8R and the lighting / extinguishing operation of the game effect lamp 9.

  FIG. 20 is a block diagram showing details of a configuration example of the effect control microcomputer 120. As shown in FIG. 20, the effect control microcomputer 120 includes a reception command buffer memory 221, an effect control pattern determination table memory 222, a flag memory 223, and various timers 224.

  The reception command buffer memory 221 is provided with a plurality of reception command buffers for storing effect control commands received from the main board 11. In the example shown in FIG. 21, twelve received command buffers are provided, and a received command buffer for storing received commands is designated by a command reception number counter. The command reception number counter takes a value in the range of 0-11. Each reception command buffer is composed of, for example, 1 byte, and by using a plurality of reception command buffers as ring buffers, it is possible to store 6 2-byte effect control commands.

  The effect control pattern determination table memory 222 stores a plurality of effect control pattern determination tables selected based on the effect control command received from the main board 11. Specifically, the effect control pattern determination table memory 222 includes a symbol display control pattern determination table 225 as shown in FIG.

  The symbol display control pattern determination table 225 shown in FIG. 22 stores a plurality of types of symbol display control patterns. The variable display start command sent from the main board 11 to the effect control board 12 designates the symbol display control pattern stored in the symbol display control pattern determination table 225 using the EXT data. Therefore, when receiving the variable display start command from the main board 11, the effect control microcomputer 120 controls the display of the symbols on the variable display device 4 based on the designated symbol display control pattern.

  Of the symbol display control patterns stored in the symbol display control pattern determination table 225, the normal A lose symbol display control pattern and the normal B lose symbol display control pattern are reached in a special symbol game by the variable display device 4. This is a variable display pattern for deriving and displaying a definite symbol of loss. The normal A lose symbol display control pattern and the normal B lose symbol display control pattern have different variable display modes. For example, the variable display speed and the rotation direction of the special symbol are different.

  Reach A losing symbol display control pattern from reach A losing symbol display control pattern is a variable display pattern for deriving and displaying a fixed symbol of losing without reaching after reaching a special figure game by the variable display device 4, Each variable display mode is different. The reach A jackpot symbol display control pattern to the reach D jackpot symbol display control pattern is a variable display pattern in which the display result in the variable symbol special display by the variable display device 4 is a jackpot, and each variable display mode is variable. Different.

  In addition, the symbol display control pattern determination table 225 uses an excessive prize ball error used to notify the variable display device 4 that the number of game balls to be paid out as prize balls is in an excessive state (excess prize ball state). Announcement symbol display control pattern and an award ball shortage error notification symbol display used for notifying the variable display device 4 that the number of game balls to be paid out as a prize ball is insufficient (award ball shortage state). Stores control patterns. The winning ball excessive error notification symbol display control pattern is executed when a winning ball excessive error notification command is received from the main board 11. The winning ball insufficient error notification symbol display control pattern is received from the main board 11. It is a symbol display control pattern executed when a prize ball shortage error notification command is received.

As shown in FIG. 23, each symbol display control pattern includes data for controlling the display state of a special symbol, such as a symbol display control process timer setting value, symbol display control data, etc. The display speed, the size of the pattern to be displayed, the display period in the display state, the character switching timing, and the like are set.
Further, the symbol display control data in the award ball excess error notification symbol display control pattern includes a dedicated symbol for notifying the award ball excessive state, and the symbol display control data in the award ball shortage error notification symbol display control pattern includes Includes a dedicated symbol for notifying the ball shortage state.

  A flag memory 223 shown in FIG. 20 is for setting a plurality of types of flags that are set or cleared in accordance with the display state of the variable display device 4 or the reception of a command from the main board 11. For example, the flag memory 223 is provided with a display control process flag, a variable display start flag, a valid flag, a timer interrupt flag, and the like.

  The display control process flag indicates which process should be selected / executed in the special symbol display control process (to be described later) (step S75 in FIG. 56). The variable display start flag is set to the on state when the variable display start command 80XX (h) is received from the main board 11. The valid flag is set to the on state when the left / middle / right symbol designation commands 90XX (h), 91XX (h), and 92XX (h) are received from the main board 11. The timer interrupt flag is set to the on state every time a predetermined time elapses and a timer interrupt is generated.

  The various timers 224 include a plurality of types of timers used for display control of the variable display device 4. For example, the various timers 224 include a symbol display control process timer, a notification time measurement timer, a variable display time timer, and a monitoring timer. The symbol display control process timer counts down the symbol display control process timer set value set in the symbol display control pattern shown in FIG. 23 so that the variable display device 4 displays the symbol in accordance with the symbol display control pattern. Measure the variable display period for variable display.

  The notification time measurement timer is a timer for measuring a notification time of a prize ball excess error or a notification time of a prize ball shortage error. The variable display time timer is a down counter for measuring the variable display time that is the execution time of the special figure game by the variable display device 4. The monitoring timer is for measuring an elapsed time after the variable display time timer times out. The monitoring timer times out when an effect control command is not received from the main board 11 for a predetermined time or more.

The switch circuit 125 shown in FIG. 5 takes in the detection signal from the frame button switch 28 and transmits it to the effect control microcomputer 120.
The audio control board 13 shown in FIG. 5 is equipped with a drive circuit for driving the speakers 8L and 8R. The effect control microcomputer 120 controls the sound output operation by the speakers 8L and 8R via the sound control board 13.
A drive circuit for driving the game effect lamp 9 is mounted on the lamp control board 14. The effect control microcomputer 120 controls the lighting / extinguishing operation of the game effect lamp 9 via the lamp control board 14.

As shown in FIG. 24, the relay board 18 shown in FIG. 5 regulates the direction in which the signal is transmitted, and the connector 181 for connecting to the main board 11, the connector 182 for connecting to the effect control board 12. A signal direction restricting portion 183 for the purpose.
The signal direction restricting unit 183 includes a diode and a resistor, and relays the transmission of the signal in the direction from the main board 11 to the effect control board 12 due to the property of the diode that allows current to flow only in one direction, and the effect control. Transmission of a signal in the direction from the substrate 12 to the main substrate 11 is blocked.

  The main board 11 performs a process of determining a prize ball payout based on winning. For this reason, there is a case where an illegal signal is input to the main board 11 to illegally generate a big hit to obtain a prize ball. In this case, an illegal signal is not input directly to the main board 11 via the effect control board 12 whose security regulations are looser than that of the main board 11 instead of directly inputting the illegal signal to the main board 11 designed based on strict security regulations. There is a possibility that.

For example, a signal can be input to the effect control board 12 from the frame button switch 28. Accordingly, when an unauthorized board is connected between the frame button switch 28 and the effect control board 12, an unauthorized signal may be input to the main board 11 via the effect control board 12.
However, even in such a case, the function of the relay board 18 can prevent such an illegal signal from being input to the main board 11 via the effect control board 12.

Even if it is suspected that an illegal board is connected to the production control board 12, by confirming that the relay board 18 is connected between the main board 11 and the production control board 12. It is possible to confirm that no illegal signal is input from the effect control board 12 to the main board 11 without searching for the illegal board.
For this reason, as shown in FIG. 2, the relay board 18 is disposed on the cover of the main board 11 at a position where it can be seen at a glance. In addition, the arrangement | positioning position of a relay board | substrate should just be a position which understands that it has installed, and is not limited to the position shown in FIG.

  Conventionally, when there is a suspicion that an unauthorized board (circuit) is attached to the gaming machine 1, it is necessary to check the wiring between the main board 11 and the effect control board 12. Therefore, there is a problem that a person who is not familiar with the structure of the gaming machine takes time to find out which wiring is the wiring between the main board 11 and the effect control board 12. Therefore, as in the present embodiment, a relay board 18 is provided on the wiring between the main board 11 and the effect control board 12, and the relay board 18 is positioned as a mark for confirmation work, so that the structure of the gaming machine is detailed. There is an effect that even a person who is not present can find a confirmation point immediately. That is, for the purpose of finding an illegal board (circuit), it is not an essential requirement to mount a signal direction regulating circuit such as a diode on the relay board 18. In addition, regarding the point that “the relay board is a mark of the confirmation work”, the relay board 18 can be easily found by making the relay board 18 more conspicuous than the other boards. For example, the relay board 18 is installed in a place where it can be easily seen, printed with a color different from that of other boards, or the position of the relay board 18 is indicated on or near the relay board 18 itself. Or you may.

  Next, the operation (action) of the pachinko gaming machine 1 in this embodiment will be described. FIG. 25 is a flowchart showing a game control main process executed by the game control microcomputer 110 mounted on the main board 11. In the main board 11, when the power supply voltage from the power supply board 10 is supplied, the game control microcomputer 110 is activated, and the CPU 113 first executes the game control main process shown in the flowchart of FIG.

  When the game control main process is started, the CPU 113 sets the interrupt prohibition (step S1) and then performs necessary initial settings (step S2). In this initial setting, for example, the RAM 112 is cleared. Further, by setting a register of a CTC (counter / timer circuit) built in the game control microcomputer 110, a timer interrupt is generated periodically (for example, every 2 milliseconds). When the initial setting is completed, interrupt processing is permitted (step S3), and then loop processing is started.

  By executing the game control main process, the timer interrupt is set to be repeated every 2 milliseconds. When the timer interrupt occurs, the CPU 113 executes the game control interrupt process shown in the flowchart of FIG. .

  In the game control interrupt process, as shown in FIG. 26, the CPU 113 first executes a power-off detection process for detecting a power-off signal when the power-supply monitoring circuit 117 is output (step S11). Next, the CPU 113 inputs detection signals from the gate switch 21, the start port switch 22, the V winning switch 23, the count switch 24, the winning port switches 25 a to 25 d, and the all winning ball detection switch 29 through the switch circuit 115. Then, a switch process for determining these states is performed (step S12).

  Subsequently, the CPU 113 performs abnormality diagnosis of the pachinko gaming machine 1 by executing predetermined error processing, and can generate a warning if necessary according to the diagnosis result (step S13). Thereafter, the CPU 113 updates a determination random number update process (step S14) for updating each determination random number such as a jackpot determination random number used for game control, and a display random number update process for updating the display random number (step S15). ) And are executed sequentially.

  Next, the CPU 113 executes special symbol process processing (step S16). In the special symbol process, in order to control the pachinko gaming machine 1 in a predetermined order according to the gaming state, the corresponding process is selected and executed according to the special symbol process flag. Following the special symbol process, the CPU 113 executes a normal symbol process (step S17). In the normal symbol process, a corresponding process is selected and executed according to the normal symbol process flag in order to control the normal symbol display 40 in a predetermined order.

  Further, the CPU 113 executes a predetermined command control process to send a control command from the main board 11 to a sub-side control board such as the effect control board 12 and perform operations such as an effect operation according to the gaming state. Control is instructed (step S18). Further, the CPU 113 performs an information output process for outputting data such as jackpot information, start information and probability variation information supplied to the hall management computer, for example (step S19). Subsequently, the CPU 113 executes predetermined solenoid output processing to control the movable blade piece in the normal variable winning ball device 6 and open / close the open / close plate in the special variable winning ball device 7 when a predetermined condition is satisfied. Driving is performed (step S20).

  Thereafter, the CPU 113 executes predetermined prize ball processing to set the number of prize balls based on the detection signals inputted from the prize opening switches 25a to 25d, the start opening switch 22, the count switch 24, and the V prize winning switch 23. The payout control signal can be output to the payout control board 15 (step S21). Specifically, the number of winning balls indicating the number of winning balls on the payout control board 15 in response to detection of winning based on the winning opening switches 25a to 25d, the start opening switch 22, the count switch 24, and the V winning switch 23 being turned on. A payout control signal such as a signal (prize ball command) is output. The CPU 153 of the payout control board 15 drives the payout device 50 according to the payout control signal.

  FIG. 27 is a flowchart showing details of the switch process executed in step S12. In the switch processing, as shown in FIG. 27, the CPU 113 first receives data input to the input port 0 (step S101). Next, the CPU 113 sets “8” as the number of processes (step S102), and sets the address “0” of the switch timer of the winning opening switch 25a as a pointer (step S103). Thereafter, the CPU 113 calls a switch check processing subroutine to execute switch check processing (step S104).

  FIG. 28 is a flowchart showing details of the switch check process. In this switch check process, as shown in FIG. 28, the CPU 113 first sets data input from the input port 0 as a comparison value (step S201). As shown in FIG. 14, detection signals from the winning port switches 25 a to 25 d, the gate switch 21, the start port switch 22, the count switch 24, and the V winning switch 23 are input to the input port 0.

  Next, the CPU 113 sets clear data (00) (step S202). Then, the CPU 113 loads the value of the switch timer indicated by the pointer from the switch timer memory 201 (step S203). Here, since the switch timer address “0” of the winning opening switch 25a is set in step S103 of FIG. 27, the value of the switch timer for the left winning opening switch 25a shown in FIG. 10 is loaded.

  Next, the CPU 113 shifts the comparison value to the right (in the direction from the upper bit to the lower bit) (step S204). Thereby, the input data is pushed out by the carry flag. In the first right shift, the value of bit 0 of the input port 0 to which the detection signal of the left winning opening switch 25a is input is pushed out by the carry flag.

  Then, the CPU 113 checks the carry flag to determine whether the value is “0” or “1” (step S205). For example, when the detection signal of the winning opening switch 25a is input to the input port 0, the value of the carry flag is “1”, and when the detection signal is not input, the value of the carry flag is “0”. When the value of the carry flag is “0” (step S205; Yes), the CPU 113 determines that the detection signal is off, sets clear data to the switch timer, and returns the value to 0 (step S206). .

  On the other hand, when the value of the carry flag is “1” (step S205; No), the CPU 113 determines that the detection signal is in the on state, and adds 1 to the value of the switch timer (step S207). The CPU 113 determines whether or not the value after addition is “0” (step S208). When the CPU 113 determines that the value after addition is not “0” (step S208; No), the added value is switched. Return to the timer (step S209). By the processing of steps S207 to S209, for example, when the detection signal of the winning port switch 25a is input to the input port 0, the value of the switch timer for the left winning port switch 25a is incremented by one.

  On the other hand, when it is determined that the value after addition is 0 (step S208; Yes), the addition value is not returned to the switch timer. That is, when the value of the switch timer has reached the maximum value (255), no further value is added.

  After that, the CPU 113 adds 1 to the pointer (switch timer address) (step S210). By this processing, the pointer becomes “1”, and points to the address of the switch timer for the right prize opening switch 25b shown in FIG. Next, the CPU 113 subtracts 1 from the number of processes (step S211), and determines whether or not the number of processes has become “0” (step S212). When it is determined that the number of processes is not “0” (step S212; No), the CPU 113 returns to the process of step S202 and executes the processes of steps S202 to S212 again.

  In the second step S203, since the pointer is “1”, the value of the switch timer for the right prize opening switch 25b is loaded. In step S204, the value of bit 1 of the input port 0 to which the detection signal of the right prize opening switch 25b is input is pushed out by the carry flag. For this reason, when the detection signal of the right winning opening switch 25b is input to the input port 0, the value of the switch timer for the right winning opening switch 25b is incremented by 1 by the processing of steps S207 to S209.

  On the other hand, when it is determined that the number of processes has become “0” (step S212; Yes), the CPU 113 ends the switch check process.

  In the switch check process of step S104, the CPU 113 repeats the processes of steps S202 to S212 until the number of processes reaches “0”, whereby the CPU 113 receives the winning port switches 25a to 25d, the gate switch 21, the start port switch 22, For the count switch 24 and the V winning switch 23, it is possible to sequentially determine whether or not the detection signal is in the on state.

In addition, since each switch timer is stored in the switch timer memory 201 in the same order as each bit of the input port, in the process of step S203, the CPU 113 loads the value of the switch timer corresponding to each switch. be able to.
Therefore, in the switch determined that the detection signal is in the ON state, the corresponding switch timer value is incremented by one.

  In this embodiment, since the game control interrupt process is started every 2 milliseconds, the switch process is also executed once every 2 milliseconds. Therefore, the value of the switch timer is incremented by 1 every 2 milliseconds.

  Subsequently, the CPU 113 receives data input to the input port 1 (step S105 in FIG. 27). Next, the CPU 113 sets “1” as the processing number (step S106), and sets the address “8” of the switch timer of the all winning ball detection switch 29 to the pointer (step S107). Thereafter, the CPU 113 calls a switch check processing subroutine to execute the switch check processing (step S108), and ends this switch processing.

  In the switch check process of step S108, the CPU 113 can determine whether or not the detection signal of the all winning ball detection switch 29 is in the ON state.

  FIG. 29 is a flowchart showing details of the error processing executed in step S13 of FIG. In this error processing, the CPU 113 checks the prize ball excess error flag and the prize ball shortage error flag provided in the flag memory 203 to notify the effect control board 12 of the prize ball excess error and the prize ball shortage error. To perform the process.

  First, as shown in FIG. 29, the CPU 113 determines whether or not a prize ball excess error flag provided in the flag memory 203 has been set from the off state to the on state (step S111). When the prize ball excessive error flag is set to the on state (step S111; Yes), a command transmission table regarding the prize ball excessive error notification command is set (step S112). Then, the CPU 113 calls a command set processing subroutine to execute command set processing (step S113).

  On the other hand, when the prize ball excess error flag is not set to the on state (step S111; No), the CPU 113 skips the processes of steps S112 and S113.

  Subsequently, the CPU 113 determines whether or not a prize ball shortage error flag provided in the flag memory 203 has been set from the off state to the on state (step S114). If the winning ball shortage error flag is set to the on state (step S114; Yes), a command transmission table relating to the winning ball shortage error notification command is set (step S115). Then, the CPU 113 calls a command set processing subroutine to execute command set processing (step S116), and ends this error processing.

  On the other hand, when the winning ball shortage error flag is not set to the on state (step S114; No), the CPU 113 skips the processing of step S115 and step S116 and ends the error processing as it is.

  FIG. 30 is a flowchart showing details of the command set processing executed in steps S113 and S116. In the command set process, as shown in FIG. 30, the CPU 113 first saves the address of the command transmission table in a stack or the like and then loads the INT data of the command transmission table pointed to by the pointer into the argument 1 (step S221). The argument 1 is input information for a command transmission process to be described later.

  Next, the CPU 113 adds 1 to the address indicating the command transmission table (step S222). As a result, the address indicated by the command transmission table matches the address of command data 1 (MODE data). Subsequently, the CPU 113 reads the command data 1 (MODE data) and sets it to the argument 2 (step S223). This argument 2 is also input information for a command transmission process to be described later.

  Then, the CPU 113 calls a command transmission processing subroutine to execute command transmission processing (step S224).

  FIG. 31 is a flowchart showing details of command transmission processing. In the command transmission process, the CPU 113 first sets the INT data set in the argument 1 to a work area determined as a comparison value (step S301). Next, the CPU 113 sets the address of the output port 1 to the I / O address (step S302).

  Subsequently, the CPU 113 executes a shift process for shifting the comparison value to the right by 1 bit (step S303). Then, the CPU 113 checks the carry flag to determine whether the value is “0” or “1” (step S304). In this case, the value of the carry flag being “1” means that the rightmost bit in the INT data is “1”. In this embodiment, when the transmission of the effect control command is instructed, the value of the carry flag becomes “1” in this shift processing.

  If it is determined that the value of the carry flag is “1” (step S304; No), the data set in the argument 2 is output to the address set as the I / O address (step S305). . As a result, the MODE data of the effect control command is output to the output port 1.

  On the other hand, when it is determined that the value of the carry flag is “0” (step S304; Yes), the process of step S305 is skipped.

  Thereafter, the contents of argument 1 storing INT data before the start of the shift process are read (step S306), and the read data is output to the output port 3 (step S307). As a result, the INT signal output to the output port 3 becomes high level.

  Subsequently, the CPU 113 sets a predetermined value in the weight counter (step S308), and subtracts the value by 1 until the weight counter value becomes 0 (step S309, step S310; No). When the value of the wait counter becomes 0 (step S310; Yes), clear data (00) is set (step S311), and the set clear data is output to the output port 3 (step S312). As a result, the INT signal output to the output port 3 becomes low level.

  Thereafter, the CPU 113 sets a predetermined value again in the weight counter (step S313), and subtracts the value by 1 until the value of the weight counter becomes 0 (step S314, step S315; No). Then, when the value of the wait counter becomes 0 (step S315; Yes), the CPU 113 ends the command transmission process.

  By the command transmission process in step S224 in FIG. 30, the MODE data of the effect control command is sent from the output port 1 to the effect control board 12.

  Thereafter, the CPU 113 adds 1 to the address indicated by the command transmission table (step S225 in FIG. 30). As a result, the address indicated by the command transmission table matches the address of command data 2 (EXT data). Subsequently, the CPU 113 reads out the command data 2 (EXT data) and sets it as the argument 2 (step S226).

  Then, the CPU 113 determines whether the value of bit 7 (work area reference bit) of the command data 2 is “0” or “1” (step S227). If it is determined that the value of bit 7 is “1” (step S227; No), the contents of the transmission buffer are loaded into the argument 2 (step S228).

  On the other hand, when it is determined that the value of bit 7 is “0” (step S227; Yes), the process of step S228 is skipped. As a result, EXT data is set in the argument 2.

  Then, the CPU 113 calls a command transmission processing subroutine to execute command transmission processing (step S229). By the command transmission processing in step S229, the EXT data of the effect control command is sent from the output port 1 to the effect control board 12.

  FIG. 32 is a flowchart showing an example of the prize ball process executed in step S21 of FIG. In this winning ball process, the CPU 113 executes a winning ball number adding process (step S121), a total winning number adding process (step S122), and a winning ball control process (step S123).

  FIG. 33 is a flowchart showing details of the award ball number adding process executed in step S121 of FIG. In this prize ball number addition process, as shown in FIG. 33, the CPU 113 first sets the start address of the prize ball number table shown in FIG. 12 as a pointer (step S231). Then, the processing number which is data at the address pointed to by the pointer is loaded (step S232). Next, the CPU 113 sets the upper address (8 bits) of the switch timer provided in the switch timer memory 201 in the check pointer (step S233). The upper addresses of all switch timers are the same.

  The CPU 113 adds 1 to the value of the pointer (step S234), and based on the data set in the check pointer (upper address of the switch timer) and the data of the address pointed to by the pointer (lower address of the switch timer) The address of the switch timer is obtained, and the value of the switch timer provided at that address is loaded (step S235). This step is a process that is repeatedly executed until it is determined in step S245 described later that the number of processes is 0. The value that is initially loaded in this step S235 is the value for the left winning mouth switch 25a. This is the value of the switch timer.

  Next, the CPU 113 adds 1 to the value of the pointer (step S236). For example, if the value of the switch timer for the left winning mouth switch 25a is loaded in step S235, the pointer value is set to the number of winning balls when the left winning mouth switch 25a detects a winning ball. The address in the prize ball number table is shown.

  Subsequently, the CPU 113 determines whether or not the switch timer value loaded in step S235 matches the switch-on determination value stored in the switch-on determination value table memory 202 (step S237). For example, when the value of the switch timer for the left winning mouth switch 25a is loaded, it is determined that the left winning mouth switch 25a matches the switch-on determination value “2”.

  The value of the switch timer is incremented by 1 when it is confirmed that the corresponding switch is turned on in the switch process of step S12 in FIG. Since the switch process is started every 2 ms, the value of the switch timer is “2” when the switch is continuously turned on for 4 ms. Therefore, when the switch is continuously turned on for 4 ms, the value of the switch timer matches the switch-on determination value “2”.

  If it is determined in step S237 that the switch timer value matches the switch-on determination value (step S237; Yes), the CPU 113 is set to the address indicated by the pointer value changed in step S236. The number of prize balls, which is the existing data, is loaded, and the loaded value is set as a prize ball addition value (step S238). For example, when the value of the switch timer for the left winning opening switch 25a matches the switch-on determination value “2”, “7” which is the number of winning balls when the left winning opening switch 25a detects a winning ball is set. Loaded to the prize ball addition value.

  Then, the CPU 113 stores the prize ball addition value (number data) in the number data storage area of the type storage area 208 shown in FIG. 13 (step S239). Specifically, the CPU 113 checks the value of the area designation pointer at this time, and stores the prize ball addition value in the number data storage area indicated by the value of the area designation pointer in the type storage area 208. The value of the area designation pointer is changed in the next step S240 or a prize ball waiting process 2 described later. For example, if the value of the area designation pointer at this point is “4” and the value of the switch timer for the left winning mouth switch 25a matches the switch-on determination value “2”, the type storage area 208 The prize ball addition value “7” is stored in the number data storage area corresponding to the area designation pointer “4” (see FIG. 13).

Next, the CPU 113 adds 1 to the value of the area designation pointer (step S240). When 1 is added, when the processing in step S239 is repeatedly executed until it is determined in step S245, which will be described later, that the number of processing is repeated, the prize ball addition value is stored as a type so that the order in which winning is established can be specified. Stored in area 208.
Further, the CPU 113 adds the prize ball addition value set in step S238 to the contents of the total prize ball number storage buffer 206 (step S241).

Next, as a result of the addition, the CPU 113 determines whether or not a carry has occurred in the contents of the total winning ball number storage buffer 206 (step S242), and when a carry has occurred (step S242; Yes). Then, the content of the total number of winning balls storage buffer 206 is set to 65535 (= FFFF (h)) (step S243). On the other hand, when no carry has occurred (step S242; No), step S243 is skipped.
If it is determined in step S237 that the value of the switch timer does not match the switch-on determination value (step S237; No), the CPU 113 skips steps S238 to S243, The process proceeds to step S244.

Subsequently, the CPU 113 subtracts 1 from the number of processes (step S244), and determines whether the number of processes is 0 (step S245). If the number of processes is not 0 (step S245; No), the process returns to step S234. In the process after step S234 for the second time, the number of prize balls for the right prize opening switch 25b is added. As described above, the processing of step S234 to step S244 is repeatedly executed until the number of processing reaches 0, thereby adding the number of prize balls for all the switches for which the number of prize balls is set in the prize ball number table. Is done.
On the other hand, when it is determined in step S245 that the number of processes is 0 (step S245; Yes), the prize ball number adding process is terminated.

  FIG. 34 is a flowchart showing details of the total winning number addition process executed in step S122 of FIG. In this all winning number addition process, as shown in FIG. 34, the CPU 113 first loads the value of the switch timer for the all winning ball detection switch provided in the switch timer memory 201 (step S251). Then, the CPU 113 determines whether or not the value of the loaded switch timer matches the switch-on determination value “2” of all winning ball detection switches stored in the switch-on determination value table memory 202 (step). S252) If they match (step S252; Yes), the value of the total winning number counter 209 is incremented by 1 (step S253).

  On the other hand, if the value of the switch timer does not match the switch-on determination value (step S252; No), the process of step S253 is skipped, and the total winning number addition process is ended as it is. By this total winning number addition processing, the number of detections of the all winning ball detection switch 29 is added to the total winning number counter 209, and as a result, the number of established winnings which are the conditions for paying out a winning ball is counted.

  FIG. 35 is a flowchart showing the prize ball control process in step S123 of FIG. In the prize ball control process, the CPU 113 waits for a prize ball process 1 (step S261), a prize ball transmission process (step S262), a prize ball wait process 2 (step S263), and a prize ball according to the value of the prize ball process flag. One of the waiting processes 3 (step S264) is executed.

  FIG. 36 is a flowchart showing the prize waiting process 1 (step S261) executed when the value of the prize ball process flag is zero. In the award ball waiting process 1, the CPU 113 first determines whether or not the award ball BUSY signal output from the payout control board 15 to the main board 11 is on (step S321). The award ball BUSY signal is confirmed to be off in the award ball waiting process 3 (step S264 in FIG. 35), and the award ball process flag is set to 0 when it is off. Therefore, in the prize ball waiting process 1 executed when the prize ball process flag is 0, it is an abnormal state that the prize ball BUSY signal is in the on state.

  Therefore, the CPU 113 first determines whether or not the prize ball BUSY signal is in the on state. If the prize ball BUSY signal is in the on state (step S321; Yes), the abnormal state flag provided in the flag memory 213 is determined. And an abnormal state code are output (step S322), and the award ball waiting process 1 is finished as it is.

  When it is determined in step S321 that the prize ball BUSY signal is in the off state (step S321; No), the CPU 113 turns off the prize ball REQ signal output to the payout control board 15 (step S323). The output of the prize ball number signal is cleared to 0 (step S324). Note that the process of step S323 is based on the prize ball REQ signal turned on in the previous prize ball control process when the prize ball control process (FIG. 35) has been executed in the past and the prize ball has been paid out. This is a process for turning it off.

  Next, the CPU 113 determines whether or not the value of the prize ball timer is 0 (step S325). When the prize ball control process (FIG. 35) has been executed in the past, the prize ball REQ waiting time is set in the prize ball timer at this stage in the previous prize ball waiting process 3 (step S264 in FIG. 35). Has been. The award ball REQ waiting time is a time for providing an interval between the on-periods of the award ball REQ signal when the award ball is paid out continuously. Accordingly, when the value of the prize ball timer is not 0 (step S325; No), the CPU 113 should not proceed to the next prize ball transmission process, so the CPU 113 subtracts 1 from the value of the prize ball timer (step S326), and continues. The award ball waiting process 1 ends.

  On the other hand, when the value of the prize ball timer is 0 (step S325; Yes), the CPU 113 determines whether or not the content of the total prize ball number storage buffer 206 is 0 (step S327). When the value of the total number of winning balls storage buffer 206 is 0 (step S327; Yes), since there is no winning ball to be paid out, the CPU 113 ends the winning ball waiting process 1 as it is. When the value of the total number of winning balls storage buffer 206 is not 0 (step S327; No), the CPU 113 sets the value of the winning ball process flag to 1 (step S328), and ends the winning ball waiting process 1. When the value of the prize ball process flag is set to 1 in step S328, the prize ball transmission process (step S262) is executed in the next prize ball control process (FIG. 35).

  FIG. 37 is a flowchart showing a prize ball transmission process (step S262 in FIG. 35) executed when the value of the prize ball process flag is 1. In the prize ball transmission process, the CPU 113 first calls a summation process subroutine (step S331). In the summing process, prize ball addition values (number data) individually stored in the type storage area 208 are read in order, the number of prize balls indicated by the plurality of number data is summed, and the number of sums obtained is the prize ball number buffer. The processing stored in 207 is executed.

  Next, the CPU 113 outputs a prize ball number signal designating the number stored in the prize ball number buffer 207 as the number of prize balls to be paid out to the payout control board 15 (step S332), and turns on the prize ball REQ signal. (Step S333). Then, the CPU 113 calls a prize ball number determination processing subroutine (step S334). In this prize ball number determination process, a predetermined prize ball number determination is performed to set a prize ball shortage error flag or a prize ball excess error flag.

  Next, the CPU 113 determines whether or not the prize ball shortage error flag is in an on state (step S335), and if it is in an on state (step S335; Yes), a prize ball shortage error signal is issued. 15 (step S336). On the other hand, when the winning ball shortage error flag is not on, that is, in the off state (step S335; No), the CPU 113 stops outputting the winning ball shortage error signal to the payout control board 15 (step S337). .

  Next, the CPU 113 determines whether or not the excess prize ball error flag is in an on state (step S338). If the prize ball is in an on state (step S338; Yes), a prize ball excess error signal is issued. 15 (step S339). On the other hand, when the prize ball excess error flag is not in the on state, that is, in the off state (step S338; No), the CPU 113 stops outputting the prize ball excess error signal to the payout control board 15 (step S340). . Subsequently, the CPU 113 sets the value of the prize ball process flag to 2 (step S341), and ends this prize ball transmission process.

  FIG. 38 is a flowchart showing the summing process in step S331. In the summation process, the CPU 113 first sets “0” as the initial value to the processing number “K” (step S401), and also sets “0” as the initial value to the summation counter 211 (step S402). The number of processes “K” indicates the number of executions of processes in steps S404 to S409, which will be described later, and as a result, of the number data stored in the number data storage area of the type storage area 208. This indicates the number of pieces of piece number data used for the summation (not the number of prize balls indicated by the piece number data but the number of piece number data itself). Next, the CPU 113 sets the value of the total winning ball number storage buffer 206 in the total winning ball number counter 210 (step S403).

  Next, the CPU 113 reads the count data stored in the count data storage area corresponding to the area designation pointer value “K” of the type storage area 208 having the same value as the process count value “K” (step S404). The number of prize balls indicated by the read number data is added to the total counter 211 (step S405). For example, when the processing number “K” is 0, the number of prize balls indicated by the number data stored in the number data storage area corresponding to the value “0” of the area designation pointer in the type storage area 208 shown in FIG. 13 are read out and added to the summing counter 211.

  Then, the CPU 113 determines whether or not the count value of the summation counter 211 is greater than “15” (step S406). In this embodiment, the maximum value of the prize ball number signal is “15”, and a prize ball number signal designating the maximum number of “15” prize balls to be paid out is transmitted to the payout control board 15. Therefore, in step S406, the CPU 113 determines whether or not the count value of the total counter 211 exceeds “15” that is the maximum value of the prize ball number signal. The maximum value of the prize ball number signal is not limited to “15”. For example, by setting all the bits 0 to 7 of the output port 0 shown in FIG. 15 as the prize ball number signal, The maximum value may be “255”, and in that case, it may be determined whether or not the count value of the total counter 211 exceeds “255” in step S406.

  If it is determined in step S406 that the count value of the sum counter 211 is “15” or less (step S406; No), the CPU 113 stores the count value of the sum counter 211 in the award ball number buffer 207. Thus, the contents of the winning ball number buffer 207 are rewritten (step S407). In step S332 of the above-described prize ball transmission process (FIG. 37), a prize ball number signal designating the value stored in the prize ball number buffer 207 as the number of prize balls to be paid out is transmitted to the payout control board 15. . Next, the CPU 113 sets “K + 1” as the processing number “K” (step S408). That is, 1 is added to the number of processes.

  Next, the CPU 113 determines whether or not the count value of the total winning ball counter 210 and the count value of the sum counter 211 match (step S409), and if they do not match (step S409; No). Return to step S404. Here, the meaning when the count value of the total prize ball number counter 210 matches the count value of the sum counter 211 will be described. In the above-described prize ball number addition process (FIG. 33), the prize ball addition value set in step S238 is individually stored in the number data storage area of the type storage area 208 in step S239, and the total prize in step S241. It is added to the contents of the ball number storage buffer 206. In step S 403, the value of the total winning ball number storage buffer 206 is set in the total winning ball number counter 210.

  Accordingly, the total number of winning balls indicated by all the number data individually stored in the type storage area 208 matches the value stored in the total winning ball number storage buffer 206. That is, in the case where the count value of the total prize-ball counter 210 and the count value of the total counter 211 match in step S409, the processing in steps S404 to S409 is repeatedly executed (may be performed once). A case is shown in which all the number data individually stored in the type storage area 208 are read out, and all the winning ball numbers indicated by the read number data are added up (summed). In other words, a case is shown where there is no more number data to be used for summing in the type storage area 208.

Accordingly, when it is determined in step S409 that the count value of the total prize ball counter 210 matches the count value of the sum counter 211 (step S409; Yes), the CPU 113 sets a match flag ( Step S410), the summing process is terminated.
If only one piece of number data is stored in the type storage area 208, the count value of the total prize ball counter 210 and the count value of the sum counter 211 match in the first process of step S409. Therefore, the summation process with other number data is not performed, and the process proceeds to step S410. In this case, the processing number “K” is 1.

  If it is determined in step S406 that the count value of the sum counter 211 is greater than “15” (step S406; Yes), the number of payout balls that can be specified by the award ball number signal with the count value of the sum counter 211 being 1 Therefore, the CPU 113 skips steps S407 to S410 and ends the summing process as it is.

  Note that in the first processing of step S406 in this summing process where the processing number is “K = 0”, the count value of the summing counter 211 is the number of prize balls indicated by the number data of 1 stored in the type storage area 208. Since the maximum value is “15”, it is determined that the value is “15” or less, and the process proceeds to step S407. Then, when it is determined that the count value of the sum counter 211 is greater than “15” in the second and subsequent processes in which the processing number “K” is 2 or more, the sum process ends.

  When it is determined in the process of step S406 that the count value of the sum counter 211 is greater than “15” and the sum process ends, the award ball number buffer 207 rewritten in the process of step S407 executed before that. Is used in step S332 of the prize ball transmission process (FIG. 37), and a prize ball number signal designating the value as the number of prize ball payouts is output.

This summing process will be specifically described by taking as an example a case where the number data shown in FIG. 13 is stored in the type storage area 208.
When the number data of the example shown in FIG. 13 is stored in the number data storage area of the area designation pointers 0 to 4 in the type storage area 208, a value of “45” is set in the total prize ball number storage buffer 206. ing. When the summing process is started, the CPU 113 sets the processing number K = 0 and the summing counter value = 0 (steps S401 and S402), and then stores the total number of winning balls in the total number of winning ball counters 210 in step S403. The value “45” of the buffer 206 is set.

  Next, the CPU 113 reads the number data “4” stored in the number data storage area of the area designation pointer “0” having the same value as K (step S404), and sets the total counter value “0” to “4”. Are added (step S405). Since the total counter value is “4” and is equal to or less than “15” (step S406; No), the CPU 113 rewrites the value of the prize ball number buffer 207 to “4” (step S407), and sets the processing number K to “4”. “0” is changed to “1” (step S408). Since the total counter value at this point is “4” and does not match the total winning ball counter value “45” (step S409; No), the process returns to step S404.

  In the second step S404, the CPU 113 reads the number data “4” stored in the number data storage area of the area designation pointer “1” having the same value as K at this time (step S404), and adds up the counter value. “4” is added to “4” (step S405). Since the total counter value is “8”, which is equal to or less than “15” (step S406; No), the CPU 113 rewrites the value of the prize ball number buffer 207 to “8” (step S407), and sets the processing number K to “8”. “1” is changed to “2” (step S408). Since the total counter value at this time is “8” and does not match the total winning ball counter value “45” (step S409; No), the process returns to step S404.

In the third step S404, the CPU 113 reads the number data “15” stored in the number data storage area of the area designation pointer “2” having the same value as K at this time (step S404), and adds up the counter value. “15” is added to “8” (step S405). Since the total counter value is “23” and is larger than “15” (step S406; Yes), the CPU 113 ends the total processing.
Then, in step S332 after the summation process in the prize ball transmission process (FIG. 37), a prize ball number signal designating the value “8” stored in the prize ball number buffer 207 as the number of prize balls to be paid out is a payout control board. 15 is output.

  In the summing process in this embodiment, the summing condition is that the number of prize balls after summing is equal to or less than a predetermined value. However, the summation condition is not limited to this. For example, a predetermined number of pieces of number data may always be read from the type storage area 208, and the number of prize balls indicated by the read number data may be summed. Even with this configuration, the number of times the prize ball number signal is transmitted to the payout control board 15 can be reliably reduced as compared with the case where the summation process is not performed.

  FIG. 39 is a flowchart showing the prize ball number determination process in step S334 of FIG. In the winning ball number determination process, the CPU 113 first subtracts the value of the processing number “K” from the count value of the total winning number counter 209 (step S421).

  At this point in time, a prize ball number signal that designates the number of prize balls that have been processed as a prize ball payout number has already been output (step S332 in FIG. 37). Of the number data stored in the 208 number data storage area, the number of pieces of number data that has already been output as a prize ball number signal is shown. For this reason, in step S421, the winning balls 20a to 20d, the normal variable winning ball device (starting winning port) 6, and the special variable winning ball device (large winning port) 7 are determined based on the number of winning game balls. The winning number for which the winning ball number signal based on the winning has already been output is subtracted, and as a result, the total winning number counter 209 has won the winning ball, but the winning ball number signal based on the winning is still output. The number of winnings not stored is stored.

  In addition, when only one piece number data is stored in the type storage area 208 in the summation process and the number of prize balls has not been summed, the number of processes “K” is one, so the prize ball number signal Each time is transmitted, 1 is subtracted from the count value of the total winning number counter 209. This means that if the number of winning balls has not been added, the number of times the winning ball signal is transmitted is subtracted from the count value of the total winning number counter 209 in step S421.

  Next, the CPU 113 determines whether or not the match flag is set (step S422). As described above, the coincidence flag is set when all the winning ball numbers indicated by the number data stored in the type storage area 208 are added in the summing process (FIG. 38). Therefore, when the coincidence flag is set, all winning ball number signals based on winning are output (step S332 in FIG. 37), and the value of the total winning number counter 209 that is subtracted in step S421 is Normally, it is “0”.

The meaning of the value of the total winning number counter 209 after the processing of step S421 when the match flag is set will be described from another viewpoint.
The total winning number counter 209 includes a winning passage 20a to 20d, an ordinary variable winning ball apparatus (starting winning opening) 6, and a special variable winning ball apparatus (large winning opening) 7 where the winning ball paths from the winning openings are joined. The number of game balls detected by the all winning ball detection switch 29 provided in is counted.

  Also, the winning opening switches 25a to 25d provided at the winning openings of the winning openings 20a to 20d, the ordinary variable winning ball apparatus (starting winning opening) 6, and the special variable winning ball apparatus (large winning opening) 7, respectively, and the starting opening When a winning is detected by the switch 22, the V winning switch 23, and the count switch 24, the number of prize balls to be paid out according to each winning is individually stored in the type storage area 208 as number data. When the coincidence flag is set, all the prize balls indicated by the quantity data stored in the type storage area 208 are added together, and a prize ball number signal designating the total number as a prize ball payout number is output. Therefore, the value of the processing number “K” coincides with the total number of game balls detected by any of the winning opening switches 25a to 25d, the start opening switch 22, the V winning switch 23, and the count switch 24 switch.

  As described above, the count value of the total winning number counter 209 and the value of the processing number “K” when the coincidence flag is set are values based on detection of separately provided switches. However, each value is a value obtained by counting the number of game balls won in each of the winning ports 20a to 20d, the normal variable winning ball device (starting winning port) 6, and the special variable winning ball device (large winning port) 7. Therefore, it matches if it is normal. Therefore, the difference is usually “0”.

  Therefore, if it is determined in step S422 that the match flag is set (step S422; Yes), the process proceeds to step S423, and in the subsequent processing, the CPU 113 uses the value of the total winning number counter 209 to award. Determine the number of balls. On the other hand, when it is determined that the coincidence flag is not set (step S422; No), the CPU 113 does not determine the number of prize balls and ends this prize ball number determination process.

  In step S423, the CPU 113 resets the match flag. Next, the CPU 113 determines whether or not the absolute value of the count value of the total winning number counter 209 is greater than or equal to a predetermined value (step S424). The predetermined value can be arbitrarily set. For example, in this embodiment, the winning ball switches 25a to 25d, the starting port switch 22, the count switch 24, and the V winning switch 23 are used to detect a winning ball and an all winning ball detection switch. The predetermined value is set to 125 in consideration of a time lag with respect to the detection of the winning ball by 29 and a value that is suspected of fraud.

  Moreover, you may make it use this different value according to a condition. For example, the predetermined value used in the normal state and the predetermined value used in the big hit gaming state (which may be a probability variation state or a short time state) are set to different values, and are determined according to the current gaming state. You may comprise so that a value may be selected and used.

  If it is determined in step S424 that the absolute value of the count value of the total winning number counter 209 is greater than or equal to a predetermined value (step S424; Yes), the CPU 113 counts the total winning number counter 209. It is determined whether or not is a positive value (step S425). When the count value of the total winning number counter 209 is a positive value (step S425; Yes), the payout of the winning ball corresponding to the winning is made even though the gaming ball is detected by the all winning ball detection switch 29 Since the prize ball number signal designating the number is not output, the CPU 113 sets the prize ball shortage error flag to the on state (step S426), and ends the prize ball number determination process.

  On the other hand, if the count value of the total winning number counter 209 is not a positive value (step S425; No), the payout number of the winning balls is designated even though the gaming balls are not detected by the all winning ball detection switch 29. Since the winning ball number signal to be output is being output, the CPU 113 sets the winning ball excessive error flag to the ON state (step S427), and ends the winning ball number determination process.

  On the other hand, if it is determined in step S424 that the absolute value of the count value of the total winning number counter 209 is smaller than a predetermined value (step S424; No), the CPU 113 determines that it is not a prize ball error state. Both the winning ball shortage error flag and the winning ball excessive error flag are reset to the off state (step S428), and the winning ball number determination process is ended.

  FIG. 40 is a flowchart showing the winning ball waiting process 2 (step S263 in FIG. 35) executed when the value of the winning ball process flag is 2. In the award ball waiting process 2, the CPU 113 determines whether or not the award ball BUSY signal output (turned on) by the payout control microcomputer 150 in response to the award ball REQ signal being turned on is turned on. (Step S351). When the on-state is not turned on, a BUSY start determination time value (for example, 2) is set in the prize ball timer (step S352), and the process is terminated. The BUSY start determination time value is for the game control microcomputer 110 to confirm that the prize ball BUSY signal has been output (turned on) if the prize ball BUSY signal remains on for the time indicated by the value. Is the value of

  Therefore, the CPU 113 checks the value of the prize ball timer when the prize ball BUSY signal is turned on (step S353). If the value is not 0, the value of the prize ball timer is decreased by 1 (step S354), and the process is terminated. When the value of the prize ball timer reaches 0, it is determined that the prize ball BUSY signal is turned on. From the contents of the total prize ball number storage buffer 206, the contents of the prize ball number buffer 207 (the prize ball commanded to the payout control board 15). The number of payouts) is subtracted (step S355).

  Next, the value of the area designation pointer is changed to a value obtained by subtracting the processing number “K” (step S356), and the value of the area designation pointer “n” (n = K, K + 1, K + 2, K + 3) in the type storage area 208 is changed. ..) Is shifted to the area corresponding to the area designation pointer “n−K” (step S357), the value of the prize ball process flag is set to 3 (step S358), and the process is terminated. .

  The above processing will be described by taking as an example a case where the number data of the example shown in FIG. 13 is stored in the type storage area 208. In this case, the value of the area designation pointer is set to “5”, which is one greater than the value of the area designation pointer in which the number data is stored, in step S240 of the prize ball number adding process (FIG. 33). . Further, the value of the processing number “K” is set to “2” in the summation processing (FIG. 38).

  For this reason, in step S356, the value “5” of the area designation pointer in the type storage area 208 is subtracted from the processing number “K = 2”, ie, “3”, and the area of the type storage area 208 is changed in step S357. The number data “15” stored in the number data storage area corresponding to the value “2” of the designated pointer is stored in the area corresponding to the value “0” of the area designation pointer, and the value “3” of the area designation pointer is stored. The number data “15” stored in the corresponding number data storage area is stored in the area corresponding to the area designation pointer value “1” and stored in the number data storage area corresponding to the area designation pointer value “4”. The number data “7” thus stored is stored in an area corresponding to the value “2” of the area designation pointer.

  As described above, in this embodiment, the award ball number signal indicating the award ball payout number is added to the payout control board 15 by adding up the award ball payout numbers indicated by the plurality of pieces of data. Based on the reception of the prize ball BUSY signal from the payout control board 15, the number data transmitted to the payout control board 15 is cleared, and the number data not transmitted to the payout control board 15 is stored in the type storage area. A process of shifting so as to sequentially store from the number data storage area corresponding to the value “0” of the area designation pointer 208 is executed.

  FIG. 41 is a flowchart showing the winning ball waiting process 3 (step S264 in FIG. 35) executed when the value of the winning ball process flag is 3. In the award ball waiting process 3, the CPU 113 checks whether or not the award ball BUSY signal has been turned off (step S361). If not, the BUSY end determination time value is set in the prize ball timer (step S362), and the process ends. The BUSY end determination time value is for confirming that the award ball BUSY signal is no longer output (turned off) if the off-state of the award ball BUSY signal continues for the time indicated by the game control microcomputer 110. Is the value of

  Therefore, the CPU 113 checks the value of the prize ball timer when the prize ball BUSY signal is turned off (step S363). If the value is not 0, the CPU 113 decreases the value of the prize ball timer by 1 (step S364), and processing is performed. Exit. When the value of the prize ball timer becomes 0, the prize ball BUSY signal is surely turned off, and the prize ball REQ signal waiting time is set in the prize ball timer (step S365). Then, the value of the prize ball process flag is set to 0 (step S366), and the process is terminated. The prize ball REQ waiting time is the time measured in the above-described prize ball waiting process 1 (FIG. 36), and the waiting time until the prize ball REQ signal is turned on next (the prize ball payout is continuously executed). In this case, a time for providing an interval between the ON periods of the plurality of prize ball REQ signals).

  Through the processing described above, the game control microcomputer 110 stores the total number of game balls as prize balls to be paid out based on the establishment of the payout condition in the total prize ball number storage buffer 206 so that the payout condition is satisfied. The prize balls (number data) to be paid out for each are stored in the type storage area 208. The total winning ball number storage buffer 206 and the type storage area 208 store the stored contents by a backup power source for at least a predetermined period when the power supply to the gaming machine 1 is stopped.

  Then, the number data stored in the type storage area 208 is read, and the total number of winning balls indicated by the plurality of pieces of data or the number of winning balls indicated by one number data is stored in the winning ball number buffer 207 so as to be specified. . In addition, the game control microcomputer 110 transmits a prize ball number signal for designating a payout number of a predetermined number of prize balls to the payout control board 15 based on the number of prize balls stored in the prize ball number buffer 207. To do. Here, the predetermined number is the number of prize balls stored in the prize ball number buffer 207.

  When predetermined conditions are satisfied, the number data stored in the type storage area 208 is subtracted from the number of prize balls specified by the prize ball number signal from the number of prize balls stored in the total prize ball number storage buffer 206. Among them, the number data transmitted to the payout control board 15 is cleared and a subtraction process for shifting the number data storage area in which the untransmitted number data is stored is performed.

  In this embodiment, the predetermined condition for executing the subtraction process is when a command acceptance signal is received from the payout control board 15, specifically when the prize ball BUSY signal is turned on. When the prize ball BUSY signal is turned on, the payout control microcomputer 150 has not yet paid out the number of prize balls instructed by the prize ball number signal. If the subtraction process is performed when the prize ball payout is completed, a number of illegally illegal acts such as restoring the power supply after illegally stopping the power supply of the gaming machine 1 during the prize ball payout. The prize ball is paid out.

  For example, when 15 prize ball payouts are instructed by the prize ball number signal, the power supply is restored after the power supply of the gaming machine 1 is illegally stopped when 10 prize ball payouts are made. Since the contents of the total winning ball number storage buffer 206 are not subtracted at all, it is assumed that the ten winning balls are not paid out even though ten winning balls are actually paid out. , Will continue to control the prize ball.

  However, in this embodiment, when the prize ball BUSY signal is turned on, that is, when the payout control microcomputer 150 receives the prize ball number signal and transmits the command acceptance signal, the subtraction process is executed. The above fraud can be prevented.

  FIG. 42 is a timing chart showing an example of the output state of the payout control signal. Here, "7", "15", "4", "" are selected by switches for detecting winning (for example, winning opening switches 25a to 25d, starting opening switch 22, count switch 24, V winning switch 23). A case where winnings corresponding to “4” and “4” winning balls are sequentially detected will be described. As described above, when a winning is detected, the number of winning balls corresponding to the winning is stored in the number data storage area corresponding to the value of the area designation pointer in the type storing area 208 in the winning ball number adding process (FIG. 33). At the same time, the number of winning balls corresponding to the winning is added to the total winning ball storage buffer 206.

  As shown in FIG. 42, when a winning according to “7” winning balls is detected, the CPU 113 determines that the winning ball REQ signal is based on the fact that the content of the total winning ball number storage buffer 206 is not zero. Are set in an output state (ON state), and a prize ball number signal indicating 7 is set in an output state (see steps S332 and S333). When the payout control microcomputer 150 receives the prize ball REQ signal, it turns on the prize ball BUSY signal indicating that the prize ball is being paid out and drives the payout motor 51 to output the prize ball number signal. The seven winning ball payout processing shown is executed.

  When the payout process for seven prize balls is completed, the payout control microcomputer 150 turns off the prize ball BUSY signal. In other words, the prize ball payout process is completed by changing the prize ball BUSY signal from the on state to the off state, and the prize ball dispense is completed by changing the prize ball BUSY signal from the on state to the off state. The same notification as when the payout completion signal shown is turned on is performed. When the CPU 113 confirms that seven prize balls have been paid out based on the fact that the prize ball BUSY signal has been turned off, the CPU 113 sets the prize ball REQ signal in a stopped state (off state), and the prize ball. The output of the number signal is stopped (see steps S361, S363, and S365).

  When the payout process based on the winning according to the “seven” prize balls is completed, the CPU 113 sets the prize ball REQ signal to the output state based on the content of the total prize ball number storage buffer 206 being not 0, An award ball number signal indicating 15 is set in an output state. When the payout control microcomputer 150 receives the prize ball REQ signal, it turns on the prize ball BUSY signal indicating that the prize ball is being paid out and drives the payout motor 51 to output the prize ball number signal. The payout process of 15 prize balls shown is executed.

  When the payout process for 15 prize balls is completed, the payout control microcomputer 150 turns off the prize ball BUSY signal. When the CPU 113 confirms that 15 prize balls have been paid out based on the prize ball BUSY signal being turned off, the CPU 113 stops the prize ball REQ signal and outputs the prize ball number signal. To stop.

  In this embodiment, as shown in FIG. 42, the payout process based on the winning according to the “15” prize balls generated later ends the payout process based on the winning according to the “7” prize balls. Wait until you do. That is, when a plurality of winnings occur continuously, the CPU 113 is based on the subsequent winnings until the payout of the winning ball based on the previous winnings is confirmed by the winning ball BUSY signal being turned off. Wait for a prize ball REQ signal to be sent. In other words, when the number of unpaid prize balls is stored in the total prize ball number storage buffer 206 and the type storage area 208 after the subtraction process, the CPU 113 indicates the number of prize balls to be paid designated by the prize ball number signal. After the payout process is completed, the next prize ball number signal is output.

  At the stage where the payout process based on the winnings corresponding to “15” prize balls is completed, the winning detection switch detects the winnings corresponding to “4” winning balls three times. Number data “4” is stored in the number data storage areas corresponding to the area designation pointer values “0” to “2”, respectively, and “12” is stored in the total winning ball number storage buffer 206. Has been.

  If the CPU 113 determines in step S327 of the award ball waiting process 1 (FIG. 36) that the content of the total award ball number storage buffer 206 is not 0, the award ball process flag is executed to execute the award ball transmission process (FIG. 37). Is set to 1 (step S328). The total number of prize balls indicated by all the quantity data stored in the quantity data storage area of the type storage area 208 is 12, which is not more than “15” which is the upper limit value of the number of prize balls that can be specified by the prize ball number signal. Therefore, the CPU 113 sets “12” as the value designated by the prize ball number signal in the summation process (step S331) of the prize ball transmission process. Then, a prize ball number signal indicating 12 is set in an output state (step S332), and a prize ball REQ signal is set in an output state (step S333).

  When the payout control microcomputer 150 receives the prize ball REQ signal, it turns on the prize ball BUSY signal indicating that the prize ball is being paid out and drives the payout motor 51 to output the prize ball number signal. The 12 winning ball payout processing shown is executed. When the payout process for the 12 prize balls is completed, the payout control microcomputer 150 turns off the prize ball BUSY signal. In the award ball waiting process 3 (FIG. 41), the CPU 113 confirms that 12 award balls have been paid out based on the award ball BUSY signal being turned off (step S361). In the waiting process 1 (FIG. 36), the award ball REQ signal is stopped to stop the award ball number signal output (step S323).

  Next, the operation in the payout control board 15 will be described. FIG. 43 is a flowchart showing a payout control main process executed by the payout control CPU 153 mounted on the payout control board 15. When the payout control main process is started, as shown in FIG. 43, the CPU 153 first executes a predetermined initialization process to clear the RAM 152, set various initial values, and determine the payout control start interval. The initial setting of the 2-millisecond timer is performed (step S51).

  Thereafter, the CPU 153 monitors a timer interrupt flag provided in the flag memory 253 (step S52), and executes a loop process until the timer interrupt flag is set (step S52; No). In this embodiment, a timer interrupt occurs every 2 milliseconds in the CPU 153, and when this timer interrupt occurs, a predetermined timer interrupt process is executed, so that a timer interrupt flag provided in the flag memory 253 is obtained. Is set.

  When the occurrence of the timer interrupt is confirmed (step S52; Yes), the CPU 153 clears the timer interrupt flag provided in the flag memory 253 and turns it off, and then performs the payout control interrupt processing of steps S53 to S61. To start.

  In this payout control interrupt process, the CPU 153 first executes a predetermined switch process to fetch detection signals from various switches input to the payout control board 15 and determine the state of the fetched detection signal ( Step S53). This switch process is the same process as the switch process (step S12) in the game control interrupt process (FIG. 26) executed by the game control microcomputer 110 of the main board 11, and includes the payout motor position sensor 71 and the payout count switch. 72, if the input port for inputting the detection signal of each switch of the full switch 26, the ball switch 27, and the error release switch 73 is ON, the value of the switch timer provided for each switch is set. +1.

  Next, the CPU 153 executes a payout motor control process (step S54). In the payout motor control process, when the payout motor 51 is to be driven, a process for outputting the patterns of the payout motors φ1 to φ4 to the output port 0 is performed. And the prepaid card unit control process which communicates with the card unit 70 is performed (step S55).

  Next, the CPU 153 executes main control communication processing for communicating with the game control microcomputer 110 on the main board 11 (step S56). Further, payout control execution processing is performed for performing control for paying out the lent balls in response to a ball rental request from the card unit 70, and for performing control for paying out the number of prize balls indicated by the prize ball number signal from the main board 11. Execute (Step S57).

  Then, the CPU 153 executes error processing for detecting various errors (step S58). Further, the CPU 153 executes an information output process for outputting prize ball information and ball lending information output to the outside of the gaming machine (step S59). Further, the CPU 153 executes a display control process for performing a predetermined display on the error display LED 74 in accordance with the result of the error process (step S60).

  Similarly to the game control microcomputer 110, the payout control microcomputer 150 is provided with an output port buffer which is a RAM area corresponding to the output state of the output port. The CPU 153 stores the contents of the output port buffer. An output process for outputting to the output port is executed (step S61). The output port buffer includes a payout motor control process (step S54), a prepaid card unit control process (step S55), a main control communication process (step S56), a payout control execution process (step S57), an information output process (step S59), It is updated in the display control process (step S60).

FIG. 44 is a flowchart showing the payout motor control process in step S54. In the payout motor control process, the CPU 153 executes any one of steps S501 to S506 according to the value of the payout motor control flag.
In the payout motor normal process (step S501) executed when the value of the payout motor control flag is 0, the CPU 153 sets the pointer to the head address of the payout motor excitation pattern table 254 stored in the ROM 151.

  In the payout motor activation preparation process (step S502) executed when the value of the payout motor control flag is 1, the CPU 153 sets the excitation pattern in bits 0 to 3 of the output port 0 buffer corresponding to the output state of the output port 0. Processing such as setting an initial value is performed.

  In the payout motor slow-up process (step S503) executed when the value of the payout motor control flag is 2, the CPU 153 has a longer interval than in the case of the constant speed process in order to smoothly start the payout motor 51. In addition, bits 0 to 3 of the output port 0 buffer corresponding to the output state of the output port 0 are read by reading the contents of the payout motor excitation pattern table 254 at time intervals that gradually approach the time interval in the case of constant speed processing. Set to. When reading, the contents of the payout motor excitation pattern table 254 at the address pointed to by the pointer are read and the pointer value is incremented by one.

  In the payout motor constant speed process (step S504) executed when the value of the payout motor control flag is 3, the CPU 153 periodically reads the content of the payout motor excitation pattern table 254 and corresponds to the output state of the output port 0. Set to bits 0 to 3 of the output port 0 buffer.

  In the payout motor brake process (step S505) executed when the value of the payout motor control flag is 4, the CPU 153 has a longer interval than in the case of the constant speed process in order to smoothly stop the payout motor 51, and The contents of payout motor excitation pattern table 254 are read at time intervals that gradually move away from the time interval in the case of constant speed processing and set to bits 0 to 3 of the output port 0 buffer corresponding to the output state of output port 0. To do.

  In the ball biting payout motor brake processing (step S506) executed when the value of the payout motor control flag is 5, the CPU 153 smoothly stops the payout motor 51 in the case of rotation for releasing the ball biting. Therefore, the payout motor excitation pattern table 254 has a longer interval than the rotation of the payout motor 51 for releasing the ball biting and at a time interval gradually moving away from the time interval in the case of the constant speed process. The contents are read and set to bits 0 to 3 of the output port 0 buffer corresponding to the output state of output port 0.

  FIG. 45 is a flowchart showing the main control communication process in step S56. In the main control communication process, the CPU 153 performs a main control communication normal process (step S511), a main control communication process (step S512), and a main control communication end process (step S513) according to the value of the main control communication control flag. Execute one of the processes.

  FIG. 46 is a flowchart showing main control communication normal processing (step S511) executed when the value of the main control communication control flag is zero. In the main control communication normal process, if the bit (error bit) in the error flag is on, the CPU 153 ends the process without executing the subsequent processes (step S601). In step S601, if even one bit in the Ehu flag is set, it is determined that an error bit is set.

  On the other hand, if the BRDY signal is on, the CPU 153 ends the process without executing the subsequent processes (step S602). That the BRDY signal is in an ON state means that a ball lending operation is performed and a ball lending request is generated from the card unit 70. That is, when a ball lending request is generated, communication with the game control microcomputer 110 of the main board 11 does not proceed.

  Furthermore, when the ball paying-out operation is in progress, that is, when a later-described prize ball operating flag is set, the processing is terminated without executing the subsequent processing (step S603). Therefore, even when the ball payout operation is in progress, communication with the game control microcomputer 110 of the main board 11 does not proceed. If the connection confirmation signal from the main board 11 is in the off state, the process is terminated without executing the subsequent processes (step S604).

  Further, in this embodiment, it is confirmed whether or not a prize ball shortage error signal has been received from the main board 11 (step S605), and if received, after setting a prize ball shortage error bit in the error flag (step S606). ), And the process is terminated without executing the subsequent processes. Next, the CPU 153 confirms whether or not a prize ball excess error signal has been received from the main board 11 (step S607), and if received, after setting the prize ball excess error bit (step S608), the subsequent processing is performed. The process ends without executing.

  By setting the winning ball shortage error bit and the winning ball excessive error bit in step S606 and step S608, it is determined that the error bit has been set in step S601 of the main control communication normal processing to be performed thereafter. It is controlled not to perform processing.

  Further, in response to the winning ball shortage error bit being set in step S606, the CPU 153 performs control to display “C” on the error display LED 74 in the display control process (step S60), and in step S608, the award is given. In response to the excessive ball error bit being set, the CPU 153 performs control to display “A” on the error display LED 74 in the display control process (step S60).

  If the conditions in steps S601 to S607 are not satisfied, the CPU 153 confirms whether or not the prize ball REQ signal is on (step S609). If the prize ball number signal is on, the prize ball number indicated by the prize ball number signal is added to the contents of the unpaid number counter 256 (step S610), and a process for turning the prize ball BUSY signal on is performed (step S610). Step S611). Specifically, the bit corresponding to the prize ball BUSY signal in the output port 1 buffer corresponding to the output state of the output port 1 is set to the on state. Then, the value of the main control communication control flag is set to 1 (step S612), and the process ends.

  FIG. 47 is a flowchart showing main control communication processing (step S512) executed when the value of the main control communication control flag is 1. In the main control communication process, the CPU 153 confirms whether or not the prize ball REQ signal is on (step S621). If the prize ball REQ signal is off, the prize ball REQ signal error bit in the error flag is set (step S622). This is because it is strange that the prize ball REQ signal is immediately turned off at this stage.

  Next, the CPU 153 performs a process for turning off the prize ball BUSY signal. Specifically, if the prize ball operating flag is not set (step S623), the bit corresponding to the prize ball BUSY signal in the output port buffer corresponding to the output state of the output port 1 is set to the OFF state (step S623). S624). The prize ball operating flag is reset when the prize ball payout is completed in the payout control execution process (step S57). Also, a prize ball REQ signal off monitoring time for monitoring that the prize ball REQ signal is turned off is set in the main control communication control timer (step S625). Then, the value of the main control communication control flag is set to 2 (step S626), and the process ends.

  FIG. 48 is a flowchart showing a main control communication end process (step S513) executed when the value of the main control communication control flag is 2. In the main control communication end process, the CPU 153 confirms whether or not the prize ball REQ signal is turned off (step S631). When it is turned off, the process proceeds to step S635.

  If the prize ball REQ signal is not in the OFF state in step S631, 1 is subtracted from the value of the main control communication control timer (step S632), and it is confirmed whether or not the value of the main control communication control timer has become zero. (Step S633). If the value of the main control communication control timer is not 0, the process is terminated as it is. If the value of the main control communication control timer is 0, the prize ball REQ signal is not turned off within the monitoring time, and the prize ball REQ signal error bit is set in the error flag (step S634), and the process goes to step S635. Transition. In step S635, the value of the main control communication control flag is set to 0, and the process ends.

  FIG. 49 is a flowchart showing the payout control execution process of step S57. In the payout control execution process, when the CPU 153 confirms that the detection signal of the payout count switch 72 is turned on (step S521), the CPU 153 decreases the value of the unpaid-off number counter 256 by 1 (step S522). Thereafter, any one of a payout start waiting process (step S523), a payout motor stop wait process (step S524), and a payout passing wait process (step S525) is executed according to the value of the payout control flag.

  FIG. 50 is a flowchart showing the payout start waiting process (step S523) executed when the payout control flag is 0. In the payout start waiting process, if the error bit is set, the CPU 153 does not execute the subsequent processes (step S641). The error bit in the error flag includes a main board non-connection error bit. The main board non-connection error is set when the connection confirmation signal from the main board 11 is in the OFF state. That is, after the power supply to the gaming machine 1 is started, the CPU 153 starts substantial control on the condition that the connection confirmation signal is turned on.

  The error bits also include an excessive prize ball error bit and an insufficient prize ball error bit set based on the prize ball excess error signal and the prize ball shortage error signal transmitted from the main board 11 (FIG. 46). Steps S606 and S608 of FIG. For this reason, even though the game ball is not detected by the all winning ball detection switch 29, it seems that the gaming ball is detected by the winning port switches 25a to 25d, the start port switch 22, the V winning switch 23 or the count switch 24. To prevent a situation where a payout of a prize ball is executed in spite of the absence of a prize when there is an excess or shortage of prize balls due to a suspected misconduct, etc. it can.

  Note that the error bit confirmed in step S641 can be set arbitrarily. For example, even if the award ball excess error bit or the award ball shortage error bit is set, the error display LED 74 or variable display can be performed without stopping the game by proceeding to the next step S642. Only the error notification by the device 4 can be performed.

  If the BRDY signal is not on (step S642), a process for paying out a prize ball after step S650 is executed. If the BRDY signal is on and the BRQ signal, which is a ball lending request signal, is on (step S643), the EXS signal is turned on (step S644).

  After turning on the EXS signal, the CPU 153 sets a ball lending operation in progress flag (step S645). Then, “25” is set in the unpaid-off number counter 256 (step S646), and “25” is set in the payout motor rotation number buffer 255 (step S647). The payout motor rotation frequency buffer is referred to in the payout motor control process (step S54). That is, in the payout motor control process, control is performed to rotate the payout motor 51 by the number of rotations corresponding to the value set in the payout motor rotation frequency buffer 255.

  Thereafter, the CPU 153 sets a value (specifically, “1”) corresponding to the payout motor start preparation process (step S502) to the payout motor control flag for selecting a process executed in the payout motor control process. (Step S648), the value of the payout control flag is set to 1 (Step S649), and the process is terminated.

  In step S650, CPU 153 checks whether or not the value of unpaid-out number counter 256 is zero. If 0, the process ends. The unpaid-off number counter 256 has a non-zero value (award) when a prize ball REQ signal is received from the game control microcomputer 110 of the main board 11 in step S610 in the main control communication normal process (FIG. 46). The number indicated by the ball number signal) is added. If the value of the unpaid-off number counter 256 is not 0, a prize ball operating flag is set (step S651). Then, the value of the unpaid number counter 256 is set in the payout motor rotation number buffer 255 (step S652), and the process proceeds to step S648.

  FIG. 51 is a flowchart showing a payout motor stop waiting process (step S524) executed when the payout control flag is 1. In the payout motor stop waiting process, the CPU 153 checks whether or not the payout operation has been completed (step S661). For example, the CPU 153 sets a flag to that effect when the payout motor brake process (step S505) in the payout motor control process (FIG. 44) ends, and the payout operation ends by checking the flag in step S661. It can be confirmed whether or not.

  When the payout operation is completed, the CPU 153 sets the payout passing monitoring time in the payout control timer (step S662). The payout passing monitoring time is a time that has a margin in the time from when the last payout ball is paid out by the payout motor 51 until it passes through the payout count switch 72. Then, the value of the payout control flag is set to 2 (step S663), and the process ends.

  FIG. 52 is a flowchart showing the payout passing waiting process (step S525) executed when the value of the payout control flag is 2. In the payout passing waiting process, the CPU 153 first subtracts 1 from the value of the payout control timer (step S671). Then, the value of the payout control timer is confirmed (step S672). If the value is not 0, that is, if the payout control timer has not timed out, the process is terminated. The payout control timer is set with a payout passing monitoring time, and after the game ball paid out last by the payout motor 51 is detected by the payout count switch 72, the processing after step S673 is executed. .

  If the payout control timer has timed out in step S672, the value of the unpaid number counter 256 is confirmed (step S673). If the payout operation is normally executed, all the game balls paid out by the payout motor 51 pass through the payout count switch 72 before the payout control timer times out, and the number of unpaid out by the processing of step S521 and step S522. The value of the counter 256 is 0. When the value of the unpaid-out number counter 256 is a positive value, it means that the number of game balls actually paid out is smaller than the planned payout number (insufficient payout). Further, when the value of the unpaid-out number counter 256 shows a negative value, it means that the number of game balls actually paid out is larger than the planned payout number (excessive payout or excessive payout).

  In step S673, when the value of the unpaid-out number counter 256 is not a positive value (when the payout is not insufficient), the CPU 153 changes the internal state indicating that the payout process is being performed to a state where it is not. . Specifically, when the ball lending operation is being executed, that is, when the ball lending operation flag is set (step S674), the ball lending operation flag is reset (step S675). The EXS signal for the card unit 70 is turned off (step S676). If the ball lending operation flag is not set in step S674, that is, if the prize ball operation flag indicating that the prize ball operation is being executed is set, the award ball operation flag is set. Reset (step S677).

  Thereafter, the re-payout operation counter 257 is cleared (step S678), the value of the payout control flag is set to 0 (step S679), and the process ends. If the payout operation is normally executed, the process of step S678 is unnecessary, but after the corrected payout process described later is executed, the process of step S678 is required. Further, in this embodiment, it is considered that the payout process is normally completed even when the payout is excessive. However, when the payout is excessive, an error may be reported to notify that.

  When it is confirmed in step S673 that the value of the unpaid-off number counter 256 is a positive value, the CPU 153 performs control for the corrected payout process in steps S680 to S686. Here, a maximum of two re-payout operations are performed until the number of game balls to be paid out is paid out. An error bit is set when the number of game balls to be paid out is not paid out even after two re-payout operations are performed.

  In step S680, CPU 153 checks whether or not the value of re-payout operation counter 257 is 2. If the value of the re-payout operation counter 257 is not 2, the value of the unpaid-out number counter 256 is set in the payout motor rotation number buffer 255 (step S681), and the payout motor control flag is set according to the payout motor start preparation process. A value is set (step S682). Further, the value of the re-payout operation counter 257 is incremented by 1 (step S683), the value of the payout control flag is set to 1 (step S684), and the process is terminated. The processing in steps S681, S682, and S684 is the same as the processing in steps S652, S648, and S649 in the payout start waiting process, although the values set in the payout motor rotation frequency buffer 255 are different.

  When confirming that the value of the re-payout operation counter 257 is 2 in step S680, the CPU 153 sets a payout count switch non-passing error bit (payout case error bit) in the error flag (step S685). If the ball lending operation flag is set, the PRDY signal is turned off for the card unit 70 (step S686), and the process is terminated.

  Therefore, in this embodiment, the CPU 153 pays out a prize game medium less than the number of award balls stored in the unpaid-out number counter 256 based on the detection signal from the payout count switch 72. Is detected, the payout device 50 is made to pay out the insufficient prize game medium up to a predetermined number of times (in this example, twice). In this embodiment, if the payout shortage is not resolved even after performing the retry operation for paying out the insufficient prize game media twice, the payout case error bit is set and an error is being generated. (Step S685), the payout case error bit may be set when the shortage of payout is detected for the first time.

  In the payout control execution process, the error bit is checked only in the payout start waiting process shown in FIG. In the payout motor stop waiting process shown in FIG. 51 and the payout passing wait process shown in FIG. 52, the error bit is not checked. Therefore, after the process of step S647 or step S652 is performed and the game ball payout process is started, the payout process is not interrupted even if an error occurs. After the payout of the number of lending balls or prize balls set in step S647 or step S652 is completed, the payout process thereafter is determined by a check in step S641 (for example, designated by the prize ball number signal). When the payout of prize game media based on the number of prize balls paid out is completed).

  The error bit in the Efu flag includes an error bit indicating that the connection confirmation signal from the main board 11 has been turned off. Therefore, even when the connection confirmation signal is turned off, the game ball payout process is stopped at a time when it is best to turn it off.

  In the payout control microcomputer 150, unlike the game control microcomputer 110, the RAM 152 is not backed up. In the case where power is backed up, for example, even if a power failure occurs, an unpaid game based on the value of the unpaid number counter 256 stored in the RAM backed up when the power is restored You can pay out the ball. However, if the RAM is not backed up, information indicating unpaid game balls will be lost if a power failure occurs, resulting in a disadvantage to the player. Therefore, even if an error occurs, by paying out as many game balls as possible, it is possible to prevent the player from being disadvantaged as much as possible.

  53 and 54 are flowcharts showing the error processing in step S58. In the error processing, the CPU 153 checks the error flag, and the set bits are a payout count switch non-passing error bit (payout case error bit), a prize ball REQ signal error bit, a prize ball excess error bit, a prize It is confirmed whether or not any of the sphere shortage error bits (step S531). If these are the only bits that are set, it is checked whether or not the operation signal from the error release switch 73 has been turned on (step S532). When the operation signal is turned on, the error recovery time is set in the pre-error recovery timer (step S533). The error recovery time is the time from when the error release switch 73 is operated until the actual recovery from the error state to the normal state.

  If the operation signal from the error release switch 73 is not in the on state, the value of the timer before error recovery is confirmed (step S534). If the value of the timer before error recovery is 0, that is, if the timer before error recovery is not set, the process proceeds to step S538. If the timer before error recovery is set, the value of the timer before error recovery is decremented by -1 (step S535). If the value of the timer before error recovery becomes 0 (step S536), the payout count of the error flags is set. The switch non-passing error bit (payout case error bit), prize ball REQ signal error bit, prize ball excess error bit, and prize ball shortage error bit are reset (step S537), and the process proceeds to step S538.

  When the processing of step S537 is executed, among the payout count switch non-passing error bit (payout case error bit), the winning ball REQ signal error bit, the winning ball excess error bit, and the winning ball shortage error bit, There may be an error bit that is not in the set state, but there is no problem if the error bit that is not in the set state is reset.

  As described above, in this embodiment, when a payout count switch non-passing error (payout case error), a prize ball REQ signal error, a prize ball excess error, or a prize ball shortage error occurs, the error release switch 73 is set. Since the error is canceled when the button is pressed, the payout prohibition state can be quickly canceled and the payout process can be activated.

  That is, when the process of step S537 is executed and the payout case error bit is reset, the payout control flag is “2” (corresponding to the execution of the payout passage waiting process shown in FIG. 52) and the number of unpaid pieces When the value of the counter 256 is not equal to or less than 0, a game ball payout retry operation is started. That is, when the payout control execution process in step S57 is executed next, if the payout passing waiting process in step S525 is executed, the repayout process is performed again. For example, in the case where a prize ball payout process has been performed, when the value of the unpaid-out number counter 256 is not less than or equal to 0, the process proceeds from step S673 to step S680.

  When the error bit is reset in error processing, the value of the re-payout operation counter 257 is cleared. That is, 0. Accordingly, it is determined in step S680 that the re-payout operation counter 257 is not 2, and the process for starting the re-payout process after step S681 is executed again, and the re-payout process is executed. If the shortage of payout is not solved even after the two re-payout processes are executed, the error state is entered again.

  As described above, when the payout device 50 pays out a game ball, the CPU 153 performs a retry operation for paying out a game ball in advance when no payout count switch 72 detects a game ball. When it is detected that the number of game media paid out is still less than the planned payout amount after performing the corrected payout control to be executed by the payout device 50 up to a predetermined predetermined time (for example, twice) (step) (See S673, Step S680), the control state related to the payout is shifted to the error state, and the correct payout control is restarted on the condition that the error release signal is output from the error release switch 73 in the error state. Execute the process.

  Also, in the payout passing waiting process shown in FIG. 52, even when it is confirmed that the game ball has been paid out as a result of executing the re-payout process, the payout case error bit is not reset. The bit of the payout case error is reset only when the error release switch 73 is operated (specifically, when the error return time after operation elapses) (steps S532 and S537). That is, the state of the payout case error (payout shortage error) is not automatically canceled based on the fact that the game ball has passed the payout count switch 72, etc. Is not released. Therefore, the game store clerk and the like can surely recognize that a shortage of payout has occurred.

  When the error cancel switch 73 is operated and the hardware is reset (reset for the CPU 153), the error cancel switch 73 is operated, for example, the value of the unpaid number counter 256 is set. Will be cleared. However, in this embodiment, since the CPU 153 is configured to perform the re-payout operation again by operating the error release switch 73, the payout process is surely executed, which gives a disadvantage to the player. Can not be.

  Further, even during the execution of the re-payout operation in the error state, the processes in steps S521 and S522 are being performed. That is, even when an error related to payout occurs, if the game ball passes the payout count switch 72, the value of the unpaid-off number counter 256 is subtracted. Therefore, the value of the unpaid-out number counter 256 when returning from the error state is a value reflecting the number of game balls actually paid out. That is, even if an error related to payout occurs, the number of game balls actually paid out can be accurately managed.

  In this embodiment, the unpaid-out number data that is not yet paid out of the planned number of payouts is managed by the unpaid-out number counter 256 at the time of paying out the winning ball or lending ball. The counter for managing the unpaid-out number data may be divided between the time and the lending ball payout time. When the counters for managing the unpaid-out number data are divided, in the processing of step S521 and step S522, the value of the prize ball payout counter is subtracted at the time of paying out the winning ball, and the counter for lending ball payout at the time of paying out the lending ball The value of is subtracted.

  In step S538, the CPU 153 confirms the detection signal of the full switch 26. If the detection signal of the full tank switch 26 is being output (if it is in the on state), the full tank error bit of the EF flag is set (step S539). If the detection signal of the full switch 26 is OFF, the full error bit is reset (step S540).

  In addition, the CPU 153 confirms the detection signal of the ball switch 27 (step S541). If the detection signal of the ball switch 27 is output (if it is in the on state), the ball cut error bit in the error flag is set (step S542). If the detection signal of the ball switch 27 is off, the ball cut error bit is reset (step S543).

  Further, the CPU 153 confirms the state of the connection confirmation signal from the main board 11 (step S544). If the connection confirmation signal is not output (if it is in the off state), the main board unconnected error bit is set ( Step S545). If the connection confirmation signal is output (if it is on), the main board non-connection error bit is reset (step S546).

  In the display control process in step S60, the error display LED 74 performs notification by display (numeric or alphabetic display) according to the error bit in the error flag.

  FIG. 55 is an explanatory diagram showing the relationship between the type of error and the display of the LED 74 for error display. As shown in FIG. 55, when the connection confirmation signal from the main board 11 is turned off, the CPU 153 performs control to display “1” on the error display LED 74 as a main board non-connection error. If the detection signal of the payout count switch 72 does not turn on despite the game ball being paid out, a control is performed to display “4” on the error display LED 74 as a payout case error. When the prize ball REQ signal is turned on at an improper timing, or when the prize ball REQ signal is turned off at an improper timing, “5” is displayed in the error display LED 74 as a prize ball REQ signal error. Control to display.

  When the lower pan is full, that is, when the full switch 26 is turned on, control is performed to display “6” on the error display LED 74 as a full tank error. When the supply ball is insufficient, that is, when the ball cut switch 27 is turned on, control is performed to display “7” on the error display LED 74 as a ball cut error.

  Further, when receiving an excessive prize ball error signal from the main board 11, the CPU 153 performs control to display “A” on the error display LED 74 as an excessive prize ball error. In addition, when a prize ball shortage error signal is received from the main board 11, the CPU 153 performs control to display “C” on the error display LED 74 as a prize ball shortage error.

  In the error state described above, the error state is canceled without transmitting a control signal for returning the error state from the main board 11. In addition, since the display of the error display LED 74 stops when the error state is canceled, the cause of the error state can be specified when the error state is entered, and an error can be detected without transmitting a control signal from the main board 11. Since the display of the display LED 74 is stopped, the number of control signals transmitted from the main board 1 can be reduced, and the control burden on the CPU 113 mounted on the main board 11 can be reduced.

  Among the above errors, when a payout case error, prize ball REQ signal error, prize ball excess error or prize ball shortage error occurs, the error release switch 73 is operated and an operation signal is output from the error release switch 73 (ON When the state is reached, the payout control microcomputer 150 returns to the state before the error occurred.

  In this embodiment, based on the state of the error flag, the CPU 153 performs code display using the error display LED 74, but at the same time, by outputting a firing control signal to the firing control board 17, The launch motor 61 may be disabled so that the launch of the game ball into the game area may be stopped.

  For example, if the game ball is configured to stop firing when the excessive ball error bit or the shortage error bit in the error flag is set, the winning ball will be paid out due to fraud or failure. However, it is possible to prevent the game from progressing despite the occurrence of excess or deficiency. In addition, when the main board disconnection error occurs, if the game ball is configured to stop firing, the game proceeds even though the communication error of the main board disconnection error has occurred. Can be prevented.

  Next, the operation in the effect control board 12 will be described. FIG. 56 is a flowchart showing an effect control main process executed by the effect control CPU 123 mounted on the effect control board 12. When the production control main process is started, the CPU 123 first executes a predetermined initialization process as shown in FIG. 56 to clear the RAM 122, set various initial values, and determine the activation control activation interval. The initial setting of the 33 millisecond timer is performed (step S71).

  Thereafter, the CPU 123 monitors a timer interrupt flag provided in the flag memory 223 (step S72), and executes a loop process until the timer interrupt flag is set (step S72; No). In this embodiment, the CPU 123 generates a timer interrupt every 33 milliseconds. When this timer interrupt occurs, the timer interrupt flag provided in the flag memory 223 is executed by executing a predetermined timer interrupt process. Is set.

  In the CPU 123, an interrupt for receiving an effect control command from the main board 11 is generated separately from the timer interrupt generated every 33 milliseconds. This interruption is an interruption that occurs when the effect control INT signal from the main board 11 is turned on. When an interruption due to the turn-on of the effect control INT signal occurs, the CPU 123 executes a command reception interrupt process.

  In this command reception interrupt process, as shown in FIG. 57, the CPU 123 first saves the value of each register to the stack and then assigns it to the input of the effect control signals CD0 to CD7 in the I / O port 124. The data corresponding to the effect control command is read from the input port (step S81). And it is discriminate | determined whether it is the 1st byte of the production control commands of 2 bytes structure (step S82).

  Here, the first byte (MODE) and the second byte (EXT) of the effect control command are configured to be immediately distinguishable on the receiving side. In other words, the reception side can immediately detect whether the data as MODE or the data as EXT has been received by the first bit. When the first bit of the received command is “1”, it is determined that the valid first byte (MODE data) of the payout control command having a 2-byte configuration has been received.

  When it is determined in step S82 that the MODE data is the first byte (step S82; Yes), the received command is stored in the reception command buffer specified by the command reception number counter in the reception command buffer memory 221. (Step S83) Then, it progresses to the process of step S90. On the other hand, if it is not the first byte of the effect control command (step S82; No), it is determined whether or not the first byte of MODE data has already been received (step S84). Whether or not the first byte of MODE data has been received can be determined by checking the command data stored in the received command buffer.

  If the first byte has already been received (step S84; Yes), it is determined whether or not it is the second byte of the effect control command having a 2-byte configuration (step S85). In this step S85, it is determined whether or not the first bit of the one byte received this time is “0”. If the first bit is “0”, a valid second byte (EXT data) is received. It is determined that When it is determined in step S85 that the data is the second byte of EXT data (step S85; Yes), the received command is stored in the next reception command buffer designated by the command reception number counter (step S86). .

  If it is determined in step S84 that the first byte of the effect control command has not been received (step S84; No), or if it is determined in step S85 that it is not the second byte of EXT data. (Step S85; No), the process proceeds to Step S90.

  When the command data of the second byte is stored in the process of step S86, the value of the command reception number counter is incremented by 2 (step S87), and it is determined whether or not the value is 12 or more (step S88). If it is 12 or more (step S88; Yes), the command reception number counter is cleared and the value is returned to 0 (step S89). On the other hand, when it is less than 12 (step S88; No), the process of step S89 is skipped. Then, the CPU 123 sets the interrupt permission after restoring the saved register (step S90). In this way, the effect control command sent from the main board 11 is stored in the reception command buffer provided in the reception command buffer memory 221 by the command reception interrupt process.

  In this way, the effect control command transmitted from the main board 11 is stored in the reception command buffer, while the occurrence of the timer interrupt is confirmed in the process of step S72 in FIG. When the occurrence of the timer interrupt is confirmed (step S72; Yes), the CPU 123 clears the timer interrupt flag provided in the flag memory 223 and sets it to the OFF state, and then performs the effect control interrupt process of steps S73 to S76. To start. In this effect control interrupt process, the CPU 123 first analyzes the received effect control command by executing a command analysis process (step S73).

  When the command analysis process ends, the CPU 123 executes a counter update process for updating the random, which is used to determine the content of the effect produced by the display on the variable display device 4 and is counted by the random counter ( Step S74), a special symbol display control process is executed (step S75).

  In the special symbol display control process, the corresponding process is selected according to the value of the display control process flag provided in the flag memory 223 in order to control the display operation in the variable display device 4 in a predetermined order according to the display state. Executed. Subsequent to the special symbol display control process, the CPU 123 executes a predetermined normal symbol display control process to control the normal symbol display 40 to be turned on / off, and follows the effect control command received from the main board 11. The normal game is advanced (step S76). When the normal symbol display control process ends, the process returns to step S72.

  FIG. 58 is a flowchart showing the command analysis processing in step S73. When the command analysis process is started, the CPU 123 first checks whether or not there is an effect control command received from the main board 11 (step S701). For example, when it is confirmed that there is a received command because the received command is stored in the received command buffer (step S701; Yes), the received command is read (step S702). It is determined whether or not the middle / right symbol designation commands 90XX (h), 91XX (h) and 92XX (h) are satisfied (step S703).

  If the received command read in the process of step S702 is a left / middle / right symbol designation command (step S703; Yes), the EXT data of the command is the left / middle / right symbol for the special symbol secured in the RAM 122. While storing in the storage area (step S704), the valid flag provided in the flag memory 223 is set to the on state (step S705), and the process returns to the process of step S701. The EXT data of the left / middle / right symbol designation command is data indicating the symbol number of the special symbol. On the other hand, when the received command read in the process of step S702 is not the left / middle / right symbol designation command (step S703; No), it is determined whether or not the command is a variable display start command 80XX (h). Is determined (step S706).

  If the received command read in step S702 is the variable display start command 80XX (h) (step S706; Yes), the EXT data of the command is stored in the variable display pattern storage area secured in the RAM 122 and saved. At the same time (step S707), the variable display start flag provided in the flag memory 223 is set to the on state (step S708), and the process returns to the process of step S701.

  On the other hand, when the received command read in the process of step S702 is not a variable display start command (step S706; No), the read received command is another production control command (for example, special symbol confirmation command A000 (h)). ), And if it is another effect control command, a command reception flag corresponding to the received effect control command provided in the flag memory 223 is set (step S709), and the process of step S701 is performed. Return to When all the received commands are read out in this way (step S701; No), the command analysis process ends.

  FIG. 59 is a flowchart showing the special symbol display control process process executed in step S75 of FIG. In this special symbol display control process, the CPU 123 executes a payout error notification process (step S711) and then waits for a variable display start command reception based on the value of the display control process flag provided in the flag memory 223. (Step S712), display control setting processing (Step S713), variable display processing (Step S714), special symbol stop waiting processing (Step S715), jackpot display processing (Step S716), jackpot end display processing (Step S717) Any one of the processes is selected and executed, and the special symbol display control process is terminated.

  FIG. 60 is a flowchart showing details of the payout error notification process executed in step S711. In the payout error notification process, as shown in FIG. 60, the CPU 123 first determines whether or not a prize ball excess error notification command C000 (h) has been received from the main board 11 (step S801). When the prize ball excessive error notification command is received (step S801; Yes), the CPU 123 performs effect display control for notifying that the prize ball is paid out excessively, and notifies the variable display device 4 of the prize ball excessive error notification. A screen is displayed (step S802). For example, the variable display device 4 displays “Prize balls are paid out excessively”.

  Next, the CPU 123 sets the notification time measurement timer to 10 seconds (step S803). In step S801, if the prize ball excess error notification command has not been received (step S801; No), the CPU 123 skips the processes of steps S802 and S803.

  Next, the CPU 123 determines whether or not a prize ball shortage error notification command C0001 (h) has been received from the main board 11 (step S804). When the prize ball shortage error notification command is received (step S804; Yes), the CPU 123 performs effect display control for notifying that the payout of the prize ball is insufficient, and causes the variable display device 4 to receive a prize ball shortage error. A notification screen is displayed (step S805). For example, a message such as “Insufficient prize balls are paid out” is displayed on the variable display device 4. Next, the CPU 123 sets the notification time measurement timer to 30 seconds (step S806). If the winning ball shortage error notification command is not received in step S804 (step S804; No), the CPU 123 skips the processes in steps S805 and S806.

  Subsequently, the CPU 123 determines whether or not the time set in the notification time measurement timer has elapsed (step S807). If the set time has not elapsed (step S807; No), the payout error notification process is terminated as it is. On the other hand, when the time set in the notification time measurement timer has elapsed (step S807; Yes), the CPU 123 displays a prize ball excess error notification screen or a prize ball shortage error notification screen on the variable display device 4. (Step S808), and this payout error notification process is ended.

  Note that the time set in the notification time measurement timer in steps S803 and S806 can be arbitrarily set. For example, as shown in this embodiment, by displaying a prize ball shortage error notification screen longer than a prize ball excess error, the player can recognize a situation where the player has insufficient payout of prize balls, which is disadvantageous to the player. Can be made easier.

  In this payout error notification process, the CPU 123 automatically displays an error notification screen based on a command from the main board 11 and then automatically waits for an arbitrarily set time without waiting for a command from the main board 11. The display of the notification screen is terminated. Thereby, the number of times of transmission of the command transmitted from the main board 11 to the effect control board 12 can be reduced, and the processing load of the game control microcomputer 110 that transmits the command and the effect control microcomputer 120 that receives the command is reduced. Can be reduced.

  The variable display start command reception waiting process in step S712 of FIG. 59 is a process executed when the value of the display control process flag is the initial value “0”. In this process, the CPU 123 determines whether or not the variable display start flag provided in the flag memory 223 is on. In the command analysis process described above, when the variable display start command is read from the reception command buffer, the variable display start flag is set to the on state. If the variable display start flag is on, the variable display start flag is cleared and turned off, and the value of the display control process flag is updated to “1” corresponding to the display control setting process. On the other hand, when the variable display start flag is off, the variable display start command reception waiting process is terminated.

  The display control setting process in step S713 is a process executed when the value of the display control process flag is “1”. FIG. 61 is a flowchart showing the display control setting process in step S713. In this display control setting process, the CPU 123 first determines a symbol display control pattern corresponding to the variable display pattern designated by the variable display start command (step S811). Specifically, the symbol display control pattern is selected and determined from the symbol display control pattern determination table 225 shown in FIG. 22 according to the data stored in the variable display pattern storage area secured in the RAM 122.

  Subsequently, the CPU 123 sends a predetermined drawing command to a GCL (Graphic Control LSI) having a display device control function and a high-speed drawing function for displaying an image mounted on the effect control board 12, and the like. Display setting for starting variable display of special symbols is performed (step S812). At this time, according to the symbol display control pattern determined in the process of step S811, the symbol display control process timer provided in the various timers 224 is also set.

  Then, by setting the count initial value corresponding to the total variable display time in the variable display pattern designated by the variable display start command to the variable display time timer provided in the various timers 224, the countdown operation is started. Measurement of the variable display time in the special game is started (step S813). Thereafter, the value of the display control process flag is updated to “2”, which is a value corresponding to the variable display process (step S814), and the display control setting process is terminated.

  The variable display processing in step S714 shown in FIG. 59 is executed when the value of the display control process flag is “2”. In this process, every time the symbol display control process timer included in the various timers 224 times out, the CPU 123 switches the reading position in the symbol display control pattern, and the symbol display control process timer set value read from the reading position. The display control of the variable display device 4 is changed according to the symbol display control data. When the variable display time timer provided in the various timers 224 times out, a predetermined timer initial value is set for the monitoring timer, the countdown operation of the monitoring timer is started, and the display control process flag is set. The value is updated to “3”, which is a value corresponding to the special symbol stop waiting process.

  The special symbol stop waiting process in step S715 is a process executed when the value of the display control process flag is “3”. FIG. 62 is a flowchart showing the special symbol stop waiting process in step S715. In this special symbol stop waiting process, the CPU 123 first determines whether or not the special symbol confirmation command A000 (h) transmitted from the main board 11 has been received as an effect control command (step S821). When the special symbol confirmation command has not been received (step S821; No), it is determined whether or not the monitoring timer has timed out (step S822). If it has not timed out (step S822; No), the special symbol stop is awaited. The process ends.

  On the other hand, when the monitoring timer times out (step S822; Yes), the CPU 123 determines that some abnormality has occurred, and performs control to display a predetermined error screen on the variable display device 4 (step S823). Thereafter, the process proceeds to step S826.

  Further, when it is determined that the special symbol confirmation command is received in the process of step S821 (step S821; Yes), the CPU 123 ends the variable display of the special symbol being executed in the variable display device 4, and each symbol. Control is performed to stop and display the confirmed symbol at (step S824), and it is determined whether or not the display result of each symbol is a big hit which is a specific display result (step S825). When it is a big hit (step S825; Yes), the process proceeds to step S827. On the other hand, when it is not a big hit (step S825; No), the process proceeds to step S826.

  Then, the CPU 123 updates the value of the display control process flag to “0” in the process of step S826, and ends the special symbol stop waiting process. In step S827, the value of the display control process flag is updated to “4”, which is a value corresponding to the jackpot display process, and the special symbol stop waiting process ends.

  The jackpot display process in step S716 of FIG. 59 is a process executed when the value of the display control process flag is “4”. In this process, the CPU 123 controls the variable display device 4 to display an image according to the big hit gaming state. For example, the number of rounds corresponding to the big hit round number instruction command received from the main board 11 is displayed on the variable display device 4 so that the player can be notified. When the round game executed in the big hit gaming state becomes the final round (for example, the 16th round), the value of the display control process flag is updated to “5”.

  The big hit end display process in step S717 is a process executed when the value of the display control process flag is “5”. In this process, in response to receiving the jackpot end command B000 (h) from the main board 11, the CPU 123 controls the effect display for notifying that the jackpot gaming state has ended on the variable display device 4. When the effect display ends, the value of the display control process flag is updated to “0” which is an initial value.

In the special symbol display control process of FIG. 59, the display of the award ball excess error notification screen or the award ball shortage error notification screen in the payout error notification process of step S711 is performed using a part of the variable display device 4.
When the variable display using the variable display device 4 in each process of steps S712 to S717 is performed simultaneously with the display of the award ball excess error notification screen or the award ball shortage error notification screen, a general screen composition technique is used. Can be displayed simultaneously.

  Note that a prize ball excess error notification screen or a prize ball shortage error notification screen may be displayed on the entire variable display device 4. In addition, by intermittently displaying the award ball excess error notification screen or the award ball shortage error notification screen on the variable display device 4, the award ball excess error notification or the award ball shortage simultaneously with the variable display in the processing of steps S712 to S717. Error notification can also be made.

  Further, the award ball excess error notification and the award ball shortage error notification are performed using the speakers 8L and 8R and the game effect lamp 9 via the sound control board 13 and the lamp control board 14 connected to the effect control board 12. It may be. In this case, a voice control pattern and a lamp control pattern for notifying a prize ball excess error and a prize ball shortage error are stored in the effect control pattern determination table memory 222 shown in FIG. The CPU 123 of the effect control board 12 reads out a control pattern in response to command reception from the main board 11 and performs effect control of the speakers 8L and 8R and the game effect lamp 9 based on the read control pattern.

  Further, the notification mode may be made different between the excessive prize ball error and the insufficient prize ball error. For example, it is possible to make the player more surely recognize a state in which the payout of a disadvantageous ball that is disadvantageous to the player is insufficient by notifying the shortage error of the winning ball more than the notification of the excessive ball error. Specifically, when notifying a prize ball shortage error, for example, the output volume of the speakers 8L and 8R is increased, or the number of times the game effect lamp 9 is lit / flashed, compared to the case where a prize ball shortage error is reported. It is possible to make it easier to recognize the shortage of prize balls error by increasing the number of times or making the notification screen on the variable display device 4 brighter.

  Further, different devices may be used for notifying a prize ball excess error and notifying a prize ball shortage error. Furthermore, you may change the combination of the apparatus used for alerting | reporting. For example, when notifying a prize ball excess error, the variable display device 4 and the speakers 8L and 8R are notified, and when notifying a prize ball shortage error, a notification by the game effect lamp 9 is further added, thereby giving a prize ball. It is possible to make the player easily recognize the shortage error.

  As described above, according to this embodiment, the detection signal of the all winning ball detection switch 29 is input to the main board 11, and the CPU 113 of the main board 11 counts the total winning number counter 209 that counts this detection signal. Based on the value and the transmission information of the prize ball number signal, it is determined whether the number of prize balls to be paid out from the payout device 50 is excessive or insufficient. For this reason, the processing load on the CPU 113 can be reduced, and it is possible to prevent the winning ball from being paid out due to an illegal act such as transmitting a radio wave to the winning prize switch 25a or the like to cause erroneous detection.

  When the CPU 113 determines that the number of prize balls to be paid out from the payout device 50 is excessive or insufficient, the CPU 113 produces a prize ball excess error notification command or a prize ball shortage error notification command for notifying that effect. Transmit to the control board 12. Then, the CPU 123 of the effect control board 12 controls the variable display device 4 based on the received notification commands, thereby displaying a notification screen indicating that the pachinko gaming machine 1 is in an excessive or insufficient prize ball state. Display. For this reason, the player or the manager of the gaming machine can recognize that the prize ball is in an excessive or insufficient prize ball state via the variable display device 4 that is easy to recognize.

  In addition, when only one piece number data is stored in the type storage area 208 when performing the summing process, the CPU 113 displays a plurality of winning holes detected by the all winning ball detection switches 29 (winning holes 20a to 20d, By subtracting the number of transmissions of the winning ball number signal from the number of all winning balls that have won the ordinary variable winning ball device 6 and the special variable winning ball device 7), and determining whether the absolute value is equal to or greater than a predetermined value. Then, it is determined whether the number of prize balls to be paid out by the payout device 50 is excessive or insufficient.

  Here, when only one piece number data is stored in the type storage area 208 at the time of the summation process, the number of prize balls is not summed, and the prize ball number signal is detected by a detection switch (winning prize). It is transmitted in response to detection by the mouth switches 25a to 25d, the start port switch 22, the count switch 24, and the V winning switch 23). Therefore, if there is no abnormality, the number of transmissions of the winning ball number signal and the number of winning balls detected by the all winning ball detection switch 29 are the same value.

Therefore, it is possible to detect whether the number of prize balls to be paid out is excessive or insufficient without directly counting the prize balls to be paid out from the payout device 50 using the payout count switch 72.
Further, as can be seen from the fact that when the detection switch at each winning opening detects one winning ball, a plurality of winning balls are paid out, the number of winning balls is smaller than the number of winning balls. According to the present invention, since the number of winning balls can be detected based on the number of winning balls smaller than the number of winning balls, the data storage amount can be reduced.

  Further, every time there is a detection by the detection switch for each winning opening, the CPU 113 stores the number of prize balls to be paid out corresponding to the detection in the type storage area 208 as number data. Then, the CPU 113 sums up the number of prize balls indicated by the plurality of pieces of data stored in the type storage area 208 and transmits one prize ball number signal designating the total number of prize balls to the payout control board 15. . Thereby, the number of prize balls originally designated by a plurality of prize ball number signals can be designated by one prize ball number signal. For this reason, the number of times the prize ball number signal transmitted from the main board 11 to the payout control board 15 can be reduced, and the processing load on the CPU 113 of the main board 11 or the CPU 153 of the payout control board 15 can be reduced. .

  In addition, when the CPU 113 transmits the award ball number signal subjected to the summation process to the payout control board 15, instead of subtracting the number of times the prize ball number signal is transmitted from the total winning number counter 209, one prize ball is received. For each transmission of the number signal, the processing number “K” of the summing process is subtracted. Here, the processing number “K” coincides with the number of transmissions in the case of transmitting as a plurality of prize ball number signals without adding up the number of prize balls indicated by the plurality of number data stored in the type storage area 208.

  Therefore, after the number of processes “K” is subtracted from the total winning number counter 209 every time a winning ball number signal is transmitted, and all the number data stored in the type storage area 208 are transmitted, the absolute value is equal to or greater than a predetermined value. It is possible to determine whether or not the number of prize balls to be paid out by the payout device 50 is excessive or insufficient. Thereby, even when the number of transmissions of the winning ball number signal transmitted from the main board 11 to the payout control board 15 is reduced, it is determined whether or not the number of winning balls paid out from the payout device 50 is excessive or insufficient. It can be determined accurately.

  Further, the CPU 123 automatically controls the variable display device 4 based on the prize ball excess error notification command or the prize ball shortage error notification command transmitted from the main board 11 and displays the notification screen for a predetermined time. The display is stopped. Thus, in order to automatically stop the display without waiting for the reception of the effect control command for stopping the display of the notification screen, the number of transmissions of the effect control command transmitted from the main board 11 to the effect control board 12 is set. The processing load on the CPU 113 of the main board 11 or the CPU 123 of the effect control board 12 can be reduced.

  Further, the CPU 113 determines whether the value of the total winning number counter 209 after subtracting the processing number “K” is a positive value or a negative value. If the error notification command is a negative value, a prize ball excess error notification command is transmitted to the effect control board 12. Then, the CPU 123 of the effect control board 12 displays a dedicated screen for notifying that the prize-ball shortage state is present on the variable display device 4 when the prize-ball shortage error notification command is received, Is received, a dedicated screen for notifying that there are excessive prize balls is displayed.

  For this reason, the player or the manager of the gaming machine can easily recognize whether the payout of the prize ball is in an excessive state or an insufficient state. As a result, the player or the manager of the gaming machine can easily investigate the cause and restore the normal state.

  Further, when the CPU 113 determines in the winning ball number determination process that there is an excess of winning balls or an insufficient winning ball, the CPU 113 transmits an excessive winning ball error signal or an insufficient winning ball error signal to the payout control board 15. Then, when the CPU 153 of the payout control board 15 receives the prize ball shortage error signal or the prize ball excess error signal, the CPU 153 stops paying out the prize balls from the payout device 50. For this reason, along with the notification in the variable display device 4, the payout operation of the prize ball by the payout device 50 can be stopped.

  In addition, when the payout of the prize ball from the payout device 50 is stopped, the CPU 153 restarts the payout operation when a signal from the error release switch 73 is input. For this reason, it is possible to prevent the payout of prize balls in an excess of prize balls or a shortage of prize balls.

  Further, the relay board 18 prevents a signal from being transmitted from the effect control board 12 to the main board 11. For this reason, even if an unauthorized signal is input to the effect control board 12, the unauthorized signal can be prevented from being input to the main board 11 via the effect control board 12.

In addition, this invention is not restricted to said embodiment, A various deformation | transformation and application are possible.
In the above-described embodiment, the gaming machine has a variable display start condition (for example, the previous variable display and jackpot game in the variable display device 4) after the variable display execution condition (for example, winning in the normal variable winning ball device 6) is established. A variable display device (for example, the variable display device 4) that variably displays a plurality of types of identification information (for example, special symbols) that can be identified based on the establishment of (end of state). This is a pachinko gaming machine that controls a specific gaming state (for example, a big hit gaming state) advantageous to the player when a predetermined specific display result is obtained.

  However, the present invention is not limited to this, and the gaming machine is disadvantageous for the player due to the detection of the start detection means (for example, the start ball detector) that detects the game medium in the start area provided in the game area. It has a variable winning device (for example, a variable winning ball device) that performs a starting operation (for example, an opening operation) that becomes a first state advantageous to the player from the second state, in a specific area provided in the variable winning device. A specific gaming state (for example, jackpot) that controls the variable winning device to the first state in a specific manner that is more advantageous for the player than the starting operation by detection of a specific detection means (for example, a specific ball detector) that detects the gaming medium It may be a pachinko gaming machine that generates a gaming state.

  In addition, the gaming machine of the present invention is in a state where a right is generated on condition that a game ball is detected by special detection means (for example, a specific ball detection switch or a special region switch) provided in a special region (for example, a special device operation region). During the period in which the right is generated, the game ball is moved by the start detection means (for example, the operation ball detection switch or the start port switch) provided in the start area (for example, the start port in the start winning device or the start winning device). Based on the detection, it is possible to perform control to change the special variable winning device (for example, the big prize opening) from a disadvantageous state (for example, a closed state) to the player (for example, a closed state) for the player (for example, an open state). Possible pachinko machines may be used.

  Furthermore, the gaming machine of the present invention can start a game by setting the number of bets for one game, and the display result of a variable display device (for example, a variable display device) is derived and displayed. It may be a slot machine in which a predetermined winning can be generated according to the display result of the variable display device after the game is over.

  1 to 4, block configurations shown in FIGS. 5, 7, and 24, signal contents shown in FIG. 6, command configurations shown in FIG. 8, FIGS. 9 to 13, 16, 17, Memory configuration shown in FIGS. 20 to 23, port allocation shown in FIGS. 14, 15, 18, and 19, flowchart configurations shown in FIGS. 25 to 41, FIGS. 43 to 54, and 56 to 62, FIG. The timing chart configuration shown in FIG. 5 and the error display shown in FIG. 55 can be arbitrarily changed and corrected without departing from the spirit of the invention.

It is a front view of the pachinko gaming machine in the embodiment of the present invention. It is a rear view of the pachinko gaming machine in the embodiment of the present invention. It is the front view and sectional drawing which show the payout apparatus. It is a disassembled perspective view which shows the payout apparatus. It is a block diagram which shows the system structural example centering on a main board | substrate, a payout control board, and an effect control board. It is explanatory drawing which shows an example of the content of the payout control signal. It is a block diagram which shows the signal line etc. which are used for transmission / reception of a payout control signal. It is a figure which shows an example of the content of an effect control command. It is a figure which shows the structural example of the microcomputer for game control. It is a figure which shows the structural example of a switch timer memory. It is a figure which shows the structural example of a command transmission table memory. It is a figure which shows the structural example of a prize ball number table memory. It is a figure which shows the structural example of a classification storage area. It is a figure which shows the bit allocation example of an input port. It is a figure which shows the bit allocation example of an output port. It is a figure which shows the structural example of the microcomputer for payout control. It is a figure which shows the structural example of a switch timer memory. It is a figure which shows the bit allocation example of an input port. It is a figure which shows the bit allocation example of an output port. It is a figure which shows the structural example of the microcomputer for production control. It is a figure which shows the structural example of a reception command buffer memory. It is a figure which shows the structural example of the table memory for effect control pattern determination. It is a figure which shows the structural example of a symbol display control pattern. It is a block diagram which shows the structural example of a relay board | substrate. It is a flowchart which shows a game control main process. It is a flowchart which shows a game control interruption process. It is a flowchart which shows the detail of the switch process in FIG. It is a flowchart which shows the detail of the switch check process in FIG. It is a flowchart which shows the detail of the error process in FIG. It is a flowchart which shows the detail of the command set process in FIG. FIG. 31 is a flowchart showing details of command transmission processing in FIG. 30. FIG. It is a flowchart which shows the detail of the prize ball process in FIG. It is a flowchart which shows the detail of the prize ball number addition process in FIG. It is a flowchart which shows the detail of all the winning-piece number addition processing in FIG. It is a flowchart which shows the detail of the prize ball control process in FIG. It is a flowchart which shows the detail of the prize ball waiting process 1 in FIG. It is a flowchart which shows the detail of the prize ball transmission process in FIG. It is a flowchart which shows the detail of the summation process in FIG. It is a flowchart which shows the detail of the prize ball number determination process in FIG. It is a flowchart which shows the detail of the prize ball waiting process 2 in FIG. It is a flowchart which shows the detail of the prize ball waiting process 3 in FIG. It is a timing chart which shows the example of the output state of a payout control signal. It is a flowchart which shows the payout control main process. It is a flowchart which shows the detail of the payout motor control processing in FIG. It is a flowchart which shows the detail of the main control communication process in FIG. It is a flowchart which shows the detail of the main control communication normal process in FIG. It is a flowchart which shows the detail of the process during main control communication in FIG. It is a flowchart which shows the detail of the main control communication completion | finish process in FIG. It is a flowchart which shows the detail of the payout control execution process in FIG. It is a flowchart which shows the detail of the payout start waiting process in FIG. It is a flowchart which shows the detail of the payout motor stop waiting process in FIG. It is a flowchart which shows the detail of the payout passage waiting process in FIG. It is a flowchart which shows the detail of the error process in FIG. It is a flowchart which shows the detail of the error process in FIG. It is explanatory drawing which shows the relationship between the display of error display LED, and the kind of error. It is a flowchart which shows a display control main process. It is a flowchart which shows a command reception interruption process. 57 is a flowchart showing details of command analysis processing in FIG. 56. It is a flowchart which shows the detail of the special symbol display control process process in FIG. 60 is a flowchart showing details of a payout error notification process in FIG. 59. 60 is a flowchart showing details of display control setting processing in FIG. 59. It is a flowchart which shows the detail of the special symbol stop waiting process in FIG.

Explanation of symbols

1 ... Pachinko machine
2… Game board
3 ... Frame for gaming machines
4 ... Variable display device
5… Passing gate
6 ... Ordinary variable winning ball device
7 ... Special variable winning ball device
8L, 8R ... Speaker
9 ... Game effect lamp
10… Power supply board
11 ... Main board
12 ... Production control board
13 ... Voice control board
14 ... Lamp control board
15 ... Dispensing control board
16 ... Information terminal board
17 ... Launch control board
18… Relay board
19 ... Frame button
20a ~ 20d ... Winner
21… Gate switch
22… Start switch
23… V winning switch
24 ... Count switch
25a-25d ... Winner switch
26 ... Full tank switch
27… Ball switch
28 ... Frame button switch
29… All winning ball detection switches
30 ... Operation knob
31 ... Bump supply tray
32 ... Surplus ball tray
40 ... Normal symbol display
41 ... Storage tank
42… payout case
43 ... guide rails 44a, 44b, 55 ... ball passage
45a-45c ... Case
46a, 46b ... holes
50 ... Dispensing device
51 ... Dispensing motor
52, 53 ... Gear
54… Cam
60… Launcher
61… Fire motor
70… Card unit
71 ... Dispensing motor position sensor
72… Dispensing count switch
73 ... Error release switch
74 ... LED for error display
81, 82 ... Solenoid
110 ... Game control microcomputer 111, 121, 151 ... ROM
112, 122, 152 ... RAM
113, 123, 153 CPU
114, 124, 154... I / O ports 114a, 154a... Input circuit 114b, 154b... Output circuit 115, 125, 155.
116 ... Solenoid circuit
117 ... Power supply monitoring circuit
120 ... Production control microcomputer
150 ... Discharge control microcomputer 181, 182 ... Connector
183 ... Signal direction regulating unit 201, 251 ... Switch timer memory 202, 252 ... Switch-on determination value table memory 203, 223, 253 ... Flag memory
204 ... Command transmission table memory
205 ... Prize ball number table memory
206 ... Total prize ball number storage buffer
207… Prize ball number buffer
208 ... Type storage area
209… All winnings counter
210 ... Total prize ball counter
211 ... Summing counter
221 ... Receive command buffer memory
222 ... Production control pattern determination table memories 212, 224, 258 ... Various timers
225 ... Symbol display control pattern determination table
254 ... Discharge motor excitation pattern table
255 ... Discharge motor rotation count buffer
256 ... Unpaid number counter
257 ... Re-payout operation counter

Claims (7)

A plurality of winning areas provided in a game area where a player plays a predetermined game using a game medium, and a payout for paying out a prize game medium, which is a game medium as a prize, based on a predetermined payout condition being satisfied In a gaming machine comprising: means and an effect means for executing a predetermined effect on the basis that a predetermined effect condition is established,
A game control microcomputer for controlling the progress of the game;
A winning detection means that is provided corresponding to each of the plurality of winning areas, and that detects a winning gaming medium that is a gaming medium that has won the winning area;
All winning detection means for detecting a winning game medium on the downstream side of the position where the winning game media that have won the plurality of winning areas merge;
A payout control microcomputer for controlling a payout operation of the prize game medium by the payout means based on a control command transmitted from the game control microcomputer;
Based on a control command transmitted from the game control microcomputer, an effect control microcomputer for controlling the effect by the effect means;
Relay means for relaying communication between the game control microcomputer and the effect control microcomputer;
With
The game control microcomputer is:
A payout control command sending means for sending a designated payout control command for designating the number of prize game media to be paid out from the payout means to the payout control microcomputer in response to detection by the winning detection means;
A designated payout control command transmission count counting means for counting the number of transmissions of the designated payout control command by the payout control command transmitting means;
A total winning number counting means for counting the number of winning game media detected by the total winning detecting means;
The difference between the value of the designated payout control command transmission count counted by the designated payout control command transmission count counting means and the value of the number of winning game media counted by the total winning count counting means is calculated as a winning number difference. Winning quantity difference calculating means,
A winning number difference determining means for determining whether or not the winning number difference calculated by the winning number difference calculating means is a predetermined value or more;
When the winning number difference determining means determines that the winning number difference is greater than or equal to a predetermined value, an effect control command for notifying determination information based on the determination is transmitted to the effect control microcomputer as the control command. Production control command transmission means;
Including
The production control microcomputer is:
Effect control command receiving means for receiving the effect control command transmitted by the effect control command transmitting means;
Based on the effect control command received by the effect control command receiving means, a notification effect control means for controlling the effect means to execute an effect for notifying determination information based on the determination by the winning number difference determination means;
including,
A gaming machine characterized by that. The game control microcomputer is:
A prize game medium number information storage means for individually storing prize game medium number information for specifying the number of prize game media to be paid out in correspondence with the detection by the winning detection means from the payout means for each detection by the winning detection means. When,
Number information reading means for reading out a plurality of prize game medium number information from among the prize game medium number information stored in the prize game medium number information storage means;
A total number calculating means for calculating the total number by adding the number of the prize game media specified by the plurality of the prize game medium number information read by the number information reading means;
A total information number counting means for counting the total information number which is the number of the prize game medium number information read by the number information reading means for calculating the total number by the total number calculating means;
A total designation payout control command transmission means for sending a total designation payout control command that designates the total number calculated by the total number calculation means as the number of premium game media to be paid out from the payout means;
When the total designation payout control command transmission means transmits the total designation payout control command, the prize game medium number information read by the number information reading means for calculating the total number by the total number calculation means is the prize. A prize game medium number information update means for updating the prize game medium number information storage means by deleting from the prize game medium number information stored in the game medium number information storage means;
The designated payout control command transmission number counting means is
Each time the payout control command transmission means transmits 1 specified payout control command, 1 is added, and every time the total specified payout control command transmission means transmits 1 total specified payout control command, the total number of information Including a command transmission number pseudo-counting unit that adds the total number of information counted by the counting unit and sets the added value as the value of the number of transmissions of the designated payout control command.
The gaming machine according to claim 1. The notification effect control means includes:
Based on the effect control command received by the effect control command receiving means, the effect means is controlled, and an effect of notifying the determination information based on the determination by the winning number difference determining means is executed for a predetermined time, and the predetermined time has elapsed. After that, including a fixed time notification effect control means for stopping the effect,
The gaming machine according to claim 1 or 2, characterized in that. The game control microcomputer is:
The value of the designated payout control command transmission number of the designated payout control command transmission number counting means is the winning value of the all winning number counting means when the winning number difference judging means determines that the winning number difference is not less than a predetermined value. A winning number comparison judging means for judging whether or not it is larger than the value of the number of game media,
The production control command transmission means
When it is determined by the winning number comparison determining means that the value of the designated payout control command transmission number of the designated payout control command transmission number counting means is larger than the value of the number of winning game media in the total winning number counting means, the determination is made. A payout excessive effect control command transmitting means for transmitting, as the effect control command, a payout excessive effect control command for instructing the notification of the determination information based on the effect means;
When it is determined by the winning number comparison determining means that the value of the designated payout control command transmission number of the designated payout control command transmission number counting means is not larger than the value of the number of winning game media of the total winning number counting means, the determination A payout insufficient effect control command transmission means for transmitting, as the effect control command, a payout insufficient effect control command for instructing to notify the determination information based on the effect means by the effect means,
The notification effect control means includes:
When the effect control command receiving means receives the payout excessive effect control command transmitted by the payout excessive effect control command transmitting means, the payout excess notification is made to control the effect device to execute the notification effect of the first aspect. Production control means;
When the effect control command receiving means receives the payout insufficient effect control command transmitted by the payout insufficient effect control command transmitting means, the effect device is controlled to control the effect device in a second mode different from the first mode. A payout shortage notification effect control means for executing a notification effect,
The gaming machine according to any one of claims 1 to 3, wherein the gaming machine is characterized by that. The payout control command transmission means includes:
An abnormal payout control command indicating that an abnormality has occurred in the payout of the prize game medium by the payout means when the winning number difference determination means determines that the winning number difference is greater than or equal to a predetermined value as the control command. An abnormal payout control command transmission means for sending to the payout control microcomputer;
The payout control microcomputer includes:
An abnormal payout control command receiving means for receiving the abnormal payout control command transmitted by the abnormal payout control command transmitting means;
A payout operation stopping means for controlling the payout means based on the abnormal payout control command received by the abnormal payout control command receiving means to stop the payout operation of the prize game medium;
The gaming machine according to any one of claims 1 to 4, characterized in that: A payout operation stop release signal output means for outputting a payout operation stop release signal for releasing the stop of the payout operation in response to an artificial operation when the payout operation of the prize game medium by the payout means is stopped;
The payout control microcomputer includes:
A payout operation restarting means for restarting the payout operation stopped by the payout operation stop means in response to the output of the payout operation stop release signal by the payout operation stop release signal output means;
The gaming machine according to claim 5, wherein: The relay means is
Signal transmission direction for relaying transmission of the effect control command from the effect control command transmitting means to the effect control command receiving means and for preventing signals from being transmitted from the effect control microcomputer to the game control microcomputer Including regulatory measures,
The gaming machine according to any one of claims 1 to 6, wherein the gaming machine is characterized by that.

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