JP2006128531A - Forming method of bump, and packaging method of semiconductor chip - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve the reliability of packaging method of semiconductor chip which connects an electrode and a bump of semiconductor chip which are formed on a substrate using adhesives containing conductive particles. <P>SOLUTION: A metal layer 15 is formed in the same thickness as passivation film 3 by a non-electrolytic plating method inside a passivation film opening 31. This makes a ground at a plating of bump 5 flat. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a method for mounting a semiconductor chip and a method for forming bumps of a semiconductor chip used in this method.

  Conventionally, as a method for mounting a semiconductor chip, there is a method of connecting an electrode formed on a substrate and a bump of the semiconductor chip using an adhesive containing conductive particles. For example, when mounting a driving IC chip on a liquid crystal panel, a tape-like adhesive containing bumps formed on the IC chip and containing fine conductive particles in an adhesive layer on the electrode surface of the liquid crystal panel The IC chip is placed on the IC chip and heated and pressed. In this method, the conductive particles in the tape-like adhesive are brought into contact with both the bumps and the electrodes in a state where the upper and lower sides are crushed, thereby electrically connecting the electrodes and the bumps with the conductive particles.

  As a method of forming bumps on the IC chip, first, a passivation film is provided on the bump forming surface of the IC chip, and openings are formed on the terminal electrodes of the passivation film. Next, after providing a barrier metal layer, a photoresist film is formed and patterned to form a resist pattern in which bump formation portions are opened. Next, a metal layer (bump) is formed in the resist opening by electrolytic plating.

  FIG. 3 is a partial cross-sectional view showing an IC chip on which bumps are formed by this method. Reference numeral “1” indicates an IC chip, “2” indicates a terminal electrode, “3” indicates a passivation film, and “4”. Indicates a barrier metal layer, and “50” indicates a bump. In this method, as shown in the figure, a recess 51 is formed on the upper surface of the bump 50 due to the step formed by the opening of the passivation film 3. When the concave dimension of the concave portion 51 is about the same as the diameter of the conductive particles to about に 入 っ, the conductive particles entering the concave portion 51 are not sufficiently crushed and the conductive particles contributing to conduction are insufficient. There is.

As a method for solving this problem, the following Patent Document 1 discloses that the opening area of the passivation film is made as small as possible, and the opening area of the concave portion formed on the upper surface of the bump is made as small as possible. It is described that the number of contributing conductive particles is increased and highly reliable mounting is performed.
JP-A-11-31698

  The present invention relates to a method for mounting a semiconductor chip in which an electrode formed on a substrate and a bump of a semiconductor chip are connected using an adhesive containing conductive particles. It is an object to increase the number of conductive particles that contribute to high-reliability and enable highly reliable mounting.

  In order to solve the above problems, the present invention provides a step of providing a passivation film on a bump forming surface of a semiconductor chip and opening each terminal electrode of the passivation film, and an electroless plating is performed on the opening formed in the step. Forming a metal layer with the same thickness as the passivation film by a method, forming a resist pattern in which an upper portion of the metal layer is opened after the formation of the metal layer, and opening the resist pattern And a step of forming a metal layer for the bumps by an electrolytic plating method.

According to this method, the upper surface of the bump of the semiconductor chip is formed flat. Therefore, the bump of the semiconductor chip on which the bump is formed by this method and the electrode formed on the substrate are connected by using an adhesive containing conductive particles, so that the bump and the electrode on the substrate are connected. The conductive particles are surely crushed.
Therefore, since the number of conductive particles contributing to conduction increases compared to the case of using a semiconductor chip on which bumps are formed by a conventional method, the method of connecting using an adhesive containing conductive particles is highly reliable. Can be implemented.

Hereinafter, embodiments of the present invention will be described.
In this embodiment, bumps are formed on a semiconductor chip by the method shown in FIG.
First, as shown in FIG. 1A, a passivation film 3 is provided on a bump formation surface of an IC chip (semiconductor chip) 1 and an opening is formed on each terminal electrode 2 of the passivation film 3. Next, the metal layer 15 is formed in the passivation film opening 31 with the same thickness as the passivation film 3 by electroless plating. FIG. 1B shows this state.

  The passivation film 3 is usually formed with a thickness of about 500 nm to 1400 nm (0.5 μm to 1.4 μm). Therefore, the metal layer 15 is also formed with the same thickness or a thin thickness in the range of −0.5 μm. The metal layer 15 is preferably not thicker than the passivation film 3 (that is, does not protrude from the passivation film opening 31), and if thick, the thickness is within +0.2 μm at most.

The material of the metal layer 15 includes nickel (Ni) when the terminal electrode 2 is aluminum (Al). In that case, electroless Ni plating is performed after zincate treatment (zinc displacement plating).
Next, as shown in FIG. 1C, the barrier metal layer 4 is formed on the passivation film 3 and the metal layer 15. As the barrier metal layer 4, for example, tungsten titanium (TiW) and gold are formed by sputtering.

  Next, as shown in FIG. 1 (d), a resist pattern 9 is formed on the barrier metal layer 4, in which an opening 91 is provided in the bump forming portion. Next, in this state, a bump metal layer (for example, gold) is formed in the resist opening 91 by electrolytic plating. Here, since the upper surface of the barrier metal layer 4 in the opening 91 is flat by providing the metal layer 15, the upper surface of the metal layer (that is, the bump 5) is flat.

Next, after removing the resist pattern 9 and annealing, the barrier metal layer 4 existing outside the bump 5 is removed. FIG. 1 (e) shows this state.
The IC chip 1 is mounted as follows. First, the substrate 6 on which the IC chip 1 is mounted is placed with the electrode 7 side up, and a tape-like adhesive containing the conductive particles 8 in the adhesive layer 81 is placed thereon. Next, the IC chip 1 is placed thereon with the bump 5 side facing the substrate 6, and the IC chip 1 is heated and pressed toward the substrate 6.

Thereby, as shown in FIG. 2, the conductive particles 8 are crushed between the bump 5 and the electrode 7, and the bump 5 and the electrode 7 are electrically connected.
When the conventional bump 50 shown in FIG. 3 is used, the conductive particles 8 that have entered the recess 51 are not sufficiently crushed, and the conductive particles that contribute to conduction may be insufficient. On the other hand, according to this method, since the upper surface of the bump 5 is formed flat, the conductive particles 8 are reliably crushed between the bump 5 and the electrode 7 of the substrate 6. Therefore, the number of conductive particles 8 contributing to conduction between the bumps 5 and the electrodes 7 is increased as compared with the case where the conventional bumps 50 are used, and the mounting reliability of the IC chip 1 is increased.

Sectional drawing explaining the formation method of the bump of this invention. Sectional drawing which shows the connection state of IC chip and board | substrate of this invention. Sectional drawing which shows the shape of the bump of the conventional IC chip.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... IC chip (semiconductor chip), 2 ... Terminal electrode, 3 ... Passivation film, 31 ... Passivation film opening part, 4 ... Barrier metal layer, 5,50 ... Bump, 51 ... Recessed part, 6 ... Substrate, 7 ... Electrode, 8 ... conductive particles, 81 ... adhesive layer, 15 ... metal layer by electroless plating, 9 ... resist pattern, 91 ... resist opening.

Claims (2)

Providing a passivation film on the bump forming surface of the semiconductor chip, and opening each terminal electrode of the passivation film;
Forming a metal layer with the same thickness as the passivation film by electroless plating in the opening formed in the step;
Forming a resist pattern in which an upper portion of the metal layer is opened after the formation of the metal layer;
Forming a bump metal layer by electrolytic plating in the opening of the resist pattern;
A bump forming method characterized by comprising:   A semiconductor chip mounting method comprising: connecting a bump of a semiconductor chip on which a bump is formed by the method according to claim 1 and an electrode formed on a substrate using an adhesive containing conductive particles. .

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