JP2006114654A - Semiconductor epitaxial wafer and field-effect transistor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent a highly conductive region (conductive layer) from forming in a buffer layer with conductive impurities mixing into an epitaxial layer, when preparing an electronic device such as a field-effect transistor containing a high electric mobility transistor or a hetero junction bipolar transistor on a semiconductor epitaxial wafer; and as a result to provide the semiconductor epitaxial wafer realizing high characteristics. <P>SOLUTION: The semiconductor epitaxial wafer having the buffer layer 2 on a substrate 1 has the buffer layer 2 comprising a structure having an In<SB>X</SB>Al<SB>1-X</SB>N buffer layer 22 and a GaN buffer 21 sequentially formed, and an In mixed crystal composition ratio of the In<SB>X</SB>Al<SB>1-X</SB>N buffer layer 22 is 0.05≤0.30. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a semiconductor epitaxial wafer, and more particularly to a semiconductor epitaxial wafer suitably used in the production of a field effect transistor (FET) including a high electron mobility transistor (HEMT) and the like and an FET obtained therefrom.

  In an FET including a HEMT, the current flowing between the source electrode and the drain electrode is controlled by the spread of the depletion layer from the gate electrode.

However, when manufacturing an epitaxial wafer on which an epitaxial layer made of gallium nitride (GaN) is grown, the technology for cleaning the interface between the epitaxial layer and the substrate is not well established, Due to the fact that one of the ammonia (NH ₃ ) gas, which is high purity, cannot be obtained, conductive impurities are easily mixed into the epitaxial layer.

  As a result, although the buffer layer is required to have higher insulation than other layers, the conductive impurities are mixed in the buffer layer, resulting in a degree close to the conductivity of the channel layer. However, this tendency is particularly remarkable in a portion near the substrate of the buffer layer.

  Such a problem causes the depletion layer to hardly spread from the gate electrode.

  In addition, as a result of mixing conductive impurities in the buffer layer, a portion having high conductivity (conductive layer) is formed in a portion close to the substrate of the buffer layer, and a current flows therethrough, so that an electronic device having good characteristics It was difficult to get.

For example, Patent Document 1 and Patent Document 2 describe electronic devices (HEMT, FET) in which a buffer layer made of GaN is formed on a sapphire substrate or a silicon carbide (SiC) substrate. It is considered that sufficient characteristics are not obtained for the reason.
JP 2001-102564 A JP 2002-50758 A

  In the present invention, a defect that causes the deterioration of the characteristics as described above, more specifically, a portion having high conductivity in the buffer layer (conductive layer) by mixing conductive impurities into the epitaxial layer. ) Is formed, and as a result, a semiconductor epitaxial wafer that can be suitably used in manufacturing a field effect transistor (FET, HEMT, etc.) that realizes high characteristics is provided.

  In order to achieve the above object, the present invention is configured as follows.

The semiconductor epitaxial wafer according to the invention of claim 1 is a semiconductor epitaxial wafer having a buffer layer on a substrate, wherein the buffer layer has a structure in which an In _x Al _1-x N buffer layer and a GaN buffer layer are formed in order, The In _x Al _1-x N buffer layer has an In mixed crystal composition ratio X of 0.05 or more and 0.30 or less.

A semiconductor epitaxial wafer according to a second aspect of the present invention is the semiconductor epitaxial wafer according to the first aspect, wherein the thickness of the In _x Al _1-x N buffer layer is 0.2 μm or more. is there.

  A semiconductor epitaxial wafer according to a third aspect of the present invention is the semiconductor epitaxial wafer according to the first or second aspect, wherein the substrate is a sapphire substrate or a SiC substrate.

  A field effect transistor according to a fourth aspect of the present invention is formed by forming a channel layer, an electron supply layer, a source electrode, a gate electrode, and a drain electrode on the semiconductor epitaxial wafer according to any one of the first to eighth aspects, and separating them. It is characterized by having been produced.

  According to the present invention, it is possible to prevent a portion having high conductivity (conductive layer) from being formed in the buffer layer by forming a piezoelectric charge in which conductive impurities are mixed in the epitaxial layer, and as a result, high It is possible to provide a semiconductor epitaxial wafer that is suitably used when manufacturing a field effect transistor (FET, HEMT, etc.) that realizes characteristics.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

<Example 1>
FIG. 1 is a sectional view showing a first embodiment of a semiconductor epitaxial wafer of the present invention.

Specifically, the structure shown in FIG. 1 uses the first embodiment of the semiconductor epitaxial wafer of the present invention to measure the conductivity of the buffer layer 2 composed of the InAlN buffer layer 22 and the GaN buffer layer 21. And a GaN buffer layer 21 made of undoped GaN having a thickness of 2 μm, on a substrate 1 made of sapphire, an InAlN buffer layer 22 made of undoped In _X Al _1-X N, and , And measuring electrodes 11 and 12 formed thereon. Then, in the characteristic measurement element structure, a characteristic measurement element in which the thickness of the InAlN buffer layer 22 was 0.2 μm and the In mixed crystal composition ratio X was 0 to 0.4 was manufactured.

  A metal organic vapor phase epitaxy (MOVPE) method was used for the epitaxial growth of the semiconductor epitaxial wafer used for the characteristic measuring element. Here, trimethylgallium (TMG) is used as the gallium source, trimethylindium (TMI) is used as the indium source, trimethylaluminum (TMA) is used as the aluminum source, ammonia gas is used as the nitrogen source, and carrier gas Hydrogen was used.

  FIG. 2 is a diagram showing the relationship between the In mixed crystal composition ratio X of the InAlN buffer layer 22 and the conductivity (indicated by current value, the unit is A / mm) in this case. As a method for evaluating conductivity, a voltage of 10 V was applied to the semiconductor epitaxial wafer shown in FIG. 1, and the current flowing at that time was measured and compared.

As a result, when the buffer layer 2 including the InAlN buffer layer 22 and the GaN buffer layer 21 is formed, in particular, when the In mixed crystal composition ratio X of the InAlN buffer layer 22 is in the range of 0.05 to 0.30, A small current value (low conductivity) could be obtained. Specifically, the current value was 3 × 10 ⁻⁷ A / mm at X = 0, whereas the current value was 2 × 10 ⁻⁸ A / mm at X = 0.1. When X = 0.2, a current value of 5 × 10 ⁻⁹ A / mm was obtained.

  Such behavior with respect to the In mixed crystal composition ratio is considered to be caused by the synergistic effect of the impurity deactivation effect near the substrate interface by InAlN and the piezoelectric charge reduction effect due to the fact that the lattice constant of InAlN is close to that of GaN. It is done.

Next, the conductivity of the buffer layer 2 with respect to the thickness of the InAlN buffer layer 22 with the In mixed crystal composition ratio X = 0.2 is shown in FIG. When the thickness was 0, that is, when the InAlN buffer layer 22 was not present, extremely high conductivity of 1 × 10 ⁻¹ A / mm at which pinch-off characteristics could not be expected when applied to HEMT was exhibited. On the other hand, when the thickness is 0.2 μm or more, the current value is 5 × 10 ⁻⁹ A / mm or less, and the conductivity is sufficiently low.

  FIG. 4 is a cross-sectional view showing a HEMT manufactured using the first embodiment of the semiconductor epitaxial wafer of the present invention.

The HEMT shown in FIG. 4 has an InAlN buffer layer 22 made of undoped In _0.2 Al _0.8 N having a thickness of 0.3 μm, a GaN buffer layer 21 made of undoped GaN having a thickness of 2 μm, and a thickness on a substrate 1 made of sapphire. A channel layer 3 made of undoped GaN having a thickness of 0.1 μm and a carrier supply layer 4 made of n-type AlGaN having a thickness of 0.025 μm were sequentially formed, and a cap layer 5 having a thickness of 0.002 μm was formed thereon. A gate electrode 7 was formed on the carrier supply layer 4, and a source electrode 6 and a drain electrode 8 were formed on the cap layer 5.

  The MOVPE method was used for the epitaxial growth of this HEMT. The raw materials used for the growth were TMG as the gallium raw material, TMI as the indium raw material, TMA as the aluminum raw material, ammonia gas as the nitrogen raw material, and hydrogen as the carrier gas. Used, monosilane was used as the n-type dopant.

  As a result of measuring the characteristics of the HEMT fabricated as described above, it was confirmed that the buffer layer had a good pinch-off characteristic (pinch-off voltage −4.0 V) as a result of a decrease in the conductivity of the buffer layer.

<Other embodiments and modifications>
In the first embodiment, the sapphire substrate is used as the substrate. However, a silicon carbide (SiC) substrate may be used as the substrate, and in this case, the same effect as that obtained when the sapphire substrate is used as the substrate 1 is obtained. be able to.

It is sectional drawing which shows the element for a characteristic measurement produced using 1st Embodiment of the semiconductor epitaxial wafer of this invention. It is a figure which shows the relationship between In mixed crystal composition ratio X of the InAlN buffer layer in the semiconductor epitaxial wafer of this invention, and an electric current. It is a figure which shows the relationship between the thickness of the InAlN buffer layer in the semiconductor epitaxial wafer of this invention, and an electric current. It is sectional drawing which shows the high electron mobility transistor (HEMT) produced using 1st Embodiment of the semiconductor epitaxial wafer of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Substrate 2 Buffer layer 21 GaN buffer layer 22 InAlN buffer layer 3 Channel layer 4 Carrier supply layer 5 Cap layer 6 Source electrode 7 Gate electrode 8 Drain electrode 11 Measurement electrode 12 Measurement electrode

Claims (4)

In a semiconductor epitaxial wafer having a buffer layer on a substrate,
The buffer layer has a structure in which an In _X Al _1-X N buffer layer and a GaN buffer layer are formed in order, and the In _X Al _1-X N buffer layer has an In mixed crystal composition ratio X of 0.05 or more and 0.00. A semiconductor epitaxial wafer characterized by being 30 or less. The semiconductor epitaxial wafer according to claim 1,
A semiconductor epitaxial wafer, wherein the thickness of the In _x Al _1-x N buffer layer is 0.2 μm or more. In the semiconductor epitaxial wafer according to claim 1,
A semiconductor epitaxial wafer, wherein the substrate comprises a sapphire substrate or a SiC substrate.   A field effect transistor produced by forming and cutting a channel layer, an electron supply layer, a source electrode, a gate electrode, and a drain electrode on the semiconductor epitaxial wafer according to claim 1.

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