JP2006114025A - Wireless chip and manufacturing method of the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wireless chip that can be used without being attached to a product and to specifically provide the wireless chip that adds a new function to the wireless chip by sealing an integrated circuit and a manufacturing method of the same. <P>SOLUTION: The wireless chip has a structure in which the integrated circuit is encompassed by films. In particular, the films sealing the integrated circuit have a hollow structure; therefore the new function is added to the wireless chip. By employing the hollow structure, the wireless chip can be configured so that, for example, an inert gas, an inert liquid or an inert gel is encapsulated in a hollow portion. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

The present invention relates to a wireless chip which is one of semiconductor devices and a manufacturing method thereof.

2. Description of the Related Art In recent years, development of semiconductor devices that transmit and receive data, such as wireless chips, has been actively promoted. Such wireless chips include IC tags, ID tags, RF (Radio Frequency) tags, wireless tags, electronic tags, wireless processors. Also called wireless memory or the like.
There are three types of wireless chip transmission methods: an electromagnetic coupling method, an electromagnetic induction method, and a radio wave method. The electromagnetic coupling method uses a mutual induction of a coil by an alternating magnetic field, and uses a frequency of 13.56 MHz. The electromagnetic induction method is roughly divided into two frequencies. One is 135 kHz or less, and the other is 13.56 MHz. Depending on the shape and size of the wireless chip and the reader / writer, communication of up to about 1 m is possible. The radio wave system uses UHF and a frequency band of 2.45 GHz, and the greatest feature is that the communication distance is long. Such a wireless chip is used by being fixed by being attached to the surface of an article or being embedded in an article. For example, it is used by being embedded in an organic resin constituting the package or being attached to the surface of the package.

However, the above-described wireless chip currently in use has a complicated process for fixing it by embedding or attaching it to an article.
An object of the present invention is to provide a new type of wireless chip that can be used without adhering to an article.
In particular, it is an object to add a new function to a wireless chip by sealing.
Another object of the present invention is to manufacture a wireless chip by a simple method.

The wireless chip of the present invention is characterized in that a thin film integrated circuit is surrounded by a film. The wireless chip of the present invention can be obtained by sandwiching a thin film integrated circuit between two films and heating and melting the film around the thin film integrated circuit. In addition, when a plurality of thin film integrated circuits are sandwiched between two films, the wireless chip of the present invention can be obtained by heating and melting a portion of a film located between adjacent thin film integrated circuits.

The wireless chip of the present invention is characterized in that the film surrounding the thin film integrated circuit has a hollow structure. In other words, the thin film integrated circuit is sealed by providing a space between the film that surrounds the thin film integrated circuit and the thin film integrated circuit.

By adopting a hollow structure, a further function can be added to the function obtained when the hollow structure is not used.

The wireless chip of the present invention is characterized in that, in a wireless chip having a hollow structure, an inert gas, an inert liquid, an inert gel, or the like is sealed in the hollow portion. In addition, “sealing an inert gas, an inert liquid, an inert gel, or the like in the hollow portion” includes a case where the hollow portion is filled with an inert gas, an inert liquid, an inert gel, or the like.

The wireless chip of the present invention is characterized in that in a wireless chip having a hollow structure, a gas containing a substance that promotes deterioration of the thin film integrated circuit (for example, a gas containing moisture), a liquid, a gel, or the like is sealed in the hollow portion. To do.

In addition, in the wireless chip of the present invention, when the film surrounding the thin film integrated circuit is broken, the atmosphere or liquid existing outside the film enters the film surrounding the thin film integrated circuit and comes into contact with the thin film integrated circuit. In such cases, the deterioration rate of the thin film integrated circuit should be increased (not exposed to the atmosphere existing outside the film surrounding the thin film integrated circuit and exposed to the atmosphere existing outside the film surrounding the thin film integrated circuit). The deterioration rate of the thin film integrated circuit differs depending on the state in which it is formed). For example, the thin film integrated circuit is characterized by being easily deteriorated when exposed to the atmosphere.

In order to make the thin film integrated circuit easily deteriorated when exposed to the atmosphere, for example, a method of shifting the electrical characteristics of the thin film transistor included in the thin film integrated circuit to the vicinity of the operation limit can be considered. By doing so, the thin film transistor does not operate due to an external factor. Here, the external factor refers to breaking the film surrounding the thin film integrated circuit. In order to shift the electrical characteristics, a desired characteristic may be obtained by adding an impurity element such as phosphorus or boron to a channel formation region of the thin film transistor.

A method for shifting the electrical characteristics of the thin film transistor included in the thin film integrated circuit to near the operation limit will be described below with reference to FIGS. In FIG. 31, the horizontal axis represents the gate voltage (Vg), and the vertical axis represents the drain current (Id). When the drain current necessary for operating the thin film transistor is Ion, and the gate voltage applied to drive the thin film transistor is Von, when Vg = Von, Id> Ion in the electrical characteristics 3101 and the thin film transistor operates. However, when shifted to the electrical characteristic 3102, Id = Ion and the thin film transistor is operating. However, when the electrical characteristic is further shifted, the thin film transistor is not operated. By setting the electrical characteristics such as the electrical characteristics 3102 to break the film surrounding the thin film integrated circuit, the atmosphere enters the film surrounding the thin film integrated circuit, and the thin film integrated circuit is affected by moisture contained in the atmosphere. The thin film transistor can be prevented from operating because the electrical characteristics are shifted.

In addition, a method of increasing the deterioration rate of the thin film integrated circuit by exposing the thin film integrated circuit surrounded by the film to an atmosphere existing outside the film as compared with the state where the thin film integrated circuit is surrounded by the film is also considered. It is done. For example, a substance that promotes deterioration of a thin film transistor included in the thin film integrated circuit may be included in an atmosphere existing outside the film surrounding the thin film integrated circuit. Examples of the substance that promotes deterioration of the thin film transistor include Na, K, ammonia, monoethanolamine, H ₂ O, SO _x , and NO _x .

When a thin film transistor is exposed to an atmosphere containing a substance that promotes deterioration at a certain concentration, for example, the electrical characteristics of the thin film transistor shift as shown in FIG. In FIG. 28, the horizontal axis represents the gate voltage (Vg), and the vertical axis represents the drain current (Id). 2800 is an electrical characteristic of the thin film transistor before being exposed to an atmosphere containing a substance that promotes deterioration, and 2801 is an electrical characteristic after being exposed to an atmosphere containing a substance that promotes deterioration. The amount of shift in electrical characteristics of the thin film transistor before and after being exposed to an atmosphere containing a substance that promotes deterioration corresponds to A in FIG. Note that the shift amount of the electrical characteristics varies depending on the concentration of the substance that promotes deterioration.

Here, even if thin film transistors are generally manufactured so as to have the same electrical characteristics, for example, as shown by 2900, 2901, and 2902 in FIG. 29, there is some variation in electrical characteristics among individual thin film transistors. Here, the range of variation in electrical characteristics between thin film transistors is expressed as ± X with the electrical characteristics in the electrical characteristics 2901 as a reference. In FIG. 29, the horizontal axis represents the gate voltage (Vg), and the vertical axis represents the drain current (Id). Further, the drain current necessary for operating the thin film transistor is Ion, and the gate voltage applied to drive the thin film transistor is Von. In general, the drain current is set to a current value equal to or higher than Ion by applying Von even in the electrical characteristics 2903 that is assumed to be further shifted to a higher voltage side than the variation in electrical characteristics caused by individual thin film transistors. Even in the electrical characteristic 2904 that is assumed to be further shifted to the low voltage side, the current value equal to or higher than Ion is obtained by applying Vg = 0. That is, the electric characteristics 2903 and 2904 are the operation limit electric characteristics. The shift amounts of the electrical characteristics 2903 and 2904 with respect to the electrical characteristics 2901 are expressed by Y and Z, respectively. In FIG. 29, when Vg = 0, 2900, 2901, 2902, and 2903 all have Id <Ion and the thin film transistor does not operate, and when Vg = Von, 2900, 2901, 2902, and 2904 all have Id> Ion. Therefore, the thin film transistor operates normally when the variation in electrical characteristics is within the range of −Z or more and + Y or less.

In the case where the thin film transistor has electrical characteristics of 2900, in order to make the thin film transistor not operate even when Vg = Von, the thin film transistor may be further shifted from the electrical characteristics of 2903 which is the operation limit electrical characteristic. Here, the shift amount when shifting from the electrical characteristics of 2900 to the electrical characteristics of 2903 which is the operation limit electrical characteristics is X + Y. Therefore, in order to make the thin film transistor having the electrical characteristics of 2900 inoperative, the electrical characteristics may be shifted so that the shift amount of the electrical characteristics becomes larger than X + Y.

Therefore, the shift amount A when the electrical characteristics of the thin film transistor are shifted by being exposed to an atmosphere containing a substance that promotes the deterioration of the thin film transistor includes the variation range X of the electrical characteristics between the thin film transistors and the shift amount Y of the operating limit electrical characteristics. The concentration of the substance that promotes deterioration contained in the atmosphere existing outside the film surrounding the thin film integrated circuit is set so as to be larger than the value obtained by adding. Then, by breaking the film surrounding the thin film integrated circuit, the atmosphere existing outside the film surrounding the thin film integrated circuit enters more inside than the film surrounding the thin film integrated circuit, and the thin film integrated circuit promotes deterioration of the thin film transistor. Therefore, the electrical characteristics of the thin film transistor included in the thin film integrated circuit shift from the state illustrated in FIG. 29 to the state illustrated in FIG. In FIG. 30, the horizontal axis represents the gate voltage (Vg), and the vertical axis represents the drain current (Id). As can be seen from FIG. 30, in both cases of Vg = 0 and Vg = Von, Id <Ion, and the thin film transistor included in the thin film integrated circuit is always in a non-operational state, which can cause an operation failure.

According to the method for manufacturing a wireless chip of the present invention, a plurality of regularly arranged thin film integrated circuits are sandwiched between first and second films, and the first and second portions around the plurality of thin film integrated circuits are heated by a heating unit. Each of the plurality of thin film integrated circuits is sealed by melting the film.

According to the method for manufacturing a wireless chip of the present invention, a plurality of regularly arranged thin film integrated circuits are sandwiched between first and second films, and the first and second portions around the plurality of thin film integrated circuits are heated by a heating unit. A plurality of thin film integrated circuits are sealed and cut simultaneously by melting the film.

According to a method for manufacturing a wireless chip of the present invention, a plurality of regularly arranged thin film integrated circuits are sandwiched between first and second films, and the periphery of the plurality of thin film integrated circuits of the first film is sandwiched from the first film. This portion is irradiated with a laser. By melting the first and second films around the thin film integrated circuit by laser irradiation, each of the plurality of thin film integrated circuits can be sealed and cut simultaneously.

In addition, in the method for manufacturing a wireless chip of the present invention, a plurality of thin film integrated circuits arranged regularly are sandwiched between first and second films, and a plurality of thin film integrated circuits of the first film are formed on the first film. It is characterized by pressing the peripheral part of the wire with a heated wire. By pressing with a heated wire and melting the first and second films around the thin film integrated circuit, each of the plurality of thin film integrated circuits can be sealed and cut simultaneously.

In the above, a wireless chip having a structure in which a thin film integrated circuit is surrounded by a film and a manufacturing method thereof have been described. However, the circuit surrounded by the film is not limited to a thin film integrated circuit, and may be an integrated circuit. For example, an integrated circuit formed on a semiconductor substrate or a thick film integrated circuit may be used. Alternatively, an integrated circuit in which an integrated circuit, a thick film integrated circuit, and a thin film integrated circuit formed on a semiconductor substrate are mixed may be used.

Since the wireless chip of the present invention has a structure in which a thin film integrated circuit is surrounded by a film, the wireless chip in the packaging bag is the same as the desiccant put together with the food in the food packaging bag. It can be used directly. Therefore, since it is not necessary to adhere and fix to an article, there is no possibility that the wireless chip is peeled off, and a step of fixing the wireless chip to the article can be omitted.

Further, when sealing the thin film integrated circuit, the thin film integrated circuit can be prevented from being deteriorated by sealing the desiccant together with the thin film integrated circuit.

And by setting it as a hollow structure, there exists an effect as described in following (1)-(5) with the effect described above further.

(1) Since the film surrounding the thin film integrated circuit (film to be sealed) has a hollow structure, it is possible to reduce external impact on the thin film integrated circuit.

(2) By sealing an inert gas such as nitrogen gas in the hollow portion, it is possible to prevent the thin film integrated circuit from being deteriorated.

(3) The period in which the wireless chip can be used is limited to a short period by enclosing a gas (for example, a gas containing moisture), a liquid, or a gel containing a substance that promotes deterioration of the thin film integrated circuit in the hollow portion. can do. In this way, by limiting the period in which the wireless chip can be used to a short period, it is possible to make it suitable for use in a field where security, privacy, or the like is a problem.
In addition, measure the correlation between the concentration of substances that promote deterioration included in the gas, liquid, gel, etc. (the composition of the gas, liquid, gel, etc.) to be included in advance and the period of use of the thin film integrated circuit, By changing the concentration of substances that promote deterioration included in the gas, liquid, gel, etc. (composition of the gas, liquid, gel, etc.), the period of use of the wireless chip can be changed according to the application. it can.

(4) Since it has a hollow structure, when the wireless chip is poured into water, the wireless chip can be floated in water. Therefore, the wireless chip can be easily cleaned.

(5) Since it has a hollow structure, it is difficult for heat from the outside to be transmitted to the thin film integrated circuit. In particular, if the gas, liquid, gel, or the like enclosed in the hollow portion has a low thermal conductivity, heat from the outside can be further prevented from being transmitted.

In addition, when the film surrounding the thin film integrated circuit is broken, the deterioration rate of the thin film integrated circuit is high when the atmosphere (gas) or liquid existing outside the film enters the film and contacts the thin film integrated circuit. With such a structure, after the wireless chip is used, the thin film integrated circuit is deteriorated and cannot be used simply by breaking the film surrounding the thin film integrated circuit. In particular, a thin film integrated circuit that is easily deteriorated when exposed to the atmosphere (outside air) (a structure in which the deterioration rate differs greatly between the state not exposed to the outside air and the state exposed to the outside air) allows the thin film integrated circuit to By breaking the film surrounding the integrated circuit and exposing the thin film integrated circuit in the film to the atmosphere (outside air), the thin film integrated circuit can be deteriorated and cannot be used. Therefore, since the wireless chip cannot be used easily after use, the wireless chip can be made suitable for use in a field where security, privacy, or the like is a problem. Note that when the hollow structure is used, the film enclosing the wireless chip can be easily broken by crushing the film having the hollow structure by applying pressure when the film surrounding the thin film integrated circuit is broken after use.

In particular, when the thin film integrated circuit is a thin film integrated circuit formed on a flexible substrate such as a resin substrate, it is difficult to destroy the thin film integrated circuit even if the substrate is bent because the substrate is flexible. Therefore, after using a wireless chip, the thin film integrated circuit is designed to be easily degraded when exposed to the atmosphere (outside air) (a structure in which the degradation rate differs greatly between the state not exposed to the outside air and the state exposed to the outside air). A method of making the wireless chip unusable by breaking the surrounding film is particularly effective.

In the above description, the effect has been described in the case of the thin film integrated circuit. However, the same effect as described above can be obtained in an integrated circuit other than the thin film integrated circuit.

Embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it will be easily understood by those skilled in the art that modes and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments below. Note that in the structures of the present invention described below, the same reference numerals are used in common in different drawings.

First, the structure of the wireless chip of the present invention will be described with reference to FIG.
FIG. 1A is a cross-sectional view of the first structure of the wireless chip of the present invention. The wireless chip of the present invention includes a thin film integrated circuit 102 and a film 101 surrounding the thin film integrated circuit 102.

FIG. 1B is a cross-sectional view of the second structure of the wireless chip of the present invention. The wireless chip of the present invention includes a thin film integrated circuit 102 and a film 104 that surrounds the thin film integrated circuit 102 and has a hollow portion 103. That is, the thin film integrated circuit 102 is enclosed in the film 104 having a hollow structure. The film 104 surrounding the thin film integrated circuit 102 has a planar shape in a portion facing the one surface side of the thin film integrated circuit 102, and a convex shape in a portion facing the other surface side of the thin film integrated circuit 102. Have

The structure of FIG. 1B uses a film (embossed film) having a plurality of convex portions on one film of two films used for sealing, and a thin film is formed on the portion where the convex portions are formed. By sealing the film around the thin film integrated circuit in such a manner that the integrated circuit is disposed, the film can be sealed with the hollow portion 103.

FIG. 1C is a cross-sectional view of the third structure of the wireless chip of the present invention. The third structure is an extension of the second structure, and includes a thin film integrated circuit 102 and a film 106 that surrounds the thin film integrated circuit 102 and has a hollow portion 105. The film 106 that surrounds the thin film integrated circuit 102 has a convex shape in both the portion that faces the one surface side of the thin film integrated circuit 102 and the portion that faces the other surface side. The volume of the hollow portion is larger than that of the structure.

In the structure of FIG. 1C, a film having a plurality of convex portions (embossed film) is used for both films of two films used for sealing, and a thin film integrated circuit is formed in the portion where the convex portions are formed. In such a manner, the film around the thin film integrated circuit is heated and melted so that the hollow portion 105 can be sealed.

In the wireless chip shown in FIG. 1B or FIG. 1C, the thin film integrated circuit can move within the film 104 or 106 surrounding the thin film integrated circuit if the thin film integrated circuit is not fixed to the film. It is.

The wireless chip of the present invention is characterized in that in a wireless chip having a hollow structure, an inert gas such as nitrogen gas, an inert liquid such as Florinart (trademark), or an inert gel is sealed in the hollow portion 103 or 105. And As the inert gas and inert liquid, known ones can be used besides nitrogen gas and fluorinate.

In the wireless chip of the present invention, in a hollow wireless chip, a gas containing a substance that promotes deterioration of the thin film integrated circuit (for example, a gas containing moisture), a liquid, a gel, or the like is enclosed in the hollow portion 103 or 105. It is characterized by. For example, a state in which a gas containing a substance that promotes deterioration of the thin film integrated circuit is sealed in the hollow portion 103 or 105 by sealing the thin film integrated circuit in an atmosphere containing a gas that promotes deterioration of the thin film integrated circuit. Can be.

FIG. 2 is a diagram showing a method for manufacturing the wireless chip of the present invention shown in FIG.
First, a plurality of thin film integrated circuits 102 are regularly arranged on the first film 203. Then, the second film 204 is placed over the first film 203 on which the plurality of thin film integrated circuits 102 are placed (FIG. 2A).

A thermoplastic resin may be used as the first and second films. The thermoplastic resin used for the first and second films preferably has a low softening point. For example, polyolefin resins such as polyethylene, polypropylene and polymethylpentene, vinyl resins such as vinyl chloride, vinyl acetate, vinyl chloride-vinyl acetate copolymer, ethylene-vinyl acetate copolymer, vinylidene chloride, polyvinyl butyral, polyvinyl alcohol, etc. Copolymer, acrylic resin, polyester resin, urethane resin, cellulose, cellulose acetate, cellulose acetate butyrate, cellulose acetate propionate, cellulose resin such as ethyl cellulose, styrene such as polystyrene, acrylonitrile-styrene copolymer Based resins and the like. As the first and second films, a single layer or a plurality of layers of the thermoplastic resin as mentioned above may be used. In addition, as a film consisting of a plurality of layers, for example, as shown in FIG. 16, a second thermoplastic resin having a softening point lower than that of the first thermoplastic resin on a base 210 made of the first thermoplastic resin. Examples include a structure having an adhesive layer 211 made of a resin. Note that FIG. 16 shows a case of two layers, but a structure of two or more layers may be used. A biodegradable thermoplastic resin may also be used.

Next, as shown in FIG. 2B, a laser oscillation device 206 is used as a heating unit, and laser light is emitted from above the second film 204 to a portion around the thin film integrated circuit 102 of the second film 204. , The peripheral portion of the thin film integrated circuit 102 of the second film 204 is melted and sealed and cut. In this case, since sealing and cutting can be performed simultaneously, the process can be simplified and the throughput can be improved. The state after sealing and cutting is shown in FIG. The wireless chip 207 is completed by sealing and cutting by the method described above. Cross-sectional views of the wireless chip 207 correspond to FIGS. 1A, 1B, and 1C.

When both the first film and the second film are planar films, the cross-sectional shape is as shown in FIG. In addition, a film having a plurality of convex portions (embossed film) on one side of the first and second films is used, and the thin film integrated circuit is disposed in the portion where the convex portions are formed. When stopping, a cross-sectional shape as shown in FIG. Then, a film having a plurality of convex portions (embossed film) is used as the first and second films, and sealing is performed such that the thin film integrated circuit is disposed in the portion where the convex portions are formed. In this case, the cross-sectional shape is as shown in FIG.

In FIG. 2, the case where sealing and cutting are performed by melting the film around the thin film integrated circuit 102 using laser light has been described. However, the thin film is formed using heating means other than laser light. Sealing and cutting may be performed by melting the first and second films around the integrated circuit 102.

For example, as shown in FIG. 3, by pressing a heated wire 208 from above the second film 204, the first and second films around the thin film integrated circuit 102 are melted and sealed and cut. Also good.

In the above description, the case where the individual thin film integrated circuits 102 are sealed and cut simultaneously has been described. However, the sealing and cutting are not necessarily performed simultaneously, and may be performed in separate steps. In that case, since sealing can be performed so that the first and second films adhere to each other in a larger area than the cutting area, sealing can be performed more reliably than when sealing and cutting are performed simultaneously. Can be stopped. Further, when sealing and cutting are performed in separate steps, sealing may be performed first or cutting may be performed first.

As an example of performing sealing and cutting in separate processes, for example, by irradiating a laser beam with an energy density that cannot be cut but can only be sealed, sealing is performed and energy density that can be cut is used. There is a method of cutting by irradiating with laser light. In this case, the width of the laser beam irradiated when sealing is made longer than the width of the laser beam irradiated when cutting. And, by making the width of the laser beam irradiated when sealing, longer than the width of the laser beam irradiated when cutting, the area to which the first and second films adhere can be increased, More reliable sealing can be performed as compared with the case where sealing and cutting are performed simultaneously.

As another example in which sealing and cutting are performed in separate steps, only the sealing is performed by pressing a widened wire 208 shown in FIG. 3 from above the second film 204, and the heated wire 208 is pressed. And a method of cutting with laser light. By making the width of the wire used for sealing larger than the width of the wire used for cutting or the width of the laser beam, the first and second films are bonded to each other in an area wider than the cutting area. Can be sealed.

In this embodiment mode, a wireless chip having a structure in which a thin film integrated circuit is surrounded by a film and a manufacturing method thereof are described. However, the circuit surrounded by the film is not limited to a thin film integrated circuit, and may be an integrated circuit. For example, an integrated circuit formed on a semiconductor substrate or a thick film integrated circuit may be used. Alternatively, an integrated circuit in which an integrated circuit, a thick film integrated circuit, and a thin film integrated circuit formed on a semiconductor substrate are mixed may be used.

In this embodiment, one embodiment of a process until a plurality of thin film integrated circuits 102 are regularly arranged on the first film 203 will be described.

First, as illustrated in FIG. 4A, a substrate 400 is prepared, and a separation layer 401 is provided over the substrate 400. Here, the peeling layer means a layer having a function of easily peeling the plurality of thin film integrated circuits 102 from the substrate 400. Specifically, the substrate 400 may be a glass substrate such as barium borosilicate glass or alumino borosilicate glass, a quartz substrate, a ceramic substrate, or the like. Alternatively, a metal substrate such as a stainless steel substrate or a semiconductor substrate on which an insulating film is formed may be used. A flexible substrate made of a synthetic resin such as plastic generally has a lower heat-resistant temperature than the substrate material described above, but can be used as long as it can withstand the processing temperature in the manufacturing process. It is. Further, the surface of the substrate 400 may be planarized by polishing such as a CMP method.

The peeling layer 401 is formed using a metal film containing tungsten (W), molybdenum (Mo), niobium (Nb), titanium (Ti), silicon (Si), or the like. In this embodiment, a metal film containing W is used as the peeling layer 401. Note that the metal film containing W can be formed by a CVD method, a sputtering method, an electron beam, or the like. Here, a sputtering method is used. In the case where the thin film integrated circuit is physically peeled from the substrate in a later step, a metal oxide (eg, WO _x ) may be formed on the metal film (eg, W). Other combinations of forming a metal oxide film on the metal film include forming MoO _x on the Mo film, forming NbO _x on the Nb film, or forming TiO _x on the Ti film, etc. Is mentioned. Further, only the metal oxide such as WO _x , MoO _x , NbO _x , and TiO _x can be formed as the peeling layer 401.

4A, the separation layer 401 is formed directly over the substrate 400; however, a base film may be formed between the substrate 400 and the separation layer 401. The base film is a single insulating film having oxygen or nitrogen such as silicon oxide, silicon nitride, silicon oxynitride (SiO _x N _y ) (x> y), silicon nitride oxide (SiN _x O _y ) (x> y), or the like. A layer structure or a stacked structure thereof can be used. In particular, when there is a concern about contamination from the substrate, a base film is preferably formed between the substrate 400 and the peeling layer 401.

Next, a layer 402 having an integrated circuit formed of a thin film transistor (TFT) (hereinafter referred to as a TFT layer 402) is formed over the separation layer 401 (FIG. 4B). The TFT layer 402 may have any structure, and for example, an LSI, a CPU, a memory, or the like can be provided.

Note that the semiconductor film included in the TFT layer 402 has a thickness of 0.2 μm or less, typically 40 nm to 170 nm, preferably 50 nm to 150 nm. Since such a very thin semiconductor film is used, the integrated circuit can be made thinner than a chip formed from a silicon wafer.

Next, a strength securing layer 403 is formed over the TFT layer 402 (FIG. 4C). When the TFT layer 402 is separated from the substrate 400, the TFT layer 402 is warped by stress or the like, and the thin film transistor included in the TFT layer may be destroyed. In particular, the thinner the TFT layer 402 is, the more likely the TFT layer 402 is warped. Therefore, warping of the TFT layer 402 after peeling can be prevented by forming and reinforcing a strength securing layer in the TFT layer 402 in advance before peeling the TFT layer 402 from the substrate 400. A top view in this case is shown in FIG. 6A illustrates the case where twelve thin film integrated circuits are formed over the substrate 400, and a cross-sectional view taken along line AB of FIG. 6A corresponds to FIG.

The strength ensuring layer 403 is made of epoxy resin, acrylic resin, phenol resin, novolac resin, melamine resin, urethane resin, silicone resin or other resin material, benzocyclobutene, parylene, flare, polyimide, photosensitive resin or other organic material, siloxane Compound materials made by polymerization of polymer-based polymers, composition materials containing water-soluble homopolymers and water-soluble copolymers, inorganic films such as silicon nitride films, silicon oxide films, SiO _x N _y (x> 0) films, etc. May be formed. The strength ensuring layer 403 may be formed by laminating a plurality of types of materials selected from the materials described above.

The strength ensuring layer 403 can be formed by a screen printing method or a droplet discharge method. The droplet discharge method is a method in which droplets of a composition containing a material such as a conductive film or an insulating film are selectively discharged (jetted) to form at an arbitrary location. being called. In the case where the etching agent is resistant, an inorganic material may be used without being limited to the resin material. As a method for forming the strength securing layer 403, in addition to the screen printing method and the droplet discharge method, a photosensitive resin is applied by a spin coat method or the like, exposed, and developed, so that the photosensitive resin is applied only to necessary portions. The method of forming by making it remain is also mentioned.

4 shows the case where the strength ensuring layer 403 is formed on the top surface of the TFT layer 402, the strength securing layer 403 may be formed so as to cover the side surface simultaneously with the top surface of the TFT layer 402. . In this case, when the TFT layer 402 is peeled from the substrate 400, the strength securing layer 403 functions as a more sufficient protective film for the TFT layer 402. However, in this case, care must be taken not to block the opening 404 for introducing the etching agent later.

FIG. 4 shows the case where the strength securing layer 403 is formed after the TFT layer 402 is formed in an island shape, but the present invention is not limited to this method. As shown in FIG. 13, a strength securing layer 403 is formed on the TFT layer 402, the strength securing layer 403 is formed in an island shape, and the TFT layer 402 is etched using the strength securing layer 403 formed in an island shape as a mask. It may be formed by a method or the like.

Subsequently, as illustrated in FIG. 4D, an etchant is introduced into the opening 404. The peeling layer 401 is removed with an etchant introduced from the opening. In this embodiment, the release layer 401 is removed by chemically reacting the release layer 401 with an etching agent. As the etchant, a gas or a liquid containing halogen fluoride (an interhalogen compound) that easily reacts with the peeling layer 401 can be used. In this embodiment, chlorine trifluoride gas (ClF ₃ ) that reacts well with W used for the release layer 401 is used. In addition to this, a gas containing fluorine such as CF ₄ , SF ₆ , NF ₃ , F ₂ , a mixed gas of these, or a strong alkaline solution such as tetramethylammonium hydroxide (TMAH). May be used and may be selected as appropriate by the practitioner.

After the peeling layer 401 is removed, the thin film integrated circuit 408 including the TFT layer 402 and the strength securing layer 403 is separated from the substrate 400. In this embodiment, since the separation layer 401 is completely removed, the substrate 400 and the thin film integrated circuit 408 can be separated without using physical means. FIG. 4E shows a cross-sectional view at this time, and FIG. 6B shows a top view.

A perspective view after the release layer 401 is removed is shown in FIG. Next, the thin film integrated circuit 408 on the substrate 400 is moved onto the first film 203. Here, as shown in FIG. 7B, the first film is moved using the vacuum chuck 110 while holding the thin film integrated circuit 408 separated from the substrate 400 as shown in FIG. 7C. A thin film integrated circuit 408 is provided on 203.

Note that although the case where the peeling layer 401 is completely removed has been described here, it is also possible to remove the peeling layer 401 while remaining partly as shown in FIG. By leaving a part of the peeling layer 401, the thin film integrated circuit 408 is not separated from the substrate 400 until the thin film integrated circuit 408 is sucked by the vacuum chuck 110, so that the thin film integrated circuit 408 may be scattered. Absent.

Further, the method for moving the thin film integrated circuit 408 on the substrate 400 onto the first film 203 may be a method other than using the vacuum chuck 110.
Another example of a method for moving the thin film integrated circuit 408 over the substrate 400 onto the first film 203 will be described with reference to FIGS.

First, after the separation layer 401 is completely removed, the first film 203 is placed over the thin film integrated circuit 408 disposed over the substrate 400 in a state separated from the substrate 400 (FIG. 8B). Next, the substrate 400, the thin film integrated circuit 408, and the first film 203 are sandwiched between the lower side of the substrate 400 and the upper side of the first film 203 by the arms 111 and 112, and are rotated 180 degrees in this state, as shown in FIG. C). Then, by removing the substrate 400, the thin film integrated circuits 408 can be regularly arranged on the first film 203 as illustrated in FIG. 8D.

Thereafter, the wireless chip of the present invention can be completed by sealing and cutting the thin film integrated circuit in accordance with the steps described in [Best Mode for Carrying Out the Invention].

Note that the peeled substrate 400 can be reused. As a result, cost reduction can be achieved in manufacturing a thin film integrated circuit using a substrate. Therefore, cost reduction can be achieved even when a quartz substrate having a higher cost than a glass substrate is used. Note that when the substrate is reused, it is desirable to control so that the substrate is not damaged in the peeling process. However, when scratches are generated, an planarization process may be performed by forming an organic resin film or an inorganic resin film on the substrate by a coating method or a droplet discharge method, or grinding and polishing the substrate.

Thus, when a wireless chip is manufactured by forming a thin film integrated circuit over a substrate having an insulating surface, the shape of the substrate is limited compared to a wireless chip manufactured using a silicon wafer in which the chip is taken out from a circular silicon wafer. (There is a high degree of freedom in the shape of the substrate). Therefore, the productivity of the wireless chip can be increased and mass production can be performed. Furthermore, since the insulating substrate can be reused, the cost can be reduced.

In this embodiment, the case where a thin film integrated circuit is formed over a substrate has been described, but the present invention is not limited to this. An integrated circuit other than the thin film integrated circuit can be formed over the substrate. For example, a thick film integrated circuit may be formed over the substrate, or a circuit in which a thin film integrated circuit and a thick film integrated circuit are mixed may be formed over the substrate.

This embodiment can be freely combined with the above embodiment mode and other embodiments.

In this embodiment, a method of using a film having an adhesive on one surface when moving the thin film integrated circuit 408 on the substrate 400 described in Embodiment 1 onto the first film 203 is described with reference to FIG. While explaining.

First, according to the method described in the first embodiment, the state of FIG. 4E or FIG. 5 is obtained. Next, a film 407 having an adhesive layer 406 on one surface of the base 405 is placed on the thin film integrated circuit 408 so that the adhesive layer 406 is in contact with the thin film integrated circuit 408 and pressed from above the thin film integrated circuit 408. The thin film integrated circuit 408 is adhered to the film 407 as shown in FIG. 14A shows an example in which the thin film integrated circuit 408 is adhered to the film 407 in the state of FIG.

  Specific examples of the structure of the film 407 include a structure in which an adhesive layer 406 is provided on a substrate 405 such as polyester. The adhesive layer 406 is made of a resin material containing an acrylic resin or the like, or a synthetic rubber material.

Next, as shown in FIG. 14B, the first film 203 is disposed so as to be in contact with the surface opposite to the surface bonded to the film 407 of the thin film integrated circuit 408. In this embodiment, as the first film 203, a film having an adhesive layer 211 on a substrate 210 as shown in FIG. As the substrate, PET (polyethylene terephthalate) or the like may be used. The adhesive layer 211 is made of a resin having a softening point lower than that of the base 210, for example, a resin mainly composed of ethylene / vinyl acetate copolymer (EVA), polyester, polyamide, thermoplastic elastomer, polyolefin, or the like. . Since the softening point of the adhesive layer 211 is lower than that of the substrate 210, only the adhesive layer 211 is melted and becomes rubbery by heating, and is cured when cooled.
The first film 203 is disposed so that the adhesive layer 211 is in contact with the thin film integrated circuit 408. Then, after heating at least a portion of the first film 203 where the thin film integrated circuit 408 exists, the thin film integrated circuit 408 is bonded to the first film 203 and peeled off from the film 407 (FIG. 14). (See (C)).

Note that as the film 407, a film having a low adhesive strength (adhesive strength is preferably 0.01 N to 0.5 N, more preferably 0.05 N to 0.35 N) is preferably used. This is because, after the thin film integrated circuit 408 provided on the substrate 400 is bonded to the film 407, the thin film integrated circuit 408 is bonded again to the first film 203, and the thin film integrated circuit 408 is peeled off from the film 407. . The thickness of the adhesive is 1 μm to 100 μm, preferably 1 μm to 30 μm. Further, it is preferable that the substrate 405 is formed with a thickness of 10 μm to 1 mm because it is easy to handle during processing.

By the method described above, the thin film integrated circuit 408 can be moved from the substrate 400 onto the first film 203. The wireless chip of the present invention can be completed by sealing and cutting by the method described in [Best Mode for Carrying Out the Invention].

In this embodiment, the case where the thin film integrated circuit is moved onto the first film 203 has been described. However, it is not limited to only a thin film integrated circuit, and may be an integrated circuit. For example, an integrated circuit formed on a semiconductor substrate or a thick film integrated circuit may be used. Alternatively, an integrated circuit in which an integrated circuit, a thick film integrated circuit, and a thin film integrated circuit formed on a semiconductor substrate are mixed may be used.

This embodiment can be freely combined with the above embodiment mode and other embodiments.

In this embodiment, as shown in FIG. 2A, a case where a process until a plurality of thin film integrated circuits are arranged on the first film 203 is different from that in Embodiment 1 will be described.

A layer 901 including a plurality of integrated circuits formed of thin film transistors (TFTs) (hereinafter referred to as a TFT layer 901) is formed over one surface of a substrate 900 having an insulating surface (see FIG. 9A).
The substrate 900 corresponds to a glass substrate such as barium borosilicate glass or alumino borosilicate glass, a quartz substrate, a ceramic substrate, a plastic substrate, an acrylic substrate, or the like. Alternatively, a metal substrate such as a stainless steel substrate or a semiconductor substrate on which an insulating film is formed may be used. These substrates 900 can be easily manufactured with a side of 1 meter or more, and can have a desired shape such as a square or a circle. Therefore, for example, if a substrate having a side of 1 meter or longer is used as the substrate 900, productivity can be significantly improved. Such a feature is a great advantage as compared with a case where a wireless chip is taken out from a circular silicon substrate.

The TFT layer 901 includes at least a plurality of insulating films, a semiconductor layer and a conductive layer forming a plurality of elements, and a conductive layer functioning as an antenna. Specifically, a first insulating film functioning as a base film, a plurality of elements provided on the first insulating film, a second insulating film covering the plurality of elements, and a second insulating film A first conductive layer that is in contact with and connected to the plurality of elements; a third insulating film that covers the first conductive layer; a second conductive layer that is in contact with the third insulating film and functions as an antenna; And a fourth insulating film covering the layer. A more detailed configuration will be described in Example 4.

Although an example in which a conductive layer functioning as an antenna is formed in the TFT layer 901 is shown here, an antenna is not formed in the TFT layer 901 and an antenna is provided in advance as shown in FIG. A structure in which the substrate and the TFT layer 901 are bonded together with an adhesive or the like may be employed.

  In FIG. 17, an anisotropic conductive film 236 in which a conductor 237 is dispersed is used as means for bonding the TFT layer 901 and the antenna substrate 235 together. In the region 239 provided with the connection terminal 238 of the wireless chip and the connection terminal 234 of the antenna, the anisotropic conductive film 236 is pressure-bonded according to the thickness of each connection region terminal, and thus the connection terminal 238 of the wireless chip. Between the antenna and the connection terminal 234 of the antenna. In other regions, the conductors are present at a sufficient interval, and thus are not electrically connected. Note that in addition to the anisotropic conductive film, bonding may be performed using ultrasonic bonding, ultraviolet curable resin, double-sided tape, or the like.

Next, a third film 902 is provided so as to cover the TFT layer 901 (when the antenna substrate 235 is attached to the TFT substrate as shown in FIG. 17, so as to cover the antenna substrate 235). The third film 902 is a protective film for the purpose of protecting the TFT layer 901.
Next, a fourth film 903 is provided so as to cover the third film 902. As the fourth film 903, a film (expanded film) having a property of stretching when pulled, such as a vinyl chloride resin or a silicone resin, is used. In addition, the fourth film 903 preferably has a property that the adhesive strength is strong in a normal state and the adhesive strength is weakened when irradiated with light, and specifically, the adhesive strength is reduced when irradiated with ultraviolet light. It is better to use UV tape that weakens.

Note that the third film 902 may be provided as necessary. The third film 902 is provided for the purpose of protecting the TFT layer 901. Therefore, when it is not necessary to protect the TFT layer 901, the third film 902 is not provided and the fourth film 902 is formed on the second film. The film 903 may be provided.

Next, the surface of the substrate 900 opposite to the one surface on which the TFT layer 901 is formed is ground by the grinding means 904 (see FIG. 9B). Preferably, grinding is performed until the thickness of the substrate 900 becomes 100 μm or less. In general, in this grinding process, the surface of the substrate 900 is ground by rotating one or both of the stage to which the substrate 900 is fixed and the grinding means 904. The grinding means 904 corresponds to, for example, a grindstone.

Next, the ground surface of the substrate 900 is polished by a polishing unit 906 (see FIG. 9C). Preferably, polishing is performed until the thickness of the substrate 900 becomes 20 μm or less. Also in this polishing step, the surface of the substrate 900 is polished by rotating one or both of the stage on which the substrate 900 is fixed and the polishing means 906, as in the above-described grinding step. The polishing means 906 corresponds to, for example, a grindstone.
Thereafter, although not shown, in order to remove dust generated by the grinding process and the polishing process, cleaning is performed as necessary.

Here, the case of grinding to 100 μm or less by the grinding means and then polishing to 20 μm or less by the polishing means has been described. However, the thickness of the substrate after grinding and the thickness of the substrate after polishing are as follows. It is not limited to the value. Although the case where the substrate is thinned by grinding and polishing is described here, it is also possible to thin the substrate by performing only grinding or polishing.

Subsequently, the substrate 900, the TFT layer 901, and the third film 902 are cut by the cutting unit 907. The TFT layer 901 cuts the boundary between the integrated circuits so that each of the plurality of integrated circuits is separated. Further, the element provided in the TFT layer 901 is not cut, and the insulating film provided in the TFT layer 901 is cut. Therefore, after the cutting process, a plurality of thin film integrated circuits 908 is formed (see FIG. 9D).
Note that the cutting means 907 corresponds to a dicer, a laser, a wire saw, or the like. In this step, the fourth film 903 is not cut.

Next, the fourth film 903 is stretched so that a gap is formed between the thin film integrated circuits 908 (see FIG. 10A). At this time, in order to make the gaps between the thin film integrated circuits 908 uniform, it may be pulled evenly in the plane direction. Subsequently, the fourth film 903 is irradiated with light. When the fourth film 903 is a UV tape, ultraviolet light is irradiated. Then, the adhesive force of the fourth film 903 is weakened, and the adhesion between the fourth film 903 and the thin film integrated circuit 908 is reduced. Then, the thin film integrated circuit 908 can be separated from the fourth film 903 by physical means.

As physical means, a pick-up means or a vacuum chuck may be used.
In the case where pickup means is used as physical means, as shown in FIG. 10B, the fourth film 903 is irradiated with UV light, and the pickup film 909 removes the thin film integrated circuit 908 from the fourth film 903. And a thin film integrated circuit 908 is placed on the first film 203.

In the case where a vacuum chuck is used as the physical means, the fourth film 903 is irradiated with UV light and the vacuum chuck 910 is placed over the thin film integrated circuit 908 as shown in FIG. Then, the thin film integrated circuit 908 is held by the vacuum chuck 910, and the thin film integrated circuit 908 is moved onto the first film 203 (FIG. 10D).

Note that in the above process, after the grinding process (see FIG. 9B) and the polishing process (see FIG. 9C) of the substrate 900 are completed, the cutting process of the substrate 900 (see FIG. 9D) is performed. Yes, but not limited to this order. After performing the cutting process of the substrate 900, the grinding process and the polishing process of the substrate 900 may be performed.

The thin film integrated circuit completed through the above steps is thin and lightweight.

In this embodiment, the case where a thin film integrated circuit is formed over a substrate has been described, but the present invention is not limited to this. An integrated circuit other than the thin film integrated circuit can be formed over the substrate. For example, a thick film integrated circuit may be formed over the substrate, or a circuit in which a thin film integrated circuit and a thick film integrated circuit are mixed may be formed over the substrate. Further, instead of forming a thin film integrated circuit over a substrate, an integrated circuit may be formed over a semiconductor substrate.

This embodiment can be freely combined with the above embodiment mode and other embodiments.

In this example, the case where the expanded film (fourth film) 903 of Example 3 is used as the first film 203 for sealing the thin film integrated circuit will be described.

First, according to the method described in Embodiment 3, the state of FIG.
In this embodiment, since the expanded film (fourth film) 903 is used as the first film 203, it is not necessary to move the thin film integrated circuit 908 from the fourth film 903 to the first film 203. Therefore, the expanded film used in this example does not need to have a property that the adhesive strength is weakened when irradiated with light.

Next, as illustrated in FIG. 15, the second film 204 is disposed over the thin film integrated circuit 908 so that the thin film integrated circuit 908 is sandwiched between the expanded film 903 and the second film 204. FIG. 15 shows an example in which the second film is a film having a convex portion. When a film having a convex portion is used as the second film, the second film 204 is arranged so that the convex portion is positioned on the thin film integrated circuit 908.

The wireless chip of the present invention can be completed by sealing and cutting by the method described in [Best Mode for Carrying Out the Invention].

In this embodiment, the case of a thin film integrated circuit has been described. However, the present invention is not limited to a thin film integrated circuit, and may be an integrated circuit. For example, an integrated circuit formed on a semiconductor substrate or a thick film integrated circuit may be used. Alternatively, an integrated circuit in which an integrated circuit, a thick film integrated circuit, and a thin film integrated circuit formed on a semiconductor substrate are mixed may be used.

This embodiment can be freely combined with the above embodiment mode and other embodiments.

In Examples 1 to 4, a thin film integrated circuit is formed by removing the TFT layer and the strength securing layer from the substrate by removing at least a part of the release layer, or by thinning the substrate on which the TFT layer is formed. Although the example used was shown, it is not limited to this. As the thin film integrated circuit, a substrate in which the TFT layer is not formed may be used. That is, a TFT layer formed on a substrate and divided for each unit circuit may be used as a thin film integrated circuit. In that case, for example, in Example 3, a thin film integrated circuit may be manufactured by omitting the step of thinning the substrate by grinding or polishing.

In this embodiment, the case of a thin film integrated circuit has been described. However, the present invention is not limited to a thin film integrated circuit, and may be an integrated circuit. For example, an integrated circuit formed on a semiconductor substrate or a thick film integrated circuit may be used. Alternatively, an integrated circuit in which an integrated circuit, a thick film integrated circuit, and a thin film integrated circuit formed on a semiconductor substrate are mixed may be used.

This embodiment can be freely combined with the above embodiment mode and other embodiments.

In this embodiment, a configuration example of a TFT layer will be specifically described with reference to FIG.

Reference numeral 361 denotes an insulating film serving as a base, which is a laminated film of silicon nitride oxide and silicon oxynitride, a laminated film of silicon oxynitride, silicon nitride oxide, and silicon oxynitride, or silicon oxide, silicon nitride oxide, and silicon oxynitride. It consists of a laminated film.

A plurality of elements are formed over the insulating film 361. The plurality of elements correspond to a plurality selected from, for example, a thin film transistor, a capacitor element, a resistance element, a diode, and the like. FIG. 11 shows a cross-sectional structure in the case where N-type thin film transistors 362 and 364 and P-type thin film transistors 363 and 365 are formed as a plurality of elements. In FIG. 11, the thin film transistors 362 and 364 have an LDD (Lightly Doped Drain) structure including a channel formation region, a lightly doped impurity region, and a heavily doped impurity region. The thin film transistors 363 and 365 have a single drain structure including a channel formation region and an impurity region. Further, sidewalls are formed on the side surfaces of the gate electrodes of the thin film transistors 362 to 365.
Note that the structure of the thin film transistor is not limited to the above description, and may be any structure. For example, a single drain structure, an offset structure, an LDD structure, a GOLD (Gate Overlapped Lightly Doped Drain) structure, or the like may be used.

An insulating film 366 is formed over the thin film transistors 362 to 365 so as to cover the thin film transistors 362 to 365, and source / drain wirings electrically connected to the impurity regions of the thin film transistors 362 to 365 are formed over the insulating film 366. 371 to 376 are formed.
An insulating film 367 is formed on the source / drain wirings 371 to 376 so as to cover the source / drain wirings 371 to 376, and is electrically connected to the source / drain wirings 371 to 376 on the insulating film 367. Conductive layers 377 to 380 are formed. The conductive layers 377 to 380 function as an antenna.
An insulating film 368 is formed over the conductive layers 377 to 380 so as to cover the conductive layers 377 to 380.

In this embodiment, an example in which a conductive layer functioning as an antenna is formed in the TFT layer is shown, but the antenna is not formed in the TFT layer, and the antenna substrate provided with the antenna and the TFT layer are bonded together. A structure in which the antenna and the TFT layer are electrically connected may be employed.

Note that this embodiment can be freely combined with the above embodiment mode and other embodiments.

In this embodiment, a structure example of a TFT layer different from that in Embodiment 6 will be described with reference to FIGS.

The silicon nitride film 511 and the silicon oxide film 512 are insulating films serving as bases, and a plurality of elements are formed over the silicon oxide film 512. Here, the silicon nitride film 511 and the silicon oxide film 512 functioning as a base insulating film are not limited to this material or the order of lamination. As the base insulating film, for example, a stacked film of silicon nitride oxide and silicon oxynitride, a stacked film of silicon oxynitride, silicon nitride oxide, and silicon oxynitride, or a stacked film of silicon oxide, silicon nitride oxide, and silicon oxynitride is used. May be formed.
The plurality of elements correspond to a plurality selected from, for example, a thin film transistor, a capacitor element, a resistance element, a diode, and the like. FIG. 12 shows a cross-sectional structure in the case where a thin film transistor 523 having a structure in which a channel region of a semiconductor layer 521 is sandwiched between a lower electrode 513 and a gate electrode 522 with an insulating film interposed therebetween is formed as a plurality of elements.

Hereinafter, the structure of the thin film transistor 523 will be described.
Insulating films 514 and 515 are formed on the lower electrode 513, and a semiconductor layer 521 is formed on the insulating film 515. Here, the lower electrode 513 can be formed using a metal or a polycrystalline semiconductor to which an impurity of one conductivity type is added. When using a metal, W, Mo, Ti, Ta, Al, or the like can be used.

A gate electrode 522 is formed over the semiconductor layer 521 with a gate insulating film 516 interposed therebetween. Here, FIG. 12 illustrates the case where the thin film transistor 523 is a thin film transistor having a GOLD structure; however, the present invention is not limited to this structure. For example, an LDD structure having sidewalls on the side surfaces of the gate electrode may be used.

An insulating film 517 is formed so as to cover the semiconductor layer 521 and the gate electrode 522, and a source / drain wiring 518 electrically connected to the source region or the drain region of the semiconductor layer 521 is formed over the insulating film 517. ing.

An insulating film 519 is formed over the source / drain wiring 518, and a conductive layer 524 is formed over the insulating film 519. This conductive layer 524 functions as an antenna.
An insulating film 520 is formed over the conductive layer 524 so as to cover the conductive layer 524.

As the insulating films 515, 517, 519, and 520, an inorganic insulating film or an organic insulating film can be used. As the inorganic insulating film, a silicon oxide film, a silicon oxynitride film formed by a CVD method, a silicon oxide film applied by an SOG (Spin On Glass) method, or the like can be used. As the organic insulating film, a film of polyimide, polyamide, BCB (benzocyclobutene), acrylic, positive photosensitive organic resin, negative photosensitive organic resin, or the like can be used. Alternatively, a stacked structure including films of different materials such as a stacked structure of an acrylic film and a silicon oxynitride film may be used.

A TFT having a lower electrode as described above has an advantageous structure when the TFT size is reduced.
In general, when the size of the TFT is reduced and the clock frequency for operating the circuit is improved, the power consumption of the integrated circuit is increased. Therefore, by applying a bias voltage to the lower electrode and changing the bias voltage, the threshold voltage of the TFT can be changed, so that an increase in power consumption can be suppressed.

Application of a negative bias voltage to the lower electrode of the n-channel TFT increases the threshold voltage and reduces leakage. On the other hand, the application of a positive bias voltage lowers the threshold voltage and makes it easier for current to flow through the channel, and the TFT operates at a higher speed or at a lower voltage. The effect of the bias voltage on the lower electrode of the p-channel TFT is the opposite. Thus, the characteristics of the integrated circuit can be greatly improved by controlling the bias voltage applied to the lower electrode.

Using this bias voltage, the characteristics of the integrated circuit can be improved by balancing the threshold voltages of the n-channel TFT and the p-channel TFT. At this time, in order to reduce power consumption, both the power supply voltage and the bias voltage applied to the lower electrode may be controlled. When the circuit is in the standby mode, a large reverse bias voltage is applied, and during operation, a weak reverse bias is applied when the load is small, and a weak forward bias voltage is applied when the load is large. The application of the bias voltage may be switched by providing a control circuit depending on the operation state of the circuit or the load state. By controlling the power consumption and the TFT performance by such a method, the circuit performance can be maximized.

In this embodiment, an example in which a conductive layer functioning as an antenna is formed in the TFT layer is shown, but the antenna is not formed in the TFT layer, and the antenna substrate provided with the antenna and the TFT layer are bonded together. A structure in which the antenna and the TFT layer are electrically connected may be employed.

Note that this embodiment can be freely combined with the above embodiment mode and other embodiments.

In this embodiment, a method for manufacturing a gate electrode of a thin film transistor included in the TFT layer of Embodiment 1 will be described with reference to FIGS.

First, the separation layer 801 is formed over the substrate 800, and the semiconductor films 811 and 812 are provided over the separation layer 801 with the insulating films 802 and 803 interposed therebetween. As the substrate 800 and the peeling layer 801, those described in Embodiment 1 may be used. In addition, a gate insulating film 813 is formed over the semiconductor films 811 and 812. After that, a first conductive layer 821 and a second conductive layer 822 are stacked over the gate insulating film 813. In this embodiment, tantalum nitride is used as the first conductive layer and tungsten (W) is used as the second conductive layer. Both the tantalum nitride film and the W film may be formed by sputtering, the tantalum nitride film may be formed in a nitrogen atmosphere using a Ta target, and the W film may be formed using a W target.

Note that although the first conductive layer 821 is tantalum nitride and the second conductive layer 822 is W in this embodiment, the present invention is not limited to this, and both the first conductive layer 821 and the second conductive layer 822 are Ta. , W, Ti, Mo, Al, Cu, Cr, or Nd, or an alloy material or a compound material containing the element as a main component. Alternatively, a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus may be used. Further, an AgPdCu alloy may be used. Furthermore, the combination may be selected as appropriate. The first conductive layer 821 may be formed with a thickness of 20 to 100 nm and the second conductive layer 822 may be formed with a thickness of 100 to 400 nm. In this embodiment, a two-layer structure is used, but a single layer may be used, or a three-layer or more structure may be used.

Next, a resist 823 is selectively formed over the second conductive layer 822 by photolithography or a droplet discharge method (FIG. 18A). After that, by performing a known etching process such as an O ₂ (oxygen) plasma process, the resist 823 is etched to reduce the resist 823 (FIG. 18B). In this manner, by etching the first conductive layer 821 and the second conductive layer 822 using the reduced resist 824 as a mask, a gate electrode having a smaller width can be formed. That is, a gate electrode with a smaller width can be formed than when a gate electrode is formed using the resist 823. Thus, by reducing the structure of the gate electrode, the width of the channel formation region is reduced, and high-speed operation is possible.

A case where the method is different from the method for manufacturing the gate electrode illustrated in FIGS. 18A to 18C is described with reference to FIGS.

First, as illustrated in FIG. 19A, a separation layer 801, insulating films 802 and 803, semiconductor films 811 and 812, a gate insulating film 813, a first conductive layer 821, and a second conductive layer are formed over a substrate 800. 822 is stacked and a resist 823 is selectively formed. Subsequently, the first conductive layer 821 and the second conductive layer 822 are etched using the resist 823 as a mask (FIG. 19A). Through this step, the gate electrode 826 including the first conductive layer 821 and the second conductive layer 822 is formed. Thereafter, the gate electrode 826 is etched using a known etching method. Since the resist 823 is provided over the gate electrode 826, a side surface of the gate electrode 826 is etched, so that a gate electrode 827 having a width smaller than that of the gate electrode 826 can be formed as illustrated in FIG. .

By using the manufacturing method shown in this embodiment, a fine gate electrode that can be formed by a photolithography method or the like can be manufactured. Further, a finer element structure can be provided by reducing the gate electrode. Therefore, since many elements can be built in the same area, a high-performance circuit can be formed. In addition, the thin film integrated circuit (IC chip or the like) can be reduced in size when formed with a structure similar to the number of conventional elements. 18 and the method shown in FIG. 19 may be combined, and a finer gate electrode can be formed.

Note that although this embodiment describes the method for manufacturing the gate electrode of the thin film transistor included in the TFT layer of Embodiment 1, the method for manufacturing the gate electrode of this embodiment is not limited to that of Embodiment 1, It can be carried out freely in combination with the form and other embodiments.

A circuit configuration example of a wireless chip of the present invention will be described with reference to the drawings. The specification of the wireless chip described here conforms to the international standard ISO15693, is a proximity type, and the communication signal frequency is 13.56 MHz. In addition, reception corresponds only to a data read command, the transmission data transmission rate is about 13 kHz, and the data encoding format uses Manchester code.

The wireless chip 715 is roughly composed of an antenna unit 721, a power supply unit 722, and a logic unit 723. The antenna unit 721 includes an antenna 701 for receiving an external signal and transmitting data (see FIG. 20).
The power supply unit 722 includes a rectifier circuit 702 that generates a voltage based on a signal received from the outside via the antenna 701, and a storage capacitor 703 that stores the generated voltage.
The logic unit 723 includes a demodulation circuit 704 that demodulates the received signal, a clock generation / correction circuit 705 that generates a clock signal, each code recognition and determination circuit 706, and a signal for reading data from the memory based on the received signal. A memory controller 707 for generating, a modulation circuit 708 including a modulation resistor for placing the encoded signal on the received signal, an encoding circuit 709 for encoding the read data, and a mask ROM 711 for holding the data .

The codes recognized and determined by each code recognition and determination circuit 706 are a frame end signal (EOF, end of frame), a frame start signal (SOF, start of frame), a flag, a command code, a mask length (mask length), and a mask. For example, a value (mask value). Each code recognition and determination circuit 706 also includes a cyclic redundancy check (CRC) function for identifying transmission errors.

Next, an example of a layout of a wireless chip having the above structure will be described with reference to FIGS. First, the overall layout of one wireless chip will be described (see FIG. 21). The wireless chip is formed in separate layers with an antenna 701 and an element group 714 that constitutes a power supply unit 722 and a logic unit 723. Specifically, the antenna 701 is formed on the element group 714. Yes. A part of a region where the element group 714 is formed and a part of a region where the antenna 701 is formed overlap. In the configuration shown in FIG. 21, the width of the wiring configuring the antenna 701 is designed to be 150 μm, the width between the wiring is 10 μm, and the number of windings is 15 turns. Note that the present invention is not limited to the form in which the antenna 701 and the element group 714 are formed in separate layers as described above. Further, the antenna 701 is not limited to the wound shape as shown in FIG.

Next, the layout of the power supply unit 722 and the logic unit 723 will be described (see FIG. 22). The rectifier circuit 702 and the storage capacitor 703 included in the power supply unit 722 are provided in the same region. The demodulation circuit 704 constituting the logic unit 723 and each code recognition / determination circuit 706 are provided in two places. The mask ROM 711 and the memory controller 707 are provided adjacent to each other. The clock generation / correction circuit 705 and each code recognition / determination circuit 706 are provided adjacent to each other. The demodulation circuit 704 is provided between the clock generation / correction circuit 705 and each code recognition / determination circuit 706. Although not shown in the block diagram of FIG. 20, a detection capacitor 712 for a logic unit and a detection capacitor 713 for a power source unit are provided. The modulation circuit + modulation resistor 708 is provided between the detection capacitor 712 and the detection capacitor 713.

The mask ROM 711 is used to create stored contents in a memory in the manufacturing process. Here, a power supply line connected to a high potential power supply (also referred to as VDD) and a power supply line connected to a low potential power supply (also referred to as VSS) are used. Two power supply lines are provided, and the memory content stored in the memory cell is determined by which power supply line the transistor included in each memory cell is connected to.

Next, an example of a circuit configuration of the rectifier circuit 702 is described (see FIG. 23A). The rectifier circuit 702 includes transistors 91 and 92 and a capacitor transistor 93. A gate electrode of the transistor 91 is connected to the antenna 701. The gate electrode of the capacitor transistor 93 is connected to a high potential power supply (VDD). Further, the source electrode and the drain electrode of the capacitor transistor 93 are connected to a ground power supply (GND).
Next, an example of a circuit configuration of the demodulation circuit 704 will be described (see FIG. 23B). The demodulation circuit 704 includes transistors 94 and 95, resistance elements 96 and 99, and capacitor transistors 97 and 98. A gate electrode of the transistor 94 is connected to the antenna 701. The gate electrode of the capacitor transistor 98 is connected to a logic circuit. The source electrode and the drain electrode of the capacitor transistor 98 are connected to a ground power supply (GND).

Next, a cross-sectional structure of the capacitor transistor included in the rectifier circuit 702 and the demodulation circuit 704 is described (see FIG. 24A). In the capacitor transistor 601, the source electrode and the drain electrode are connected to each other. When the capacitor transistor 601 is turned on, a capacitor is formed between the gate electrode and the channel formation region. Such a cross-sectional structure of the capacitor transistor 601 is not different from a cross-sectional structure of a normal thin film transistor. An equivalent circuit diagram can be expressed as shown in FIG. Note that a capacitor using a gate insulating film as in the above structure is affected by a change in threshold voltage of the transistor; therefore, an impurity element is added to the region 602 overlapping with the gate electrode. Good (see FIG. 24C). In this way, a capacitor is formed regardless of the threshold voltage of the transistor. An equivalent circuit diagram in this case can be expressed as shown in FIG.

This embodiment can be freely combined with the above embodiment mode and other embodiments.

In this embodiment, an example in which a crystalline semiconductor layer crystallized by laser light irradiation is used as a semiconductor layer of a thin film transistor included in a TFT layer will be described.

An oscillator that generates laser light is a continuous wave laser. The oscillator is selected from continuous wave YAG laser, YVO ₄ laser, YLF laser, YAlO ₃ laser, glass laser, ruby laser, alexandrite laser, Ti: sapphire laser, excimer laser, Ar laser, Kr laser, CO ₂ laser. 1 type or multiple types.

When a continuous wave laser is used, a transistor can be manufactured using a polycrystalline semiconductor having a large grain size with few crystal defects. Further, since the mobility and response speed are good, a liquid crystal display device which can be driven at high speed and has an improved operating frequency of the element can be provided. Moreover, since there is little characteristic variation, high reliability can be obtained.

For the purpose of further improving the frequency of operation, it is preferable to match the channel length direction of the transistor with the scanning direction of the laser beam. In the laser crystallization process using a continuous wave laser, the highest mobility is obtained when the channel length direction of the transistor and the scanning direction of the laser beam with respect to the substrate are substantially parallel (preferably −30 ° to 30 °). It is because it is obtained. Note that the channel length direction corresponds to the direction in which current flows in the channel formation region, in other words, the direction in which charges move. The transistor manufactured in this way has an active layer composed of a polycrystalline semiconductor in which crystal grains extend in the channel length direction. This means that the crystal grain boundaries are formed substantially along the channel length direction. Means.

Although laser crystallization using a continuous wave laser has been described, the present invention is not limited to a continuous wave laser, and laser crystallization using a pulse laser may be performed. This is because even an energy beam (pulse beam) output in a pulsed manner has a laser frequency that can irradiate a laser beam of the next pulse before the semiconductor film is melted and solidified by the laser beam. This is because crystal grains continuously grown in the scanning direction can be obtained if light is oscillated. That is, even if a pulse laser is used, the same effect as when a continuous wave laser is used can be obtained.

Therefore, it is preferable to use a pulse beam in which the lower limit of the oscillation frequency is set so that the period of pulse oscillation is shorter than the time until the semiconductor film is completely solidified after being melted. Specifically, the oscillation frequency of the pulse laser is 10 MHz or more, preferably 60 to 100 MHz, and a frequency band that is significantly higher than the frequency band of several tens to several hundreds of Hz that is normally used as the oscillation frequency of the pulse laser is used.

When the above frequency band is used, the semiconductor film can be irradiated with the next pulse of laser light after the semiconductor film is melted by the laser light and solidified. Therefore, unlike the case of using a pulsed laser in the conventional frequency band, the solid-liquid interface can be continuously moved in the semiconductor film, so that the semiconductor having crystal grains continuously grown in the scanning direction. A film can be formed. More specifically, a set of crystal grains having a width in the scanning direction of 10 to 30 μm and a width in the direction perpendicular to the scanning direction of about 1 to 5 μm can be formed. About crystal grains can be obtained. By forming single crystal grains that extend long along the scanning direction, it is possible to form a semiconductor film having almost no crystal grain boundaries in at least the channel length direction of the TFT.

As the pulse laser, an Ar laser, a Kr laser, an excimer laser, a CO ₂ laser, a YAG laser, a Y ₂ O ₃ laser, a YVO ₄ laser, a YLF laser, a YAlO ₃ laser, a glass laser, which can oscillate at the above frequency, A ruby laser, alexandrite laser, Ti: sapphire laser, copper vapor laser or gold vapor laser can be used.

This embodiment can be freely combined with the above embodiment mode and other embodiments.

In this embodiment, in the wireless chip having a hollow structure according to the present invention, when the film surrounding the thin film integrated circuit is broken, the atmosphere or liquid existing outside the film enters the film and comes into contact with the thin film integrated circuit. Next, an example of a structure in which the deterioration rate of the thin film integrated circuit is increased will be described.

FIG. 26 is a cross-sectional view of a thin film integrated circuit manufactured by the manufacturing method of Example 3.
An insulating film 61 serving as a base is formed on the substrate 10, and a plurality of elements are formed on the insulating film 61. The plurality of elements correspond to a plurality selected from, for example, a thin film transistor, a capacitor element, a resistance element, a diode, and the like. FIG. 26 shows a cross-sectional structure in the case where an N-type thin film transistor 64 and a P-type thin film transistor 65 are formed as a plurality of elements. In FIG. 26, the thin film transistor 64 has an LDD (Lightly Doped Drain) structure including a channel formation region, a lightly doped impurity region, and a heavily doped impurity region. The thin film transistor 65 has a single drain structure including a channel formation region and an impurity region. Note that the structure of the thin film transistor is not limited to the above description, and may be any structure such as a single drain structure, an offset structure, an LDD structure, or a GOLD (Gate Overlapped Lightly Doped Drain) structure. In this embodiment, the thin film transistors 64 and 65 are thin film transistors in which the operation threshold is shifted to the vicinity of the operation limit. In this way, when the film surrounding the thin film integrated circuit is broken, the deterioration rate of the thin film integrated circuit is reduced when an atmosphere or liquid existing outside the film enters the film and comes into contact with the thin film integrated circuit. Get faster.

An insulating film 66 is formed so as to cover the thin film transistors 64 and 65, source / drain wirings 74 to 76 electrically connected to impurity regions of the thin film transistors 64 and 65 are formed, and the source / drain wirings 74 to 76 are covered. Thus, an insulating film 67 is formed. Conductive layers 79 and 80 electrically connected to the source / drain wirings 74 to 76 are formed on the insulating film 67. The conductive layers 79 and 80 function as an antenna. An insulating film 68 is formed so as to cover the conductive layers 79 and 80, and the third film 12 is formed on the insulating film 68. A portion from the insulating film 61 to the insulating film 68 is the TFT layer 11.

A hole 13 is formed in the substrate 10. The feature of the structure of FIG. 26 is that the hole 13 is formed in the substrate 10 in this way. With such a structure, when the film surrounding the thin film integrated circuit is broken and the atmosphere or liquid existing outside the film enters the inside of the film, the atmosphere or liquid existing outside the film is removed from the TFT layer. 11 is in direct contact with the thin film integrated circuit, so that the thin film integrated circuit deteriorates more quickly.

This embodiment can be freely combined with the above embodiment mode and other embodiments.

In this embodiment, in the wireless chip having a hollow structure according to the present invention, when the film surrounding the thin film integrated circuit is broken, the atmosphere or liquid existing outside the film enters the film and comes into contact with the thin film integrated circuit. An example of the structure in which the deterioration rate of the thin film integrated circuit is increased will be described for a structure different from that of the eleventh embodiment.

As shown in FIG. 27, the first film 101 surrounding the thin film integrated circuit 102 is surrounded by the second film 120 so that the space 121 between the first film 101 and the second film 120 is obtained. In addition, a structure in which a gas, a liquid, or a gel containing a substance that promotes deterioration of the thin film transistor included in the thin film integrated circuit is filled is used. Note that a thermoplastic resin may be used for the first film and the second film. Examples of the thermoplastic resin used for the first film and the second film include the materials described in the embodiments and examples.

Examples of the substance that promotes the deterioration of the thin film transistor include Na, K, ammonia, monoethanolamine, H ₂ O, SO _x , and NO _x . When exposed to a gas, liquid, gel, or the like containing a substance that promotes deterioration of these thin film transistors, the electrical characteristics of the thin film transistors are shifted as shown in FIG. In FIG. 28, the horizontal axis represents the gate voltage (Vg), and the vertical axis represents the drain current (Id). 2800 is an electrical characteristic of the thin film transistor before being exposed to a gas, liquid, or gel containing a substance that promotes deterioration, and 2801 is a gas, liquid, or gel containing a substance that promotes deterioration of the thin film transistor. It is an electrical characteristic of the thin-film transistor after exposure. The amount of shift in electrical characteristics of the thin film transistor before and after being exposed to a gas, liquid, gel, or the like containing a substance that promotes deterioration of the thin film transistor corresponds to A in FIG.

Here, even if thin film transistors are generally manufactured so as to have the same electrical characteristics, for example, as shown by 2900, 2901, and 2902 in FIG. 29, there is some variation in electrical characteristics among individual thin film transistors. Here, the range of variation in electrical characteristics between thin film transistors is expressed as ± X with the electrical characteristics in the electrical characteristics 2901 as a reference. In FIG. 29, the horizontal axis represents the gate voltage (Vg), and the vertical axis represents the drain current (Id). Further, the drain current necessary for operating the thin film transistor is Ion, and the gate voltage applied to drive the thin film transistor is Von. In general, the drain current is set to a current value equal to or higher than Ion by applying Von even in the electrical characteristics 2903 that is assumed to be further shifted to a higher voltage side than the variation in electrical characteristics caused by individual thin film transistors. Even in the electrical characteristic 2904 that is assumed to be further shifted to the low voltage side, a current value equal to or less than Ion is obtained by applying Vg = 0. That is, the electric characteristics 2903 and 2904 are the operation limit electric characteristics. The shift amounts of the electrical characteristics 2903 and 2904 with respect to the electrical characteristics 2901 are expressed by Y and Z, respectively. In FIG. 29, when Vg = 0, 2900, 2901, 2902, and 2903 all have Id <Ion and the thin film transistor does not operate, and when Vg = Von, 2900, 2901, 2902, and 2904 all have Id> Ion. Therefore, the thin film transistor operates normally when the variation in electrical characteristics is within the range of −Z or more and + Y or less.

In the case where the thin film transistor has electrical characteristics of 2900, in order to make the thin film transistor not operate even when Vg = Von, the thin film transistor may be further shifted from the electrical characteristics of 2903 which is the operation limit electrical characteristic. Here, the shift amount when shifting from the electrical characteristics of 2900 to the electrical characteristics of 2903 which is the operation limit electrical characteristics is X + Y. Therefore, in order to make the thin film transistor having the electrical characteristics of 2900 inoperative, the electrical characteristics may be shifted so that the shift amount of the electrical characteristics becomes larger than X + Y.

Therefore, the shift amount A when the electrical characteristics of the thin film transistor are shifted by being exposed to a gas, liquid, gel, or the like containing a substance that promotes the deterioration of the thin film transistor is the variation range X of the electrical characteristics between the thin film transistors and the operation limit. The substance that promotes deterioration contained in the gas, liquid, gel, etc. existing in the space 121 between the first film and the second film so as to be larger than the value obtained by adding the shift amount Y of the electrical characteristics. Set the density. Then, by breaking the first film, a gas, liquid, gel, or the like existing in the space 121 between the first film and the second film enters the inside of the first film, and the thin film integrated circuit Is exposed to a gas, liquid, gel, or the like containing a substance that promotes deterioration of the thin film transistor, the electrical characteristics of the thin film transistor included in the thin film integrated circuit shift from the state illustrated in FIG. 29 to the state illustrated in FIG. In FIG. 30, the horizontal axis represents the gate voltage (Vg), and the vertical axis represents the drain current (Id). As can be seen from FIG. 30, in both cases of Vg = 0 and Vg = Von, Id <Ion, and the thin film transistor included in the thin film integrated circuit is always in a non-operational state, which can cause an operation failure.

In this embodiment, a wireless chip having a structure in which a thin film integrated circuit is surrounded by a first film and a first film is surrounded by a second film has been described. That is, a wireless chip having a structure in which a thin film integrated circuit is surrounded by a double film having a space therebetween has been described. However, the thin film integrated circuit may be surrounded by three or more films having a space between them.

In this embodiment, a wireless chip having a structure in which a thin film integrated circuit is surrounded by a first film and the first film is surrounded by a second film has been described. However, the circuit surrounded by the first film is not limited to a thin film integrated circuit, and may be an integrated circuit. For example, an integrated circuit formed on a semiconductor substrate or a thick film integrated circuit may be used. Alternatively, an integrated circuit in which an integrated circuit, a thick film integrated circuit, and a thin film integrated circuit formed on a semiconductor substrate are mixed may be used.

This embodiment can be freely combined with the above embodiment mode and other embodiments.

In this embodiment, an application of the wireless chip of the present invention will be described.
The wireless chip 82 of the present invention is used in a packaging bag 81 as shown in FIG. 25, for example. Since the wireless chip 82 of the present invention has a structure in which a thin film integrated circuit is surrounded by a film, as shown in FIG. 25, a desiccant and a desiccant put together with the food product in a food product packaging bag Similarly, it can be directly put into the packaging bag 81 for use. In addition, the wireless chip of the present invention can be used together with a product in a box (such as a cardboard box) as well as being used in a packaging bag. In this manner, since it is not necessary to adhere and fix to the article, there is no possibility that the wireless chip is peeled off, and a step of fixing the wireless chip to the article can be omitted.

This embodiment can be freely combined with the above embodiment mode and other embodiments.

The figure which shows the cross-section of the wireless chip | tip sealed by this invention. 8A and 8B illustrate a method for manufacturing a sealed wireless chip according to the present invention. 8A and 8B illustrate a method for manufacturing a sealed wireless chip according to the present invention. FIG. 6 is a diagram illustrating Example 1; FIG. 6 is a diagram illustrating Example 1; FIG. 6 is a diagram illustrating Example 1; FIG. 6 is a diagram illustrating Example 1; FIG. 6 is a diagram illustrating Example 1; FIG. 6 is a diagram illustrating Example 3; FIG. 6 is a diagram illustrating Example 3; FIG. 6 is a diagram illustrating Example 6; FIG. 10 is a diagram illustrating Example 7. FIG. 6 is a diagram illustrating Example 1; FIG. 6 is a diagram illustrating a second embodiment. FIG. 6 is a diagram illustrating Example 4; The figure explaining the example of the cross-section of a 1st, 2nd film. FIG. 6 is a diagram illustrating Example 3; FIG. 10 is a diagram illustrating Example 8. FIG. 10 is a diagram illustrating Example 8. FIG. 10 is a diagram illustrating Example 9; FIG. 10 is a diagram illustrating Example 9; FIG. 10 is a diagram illustrating Example 9; FIG. 10 is a diagram illustrating Example 9; FIG. 10 is a diagram illustrating Example 9; FIG. 14 illustrates Example 13. FIG. 10 illustrates Example 11. FIG. 16 illustrates Example 12. 6A and 6B illustrate a shift in electrical characteristics of a thin film transistor. 6A and 6B illustrate variation in electrical characteristics between thin film transistors. FIG. 11 shows electrical characteristics after a thin film transistor is exposed to a substance that promotes deterioration of the thin film transistor. 9A and 9B illustrate a method for shifting electrical characteristics of a thin film transistor to near the operation limit.

Explanation of symbols

10 substrate 11 TFT layer 12 third film 13 hole 61 insulating film 64 N-type thin film transistor 65 P-type thin film transistor 66 insulating film 67 insulating film 68 insulating film 74 source / drain wiring 75 source / drain wiring 76 source / drain wiring 79 conductive layer 80 Conductive layer 81 Packaging bag 82 Wireless chip 91 Transistor 92 Transistor 93 Capacitor transistor 94 Transistor 95 Transistor 96 Resistive element 97 Capacitor transistor 98 Capacitor transistor 99 Resistor element 101 Film 102 Thin film integrated circuit 103 Hollow part 104 Film 105 Hollow part 106 Film 110 Vacuum chuck 111 Arm 112 Arm 203 First film 204 Second film 206 Laser oscillator 207 Wireless chip 208 Wire 210 Base 211 Contact Layer 234 Antenna connection terminal 235 Antenna substrate 236 Anisotropic conductive film 237 Conductor 238 Connection terminal 239 Area 361 provided with connection terminal Insulating film 362 N-type thin film transistor 363 P-type thin film transistor 364 N-type thin film transistor 365 P Type thin film transistor 366 insulating film 367 insulating film 368 insulating film 371 source drain wiring 372 source drain wiring 373 source drain wiring 374 source drain wiring 375 source drain wiring 376 source drain wiring 377 conductive layer 378 conductive layer 379 conductive layer 380 conductive layer 400 substrate 401 Peeling layer 402 TFT layer 403 Strength securing layer 404 Opening 405 Base 406 Adhesive layer 407 Film 408 Thin film integrated circuit 511 Silicon nitride film 512 Silicon oxide film 513 Lower electrode 51 Insulating film 515 Insulating film 516 Gate insulating film 517 Insulating film 518 Source / drain wiring 519 Insulating film 520 Insulating film 521 Semiconductor layer 522 Gate electrode 523 Thin film transistor 524 Conductive layer 601 Capacitor transistor 602 Region overlapping with gate electrode 701 Antenna 702 Rectifier circuit 703 Holding Capacitance 704 Demodulation circuit 705 Clock generation / correction circuit 706 Each code recognition and determination circuit 707 Memory controller 708 Modulation circuit 709 including modulation resistance Encoding circuit 711 Mask ROM
712 Detection Capacitance 713 Detection Capacitance 714 Element Group 715 Wireless Chip 721 Antenna Unit 722 Power Supply Unit 723 Logic Unit 800 Substrate 801 Peeling Layer 802 Insulating Film 803 Insulating Film 811 Semiconductor Film 812 Semiconductor Film 813 Gate Insulating Film 821 First Conductive Layer 822 First 2 conductive layer 823 resist 824 resist 826 gate electrode 827 gate electrode 900 substrate 901 TFT layer 902 third film 903 fourth film 904 grinding means 906 polishing means 907 cutting means 908 thin film integrated circuit 909 pickup means 910 vacuum chuck

Claims (23)

An integrated circuit;
A wireless chip comprising a film having a hollow portion and surrounding the integrated circuit. An integrated circuit;
A wireless chip comprising a film having a hollow portion filled with an inert gas, an inert liquid, or an inert gel and surrounding the integrated circuit. An integrated circuit;
A wireless chip comprising a film having a hollow portion filled with a gas containing a substance that promotes deterioration of the integrated circuit and surrounding the integrated circuit. An integrated circuit;
A wireless chip having a hollow portion filled with a liquid or gel containing a substance that promotes deterioration of the integrated circuit and surrounding the integrated circuit. 4. The wireless chip according to claim 3, wherein the gas containing a substance that promotes deterioration of the integrated circuit is a gas containing moisture. 3. The wireless chip according to claim 2, wherein the integrated circuit has a structure in which a deterioration rate is different between a state where the integrated circuit is not exposed to the outside air and a state where the integrated circuit is exposed to the outside air. The wireless chip according to claim 1, wherein the integrated circuit is a thin film integrated circuit. The wireless chip according to claim 1, wherein the film is a thermoplastic resin. A thin film integrated circuit;
A first film having a hollow portion and surrounding the thin film integrated circuit;
A second film surrounding the first film,
A wireless device in which a space between the first film and the second film is filled with a gas, a liquid, or a gel containing a substance that promotes deterioration of the thin film transistor included in the thin film integrated circuit. Chip. The wireless chip according to claim 9, wherein the first film and the second film are thermoplastic resins. Arranging a plurality of integrated circuits on the first film;
A second film is disposed on the first film on which the plurality of integrated circuits are disposed;
The first film and the second film around the plurality of integrated circuits are heated and melted by heating means from above the second film, and the integrated circuit having the hollow portion is formed in the first circuit. A method for manufacturing a wireless chip, wherein sealing is performed so that the film and the second film are surrounded. Arranging a plurality of integrated circuits on the first film;
A second film is disposed on the first film on which the plurality of integrated circuits are disposed;
The first film and the second film around the plurality of integrated circuits are heated and melted by heating means from above the second film, and the integrated circuit having the hollow portion is formed in the first circuit. A method for manufacturing a wireless chip, wherein sealing and cutting are performed so that the film and the second film are surrounded. Arranging a plurality of integrated circuits on the first film;
A second film is disposed on the first film on which the plurality of integrated circuits are disposed;
By pressing a heated wire from above the second film, the first film and the second film around the plurality of integrated circuits are heated and melted to have a hollow portion and the integrated circuit. A method for manufacturing a wireless chip, wherein sealing and cutting are performed so that the first film and the second film surround the chip. Arranging a plurality of integrated circuits on the first film;
A second film is disposed on the first film on which the plurality of integrated circuits are disposed;
By irradiating the periphery of the plurality of integrated circuits with laser light from the second film, the first film and the second film around the plurality of integrated circuits are melted to form a hollow portion. And a method of manufacturing a wireless chip, wherein the integrated circuit is sealed and cut so that the first film and the second film surround the integrated circuit. In any one of Claims 11 thru | or 14,
The method for manufacturing a wireless chip, wherein the first and second films are thermoplastic resins. In any one of Claims 11 thru | or 15,
The method for manufacturing a wireless chip, wherein the second film is a film having a plurality of convex portions. In any one of Claims 11 thru | or 15,
The method for manufacturing a wireless chip, wherein the first and second films are films having a plurality of convex portions. In claim 16,
A method for manufacturing a wireless chip, wherein the second film and the integrated circuit are arranged so that the integrated circuit is arranged in a portion of the second film where a plurality of convex portions are formed. In claim 17,
A wireless chip, wherein the first and second films and the integrated circuit are arranged so that the integrated circuit is arranged in a portion of the first and second films where a plurality of convex portions are formed. Manufacturing method. In any one of claims 16 to 19,
A method for manufacturing a wireless chip, wherein sealing is performed in an inert gas atmosphere. In any one of claims 16 to 19,
A method for manufacturing a wireless chip, wherein sealing is performed in an atmosphere containing a gas that promotes deterioration of the plurality of integrated circuits. In any one of claims 16 to 19,
A method for manufacturing a wireless chip, wherein sealing is performed in an atmosphere containing a lot of moisture. In any one of Claims 11 thru | or 22,
A method of manufacturing a wireless chip, wherein the integrated circuit is a thin film integrated circuit.

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