JP2006108985A5 - - Google Patents
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- JP2006108985A5 JP2006108985A5 JP2004291394A JP2004291394A JP2006108985A5 JP 2006108985 A5 JP2006108985 A5 JP 2006108985A5 JP 2004291394 A JP2004291394 A JP 2004291394A JP 2004291394 A JP2004291394 A JP 2004291394A JP 2006108985 A5 JP2006108985 A5 JP 2006108985A5
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- JP
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- 230000005540 biological transmission Effects 0.000 claims 1
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004291394A JP4392316B2 (ja) | 2004-10-04 | 2004-10-04 | フレーム中継装置 |
| US11/207,799 US8265072B2 (en) | 2004-10-04 | 2005-08-22 | Frame switching device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004291394A JP4392316B2 (ja) | 2004-10-04 | 2004-10-04 | フレーム中継装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2006108985A JP2006108985A (ja) | 2006-04-20 |
| JP2006108985A5 true JP2006108985A5 (enExample) | 2007-04-05 |
| JP4392316B2 JP4392316B2 (ja) | 2009-12-24 |
Family
ID=36125459
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2004291394A Expired - Lifetime JP4392316B2 (ja) | 2004-10-04 | 2004-10-04 | フレーム中継装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US8265072B2 (enExample) |
| JP (1) | JP4392316B2 (enExample) |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070153796A1 (en) * | 2005-12-30 | 2007-07-05 | Intel Corporation | Packet processing utilizing cached metadata to support forwarding and non-forwarding operations on parallel paths |
| US8281360B2 (en) | 2006-11-21 | 2012-10-02 | Steven Adams Flewallen | Control of communication ports of computing devices using policy-based decisions |
| US7912050B2 (en) * | 2006-12-05 | 2011-03-22 | Electronics And Telecommunications Research Institute | Method for classifying downstream packet in cable modem termination system at head-end supporting channel bonding mode, and cable modem termination system |
| JP4783751B2 (ja) | 2007-03-20 | 2011-09-28 | 富士通株式会社 | 中継装置、中継方法および中継プログラム |
| JP2009290332A (ja) * | 2008-05-27 | 2009-12-10 | Fujitsu Ltd | 接続確認機能を有する伝送装置 |
| JP4871330B2 (ja) * | 2008-08-08 | 2012-02-08 | 日本電信電話株式会社 | フロー判定方法、通信装置及びプログラム |
| US7590245B1 (en) * | 2008-09-10 | 2009-09-15 | Gutman Levitan | Anonymous communicating over interconnected networks |
| WO2011060436A1 (en) * | 2009-11-16 | 2011-05-19 | Marvell Semiconductor, Inc. | Iterative parsing and classification |
| JP5516142B2 (ja) * | 2010-06-30 | 2014-06-11 | 富士通株式会社 | 伝送システム、伝送装置、宛先管理装置、制御ユニット、伝送制御プログラム及び同プログラムを記録したコンピュータ読み取り可能な記録媒体 |
| CN102377634B (zh) * | 2010-08-06 | 2014-02-05 | 北京乾唐视联网络科技有限公司 | 一种接入网设备的入网方法及系统 |
| US8798046B2 (en) * | 2010-12-22 | 2014-08-05 | Juniper Networks, Inc. | Methods and apparatus for providing unique MAC address to individual node for fibre channel over Ethernet (FCoE) traffic |
| US9054863B2 (en) * | 2012-09-04 | 2015-06-09 | Rockwell Automation Asia Pacific Business Center Pte. Ltd. | Industrial protocol system authentication and firewall |
| US9590897B1 (en) * | 2015-02-26 | 2017-03-07 | Qlogic Corporation | Methods and systems for network devices and associated network transmissions |
| US10237192B2 (en) | 2016-11-29 | 2019-03-19 | Google Llc | Apparatus and system for optimizing communication networks |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02308499A (ja) * | 1989-05-23 | 1990-12-21 | Toshiba Corp | 連想メモリ |
| JPH0730554A (ja) | 1993-07-13 | 1995-01-31 | Nec Corp | アドレス変換方式 |
| US6266705B1 (en) * | 1998-09-29 | 2001-07-24 | Cisco Systems, Inc. | Look up mechanism and associated hash table for a network switch |
| US6570875B1 (en) * | 1998-10-13 | 2003-05-27 | Intel Corporation | Automatic filtering and creation of virtual LANs among a plurality of switch ports |
| US6445709B1 (en) * | 1999-05-13 | 2002-09-03 | Advanced Micro Devices, Inc. | Method and apparatus for finding a match entry using receive port number embedded in the port vector |
| US6778547B1 (en) * | 1999-05-21 | 2004-08-17 | Advanced Micro Devices, Inc. | Method and apparatus for improving throughput of a rules checker logic |
| JP2003078549A (ja) * | 2001-08-31 | 2003-03-14 | Hitachi Ltd | パケット転送方法およびその装置 |
| US7058642B2 (en) * | 2002-03-20 | 2006-06-06 | Intel Corporation | Method and data structure for a low memory overhead database |
| US7367052B1 (en) * | 2002-12-04 | 2008-04-29 | Cisco Technology, Inc. | Access list key compression |
-
2004
- 2004-10-04 JP JP2004291394A patent/JP4392316B2/ja not_active Expired - Lifetime
-
2005
- 2005-08-22 US US11/207,799 patent/US8265072B2/en active Active
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