JP2006080286A - Forming method of circuit wiring and circuit wiring obtained thereby - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To easily form circuit wiring even on a substrate in a slid shape. <P>SOLUTION: A wiring pattern 23 is drawn on a metal layer 22 by using a material containing ultrafine particles and a dispenser 24. The material containing the ultrafine particles is heated to volatilize a solvent. The solvent is all volatilized and the ultrafine particles become dense to mutually be fused even at room temperature. The metal layer 22 is etched by using a wiring mask layer 23 after a baking treatment. Consequently, the circuit wiring 25 is obtained which has the wiring mask layer 23 on a molding substrate 21 across the metal layer 22. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a method for forming circuit wiring and circuit wiring obtained thereby, and more particularly to a method for forming circuit wiring in a three-dimensionally formed circuit and circuit wiring obtained thereby.

  Conventionally, many methods for forming circuit wiring on a printed wiring board have been developed. For example, a metal layer is formed on a substrate, a resist layer is formed on the metal layer, the resist layer is exposed and developed using a mask to which a wiring pattern is transferred, and the remaining resist layer is used as an etching mask to form a metal layer. A method of etching is generally used.

JP-A-5-175635

  In recent years, a method of forming circuit wiring on a molded substrate formed by molding a plastic material by MID (Molded Interconnect Device) technology has been developed. Since this molded substrate is obtained by plastic molding, there are various shapes including three-dimensional shapes. When forming circuit wiring on a substrate having such a complicated shape, the conventional method cannot easily and efficiently form circuit wiring on the substrate.

  The present invention has been made in view of the above points, and provides a method for forming a circuit wiring that can easily form a circuit wiring even on a substrate having a three-dimensional shape, and a circuit wiring obtained thereby. With the goal.

The method for forming circuit wiring according to the present invention includes a step of forming a metal layer on an insulating substrate, and a wiring mask layer is formed by drawing a wiring pattern on the metal layer using a material containing ultrafine particles. And a step of etching the metal layer using the wiring mask layer.

  According to this method, since the wiring mask layer can be used as an etching mask for the metal layer, the photolithography process for the etching mask can be reduced. As a result, circuit wiring can be easily formed.

  In the circuit wiring forming method of the present invention, the metal layer is preferably made of copper. In the method for forming a circuit wiring of the present invention, the ultrafine particles are preferably silver particles having a diameter of several nanometers.

  The circuit wiring of the present invention is a circuit wiring having a wiring mask layer formed on an insulating substrate via a metal layer, wherein the metal layer is formed on the insulating substrate, and the ultrafine metal is formed on the metal layer. A wiring mask layer is formed by drawing a wiring pattern using a material containing particles, and the metal layer is etched using the wiring mask layer.

  According to this configuration, the metal layer becomes the main conductor of the circuit wiring, and exhibits a normal circuit wiring function. In the wiring mask layer, ultrafine particles are fused to each other to become a metal close to a bulk state. For this reason, it becomes possible to bond favorably with respect to the circuit wiring of such a structure.

  In the circuit wiring of the present invention, the wiring mask layer is preferably at least several tens of nm.

  According to the present invention, a metal layer is formed on an insulating substrate, and a wiring mask layer is formed on the metal layer by drawing a wiring pattern using a material containing ultrafine particles. Since the metal layer is etched using the wiring mask layer, the wiring mask layer can be used as an etching mask for the metal layer, and the photolithography process for the etching mask can be reduced. As a result, circuit wiring can be easily formed even on a substrate having a three-dimensional shape.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
FIG. 1 is a perspective view showing a three-dimensional board having circuit wiring according to an embodiment of the present invention. In FIG. 1, a molded substrate 11 that is an insulating substrate is not a normal planar substrate but a substrate having a three-dimensional shape having a substantially L-shaped cross section. In this embodiment, the width is 3 mm, the depth is 3 mm, and the height is 1 mm. Such a small-sized molded substrate 11 can be molded from a material having excellent fluidity, such as a liquid crystal polymer. The molded substrate 11 is not limited to such dimensions and can be variously changed. Moreover, as a material which comprises the shaping | molding board | substrate 11, if it is an insulating material, you may use another plastic material and a ceramic material.

  A plurality of wirings 12 are formed on the molded substrate 11. A method for forming the wiring 12 on the molded substrate 11 will be described later. An integrated circuit chip 13 is mounted on the molded substrate 11. The integrated circuit chip 13 is electrically connected to the wiring 12 by a bonding wire 14. The bonding wire 14 connects the electrode pad 13 a formed on the integrated circuit chip 13 and the wiring 12.

  Next, a method according to the present invention for forming the wiring 12 on the molded substrate 11 will be described. FIGS. 2A and 2B and FIGS. 3A to 3C are cross-sectional views for explaining a method for forming a circuit wiring according to an embodiment of the present invention. 2 (a), 2 (b) and FIGS. 3 (a) to 3 (c) will be described using a part of the planar portion of the molded substrate 11 for the sake of simplicity.

  As shown in FIG. 2A, a molded substrate 21 which is an insulating substrate is manufactured by injection molding of a plastic material or the like. Next, as shown in FIG. 2B, a metal layer 22 is formed on the molded substrate 21 by plating a metal. As a metal used for the metal layer 22, a conductive metal such as Cu can be used. As plating, electroplating or electroless plating can be used. In consideration of the uniformity of the film thickness, it is preferable to use electroless plating. In addition, when performing a plating process, the surface of the shaping | molding board | substrate 21 is roughened beforehand, a catalyst is provided to the surface, and it activates. Thereby, a metal can be plated on the surface of the shaping | molding board | substrate 21 comprised with the plastic material. In this case, the catalyst is appropriately selected depending on the metal constituting the metal layer 22.

  Next, as shown in FIG. 3A, a wiring pattern is drawn on the metal layer 22 using a material containing ultrafine particles using a dispenser 24. Examples of the ultrafine particles of the material containing ultrafine particles include nanoparticles having a particle size of several nanometers to several tens of nanometers. Examples of the kind of nanoparticles include conductive metal nanoparticles such as silver nanoparticles, gold nanoparticles, and copper nanoparticles. In addition, about a silver nanoparticle, migration can be prevented by setting it as the nanoparticle of the multicomponent metal containing silver. The particle size of the nanoparticles is more preferably 2 nm to 50 nm.

  Examples of the material containing ultrafine particles include a paste obtained by dispersing the ultrafine particles in a solvent. As the solvent, a binder resin that is volatilized by heating and does not remain on the surface of the ultrafine particles is preferable, unlike a binder resin used in a normal metal paste. By using such a solvent, a material containing ultrafine particles can be heated to volatilize the solvent, and the ultrafine particles can be fused together to obtain a metal close to a bulk.

  Moreover, as a drawing method of the material containing ultrafine particles, a dispensing method using a dispenser 24, a screen printing method, an ink jet method, or the like can be used. By these methods, the wiring mask layer 23 is formed by drawing directly on a place to be a wiring pattern. Thereby, it is not necessary to form the wiring mask layer 23 by etching, and the pattern cut of the wiring mask layer 23 due to over-etching can be avoided. Although the thickness of the wiring mask layer 23 depends on the material constituting the wiring mask layer 23, it is set to a thickness that allows bonding to the circuit wiring. For example, it is preferably at least several tens of nm. By using such a thickness, it becomes possible to perform good bonding in circuit wiring.

  Next, as shown in FIG. 3B, the material containing ultrafine particles is heated to volatilize the solvent. By eliminating the solvent, the ultrafine particles are densely fused to each other even at room temperature. Thereby, the metal near a bulk state is obtained. This is different from a form in which metal particles are in point contact with each other in a metal paste in which metal particles of several hundred nm order or micron order are dispersed in a binder resin. Therefore, the wiring mask layer 23 has a relatively low resistance and can be used as a normal circuit wiring.

  Next, as shown in FIG. 3C, the metal layer 22 is etched using the wiring mask layer 23 after the baking treatment as an etching mask. Thereafter, the metal layer 22 after the etching treatment is washed and dried. Thereby, the circuit wiring 25 which has the wiring mask layer 23 on the shaping | molding board | substrate 21 through the metal layer 22 is obtained.

  In such a circuit wiring 25, in the wiring mask layer 23, ultrafine particles are fused to each other to become a metal close to a bulk state. For this reason, it becomes possible to bond favorably with respect to the circuit wiring of such a structure. In addition, since the wiring mask layer 23 can be used as an etching mask for the metal layer, the photolithography process for the etching mask can be reduced. As a result, circuit wiring can be easily formed even with the molded substrate 21 having a three-dimensional shape.

  Next, examples of the present invention will be described. In addition, this Example is an illustration and is not limited to the following method. Here, a case where the molded substrate is a plastic substrate, the metal layer is a Cu layer, and the wiring mask layer is a layer composed of silver nanoparticles having a particle size of several nm will be described.

  First, a liquid crystal polymer, Vectra C820 (trade name, manufactured by Polyplastics Co., Ltd.) was injection molded to obtain a molded substrate having a shape shown in FIG. 1 having a width of 3 mm, a depth of 3 mm, and a height of 1 mm. Next, the molded substrate was immersed in a NaOH (600 g / l) solution at 85 ° C. for 20 minutes to roughen the surface of the molded substrate, washed with water and dried, and then the roughened molded substrate was diluted with 10% dilute hydrochloric acid at 45 ° C. And then neutralized by immersion for 5 minutes, washed with water and dried.

  Next, the molded substrate after the roughening treatment was subjected to a surface conditioning treatment at 45 ° C. for 3 minutes using a surface conditioning agent and a conditioner cleaner 231 (trade name, manufactured by Shipley Co., Ltd.). After washing with water and drying, the molded substrate is immersed in a catalyst pre-soaked solution, Cataprip 404 (product name of Shipley Co., Ltd.) for 1 minute at room temperature, followed by Pd catalyst solution, Cataposit 44 (product name of Shipley Co., Ltd., product name). ) At 50 ° C. to give a catalyst to the surface of the molded substrate. After washing with water and drying, it was immersed for 7 minutes at room temperature in a catalytically active treatment solution, accelerator 19E (trade name, manufactured by Shipley Co., Ltd.).

  Next, the molded substrate with a catalyst applied to the surface was immersed in an electroless plating bath of Cu and plated at 45 ° C. for 15 minutes. Thereby, a Cu layer having a thickness of about 1 μm was formed on the molded substrate. As the Cu plating solution, Omnishield 1598 (trade name, manufactured by Shipley Co., Ltd.) was used.

  Next, using an air dispenser having a high-definition nozzle on the Cu layer and a three-axis control robot, an Ag nano paste containing Ag nanoparticles having a particle size of 3 to 5 nm at a desired position on the molded substrate, that is, a wiring pattern region NPS (trade name, manufactured by Harima Kasei Co., Ltd.) was drawn. The drawing conditions were an air pressure of 200 to 300 kPa, a drawing speed of 0.7 to 1.0 mm / s, a nozzle gap of 0.08 to 0.15 mm, and a line width of about 200 μm. The high-definition nozzle uses FN-0.1N (trade name, manufactured by Musashi Engineering), the air dispenser uses ML-808FX (trade name, manufactured by Musashi Engineering), and the 3-axis control robot is SHOTminiSL. (Trade name, manufactured by Musashi Engineering Co., Ltd.) was used.

  Next, the Ag nanopaste was baked in the hot air drying furnace at 240 ° C. for 60 minutes in the air. As a result, the solvent in the Ag nanopaste volatilized and the Ag nanoparticles were fused together to obtain an Ag wiring mask layer.

  Next, using the Ag wiring mask layer as an etching mask, the Cu layer was etched for 30 seconds at 25 ° C. using a 0.5 M ammonium persulfate solution, and then washed and dried. Thereby, the circuit wiring comprised by Cu layer (lower layer) and Ag wiring mask layer (upper layer) was formed on the shaping | molding board | substrate. The line width of this circuit wiring was 150 to 200 μm. In this way, circuit wiring can be easily formed even with a molded substrate having a three-dimensional shape.

When wire bonding was performed under normal conditions using a gold wire having an outer diameter of 20 μm on the circuit wiring of the molded substrate thus obtained, it was possible to bond without problems. This is presumably because the Cu layer prevents the diffusion of ultrasonic waves during bonding, and the Ag nanoparticles of the Ag wiring mask layer are fused like Ag bulk. Further, this Ag wiring mask layer had a specific resistance value of about 8 × 10 ⁻⁶ Ω · cm, and showed a sufficiently low resistance value for circuit wiring.

  The present invention is not limited to the embodiment described above, and can be implemented with various modifications. For example, the numerical values, materials / materials, shapes of each member, and wiring layout described in the above embodiment are not particularly limited, and can be changed as appropriate without departing from the scope of the present invention.

In the above embodiment, a case where a Cu layer is used as the metal layer and a layer containing silver nanoparticles is used as the wiring mask layer is described. In the present invention, a metal layer other than Cu is used as the metal layer. It may be used, and a layer containing nanoparticles of metal other than silver may be used as the wiring mask layer.

It is a perspective view which shows the three-dimensional board | substrate which has the circuit wiring which concerns on one embodiment of this invention. (A), (b) is sectional drawing for demonstrating the formation method of the circuit wiring which concerns on one embodiment of this invention. (A)-(c) is sectional drawing for demonstrating the formation method of the circuit wiring which concerns on one embodiment of this invention.

Explanation of symbols

11, 21 Molded substrate 12 Wiring 13 Integrated circuit chip 13a Electrode pad 14 Bonding wire 22 Metal layer 23 Wiring mask layer 24 Dispenser 25 Wiring

Claims (5)

  Forming a metal layer on an insulating substrate; forming a wiring mask layer by drawing a wiring pattern on the metal layer using a material containing ultrafine particles; and using the wiring mask layer And a step of etching the metal layer.   2. The circuit wiring forming method according to claim 1, wherein the metal layer is made of copper. The method of forming a circuit wiring according to claim 1 or 2, wherein the ultrafine particles are silver particles having a diameter of several nanometers.   Circuit wiring having a wiring mask layer formed on an insulating substrate through a metal layer, wherein the metal layer is formed on the insulating substrate, and a material containing ultrafine particles is used on the metal layer A circuit wiring obtained by forming a wiring mask layer by drawing a wiring pattern and etching the metal layer using the wiring mask layer. The circuit wiring according to claim 4, wherein the wiring mask layer is at least several tens of nm.

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