JP2006080181A - Semiconductor device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a highly reliable semiconductor device receiving a solid imaging element in a package whose mounting area is more reduced, and reflow mounting, and also to provide its manufacturing method. <P>SOLUTION: The semiconductor device comprises: a translucent substrate 11 having at least a transparent electrode 12 and a transparent electrode pattern 13; the solid imaging element 14 having an electrode region 15 around the main surface side and provided with a space S between the electrode region 15 and the translucent substrate 11, since the electrode region 15 is connected electrically to the transparent electrode 12; a circuit substrate 21 arranged on the rear surface side of the solid imaging element 14, and provided with a connecting unit 22 connected to the translucent substrate 11 while being provided with the signal transfer route of the solid imaging element 14 formed thereon; and a plurality of external terminals 28 provided on the external mounting surface of the circuit substrate 21 and having respective connecting relation with the signal transfer route. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention particularly relates to a semiconductor device that realizes packaging of a solid-state imaging device and a method for manufacturing the same.

In recent years, miniaturized mounting of solid-state imaging devices has become an indispensable technology for electronic products having camera functions such as portable devices. For example, an optical glass plate is attached to a flexible wiring board such as a TAB tape. The solid-state image sensor is mounted face-down on this wiring board (see, for example, Patent Document 1).
JP 2000-183368 A (page 3, page 4, FIGS. 1 and 2)

  For sensor ICs such as solid-state image sensors, reflow mounting is desired for connection to the main circuit board. The reason is that the technology is established, is inexpensive, and can be mounted in the same manner as other ICs. However, reflow mounting is not possible with a structure using a flexible wiring board. A configuration using a thin wiring board instead of a flexible wiring board is also conceivable. As a result, a configuration capable of reflow mounting is conceivable, but it is difficult to reduce the mounting area. In other words, in the above configuration, the soldering is formed on a wiring board that protrudes at least around the outside of the sensor IC. This is disadvantageous in reducing the package size and the mounting area.

  The present invention has been made in consideration of the above-described circumstances, and provides a highly reliable semiconductor device that can be reflow mounted by placing a solid-state imaging device in a package with a smaller mounting area, and a method for manufacturing the same. It is what.

  The semiconductor device according to the present invention includes a translucent substrate having at least a transparent electrode, an electrode region around the main surface side, and the electrode region is electrically connected to the transparent electrode, thereby transmitting the translucent substrate. A solid-state image sensor provided with a space between the light-transmitting substrate and a back surface side of the solid-state image sensor, and having a connection portion with the translucent substrate and forming a signal transmission path of the solid-state image sensor. And a plurality of external terminals provided on the external mounting surface of the circuit substrate and having a connection relationship with the signal transmission path.

  According to the semiconductor device of the present invention, the circuit base is provided on the back side of the solid-state imaging device, and the external terminals are provided on the external mounting surface of the circuit base. This reduces the mounting area. Moreover, it is stronger against external forces such as handling. Depending on the configuration of the external terminals, more terminals can be mounted. In addition, it is easy to adopt a configuration that can support reflow mounting.

Note that the semiconductor device according to the present invention can have any of the following characteristics, whereby a more preferable configuration can be obtained in terms of reliability, mass productivity, or economic efficiency.
The electrode region in the solid-state imaging device includes a plurality of bump electrodes.
The electrode region in the solid-state imaging device is connected to the transparent electrode using an anisotropic conductive member.
The connection part of the circuit base material is electrically connected to a conductive pattern provided on the circuit base material in the periphery of the solid-state imaging device and the conductive pattern to a predetermined part of the translucent substrate. The anisotropic conductive member is included.
An air passage leading to a space between the solid-state image sensor and the translucent substrate is provided in a connection portion between the electrode region of the solid-state image sensor and the translucent substrate in the circuit base material. .
The connection portion in the circuit base material is formed with a thickness larger than the thickness of the solid-state imaging device plus the height of the electrode region in the periphery of the solid-state imaging device. .
The circuit substrate is provided with a recess in which the solid-state image sensor is accommodated.
The external terminals are formed in an array including solder balls.

  In the method for manufacturing a semiconductor device according to the present invention, at least a translucent substrate having a transparent electrode is electrically connected to an electrode region around the solid-state image sensor main surface side, and the translucent substrate and the solid-state image sensor main surface Forming a first unit that faces each other with a space therebetween, a connecting member for connecting the translucent substrate in a peripheral region on one side, and a signal transmission path corresponding to the solid-state image sensor inside Forming a second unit that is provided with external terminal regions related to these signal transmission paths on the other surface side, and the solid-state image pickup device in the first unit on one surface side of the second unit. And electrically connecting the connecting member of the second unit to the translucent substrate.

  According to the method for manufacturing a semiconductor device according to the present invention, the main surface of the solid-state imaging device is protected by the light-transmitting substrate by the step of forming the first unit. Thereby, subsequent handling becomes easy. The circuit base of the second unit can be provided with a wide external terminal region on the other surface side that overlaps the solid-state image sensor with one surface facing the back surface side of the solid-state image sensor in the first unit.

In addition, in the manufacturing method of the semiconductor device which concerns on the said invention, it can become a more preferable manufacturing method regarding reliability, mass-productivity, or economical efficiency by having either of the following characteristics.
The electrode region of the solid-state imaging device in the first unit has a plurality of bump electrodes having a predetermined height, and is connected to the transparent electrode of the translucent substrate using an anisotropic conductive member. To do.
The connection member of the second unit forms a conductive pattern at a predetermined height, and is electrically connected to a predetermined portion of the translucent substrate in the first unit using an anisotropic conductive member. And
In the first unit and the second unit, an air passage leading to a space between the solid-state imaging device and the translucent substrate is provided.
In the second unit, the circuit base material is previously provided with a recess for accommodating the solid-state imaging device.
The external terminal region is reflow-mounted when mounted on the main circuit board by forming solder balls.

BEST MODE FOR CARRYING OUT THE INVENTION

FIG. 1 is a cross-sectional view showing a main configuration of a semiconductor device according to a first embodiment of the present invention. This is an IC package structure in which a solid-state image sensor is sealed.
As for the glass substrate 11 as a translucent board | substrate, the transparent electrode pattern 13 is formed as a pattern which has the transparent electrode 12 and a connection relation with this in the peripheral region. The transparent electrode 12 and its pattern 13 may be an ITO (indium tin oxide) film or the like. The solid-state image sensor 14 has an electrode region 15 that transmits a signal around the main surface. The electrode region 15 includes a plurality of bump electrodes 15B having a predetermined height, for example, and is connected to the transparent electrode 12 of the glass substrate 11, respectively. For example, an anisotropic conductive member 16 is used to connect the bump electrode 15B and the transparent electrode 12. The anisotropic conductive member 16 may be made of ACF (anisotropic conductive film), ACP (anisotropic conductive paste), or the like. As described above, the electrode region 15 is electrically connected to the transparent electrode 12, thereby providing a space S between the glass substrate 11.

  Further, the circuit substrate 21 is disposed on the back side of the solid-state imaging device 14. The circuit substrate 21 has a multilayer wiring layer 24. In the circuit base material 21, a signal transmission path of the solid-state imaging device 14 is formed by an internal wiring layer 24. The circuit base 21 has an electrical connection portion 22 with a terminal area by the transparent electrode pattern 13 of the glass substrate 11. The connecting portion 22 has a conductive pattern 22P formed on the circuit substrate 21 on the peripheral side of the solid-state imaging device 14 and having a thickness larger than the thickness of the solid-state imaging device 14 plus the height of the bump electrode 15B. . The conductive pattern 22P has, for example, a predetermined height that has been subjected to a predetermined plating process, and is electrically connected to the glass substrate 11 side using the anisotropic conductive member 23. The anisotropic conductive member 23 may be ACF, ACP, or the like. With such a configuration, the solid-state imaging device 14 is accommodated between the glass substrate 11 and the circuit base 21 with a step of the conductive pattern 22P.

  The external terminal 28 is connected to a signal transmission path by the wiring layer 24 in the circuit base 21 and is provided on the external mounting surface side of the circuit base 21. The external terminal 28 is provided for mounting on the main circuit board 30. The external terminal 28 is, for example, a solder ball, and is provided corresponding to the land 25 on the external mounting surface of the circuit substrate 21.

  According to the configuration of the first embodiment, the circuit base 21 is provided on the back surface side of the solid-state imaging device 14, and the external terminals 28 are provided on the external mounting surface of the circuit base 21. This reduces the mounting area. Further, the side surface of the circuit substrate 21 is stronger against external forces such as handling. In addition, the area occupied by the external terminals 28 is large, and it is possible to deal with mounting more terminals. Further, by providing solder balls as the external terminals 28, it is easy to adopt a configuration that can cope with reflow mounting.

  2 and 3 are cross-sectional views showing the main part of the manufacturing method of the semiconductor device according to the second embodiment of the present invention in the order of steps, and the main part process for realizing the configuration of the first embodiment is shown. Show. The same parts as those in FIG. 1 are described with the same reference numerals.

  As shown in FIG. 2, a solid-state imaging device 14 is mounted face-down on a glass substrate 11 as a light-transmitting substrate. That is, the glass substrate 11 is formed with a transparent electrode 12 and a transparent electrode pattern 13 having a connection relationship with the transparent electrode 12 in the peripheral region. The solid-state imaging device 14 has a thickness of about 50 μm as an IC. Further, the solid-state imaging device 14 has, for example, a bump electrode 15B having a height of about 20 μm as an electrode region 15 that transmits a signal to the periphery on the main surface side.

The solid-state imaging device 14 electrically connects the bump electrode 15 </ b> B to the transparent electrode 12 of the glass substrate 11. The connection between the bump electrode 15B and the transparent electrode 12 is achieved through an anisotropic conductive member 16 (ACF, ACP, etc.). The bump electrode 15 </ b> B has a predetermined height, and the solid-state imaging device 14 can easily obtain a predetermined space between the glass substrate 11. Thereby, the 1st unit U1 which the glass substrate 11 and the solid-state image sensor 14 main surface oppose across the space S is formed.
In addition, it is more useful as a countermeasure against thermal expansion if the space S is provided with a slight airway rather than being sealed. It is also conceivable to use a gap in the anisotropic conductive member 16 between the electrodes.

  Next, as shown in FIG. 3, the circuit base material 21 is formed. That is, the circuit substrate 21 has a multilayer wiring layer 24 formed therein, and a conductive pattern 22P having a predetermined height is formed in a peripheral region on one surface side through a plating process or the like. The conductive pattern 22P is thicker than at least the solid-state imaging device 14 with the bump electrode 15B and has a height of 71 μm or more. Thereby, the level | step difference which can accommodate the solid-state image sensor 14 between the glass substrate 11 and the circuit base material 21 is obtained. Further, lands 25 are formed as external terminal regions on the other surface side (external mounting surface) of the circuit substrate 21. The circuit unit 21 forms the second unit U2 that realizes the signal transmission path of the solid-state imaging device 14.

  Thereafter, the one surface side of the second unit U2 is opposed to the back surface side of the solid-state imaging device 14 in the first unit U1, and combined. That is, the conductive pattern 22 </ b> P of the circuit substrate 21 is connected to the terminal area by the transparent electrode pattern 13 of the glass substrate 11. This connection is achieved through the anisotropic conductive member 23 (ACF, ACP, etc.). Thereby, an IC package of the solid-state imaging device is configured.

  Although not shown, after that, as shown in FIG. 1, for example, if solder balls as external terminals 28 are provided on the lands 25 of the circuit base 21, reflow mounting on the main circuit board 30 is possible.

According to the method of the second embodiment, the main surface of the solid-state imaging device 14 is separately protected by the glass substrate 11 in the step of forming the first unit U1. Thereby, subsequent handling becomes easy. For example, one of the advantages is that the cleanliness class of the clean room is lowered in the subsequent handling and production line. This leads to a reduction in manufacturing costs.
Further, the circuit base member 21 of the second unit U2 has one side facing the back side of the solid-state image sensor 14 in the first unit U1, and a wide external terminal area on the other side that overlaps the solid-state image sensor 14. Can be provided. As a result, multi-terminal mounting can also be supported.

  FIG. 4 is a plan view showing the main part of the semiconductor device according to the third embodiment of the present invention, and more specifically shows countermeasures against thermal expansion in the configuration of the first embodiment. The same parts as those in FIG. 1 are described with the same reference numerals.

  Under the glass substrate 11 as a translucent substrate, there is a solid-state imaging device 14 mounted face-down. The solid-state imaging device 14 is provided with an MLA (microlens array) in the central area of the main surface. The solid-state imaging device 14 is connected to the transparent electrode (12 in FIG. 1) of the glass substrate 11 by the electrode region 15 (bump electrode 15B) around the main surface, and obtains a space S between the glass substrate 11. For example, an anisotropic conductive member 16 such as ACF or ACP is used to connect the bump electrode 15B and the transparent electrode.

  Further, the circuit substrate 21 is disposed on the back side of the solid-state imaging device 14. In the circuit substrate 21, a signal transmission path of the solid-state imaging device 14 is formed by an internal wiring layer (24 in FIG. 1). The circuit base 21 has an electrical connection portion 22 with a terminal area (not shown) by the transparent electrode pattern 13 around the glass substrate 11. Also in the configuration of the connection portion 22, for example, the conductive pattern 22P and the anisotropic conductive member 23 having a predetermined height are used. The anisotropic conductive member 23 may be ACF, ACP, or the like.

  In the third embodiment, an air passage 41 communicating with the space S between the solid-state image sensor 14 and the glass substrate 11 is provided in the electrode region 15 of the solid-state image sensor 14 and the connection portion 22 in the circuit base material 21. Thereby, when reflow soldering is performed on the main circuit board (30 in FIG. 1), the thermally expanded internal air can be discharged to the outside.

According to the third embodiment, the airway 41 leading to the space S between the solid-state imaging device 14 and the glass substrate 11 is provided. Thereby, it is possible to realize an IC package of a solid-state imaging device having a more excellent capability for reflow mounting.
In the third embodiment, the airway 41 is provided in all directions, but there are various ways of arranging the airway and the number of positions and the number of airways. What is necessary is just to arrange | position so that arrangement | positioning of the electrode area | region 15 or the connection part 22 may not be prevented.

FIG. 5 is a cross-sectional view showing the main configuration of a semiconductor device according to the fourth embodiment of the present invention, and shows an IC package structure in which a solid-state image sensor is sealed as a modification of FIG.
As for the glass substrate 51 as a translucent board | substrate, the transparent electrode pattern 53 is formed in the peripheral region as a pattern which has the transparent electrode 52 and a connection relation with this. The transparent electrode 52 and its pattern 53 may be an ITO (indium tin oxide) film or the like. The solid-state imaging device 54 has an electrode region 55 that transmits a signal around the main surface. The electrode region 55 includes a plurality of bump electrodes 55B having a predetermined height, for example, and is connected to the transparent electrode 52 of the glass substrate 51, respectively. For the connection between the bump electrode 55B and the transparent electrode 52, for example, an anisotropic conductive member 56 such as ACF or ACP is used. As described above, the electrode region 55 is electrically connected to the transparent electrode 52, thereby providing a space S between the glass substrate 51.

  In addition, the circuit base 61 is disposed on the back side of the solid-state image sensor 54. The circuit substrate 61 has a multilayer wiring layer 64. In the circuit base 61, a signal transmission path of the solid-state imaging device 54 is formed by an internal wiring layer 64. The circuit substrate 61 has a recess 66 in which the solid-state imaging element 54 is accommodated. The circuit base 61 has an electrical connection 62 with a terminal area by the transparent electrode pattern 53 of the glass substrate 51. The connecting portion 62 has, for example, a conductive pattern 62P having a predetermined height subjected to a predetermined plating process, and is electrically connected to the glass substrate 51 side using the anisotropic conductive member 63. The anisotropic conductive member 63 may be made of ACF, ACP, or the like.

  The external terminal 68 is connected to the signal transmission path by the wiring layer 64 in the circuit base 61 and is provided on the external mounting surface side of the circuit base 61. The external terminal 68 is provided for mounting on the main circuit board 30. The external terminal 68 is, for example, a solder ball, and is provided corresponding to the land 65 on the external mounting surface of the circuit substrate 61.

  According to the configuration of the fourth embodiment, the circuit base 61 having the recess 66 in which the solid-state image sensor 54 is accommodated is disposed on the back side of the solid-state image sensor 54. As a result, the package configuration can be made thinner than the configuration of the first embodiment. Further, it is possible to easily mount the solid-state imaging element 54 having a larger thickness than the configuration of the first embodiment.

  Other effects are the same as those of the first embodiment. That is, the external terminals 68 are provided on the external mounting surface of the circuit substrate 61. This reduces the mounting area. Further, the side surface of the circuit substrate 61 is more tough against external forces such as handling. In addition, the area occupied by the external terminals 68 is large, and it is possible to deal with mounting more terminals. Further, by providing solder balls as the external terminals 68, it is easy to adopt a configuration that can cope with reflow mounting. Of course, an airway (41) as shown in the third embodiment may be provided.

  In addition, in the structure and method of each said embodiment, the glass substrate 11 or 51 may add an infrared cut filter. Furthermore, an antireflection coating may be added, which contributes to improved performance. Moreover, although the connection parts 22 and 62 were shown by the conductive patterns 22P and 62P, you may form a bump electrode.

  As described above, according to the present invention, the circuit substrate is provided on the back surface side of the solid-state imaging device, and the external terminals are provided on the external mounting surface of the circuit substrate. This reduces the mounting area. Further, most of the side surfaces of the package are the circuit substrate side portions, and are more tough against external forces such as handling. Depending on the configuration of the external terminals, more terminals can be mounted. In addition, it is easy to adopt a configuration that can support reflow mounting. As a result, it is possible to provide a highly reliable semiconductor device that can be reflow-mounted and housed in a package with a smaller mounting area, and a manufacturing method thereof.

Sectional drawing which shows the principal part structure of the semiconductor device which concerns on 1st Embodiment. The 1st sectional view showing the manufacturing method of the semiconductor device concerning a 2nd embodiment in order of a process. The 2nd sectional view following Drawing 2. The top view which shows the principal part of the semiconductor device which concerns on 3rd Embodiment. Sectional drawing which shows the principal part structure of the semiconductor device which concerns on 4th Embodiment.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 11,51 ... Glass substrate, 12, 52 ... Transparent electrode, 13, 53 ... Conductive pattern, 14, 54 ... Solid-state image sensor, 15, 55 ... Electrode area | region, 15B, 55B ... Bump electrode, 16, 23, 56, 63 ... anisotropic conductive member, 21, 61 ... circuit substrate, 22, 62 ... connection part, 22P, 62P ... conductive pattern, 24, 64 ... wiring layer, 25, 65 ... land, 28, 68 ... external terminal, 30 ... main circuit board, 41 ... airway, 66 ... depression, S ... space, U1 ... first unit, U2 ... second unit.

Claims (14)

A translucent substrate having at least a transparent electrode;
A solid-state imaging device having an electrode region around the main surface side, and a space provided between the electrode region and the translucent substrate by being electrically connected to the transparent electrode;
A circuit base material disposed on the back side of the solid-state image sensor, having a connection part with the translucent substrate and having a signal transmission path of the solid-state image sensor;
A plurality of external terminals provided on the external mounting surface of the circuit substrate, each having a connection relationship with the signal transmission path;
A semiconductor device including: The semiconductor device according to claim 1, wherein the electrode region in the solid-state imaging device includes a plurality of bump electrodes. The semiconductor device according to claim 1, wherein the electrode region of the solid-state imaging device is connected to the transparent electrode using an anisotropic conductive member. The connection part of the circuit base material is electrically connected to a conductive pattern provided on the circuit base material in the periphery of the solid-state imaging device and the conductive pattern to a predetermined part of the translucent substrate. The semiconductor device as described in any one of Claims 1-3 containing these anisotropic conductive members. 5. The air passage leading to a space between the solid-state image sensor and the translucent substrate is provided at a connection portion between the electrode region of the solid-state image sensor and the translucent substrate in the circuit base material. The semiconductor device according to any one of the above. The said connection part in the said circuit base material is formed in the circumference | surroundings of the said solid-state image sensor with thickness larger than the part which added the height of the said electrode area | region to the thickness of the said solid-state image sensor. The semiconductor device according to any one of the above. The semiconductor device according to claim 1, wherein the circuit substrate is provided with a recess in which the solid-state imaging element is accommodated. The semiconductor device according to claim 1, wherein the external terminals include solder balls and are formed in an array. A first unit in which an electrode region around the main surface side of a solid-state image sensor is electrically connected to a translucent substrate having at least a transparent electrode, and the translucent substrate and the solid-state image sensor main surface are opposed to each other with a space therebetween. Forming, and
A circuit base material in which a connection member to the translucent substrate is disposed in a peripheral region on one surface side, and a signal transmission path corresponding to the solid-state imaging device is provided therein, and these signal transmission paths are disposed on the other surface side. Forming a second unit for providing an external terminal area related to
Making one surface side of the second unit face the back surface side of the solid-state imaging device in the first unit, and electrically connecting the connection member of the second unit to the translucent substrate;
A method of manufacturing a semiconductor device including: The electrode region of the solid-state imaging device in the first unit has a plurality of bump electrodes having a predetermined height, and is connected to the transparent electrode of the translucent substrate using an anisotropic conductive member. Semiconductor device manufacturing method. The connection member of the second unit forms a conductive pattern at a predetermined height, and is electrically connected to a predetermined portion of the translucent substrate in the first unit using an anisotropic conductive member. Or a method of manufacturing a semiconductor device according to 10; 12. The method of manufacturing a semiconductor device according to claim 9, wherein an air passage leading to a space between the solid-state imaging device and the translucent substrate is provided in the first unit and the second unit. 13. The method of manufacturing a semiconductor device according to claim 9, wherein in the second unit, the circuit base material is provided with a depression for accommodating the solid-state imaging element in advance. The method of manufacturing a semiconductor device according to claim 9, wherein the external terminal region is reflow-mounted when mounted on the main circuit board by forming solder balls.

Images