JP2006049350A - Light emitting device and its manufacturing method - Google Patents

Light emitting device and its manufacturing method Download PDF

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JP2006049350A
JP2006049350A JP2004223981A JP2004223981A JP2006049350A JP 2006049350 A JP2006049350 A JP 2006049350A JP 2004223981 A JP2004223981 A JP 2004223981A JP 2004223981 A JP2004223981 A JP 2004223981A JP 2006049350 A JP2006049350 A JP 2006049350A
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layer
light emitting
film
light
transparent conductive
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Kenji Goto
謙次 後藤
Takuya Kawashima
卓也 川島
Nobuo Tanabe
信夫 田辺
Tatsuya Ito
達也 伊藤
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Fujikura Ltd
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Priority to JP2004223981A priority Critical patent/JP2006049350A/en
Priority to PCT/JP2005/013698 priority patent/WO2006011497A1/en
Priority to TW094125395A priority patent/TWI266436B/en
Priority to KR1020077003264A priority patent/KR20070046108A/en
Priority to US11/572,547 priority patent/US7683379B2/en
Priority to EP05767213A priority patent/EP1780806A4/en
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a light emitting device having little variation in intensity of light according to directions on the light emitting surface. <P>SOLUTION: The light emitting device 1 comprises at least a laminate consisting of the layer 5 of a first conductivity type, and the layer 7 of a second conductivity type which are stacked via a light emitting portion 6; a metal thin film layer 9 formed on the layer 7 of the second conductivity type which constitutes the laminate; and a transparent conductor 12 formed on the metal thin film layer 9. The transparent conductor 12 consists of two or more layers of transparent conductive films 10 and 11. The crystal grain diameter in the light emitting surface 11' of the transparent conductive film 11 which is the most outer layer is not less than 30 nm nor more than 300 nm. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、化合物半導体層から光を取り出す化合物半導体の発光素子に関し、特に、透明導電膜を窓極として利用した化合物半導体の発光素子及びその製造方法に関する。   The present invention relates to a compound semiconductor light emitting device that extracts light from a compound semiconductor layer, and more particularly to a compound semiconductor light emitting device using a transparent conductive film as a window electrode and a method for manufacturing the same.

GaN、AlGaN、InGaN及びInGaAlN等の窒化ガリウム系化合物半導体は、緑色や青色等の可視光発光デバイスとして注目されている。   Gallium nitride-based compound semiconductors such as GaN, AlGaN, InGaN, and InGaAlN are attracting attention as visible light emitting devices such as green and blue.

これら窒化ガリウム系化合物半導体を用いた光デバイスの製造においては、窒化ガリウム系化合物半導体と格子整合する基板が少ないことから、通常、サファイアが結晶成長用の基板として用いられる。そして、サファイアのような絶縁性の基板を用いる場合は、他のGaAsやInP等の導電性を有する半導体基板を用いた発光素子とは異なり、基板側から電極を取り出すことができないので、半導体層に設けるp側電極およびn側電極は、半導体層を積層させる基板の一面側に形成することになる。   In the manufacture of optical devices using these gallium nitride compound semiconductors, sapphire is usually used as a substrate for crystal growth because there are few substrates that lattice match with gallium nitride compound semiconductors. When an insulating substrate such as sapphire is used, an electrode cannot be taken out from the substrate side unlike a light emitting element using a conductive semiconductor substrate such as GaAs or InP. The p-side electrode and the n-side electrode provided in are formed on one side of the substrate on which the semiconductor layers are stacked.

そこで、発光する光の透過性の低下を抑制するために、透光性の電極を設けた窒化ガリウム系化合物半導体発光素子が提案されている(例えば、特許文献1参照)。   Accordingly, a gallium nitride-based compound semiconductor light-emitting element provided with a translucent electrode has been proposed in order to suppress a decrease in the transmissivity of emitted light (see, for example, Patent Document 1).

図3は、透光性電極を設けた従来の窒化ガリウム系化合物半導体発光素子の一例を示す断面図である。窒化ガリウム系化合物半導体発光素子300は、サファイア基板301の一方の面(図3の上面)にGaNバッファ層303を介してn型GaN層305が設けられ、このn型GaN層305の一方の面(図3の上面)に、p型ドーパントであるMgを含むp型GaN層307とTi/Au等からなるn側電極309が設けられている。そして、n側電極309は、その周囲をSiO膜311aで囲まれてp型GaN層307と電気的に絶縁されている。 FIG. 3 is a cross-sectional view showing an example of a conventional gallium nitride compound semiconductor light emitting device provided with a translucent electrode. In the gallium nitride-based compound semiconductor light emitting device 300, an n-type GaN layer 305 is provided on one surface (upper surface in FIG. 3) of the sapphire substrate 301 via a GaN buffer layer 303, and one surface of the n-type GaN layer 305 is provided. A p-type GaN layer 307 containing Mg as a p-type dopant and an n-side electrode 309 made of Ti / Au or the like are provided on the upper surface of FIG. The n-side electrode 309 is electrically insulated from the p-type GaN layer 307 by surrounding the n-side electrode 309 with a SiO 2 film 311a.

一方、p型GaN層307上にはSiO膜311bとMg入りの金属薄膜層313が設けられ、さらにこの金属薄膜層313上には電流拡散用としてスズ添加酸化インジウム(ITO)膜からなる厚さ100nmの透明導電膜315が設けられ、SiO膜311b上と透明導電膜315の一部を覆うようにTi/Au等からなるp側電極317が設けられている。 On the other hand, a SiO 2 film 311b and a Mg-containing metal thin film layer 313 are provided on the p-type GaN layer 307, and a thickness of a tin-added indium oxide (ITO) film for current diffusion is provided on the metal thin film layer 313. A transparent conductive film 315 having a thickness of 100 nm is provided, and a p-side electrode 317 made of Ti / Au or the like is provided so as to cover the SiO 2 film 311b and a part of the transparent conductive film 315.

つまり、この構成においては、n型GaN層305とp型GaN層307との接合界面から発光される光を、透明導電膜315を通して取り出すことができる。なお、図3において、点線は、p側電極317から透明導電膜315を通って接合界面へ流れる電流の流れを示す。一方、一点鎖線は、接合界面から発光される光が主に透明導電膜315を通って、外部へ放射される状況を示す。   That is, in this configuration, light emitted from the junction interface between the n-type GaN layer 305 and the p-type GaN layer 307 can be extracted through the transparent conductive film 315. In FIG. 3, the dotted line indicates the flow of current flowing from the p-side electrode 317 through the transparent conductive film 315 to the junction interface. On the other hand, the alternate long and short dash line indicates a situation in which light emitted from the bonding interface is emitted to the outside mainly through the transparent conductive film 315.

また、p型ドーパントであるMgをドープしたp型GaN層の上に、電流拡散層として、一層目に真空蒸着法によってスズ添加酸化インジウム(ITO)膜を形成し、その上にスパッタ法により二層目のスズ添加酸化インジウム(ITO)膜を形成して透明導電膜を設けたものが提案されている(例えば、特許文献2参照)。   In addition, a tin-doped indium oxide (ITO) film is formed as a current diffusion layer on the first layer by vacuum deposition on the p-type GaN layer doped with Mg, which is a p-type dopant, and two layers are formed thereon by sputtering. There has been proposed a layer in which a tin-added indium oxide (ITO) film is formed and a transparent conductive film is provided (see, for example, Patent Document 2).

図4は、このような二層のスズ添加酸化インジウムを形成した窒化ガリウム系化合物半導体発光素子400の断面図である。サファイア基板410の一方の面にAlNバッファ層420、厚さ約1.2μmのSiドープGaN層430、n型GaNとn型InGaNの多重量子井戸(MQW)からなる厚さ約40nmの活性層440、AlNとp型GaNの超格子からなる厚さ約20nmのキャップ層450、厚さ約200nmのMgドープGaN層460、厚さ数nmのZn膜470が順に設けられ、この上に、厚さ約10nmの下側透明導電膜である下側スズ添加酸化インジウム膜481と、この下側スズ添加酸化インジウム膜481の上に、上側透明導電膜である厚さ約500nmの上側スズ添加酸化インジウム膜482が形成されて透明導電膜480が設けられ、さらに、一部露出させたSiドープGaN層430上にn型電極491が、上側スズ添加酸化インジウム膜482上にp型電極492が設けられている。   FIG. 4 is a cross-sectional view of a gallium nitride-based compound semiconductor light emitting device 400 in which such two layers of tin-doped indium oxide are formed. On one surface of the sapphire substrate 410, an AlN buffer layer 420, a Si-doped GaN layer 430 having a thickness of about 1.2 μm, and an active layer 440 having a thickness of about 40 nm made of n-type GaN and n-type InGaN multiple quantum wells (MQW). , A cap layer 450 having a thickness of about 20 nm made of a superlattice of AlN and p-type GaN, a Mg-doped GaN layer 460 having a thickness of about 200 nm, and a Zn film 470 having a thickness of several nm are sequentially provided. A lower tin-added indium oxide film 481 which is a lower transparent conductive film of about 10 nm, and an upper tin-added indium oxide film having a thickness of about 500 nm which is an upper transparent conductive film on the lower tin-added indium oxide film 481 482 is formed and a transparent conductive film 480 is provided. Further, an n-type electrode 491 is formed on the partially exposed Si-doped GaN layer 430 by upper tin-added oxidation. p-type electrode 492 is provided on the indium film 482.

下側スズ添加酸化インジウム膜481を真空蒸着法で形成し、上側スズ添加酸化インジウム膜482をスパッタ法で形成していることから、スパッタ法のみによって透明導電膜480を形成した場合に比べると、下側スズ添加酸化インジウム膜481を真空蒸着法で形成した方が、MgドープGaN層460の損傷が少なくなり、動作電圧が低く、光の外部への取出し効率が良い化合物半導体発光素子400が得られると記載されている。   Since the lower tin-added indium oxide film 481 is formed by a vacuum deposition method and the upper tin-added indium oxide film 482 is formed by a sputtering method, compared to the case where the transparent conductive film 480 is formed only by the sputtering method, When the lower tin-added indium oxide film 481 is formed by the vacuum evaporation method, the compound-doped light-emitting device 400 is obtained in which the Mg-doped GaN layer 460 is less damaged, the operating voltage is low, and the light extraction efficiency is good. It is stated that

さらに、スズ添加酸化インジウムからなる透明導電膜ではなく、金属よりなる透光性の電極を設けた窒化ガリウム系化合物半導体発光素子が提案されている(例えば、特許文献3参照)。   Furthermore, a gallium nitride-based compound semiconductor light-emitting element in which a translucent electrode made of metal is provided instead of a transparent conductive film made of tin-added indium oxide has been proposed (for example, see Patent Document 3).

図5は、この一例として、Ni、Auを蒸着して透光性電極505を形成した窒化ガリウム系化合物半導体発光素子500の断面図である。サファイア基板501の一方の面にn型GaN層502、p型GaN層503が順に設けられ、p型GaN層上にNi/Auからなる金属の透光性電極505が設けられている。透光性電極505は、蒸着装置にて、p型GaN層503の上にNiを30nm、Niの上にAuを70nmの厚さで蒸着し、蒸着後、アニーリング装置で、500℃で10分間アニーリングして合金化するとともに透光性にしたものであり、発光効率、製造歩留まりの良い発光ダイオードが製造できると記載されている。
特許第3207773号公報 特許第3394488号公報 特許第2803742号公報
FIG. 5 is a cross-sectional view of a gallium nitride compound semiconductor light emitting device 500 in which Ni and Au are vapor-deposited to form a translucent electrode 505 as an example. An n-type GaN layer 502 and a p-type GaN layer 503 are sequentially provided on one surface of the sapphire substrate 501, and a metal translucent electrode 505 made of Ni / Au is provided on the p-type GaN layer. The translucent electrode 505 is formed by depositing Ni on the p-type GaN layer 503 at a thickness of 30 nm and Au on the Ni at a thickness of 70 nm using a vapor deposition apparatus. After vapor deposition, the annealing apparatus is used at 500 ° C. for 10 minutes. It is described that a light-emitting diode can be manufactured by annealing and alloying and making it light-transmitting and having good luminous efficiency and manufacturing yield.
Japanese Patent No. 3207773 Japanese Patent No. 3394488 Japanese Patent No. 2803742

しかしながら、上記の窒化ガリウム系化合物半導体発光素子300、400、500においては、透明導電体315、480や透光性電極505の屈折率が約2.0で、空気層の屈折率が約1.0であるため、発光層で発光した光が透明導電体や透光性電極を通って空気層に出光される際に、透明導電体や透光性電極と空気層との界面(出光面)における全反射の比率が大きくなり、方位により光の強度が異なるという問題がある。
本発明は、このような事情に鑑みてなされたもので、透明導電体からなる出光面において全反射の比率を抑え、方位による光の強度のバラツキの少ない発光素子を提供することを課題とする。
However, in the gallium nitride compound semiconductor light emitting devices 300, 400, and 500 described above, the refractive index of the transparent conductors 315 and 480 and the translucent electrode 505 is about 2.0, and the refractive index of the air layer is about 1. Since the light emitted from the light emitting layer is emitted to the air layer through the transparent conductor or translucent electrode, the interface between the transparent conductor or translucent electrode and the air layer (light exit surface) There is a problem that the ratio of total reflection in the light beam increases and the light intensity varies depending on the orientation.
The present invention has been made in view of such circumstances, and it is an object of the present invention to provide a light-emitting element that suppresses the ratio of total reflection on the light-emitting surface made of a transparent conductor and has less variation in light intensity depending on the orientation. .

上記課題を解決するために、本発明に係る発光素子は、発光部を介して第一導電型層と第二導電型層を配してなる積層体と、該積層体をなす第二導電型層上に設けた金属薄膜層と、該金属薄膜層上に設けた透明導電体とを少なくとも備えてなる発光素子であって、前記透明導電体は、2層以上の透明導電膜からなり、最外層をなす透明導電膜の出光面における結晶粒径が30nm以上300nm以下であることを特徴としている。   In order to solve the above-described problems, a light-emitting element according to the present invention includes a laminated body in which a first conductive type layer and a second conductive type layer are arranged via a light emitting portion, and a second conductive type forming the laminated body. A light emitting device comprising at least a metal thin film layer provided on a layer and a transparent conductor provided on the metal thin film layer, wherein the transparent conductor comprises two or more transparent conductive films, The crystal grain size at the light exit surface of the transparent conductive film forming the outer layer is 30 nm or more and 300 nm or less.

かかる構成において、発光部とは、第一導電型層と第二導電型層との間に位置する層、又は第一導電型層と第二導電型層の界面を意味する。   In such a configuration, the light emitting part means a layer located between the first conductivity type layer and the second conductivity type layer, or an interface between the first conductivity type layer and the second conductivity type layer.

本発明の発光素子の製造方法は、発光部を介して第一導電型層と第二導電型層を配してなる積層体と、該積層体をなす第二導電型層上に設けた金属薄膜層と、該金属薄膜層上に設けた2層以上の透明導電膜からなる透明導電体とを少なくとも備えてなる発光素子の製造方法であって、前記透明導電体において最外層をなす透明導電膜の膜厚を変えることにより、該透明導電膜の出光面における結晶粒径を制御することを特徴としている。   The method for producing a light-emitting element of the present invention includes a laminated body in which a first conductive type layer and a second conductive type layer are arranged via a light emitting portion, and a metal provided on the second conductive type layer forming the laminated body. A method of manufacturing a light emitting device comprising at least a thin film layer and a transparent conductor comprising two or more transparent conductive films provided on the metal thin film layer, wherein the transparent conductive material forming the outermost layer in the transparent conductor The crystal grain size at the light exit surface of the transparent conductive film is controlled by changing the film thickness.

本発明に係る発光素子は、発光層で発光した光が最外層の透明導電膜から空気層に出光する際、その出光面の結晶粒の大きさによる凹凸や結晶粒界により散乱されるために、多方向に対して強度のバラツキの少ない光が発光される。
また、本発明に係る発光素子の製造方法は、透明導電体の膜厚を変えることにより出光面における結晶粒を制御し、出光される光のバラツキを少なくできる。
In the light emitting device according to the present invention, when light emitted from the light emitting layer is emitted from the outermost transparent conductive film to the air layer, it is scattered by irregularities or crystal grain boundaries due to the size of crystal grains on the light emitting surface. , Light with less intensity variation is emitted in multiple directions.
Moreover, the manufacturing method of the light emitting element which concerns on this invention can control the crystal grain in a light emission surface by changing the film thickness of a transparent conductor, and can reduce the variation in the light emitted.

図1は、本発明に係る発光素子の実施形態の一例を示す断面図である。
なお、以下においては、発光部が層をなす場合について述べるが、界面発光の場合には、第一導電型層と第二導電型層の界面が発光部として機能する。
FIG. 1 is a cross-sectional view showing an example of an embodiment of a light emitting device according to the present invention.
In the following, the case where the light emitting part forms a layer will be described. In the case of interface light emission, the interface between the first conductive type layer and the second conductive type layer functions as the light emitting part.

本発明の発光素子1は、サファイア基板2の一方の面(図1の上面)にGaNバッファ層3を介してSiをドーパントとするn型GaN層4が設けられ、このn型GaN層4を介してSiをドーパントとするn型AlGaN層(主たる第一導電型層)5が設けられている。そして、このn型AlGaN層5を介してInGaNとGaNの多重量子井戸(MQW)構造となる発光層6、発光層6を介してp型ドーパントであるMgを含むp型AlGaN層(主たる第二導電型層)7、p型AlGaN層7を介して、同じくMgをドーパントとするp型GaN層8、p型GaN層8を介してNiからなる金属薄膜層9、金属薄膜層9を介して2層の透明導電膜10、11からなる透明導電体12が設けられている。そして、この透明導電体12の表面の周縁の一部にはp側電極13が設けられ、一方、n型GaN層4の周縁部の一部の上に積層された各層が除去されて、露出したn型GaN層4上にn側電極14が設けられている。   In the light emitting device 1 of the present invention, an n-type GaN layer 4 having Si as a dopant is provided on one surface (upper surface in FIG. 1) of a sapphire substrate 2 with a GaN buffer layer 3 interposed therebetween. An n-type AlGaN layer (main first conductivity type layer) 5 using Si as a dopant is provided. A light emitting layer 6 having an InGaN and GaN multiple quantum well (MQW) structure is formed through the n-type AlGaN layer 5, and a p-type AlGaN layer containing a p-type dopant Mg through the light emitting layer 6 (main second Conductive layer) 7, p-type AlGaN layer 7, p-type GaN layer 8 with Mg as a dopant, p-type GaN layer 8 through Ni thin film layer 9, and metal thin film layer 9 A transparent conductor 12 composed of two layers of transparent conductive films 10 and 11 is provided. Then, a p-side electrode 13 is provided on a part of the peripheral edge of the surface of the transparent conductor 12, while each layer stacked on a part of the peripheral part of the n-type GaN layer 4 is removed and exposed. An n-side electrode 14 is provided on the n-type GaN layer 4.

ここで、透明導電体12は、その最外層がフッ素添加酸化インジウム(以下、FTO膜という)又は酸化スズ(以下、TO膜という)からなる透明導電膜11であり、内層の少なくとも一層がスズ添加酸化インジウム(以下、ITO膜という)、TO膜、酸化亜鉛(以下、ZnO膜という)、アンチモン添加酸化亜鉛(以下、AZO膜という)又はFTO膜からなる透明導電膜10である。そして、いずれの透明導電膜もスプレー熱分解法、CVD法、スパッタ法、真空蒸着法、ゾルゲル法、ペースト塗布法等で成膜され、膜厚を厚くすることにより結晶粒径が大きくなる。   Here, the transparent conductor 12 is a transparent conductive film 11 whose outermost layer is made of fluorine-added indium oxide (hereinafter referred to as FTO film) or tin oxide (hereinafter referred to as TO film), and at least one of the inner layers is tin-added. A transparent conductive film 10 made of indium oxide (hereinafter referred to as ITO film), TO film, zinc oxide (hereinafter referred to as ZnO film), antimony-added zinc oxide (hereinafter referred to as AZO film) or FTO film. Each transparent conductive film is formed by a spray pyrolysis method, a CVD method, a sputtering method, a vacuum deposition method, a sol-gel method, a paste coating method, etc., and the crystal grain size is increased by increasing the film thickness.

本発明に係る発光素子は、出光面の結晶粒径が100nm以上200nm以下であることによって、さらに効率よく散乱されるため、発光される光の強度のバラツキがより少なくなる。   The light emitting element according to the present invention is more efficiently scattered when the crystal grain size of the light exit surface is not less than 100 nm and not more than 200 nm, so that the variation in intensity of emitted light is further reduced.

以下、スプレー熱分解法で、ITO膜からなる内層の透明導電膜10と、FTO膜からなる外層の透明導電膜11を形成し、このFTO膜からなる透明導電体11の膜厚をいろいろと変えて発光素子を作製した。   Thereafter, an inner transparent conductive film 10 made of an ITO film and an outer transparent conductive film 11 made of an FTO film are formed by spray pyrolysis, and the film thickness of the transparent conductor 11 made of the FTO film is changed variously. Thus, a light emitting element was manufactured.

ITO膜は、塩化インジウム(水和物)と塩化スズ(水和物)を、スズの添加量がインジウムに対して元素比で5at%となるように配合してエタノール液に溶解した液を350℃に加熱した金属薄膜層9上に噴霧して形成した。   The ITO film was prepared by mixing 350 ml of an indium chloride (hydrate) and tin chloride (hydrate) compounded so that the added amount of tin was 5 at% in terms of element ratio to indium and dissolved in an ethanol solution. It sprayed and formed on the metal thin film layer 9 heated at degreeC.

FTO膜は、フッ素の添加量がスズに対して数ppm〜数千ppm程度になるように、塩化スズ(水和物)のエタノール液とフッ化アンモニウムの飽和水溶液を混合した液を、550℃に加熱したITO膜上に噴霧して形成した。   The FTO film was prepared by mixing a solution obtained by mixing an ethanol solution of tin chloride (hydrate) with a saturated aqueous solution of ammonium fluoride so that the amount of fluorine added was about several ppm to several thousand ppm with respect to tin. It was formed by spraying on an ITO film heated to 1 mm.

[実施例1]
サファイア基板2の一方の面にn型GaN層4、n型AlGaN層5、InGaNとGaNの多重量子井戸(MQW)構造となる発光層6、p型AlGaN層7、p型GaN層8、Niからなる金属薄膜層9の順に積層されたウエーハを用意し、350℃に加熱した金属薄膜層9上に厚さ350nmのITO膜10を形成後、ITO膜を550℃に昇温して、ITO膜上に120nmのFTO膜11を形成した。FTO透明導電膜11の表面(出光面11´)の結晶粒径は30nmであった。
[Example 1]
On one surface of the sapphire substrate 2, an n-type GaN layer 4, an n-type AlGaN layer 5, a light emitting layer 6 having a multiple quantum well (MQW) structure of InGaN and GaN, a p-type AlGaN layer 7, a p-type GaN layer 8, Ni A wafer laminated in the order of the metal thin film layer 9 is prepared, an ITO film 10 having a thickness of 350 nm is formed on the metal thin film layer 9 heated to 350 ° C., and then the ITO film is heated to 550 ° C. A 120 nm FTO film 11 was formed on the film. The crystal grain size of the surface (light-emitting surface 11 ′) of the FTO transparent conductive film 11 was 30 nm.

次に、透明導電体12上にマスクを形成後、n型GaN層4の一方の面の周縁部が露出するまでエッチングを行い、露出したn型GaN層4上にAlを厚さ約0.4μm蒸着してn側電極14を形成した。一方、マスクを剥がした透明導電体12(FTO膜11)上の周縁の一部に蒸着法により、Alを厚さ約0.8μm蒸着してp側電極13を設けた。   Next, after forming a mask on the transparent conductor 12, etching is performed until the peripheral portion of one surface of the n-type GaN layer 4 is exposed, and Al is deposited on the exposed n-type GaN layer 4 to a thickness of about 0. The n-side electrode 14 was formed by vapor deposition of 4 μm. On the other hand, Al was deposited to a thickness of about 0.8 μm by a vapor deposition method on a part of the periphery on the transparent conductor 12 (FTO film 11) from which the mask was peeled off, thereby providing the p-side electrode 13.

この窒化ガリウム系化合物層を形成したサファイア基板2を300μm角にダイシングしてベアチップとし、このベアチップをステム上にダイボンディングにより実装し、ワイヤボンディングにより配線して発光素子1を作製した。   The sapphire substrate 2 on which this gallium nitride compound layer was formed was diced to 300 μm square to form a bare chip, and this bare chip was mounted on the stem by die bonding and wired to form a light emitting device 1 by wire bonding.

[実施例2]
実施例1におけるFTO膜の膜厚を340nm、出光面の結晶粒径を100nmとした以外は実施例1と同様にして発光素子2を作製した。
[Example 2]
A light emitting device 2 was produced in the same manner as in Example 1 except that the film thickness of the FTO film in Example 1 was 340 nm and the crystal grain size of the light exit surface was 100 nm.

[実施例3]
実施例1におけるFTO膜の膜厚を820nm、出光面の結晶粒径を200nmとした以外は実施例1と同様にして発光素子3を作製した。
[Example 3]
A light-emitting element 3 was fabricated in the same manner as in Example 1 except that the thickness of the FTO film in Example 1 was 820 nm and the crystal grain size of the light exit surface was 200 nm.

[実施例4]
実施例1におけるFTO膜の膜厚を1100nm、出光面の結晶粒径を300nmとした以外は実施例1と同様にして発光素子4を作製した。
[Example 4]
A light-emitting element 4 was produced in the same manner as in Example 1 except that the film thickness of the FTO film in Example 1 was 1100 nm and the crystal grain size of the light exit surface was 300 nm.

[比較例1]
実施例1におけるFTO膜の膜厚を50nm、出光面の結晶粒径を10nmとした以外は実施例1と同様にして発光素子を作製した。
[Comparative Example 1]
A light emitting device was fabricated in the same manner as in Example 1 except that the film thickness of the FTO film in Example 1 was 50 nm and the crystal grain size on the light emitting surface was 10 nm.

[比較例2]
実施例1におけるFTO膜の膜厚を1100nm、出光面の結晶粒径を400nmとした以外は実施例1と同様にして発光素子を作製した。
[Comparative Example 2]
A light emitting device was fabricated in the same manner as in Example 1 except that the film thickness of the FTO film in Example 1 was 1100 nm and the crystal grain size on the light emitting surface was 400 nm.

[評価及び評価結果]
実施例1〜4と比較例1、2で作製した発光素子を発光させて、図2に示すように、90°(鉛直)方向の光の強度と30°方向の光の強度を測定し、90°(鉛直)方向の光の強度(I90)に対する30°方向の光の強度(I30)の比(I30/I90)が0.2未満を×、0.2以上且つ0.5未満を△、0.5以上を○として評価した。すなわち、比(I30/I90)が大きいほど、方位による光の偏りが小さくなっていると言える。評価結果を表1に示す。
[Evaluation and evaluation results]
The light emitting devices manufactured in Examples 1 to 4 and Comparative Examples 1 and 2 were caused to emit light, and as shown in FIG. 2, the light intensity in the 90 ° (vertical) direction and the light intensity in the 30 ° direction were measured, When the ratio (I 30 / I 90 ) of the light intensity (I 30 ) in the 30 ° direction to the light intensity (I 90 ) in the 90 ° (vertical) direction is less than 0.2, ×, 0.2 or more and 0. Evaluation was made with a value of less than 5 as Δ and a value of 0.5 or more as ○. That is, it can be said that the larger the ratio (I 30 / I 90 ), the smaller the deviation of the light due to the orientation. The evaluation results are shown in Table 1.

Figure 2006049350
Figure 2006049350

内層の透明導電膜10を、ITO膜に代えて、TO膜、ZnO膜、AZO膜又はFTO膜からなる2層以上の膜とし、最外層の透明導電膜11をFTO膜に代えてTO膜としても、いずれも同様な結果が得られた。また、透明導電膜をスプレー熱分解法に代えて、CVD法、スパッタ法、真空蒸着法、ゾルゲル法、ペースト塗布法で成膜したが、スプレー熱分解法と同様な結果が得られた。   Instead of the ITO film, the inner transparent conductive film 10 is a film of two or more layers consisting of a TO film, ZnO film, AZO film or FTO film, and the outermost transparent conductive film 11 is a TO film instead of the FTO film. In both cases, similar results were obtained. In addition, the transparent conductive film was formed by CVD, sputtering, vacuum deposition, sol-gel method, paste application method instead of spray pyrolysis, but similar results to spray pyrolysis were obtained.

本発明の実施例に係る発光素子の実施形態の一例を示す断面図である。It is sectional drawing which shows an example of embodiment of the light emitting element which concerns on the Example of this invention. 本発明の評価方法を示す図である。It is a figure which shows the evaluation method of this invention. 従来の窒化ガリウム系化合物半導体発光素子の一例を示す断面図である。It is sectional drawing which shows an example of the conventional gallium nitride type compound semiconductor light emitting element. 従来の窒化ガリウム系化合物半導体発光素子の一例を示す断面図である。It is sectional drawing which shows an example of the conventional gallium nitride type compound semiconductor light emitting element. 従来の窒化ガリウム系化合物半導体発光素子の一例を示す断面図である。It is sectional drawing which shows an example of the conventional gallium nitride type compound semiconductor light emitting element.

符号の説明Explanation of symbols

1 発光素子、5 第一導電型層、6 発光部、7 第二導電型層、9 金属薄膜層、10 、11 透明導電膜、12 透明導電体。

DESCRIPTION OF SYMBOLS 1 Light emitting element, 5 1st conductivity type layer, 6 Light emission part, 7 2nd conductivity type layer, 9 Metal thin film layer, 10, 11 Transparent conductive film, 12 Transparent conductor.

Claims (3)

発光部を介して第一導電型層と第二導電型層を配してなる積層体と、該積層体をなす第二導電型層上に設けた金属薄膜層と、該金属薄膜層上に設けた透明導電体とを少なくとも備えてなる発光素子であって、
前記透明導電体は、2層以上の透明導電膜からなり、最外層をなす透明導電膜の出光面における結晶粒径が30nm以上300nm以下であることを特徴とする発光素子。
A laminated body in which a first conductive type layer and a second conductive type layer are arranged via a light emitting part, a metal thin film layer provided on the second conductive type layer forming the laminated body, and on the metal thin film layer A light emitting device comprising at least a transparent conductor provided,
The light-emitting element, wherein the transparent conductor is composed of two or more transparent conductive films, and has a crystal grain size of 30 nm or more and 300 nm or less on the light exit surface of the transparent conductive film forming the outermost layer.
前記結晶粒径が100nm以上200nm以下であることを特徴とする請求項1に記載の発光素子。   The light emitting device according to claim 1, wherein the crystal grain size is 100 nm or more and 200 nm or less. 発光部を介して第一導電型層と第二導電型層を配してなる積層体と、該積層体をなす第二導電型層上に設けた金属薄膜層と、該金属薄膜層上に設けた2層以上の透明導電膜からなる透明導電体とを少なくとも備えてなる発光素子の製造方法であって、
前記透明導電体において最外層をなす透明導電膜の膜厚を変えることにより、該透明導電膜の出光面における結晶粒径を制御することを特徴とする発光素子の製造方法。

A laminated body in which a first conductive type layer and a second conductive type layer are arranged via a light emitting part, a metal thin film layer provided on the second conductive type layer forming the laminated body, and on the metal thin film layer A method for producing a light emitting device comprising at least a transparent conductor composed of two or more transparent conductive films provided,
A method for producing a light-emitting element, wherein the crystal grain size on the light exit surface of the transparent conductive film is controlled by changing the film thickness of the transparent conductive film forming the outermost layer in the transparent conductor.

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009001596A1 (en) * 2007-06-28 2008-12-31 Kyocera Corporation Light emitting element and illumination device
JP2010003804A (en) * 2008-06-19 2010-01-07 Sharp Corp Nitride semiconductor light-emitting diode element and method of manufacturing the same
JP2012156503A (en) * 2012-01-13 2012-08-16 Toshiba Corp Semiconductor light-emitting element and method of manufacturing the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009001596A1 (en) * 2007-06-28 2008-12-31 Kyocera Corporation Light emitting element and illumination device
JP2010003804A (en) * 2008-06-19 2010-01-07 Sharp Corp Nitride semiconductor light-emitting diode element and method of manufacturing the same
JP2012156503A (en) * 2012-01-13 2012-08-16 Toshiba Corp Semiconductor light-emitting element and method of manufacturing the same

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